From patchwork Wed Jul 24 00:46:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Romero X-Patchwork-Id: 814119 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp2551772wro; Tue, 23 Jul 2024 17:47:29 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCWjfbbXLFbkledzzrNKs8tFoSxF33stkbeH2jwBx2ps+ym+JvvSpKdv2IU8kF1QyIHLWX5jtr/YhkfN+34pC1Dk X-Google-Smtp-Source: AGHT+IG++LO6zBKUgKUTQnZAg6qqCFF8NAr2mJZeAQlBV18Wu/BI21gwFZzpkB2D+Uliv4bYiTAK X-Received: by 2002:a05:622a:4:b0:447:f211:43f8 with SMTP id d75a77b69052e-44fd40fa9f9mr17496351cf.9.1721782049314; Tue, 23 Jul 2024 17:47:29 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1721782049; cv=pass; d=google.com; s=arc-20160816; b=l5YKWOKJmlqwlpE5voD9gHFNJGtIA28qNgj7ydWEt9cx4T5LgJtVYDeQNopGEtG5r+ xkgFOk8n7NpvSBKG8eNEzyjlwHrH2vcqp8EjwW5HpL3j7jt0lw/byPnKqUiW5wSbS2Nm KISkGXJdipwNHhsg+gQX8BoewOYfypqUtvmmgsb2hfF+6gvJJFpbNs/jeJoCA0BU6CLg P7GQuymI/zN4cLtU5LTNNdqfrry64c5lOR1hz9XRnzgCiiaIoaiRhg4J+s75+kOpl3yw gAsmOxdEHIccjplQ/eqyN5CSTwyGn9DWNAHfmD7kfCSeh7GtZM//RAxFbhUQXgQTovDg 5/vA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:message-id:date:subject:cc:to:from:dkim-signature :arc-filter:dmarc-filter:delivered-to; bh=F+ijP86uyna19krPA+0SezK8HhbIVgvkDL95btYDTBk=; fh=eP89t+ZM/c+/2Hl7gnFmPKM9wfkelhbmZK5QfPMckfQ=; b=DidAFVJhWfWSGmeN1Wca/KG8vibaRs9Ygng9/uMM9yw6luLbenev24dfKrS/jyr18M /FcjWV5LKu0NxyRUHCyg2O+x+CiylAgvXl4m+K5aaXTeHxjDqURzc6fFHrqZjtj/SSjR q0b2odh3R/aHa/+fDDFwV70xKC8Kl5BqayhVcRB9FYUtLzgQ/XFRB2BogOXl/HMSe60Z w9XfrYxaEkSqP+LSQWGfewSTIFfgXfx8lLFJGQFYIhH3yDWjKHHm9ZSiN6BtziRuAg07 MusfezDkaXF1EZV0X60/2DtQyLsYwACslheLjarQL3anxZcsRJV08LDyGh6nYHxFY6EG i25w==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="dX/iim9q"; arc=pass (i=1); spf=pass (google.com: domain of gdb-patches-bounces~patch=linaro.org@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gdb-patches-bounces~patch=linaro.org@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from server2.sourceware.org (server2.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id d75a77b69052e-44f9cf2151fsi112931161cf.802.2024.07.23.17.47.29 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Jul 2024 17:47:29 -0700 (PDT) Received-SPF: pass (google.com: domain of gdb-patches-bounces~patch=linaro.org@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="dX/iim9q"; arc=pass (i=1); spf=pass (google.com: domain of gdb-patches-bounces~patch=linaro.org@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gdb-patches-bounces~patch=linaro.org@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id D73A73858C56 for ; Wed, 24 Jul 2024 00:47:28 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from mail-pg1-x52e.google.com (mail-pg1-x52e.google.com [IPv6:2607:f8b0:4864:20::52e]) by sourceware.org (Postfix) with ESMTPS id A6E983858D29 for ; Wed, 24 Jul 2024 00:46:44 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A6E983858D29 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linaro.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org A6E983858D29 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::52e ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1721782010; cv=none; b=QiPuMJeoRei+v0UijLNJ8Z81R12hsZqxMfvGUF+jRd8tWfXtal2y4CMm4WZlUtiwSsPMggh7w21NQ6damQwg/+DaDaXZLu88zte1TZMmtMPCS9LHjxQYW54cOSMHC4MPTPsTGg9MuyDCDwT0LTvHQAO3EKpcTTRstHxSEdflDvA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1721782010; c=relaxed/simple; bh=hkvdLfEY5waJa5M8VGA8pS9vOa8ekxtpYGZTPLdQtOk=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=W0ols8U59K/5TRl0o7y1VFdAuq3Lyo0OGqIcbsYHMt10qbQt0Rgogc3qH107CJmxLWvbRByYfTvP+/mNE50Tc+FbWUIC55FnPzlvBTK9G1aOJ60aPATMKuTkIYJvsesK2+Zf0i/BN5ZFbYOLBOo79v9Gq+pOdFM8jpUAIwMINeU= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-pg1-x52e.google.com with SMTP id 41be03b00d2f7-656d8b346d2so831590a12.2 for ; Tue, 23 Jul 2024 17:46:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1721782003; x=1722386803; darn=sourceware.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=F+ijP86uyna19krPA+0SezK8HhbIVgvkDL95btYDTBk=; b=dX/iim9q9VgrA8cFfXEAkrLMHB1Mc0Xa3gdcfkHlvm2nvVh/dEYBydhDOhBrb3V7o5 Y6vMNDX3kFet/2eOgbGtweo51n91l09sBR/HlCxC4M1fmnLIrODjophZZzB5xRkLxAJO 7XfP/y+3Rc44S2+b5Z1C+K9gW+HWt9ToKI7ekO5FL4Ru5wq2ktwsOOdRgg8QEeIShOyw SgbjdjmrTEZW99I7caru6tTEMOojTup9jHB8/l4+5jHYug7GA+3iURZaOJT0t0vlRqYj EFBUyrz6jocxHzmLL5XYYWiZXS1lGQVG6K4kz4hciqB6wRqEHhSSNdOb6UJEeWklAeop MWqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721782003; x=1722386803; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=F+ijP86uyna19krPA+0SezK8HhbIVgvkDL95btYDTBk=; b=AAY97UJ3FwW7XCOMc6LxVOTud3W80zFMdkzsQzhBX7yjVhCdeczIIamMg9CUpq4PS1 cGjw6Opl4K+aM/LAfeK16mGGZVv95Gs5rd9xawD5gZTiXM/mK8G6/CTNN9C0w+3gO5SG CEXTJb/ZHbmcxL6h/OuHBkKbxmM90gBB8am2CZ9FMpmkkxpUEy8h1dI+hE+X2KXvSeI9 LbXHdYrDkyRqF57BWDyHeQOzSOiN2DXGVgVGXNEUyA+YdpM+KMm2yJqQr+ocvoWHXb5u fhnEQd5mkFjRvN0G8CCkBVs99Q/XIST2wWlsGkXbPGzDF76MP3JmG4FyuZ1U2lb9dMtw yMdQ== X-Gm-Message-State: AOJu0Yw5epvJRc3AwaX/koJ4OwrGLhWbJX8sC3nrrwU6fBejoTDMCzG9 7m8x2DehkmcYUQ+pf2VdkJ0lGgLLQfvQBRXcW1YnUrH88UMA9wdhAFYNpPS7HokDv9F53r1GRBs T5SM= X-Received: by 2002:a17:90a:a40d:b0:2c9:b72:7a1f with SMTP id 98e67ed59e1d1-2cdaf558f5bmr1464219a91.28.1721782002679; Tue, 23 Jul 2024 17:46:42 -0700 (PDT) Received: from amd.. ([2804:7f0:b402:e86e:3e7c:3fff:fe7a:e83b]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2cdb74c321bsm253855a91.56.2024.07.23.17.46.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Jul 2024 17:46:41 -0700 (PDT) From: Gustavo Romero To: gdb-patches@sourceware.org, luis.machado@arm.com, thiago.bauermann@linaro.org Cc: gustavo.romero@linaro.org Subject: [PATCH v2] gdb: aarch64: Support MTE on baremetal Date: Wed, 24 Jul 2024 00:46:33 +0000 Message-Id: <20240724004633.2015180-1-gustavo.romero@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-13.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~patch=linaro.org@sourceware.org This commit moves aarch64_linux_memtag_matches_p, aarch64_linux_set_memtags, aarch64_linux_get_memtag, and aarch64_linux_memtag_to_string hooks (plus aarch64_mte_get_atag function used by them), along with the setting of the memtag granule size, from aarch64-linux-tdep.c to aarch64-tdep.c, making MTE available on baremetal targets. Since the aarch64-linux-tdep.c layer inherits these hooks from aarch64-tdep.c, there is no effective change for aarch64-linux targets. Helpers used both in aarch64-tdep.c and in aarch64-linux-tdep.c where moved from arch/aarch64-mte-linux.{c,h} to new arch/aarch64-mte.{c,h} files. Signed-off-by: Gustavo Romero --- gdb/Makefile.in | 3 + gdb/aarch64-linux-tdep.c | 168 +---------------------------------- gdb/aarch64-tdep.c | 168 +++++++++++++++++++++++++++++++++++ gdb/aarch64-tdep.h | 2 + gdb/arch/aarch64-mte-linux.c | 56 ------------ gdb/arch/aarch64-mte-linux.h | 27 ------ gdb/arch/aarch64-mte.c | 77 ++++++++++++++++ gdb/arch/aarch64-mte.h | 51 +++++++++++ gdb/configure.tgt | 3 +- 9 files changed, 304 insertions(+), 251 deletions(-) create mode 100644 gdb/arch/aarch64-mte.c create mode 100644 gdb/arch/aarch64-mte.h diff --git a/gdb/Makefile.in b/gdb/Makefile.in index 1c697bf0ab1..6744b8218ec 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -746,6 +746,7 @@ ALL_64_TARGET_OBS = \ amd64-windows-tdep.o \ arch/aarch64.o \ arch/aarch64-insn.o \ + arch/aarch64-mte.o \ arch/aarch64-mte-linux.o \ arch/aarch64-scalable-linux.o \ arch/amd64-linux-tdesc.o \ @@ -1551,6 +1552,7 @@ HFILES_NO_SRCDIR = \ arch/aarch32.h \ arch/aarch64.h \ arch/aarch64-insn.h \ + arch/aarch64-mte.h \ arch/aarch64-mte-linux.h \ arch/aarch64-scalable-linux.h \ arch/amd64-linux-tdesc.h \ @@ -1664,6 +1666,7 @@ ALLDEPFILES = \ arch/aarch32.c \ arch/aarch64.c \ arch/aarch64-insn.c \ + arch/aarch64-mte.c \ arch/aarch64-mte-linux.c \ arch/aarch64-scalable-linux.c \ arch/amd64.c \ diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c index a1296a8f0c7..ada9614673e 100644 --- a/gdb/aarch64-linux-tdep.c +++ b/gdb/aarch64-linux-tdep.c @@ -48,6 +48,7 @@ #include "record-full.h" #include "linux-record.h" +#include "arch/aarch64-mte.h" #include "arch/aarch64-mte-linux.h" #include "arch/aarch64-scalable-linux.h" @@ -2427,29 +2428,6 @@ aarch64_linux_gcc_target_options (struct gdbarch *gdbarch) return {}; } -/* Helper to get the allocation tag from a 64-bit ADDRESS. - - Return the allocation tag if successful and nullopt otherwise. */ - -static std::optional -aarch64_mte_get_atag (CORE_ADDR address) -{ - gdb::byte_vector tags; - - /* Attempt to fetch the allocation tag. */ - if (!target_fetch_memtags (address, 1, tags, - static_cast (memtag_type::allocation))) - return {}; - - /* Only one tag should've been returned. Make sure we got exactly that. */ - if (tags.size () != 1) - error (_("Target returned an unexpected number of tags.")); - - /* Although our tags are 4 bits in size, they are stored in a - byte. */ - return tags[0]; -} - /* Implement the tagged_address_p gdbarch method. */ static bool @@ -2466,132 +2444,6 @@ aarch64_linux_tagged_address_p (struct gdbarch *gdbarch, CORE_ADDR address) return true; } -/* Implement the memtag_matches_p gdbarch method. */ - -static bool -aarch64_linux_memtag_matches_p (struct gdbarch *gdbarch, - struct value *address) -{ - gdb_assert (address != nullptr); - - CORE_ADDR addr = value_as_address (address); - - /* Fetch the allocation tag for ADDRESS. */ - std::optional atag - = aarch64_mte_get_atag (gdbarch_remove_non_address_bits (gdbarch, addr)); - - if (!atag.has_value ()) - return true; - - /* Fetch the logical tag for ADDRESS. */ - gdb_byte ltag = aarch64_mte_get_ltag (addr); - - /* Are the tags the same? */ - return ltag == *atag; -} - -/* Implement the set_memtags gdbarch method. */ - -static bool -aarch64_linux_set_memtags (struct gdbarch *gdbarch, struct value *address, - size_t length, const gdb::byte_vector &tags, - memtag_type tag_type) -{ - gdb_assert (!tags.empty ()); - gdb_assert (address != nullptr); - - CORE_ADDR addr = value_as_address (address); - - /* Set the logical tag or the allocation tag. */ - if (tag_type == memtag_type::logical) - { - /* When setting logical tags, we don't care about the length, since - we are only setting a single logical tag. */ - addr = aarch64_mte_set_ltag (addr, tags[0]); - - /* Update the value's content with the tag. */ - enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); - gdb_byte *srcbuf = address->contents_raw ().data (); - store_unsigned_integer (srcbuf, sizeof (addr), byte_order, addr); - } - else - { - /* Remove the top byte. */ - addr = gdbarch_remove_non_address_bits (gdbarch, addr); - - /* With G being the number of tag granules and N the number of tags - passed in, we can have the following cases: - - 1 - G == N: Store all the N tags to memory. - - 2 - G < N : Warn about having more tags than granules, but write G - tags. - - 3 - G > N : This is a "fill tags" operation. We should use the tags - as a pattern to fill the granules repeatedly until we have - written G tags to memory. - */ - - size_t g = aarch64_mte_get_tag_granules (addr, length, - AARCH64_MTE_GRANULE_SIZE); - size_t n = tags.size (); - - if (g < n) - warning (_("Got more tags than memory granules. Tags will be " - "truncated.")); - else if (g > n) - warning (_("Using tag pattern to fill memory range.")); - - if (!target_store_memtags (addr, length, tags, - static_cast (memtag_type::allocation))) - return false; - } - return true; -} - -/* Implement the get_memtag gdbarch method. */ - -static struct value * -aarch64_linux_get_memtag (struct gdbarch *gdbarch, struct value *address, - memtag_type tag_type) -{ - gdb_assert (address != nullptr); - - CORE_ADDR addr = value_as_address (address); - CORE_ADDR tag = 0; - - /* Get the logical tag or the allocation tag. */ - if (tag_type == memtag_type::logical) - tag = aarch64_mte_get_ltag (addr); - else - { - /* Remove the top byte. */ - addr = gdbarch_remove_non_address_bits (gdbarch, addr); - std::optional atag = aarch64_mte_get_atag (addr); - - if (!atag.has_value ()) - return nullptr; - - tag = *atag; - } - - /* Convert the tag to a value. */ - return value_from_ulongest (builtin_type (gdbarch)->builtin_unsigned_int, - tag); -} - -/* Implement the memtag_to_string gdbarch method. */ - -static std::string -aarch64_linux_memtag_to_string (struct gdbarch *gdbarch, struct value *tag_value) -{ - if (tag_value == nullptr) - return ""; - - CORE_ADDR tag = value_as_address (tag_value); - - return string_printf ("0x%s", phex_nz (tag, sizeof (tag))); -} /* AArch64 Linux implementation of the report_signal_info gdbarch hook. Displays information about possible memory tag violations. */ @@ -2900,24 +2752,6 @@ aarch64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) /* Register a hook for checking if an address is tagged or not. */ set_gdbarch_tagged_address_p (gdbarch, aarch64_linux_tagged_address_p); - /* Register a hook for checking if there is a memory tag match. */ - set_gdbarch_memtag_matches_p (gdbarch, - aarch64_linux_memtag_matches_p); - - /* Register a hook for setting the logical/allocation tags for - a range of addresses. */ - set_gdbarch_set_memtags (gdbarch, aarch64_linux_set_memtags); - - /* Register a hook for extracting the logical/allocation tag from an - address. */ - set_gdbarch_get_memtag (gdbarch, aarch64_linux_get_memtag); - - /* Set the allocation tag granule size to 16 bytes. */ - set_gdbarch_memtag_granule_size (gdbarch, AARCH64_MTE_GRANULE_SIZE); - - /* Register a hook for converting a memory tag to a string. */ - set_gdbarch_memtag_to_string (gdbarch, aarch64_linux_memtag_to_string); - set_gdbarch_report_signal_info (gdbarch, aarch64_linux_report_signal_info); diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index e4bca6c6632..865b1c0b13b 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -45,6 +45,7 @@ #include "aarch64-tdep.h" #include "aarch64-ravenscar-thread.h" +#include "arch/aarch64-mte.h" #include "record.h" #include "record-full.h" @@ -4088,6 +4089,156 @@ aarch64_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc) return streq (inst.opcode->name, "ret"); } +/* Helper to get the allocation tag from a 64-bit ADDRESS. + + Return the allocation tag if successful and nullopt otherwise. */ + +std::optional +aarch64_mte_get_atag (CORE_ADDR address) +{ + gdb::byte_vector tags; + + /* Attempt to fetch the allocation tag. */ + if (!target_fetch_memtags (address, 1, tags, + static_cast (memtag_type::allocation))) + return {}; + + /* Only one tag should've been returned. Make sure we got exactly that. */ + if (tags.size () != 1) + error (_("Target returned an unexpected number of tags.")); + + /* Although our tags are 4 bits in size, they are stored in a + byte. */ + return tags[0]; +} + +/* Implement the memtag_matches_p gdbarch method. */ + +static bool +aarch64_memtag_matches_p (struct gdbarch *gdbarch, + struct value *address) +{ + gdb_assert (address != nullptr); + + CORE_ADDR addr = value_as_address (address); + + /* Fetch the allocation tag for ADDRESS. */ + std::optional atag + = aarch64_mte_get_atag (gdbarch_remove_non_address_bits (gdbarch, addr)); + + if (!atag.has_value ()) + return true; + + /* Fetch the logical tag for ADDRESS. */ + gdb_byte ltag = aarch64_mte_get_ltag (addr); + + /* Are the tags the same? */ + return ltag == *atag; +} + +/* Implement the set_memtags gdbarch method. */ + +static bool +aarch64_set_memtags (struct gdbarch *gdbarch, struct value *address, + size_t length, const gdb::byte_vector &tags, + memtag_type tag_type) +{ + gdb_assert (!tags.empty ()); + gdb_assert (address != nullptr); + + CORE_ADDR addr = value_as_address (address); + + /* Set the logical tag or the allocation tag. */ + if (tag_type == memtag_type::logical) + { + /* When setting logical tags, we don't care about the length, since + we are only setting a single logical tag. */ + addr = aarch64_mte_set_ltag (addr, tags[0]); + + /* Update the value's content with the tag. */ + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + gdb_byte *srcbuf = address->contents_raw ().data (); + store_unsigned_integer (srcbuf, sizeof (addr), byte_order, addr); + } + else + { + /* Remove the top byte. */ + addr = gdbarch_remove_non_address_bits (gdbarch, addr); + + /* With G being the number of tag granules and N the number of tags + passed in, we can have the following cases: + + 1 - G == N: Store all the N tags to memory. + + 2 - G < N : Warn about having more tags than granules, but write G + tags. + + 3 - G > N : This is a "fill tags" operation. We should use the tags + as a pattern to fill the granules repeatedly until we have + written G tags to memory. + */ + + size_t g = aarch64_mte_get_tag_granules (addr, length, + AARCH64_MTE_GRANULE_SIZE); + size_t n = tags.size (); + + if (g < n) + warning (_("Got more tags than memory granules. Tags will be " + "truncated.")); + else if (g > n) + warning (_("Using tag pattern to fill memory range.")); + + if (!target_store_memtags (addr, length, tags, + static_cast (memtag_type::allocation))) + return false; + } + return true; +} + +/* Implement the get_memtag gdbarch method. */ + +static struct value * +aarch64_get_memtag (struct gdbarch *gdbarch, struct value *address, + memtag_type tag_type) +{ + gdb_assert (address != nullptr); + + CORE_ADDR addr = value_as_address (address); + CORE_ADDR tag = 0; + + /* Get the logical tag or the allocation tag. */ + if (tag_type == memtag_type::logical) + tag = aarch64_mte_get_ltag (addr); + else + { + /* Remove the top byte. */ + addr = gdbarch_remove_non_address_bits (gdbarch, addr); + std::optional atag = aarch64_mte_get_atag (addr); + + if (!atag.has_value ()) + return nullptr; + + tag = *atag; + } + + /* Convert the tag to a value. */ + return value_from_ulongest (builtin_type (gdbarch)->builtin_unsigned_int, + tag); +} + +/* Implement the memtag_to_string gdbarch method. */ + +static std::string +aarch64_memtag_to_string (struct gdbarch *gdbarch, struct value *tag_value) +{ + if (tag_value == nullptr) + return ""; + + CORE_ADDR tag = value_as_address (tag_value); + + return string_printf ("0x%s", phex_nz (tag, sizeof (tag))); +} + /* AArch64 implementation of the remove_non_address_bits gdbarch hook. Remove non address bits from a pointer value. */ @@ -4504,6 +4655,23 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) aarch64_pseudo_register_reggroup_p); set_gdbarch_cannot_store_register (gdbarch, aarch64_cannot_store_register); + /* Set the allocation tag granule size to 16 bytes. */ + set_gdbarch_memtag_granule_size (gdbarch, AARCH64_MTE_GRANULE_SIZE); + + /* Register a hook for checking if there is a memory tag match. */ + set_gdbarch_memtag_matches_p (gdbarch, aarch64_memtag_matches_p); + + /* Register a hook for setting the logical/allocation tags for + a range of addresses. */ + set_gdbarch_set_memtags (gdbarch, aarch64_set_memtags); + + /* Register a hook for extracting the logical/allocation tag from an + address. */ + set_gdbarch_get_memtag (gdbarch, aarch64_get_memtag); + + /* Register a hook for converting a memory tag to a string. */ + set_gdbarch_memtag_to_string (gdbarch, aarch64_memtag_to_string); + /* ABI */ set_gdbarch_short_bit (gdbarch, 16); set_gdbarch_int_bit (gdbarch, 32); diff --git a/gdb/aarch64-tdep.h b/gdb/aarch64-tdep.h index 0e6024bfcbc..50166fb4f24 100644 --- a/gdb/aarch64-tdep.h +++ b/gdb/aarch64-tdep.h @@ -203,4 +203,6 @@ void aarch64_displaced_step_fixup (struct gdbarch *gdbarch, bool aarch64_displaced_step_hw_singlestep (struct gdbarch *gdbarch); +std::optional aarch64_mte_get_atag (CORE_ADDR address); + #endif /* aarch64-tdep.h */ diff --git a/gdb/arch/aarch64-mte-linux.c b/gdb/arch/aarch64-mte-linux.c index e0b441e3859..49426d7751c 100644 --- a/gdb/arch/aarch64-mte-linux.c +++ b/gdb/arch/aarch64-mte-linux.c @@ -75,59 +75,3 @@ aarch64_mte_unpack_tags (gdb::byte_vector &tags, bool skip_first) tags = std::move (unpacked_tags); } -/* See arch/aarch64-mte-linux.h */ - -size_t -aarch64_mte_get_tag_granules (CORE_ADDR addr, size_t len, size_t granule_size) -{ - /* An empty range has 0 tag granules. */ - if (len == 0) - return 0; - - /* Start address */ - CORE_ADDR s_addr = align_down (addr, granule_size); - /* End address */ - CORE_ADDR e_addr = align_down (addr + len - 1, granule_size); - - /* We always have at least 1 granule because len is non-zero at this - point. */ - return 1 + (e_addr - s_addr) / granule_size; -} - -/* See arch/aarch64-mte-linux.h */ - -CORE_ADDR -aarch64_mte_make_ltag_bits (CORE_ADDR value) -{ - return value & AARCH64_MTE_LOGICAL_MAX_VALUE; -} - -/* See arch/aarch64-mte-linux.h */ - -CORE_ADDR -aarch64_mte_make_ltag (CORE_ADDR value) -{ - return (aarch64_mte_make_ltag_bits (value) - << AARCH64_MTE_LOGICAL_TAG_START_BIT); -} - -/* See arch/aarch64-mte-linux.h */ - -CORE_ADDR -aarch64_mte_set_ltag (CORE_ADDR address, CORE_ADDR tag) -{ - /* Remove the existing tag. */ - address &= ~aarch64_mte_make_ltag (AARCH64_MTE_LOGICAL_MAX_VALUE); - - /* Return the new tagged address. */ - return address | aarch64_mte_make_ltag (tag); -} - -/* See arch/aarch64-mte-linux.h */ - -CORE_ADDR -aarch64_mte_get_ltag (CORE_ADDR address) -{ - CORE_ADDR ltag_addr = address >> AARCH64_MTE_LOGICAL_TAG_START_BIT; - return aarch64_mte_make_ltag_bits (ltag_addr); -} diff --git a/gdb/arch/aarch64-mte-linux.h b/gdb/arch/aarch64-mte-linux.h index 460b10e05c9..686749f547a 100644 --- a/gdb/arch/aarch64-mte-linux.h +++ b/gdb/arch/aarch64-mte-linux.h @@ -29,12 +29,6 @@ /* The MTE regset consists of a single 64-bit register. */ #define AARCH64_LINUX_SIZEOF_MTE 8 -/* We have one tag per 16 bytes of memory. */ -#define AARCH64_MTE_GRANULE_SIZE 16 -#define AARCH64_MTE_TAG_BIT_SIZE 4 -#define AARCH64_MTE_LOGICAL_TAG_START_BIT 56 -#define AARCH64_MTE_LOGICAL_MAX_VALUE 0xf - /* Memory tagging definitions. */ #ifndef SEGV_MTEAERR # define SEGV_MTEAERR 8 @@ -50,27 +44,6 @@ enum class aarch64_memtag_type mte_allocation }; -/* Return the number of tag granules in the memory range - [ADDR, ADDR + LEN) given GRANULE_SIZE. */ -extern size_t aarch64_mte_get_tag_granules (CORE_ADDR addr, size_t len, - size_t granule_size); - -/* Return the 4-bit tag made from VALUE. */ -extern CORE_ADDR aarch64_mte_make_ltag_bits (CORE_ADDR value); - -/* Return the 4-bit tag that can be OR-ed to an address. */ -extern CORE_ADDR aarch64_mte_make_ltag (CORE_ADDR value); - -/* Helper to set the logical TAG for a 64-bit ADDRESS. - - It is always possible to set the logical tag. */ -extern CORE_ADDR aarch64_mte_set_ltag (CORE_ADDR address, CORE_ADDR tag); - -/* Helper to get the logical tag from a 64-bit ADDRESS. - - It is always possible to get the logical tag. */ -extern CORE_ADDR aarch64_mte_get_ltag (CORE_ADDR address); - /* Given a TAGS vector containing 1 MTE tag per byte, pack the data as 2 tags per byte and resize the vector. */ extern void aarch64_mte_pack_tags (gdb::byte_vector &tags); diff --git a/gdb/arch/aarch64-mte.c b/gdb/arch/aarch64-mte.c new file mode 100644 index 00000000000..908e12cdf3b --- /dev/null +++ b/gdb/arch/aarch64-mte.c @@ -0,0 +1,77 @@ +/* Common AArch64 functionality for MTE + + Copyright (C) 2021-2024 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#include "arch/aarch64-mte.h" + +/* See arch/aarch64-mte.h */ + +size_t +aarch64_mte_get_tag_granules (CORE_ADDR addr, size_t len, size_t granule_size) +{ + /* An empty range has 0 tag granules. */ + if (len == 0) + return 0; + + /* Start address */ + CORE_ADDR s_addr = align_down (addr, granule_size); + /* End address */ + CORE_ADDR e_addr = align_down (addr + len - 1, granule_size); + + /* We always have at least 1 granule because len is non-zero at this + point. */ + return 1 + (e_addr - s_addr) / granule_size; +} + +/* See arch/aarch64-mte.h */ + +CORE_ADDR +aarch64_mte_make_ltag_bits (CORE_ADDR value) +{ + return value & AARCH64_MTE_LOGICAL_MAX_VALUE; +} + +/* See arch/aarch64-mte.h */ + +CORE_ADDR +aarch64_mte_make_ltag (CORE_ADDR value) +{ + return (aarch64_mte_make_ltag_bits (value) + << AARCH64_MTE_LOGICAL_TAG_START_BIT); +} + +/* See arch/aarch64-mte.h */ + +CORE_ADDR +aarch64_mte_set_ltag (CORE_ADDR address, CORE_ADDR tag) +{ + /* Remove the existing tag. */ + address &= ~aarch64_mte_make_ltag (AARCH64_MTE_LOGICAL_MAX_VALUE); + + /* Return the new tagged address. */ + return address | aarch64_mte_make_ltag (tag); +} + +/* See arch/aarch64-mte.h */ + +CORE_ADDR +aarch64_mte_get_ltag (CORE_ADDR address) +{ + CORE_ADDR ltag_addr = address >> AARCH64_MTE_LOGICAL_TAG_START_BIT; + return aarch64_mte_make_ltag_bits (ltag_addr); +} diff --git a/gdb/arch/aarch64-mte.h b/gdb/arch/aarch64-mte.h new file mode 100644 index 00000000000..7d8445ee89f --- /dev/null +++ b/gdb/arch/aarch64-mte.h @@ -0,0 +1,51 @@ +/* Common AArch64 definitions for MTE + + Copyright (C) 2021-2024 Free Software Foundation, Inc. + + This file is part of GDB. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +#ifndef ARCH_AARCH64_MTE_H +#define ARCH_AARCH64_MTE_H + + +/* We have one tag per 16 bytes of memory. */ +#define AARCH64_MTE_GRANULE_SIZE 16 +#define AARCH64_MTE_TAG_BIT_SIZE 4 +#define AARCH64_MTE_LOGICAL_TAG_START_BIT 56 +#define AARCH64_MTE_LOGICAL_MAX_VALUE 0xf + +/* Return the number of tag granules in the memory range + [ADDR, ADDR + LEN) given GRANULE_SIZE. */ +extern size_t aarch64_mte_get_tag_granules (CORE_ADDR addr, size_t len, + size_t granule_size); + +/* Return the 4-bit tag made from VALUE. */ +extern CORE_ADDR aarch64_mte_make_ltag_bits (CORE_ADDR value); + +/* Return the 4-bit tag that can be OR-ed to an address. */ +extern CORE_ADDR aarch64_mte_make_ltag (CORE_ADDR value); + +/* Helper to set the logical TAG for a 64-bit ADDRESS. + + It is always possible to set the logical tag. */ +extern CORE_ADDR aarch64_mte_set_ltag (CORE_ADDR address, CORE_ADDR tag); + +/* Helper to get the logical tag from a 64-bit ADDRESS. + + It is always possible to get the logical tag. */ +extern CORE_ADDR aarch64_mte_get_ltag (CORE_ADDR address); + +#endif /* ARCH_AARCH64_MTE_H */ diff --git a/gdb/configure.tgt b/gdb/configure.tgt index 8326c458eb1..5fb14b65426 100644 --- a/gdb/configure.tgt +++ b/gdb/configure.tgt @@ -59,7 +59,8 @@ amd64_tobjs="ravenscar-thread.o amd64-ravenscar-thread.o \ case "${targ}" in aarch64*-*-*) cpu_obs="aarch32-tdep.o aarch64-tdep.o arch/aarch32.o \ - arch/aarch64-insn.o arch/aarch64.o ravenscar-thread.o \ + arch/aarch64-insn.o arch/aarch64.o arch/aarch64-mte.o \ + ravenscar-thread.o \ aarch64-ravenscar-thread.o";; alpha*-*-*)