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[34.90.240.118]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7acab2311asm40253566b.18.2024.07.25.00.06.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Jul 2024 00:06:00 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 25 Jul 2024 08:05:58 +0100 Subject: [PATCH v5 1/2] dt-bindings: serial: samsung: avoid duplicating permitted clock-names Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240725-gs101-uart-binding-v5-1-e237be8253a9@linaro.org> References: <20240725-gs101-uart-binding-v5-0-e237be8253a9@linaro.org> In-Reply-To: <20240725-gs101-uart-binding-v5-0-e237be8253a9@linaro.org> To: Greg Kroah-Hartman , Jiri Slaby , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.13.0 This binding currently duplicates the permitted clock-names in various places, and when adding more compatibles, clock-names will have to be duplicated even more. The reason is: 1) subschemas (-if: ...), still have to match the top-level: pattern: '^clk_uart_baud[0-3]$' 2) there is one compatible that doesn't follow sequential numbering for the clock names (samsung,s3c6400-uart) 3) when limiting the number of clock-names, we also want to enforce sequential names Because of 1) and 2), the patterns can not simply be changed to constant strings, and later overridden in a different subschema (for samsung,s3c6400-uart only). Since we can't populate the top-level clock-names based on the compatible, and because when limiting the number of items we generally want sequential numbers and not a pattern, move the permitted strings into a subschema of its own and populate it based on the compatible: * 'uart clk_uart_baud2 clk_uart_baud3' for the one outlier * 'uart clk_uart_baud0..3' for everything else This way we can avoid having to duplicate the permitted names everywhere. While at it, add blank lines as per the universal style, which is to have blank lines between properties, except where they are booleans. Also add another example using a compatible that uses the default clock-names scheme, as opposed to the existing example that uses samsung,s3c6400-uart's non-default clock-names. This allows testing both versions of the clock-names property when running dt_binding_check. Reviewed-by: Rob Herring (Arm) Signed-off-by: André Draszik --- v5: * drop now-meaningless top level clock-names description (Rob) * collect tags --- .../devicetree/bindings/serial/samsung_uart.yaml | 64 +++++++++++++++++----- 1 file changed, 50 insertions(+), 14 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml index 0f0131026911..0075712e7be8 100644 --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -56,14 +56,8 @@ properties: maxItems: 5 clock-names: - description: N = 0 is allowed for SoCs without internal baud clock mux. minItems: 2 - items: - - const: uart - - pattern: '^clk_uart_baud[0-3]$' - - pattern: '^clk_uart_baud[0-3]$' - - pattern: '^clk_uart_baud[0-3]$' - - pattern: '^clk_uart_baud[0-3]$' + maxItems: 5 dmas: items: @@ -103,18 +97,45 @@ allOf: compatible: contains: enum: - - samsung,s5pv210-uart + - samsung,s3c6400-uart then: properties: clocks: - minItems: 2 + minItems: 3 maxItems: 3 + + clock-names: + items: + - const: uart + - const: clk_uart_baud2 + - const: clk_uart_baud3 + + else: + properties: clock-names: minItems: 2 items: - const: uart - - pattern: '^clk_uart_baud[0-1]$' - - pattern: '^clk_uart_baud[0-1]$' + - const: clk_uart_baud0 + - const: clk_uart_baud1 + - const: clk_uart_baud2 + - const: clk_uart_baud3 + + - if: + properties: + compatible: + contains: + enum: + - samsung,s5pv210-uart + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + minItems: 3 + maxItems: 3 - if: properties: @@ -129,10 +150,9 @@ allOf: properties: clocks: maxItems: 2 + clock-names: - items: - - const: uart - - const: clk_uart_baud0 + maxItems: 2 - if: properties: @@ -163,3 +183,19 @@ examples: <&clocks SCLK_UART>; samsung,uart-fifosize = <16>; }; + - | + #include + #include + #include + + serial_0: serial@10a00000 { + compatible = "google,gs101-uart"; + reg = <0x10a00000 0xc0>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>, + <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; + clock-names = "uart", "clk_uart_baud0"; + interrupts = ; + pinctrl-0 = <&uart0_bus>; + pinctrl-names = "default"; + samsung,uart-fifosize = <256>; + }; From patchwork Thu Jul 25 07:05:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 814985 Received: from mail-ed1-f54.google.com (mail-ed1-f54.google.com [209.85.208.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F91D16EBEE for ; Thu, 25 Jul 2024 07:06:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.54 ARC-Seal: i=1; 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[34.90.240.118]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7acab2311asm40253566b.18.2024.07.25.00.06.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Jul 2024 00:06:01 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Thu, 25 Jul 2024 08:05:59 +0100 Subject: [PATCH v5 2/2] dt-bindings: serial: samsung: fix maxItems for gs101 Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240725-gs101-uart-binding-v5-2-e237be8253a9@linaro.org> References: <20240725-gs101-uart-binding-v5-0-e237be8253a9@linaro.org> In-Reply-To: <20240725-gs101-uart-binding-v5-0-e237be8253a9@linaro.org> To: Greg Kroah-Hartman , Jiri Slaby , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Peter Griffin , Tudor Ambarus , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.13.0 While gs101 needs exactly two clocks for the UART, the schema doesn't currently limit the maximum number to this and instead the default of five from this schema is applied. Update the schema accordingly. Reviewed-by: Rob Herring (Arm) Signed-off-by: André Draszik --- v5: * collect tags v4: * drop description from clocks:, it was Linux-specific and a we'll implement something that makes it obsolete anyway * no need to duplicate clock-names anymore --- Documentation/devicetree/bindings/serial/samsung_uart.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml index 0075712e7be8..788c80e47831 100644 --- a/Documentation/devicetree/bindings/serial/samsung_uart.yaml +++ b/Documentation/devicetree/bindings/serial/samsung_uart.yaml @@ -166,6 +166,12 @@ allOf: properties: reg-io-width: false + clocks: + maxItems: 2 + + clock-names: + maxItems: 2 + unevaluatedProperties: false examples: