From patchwork Fri Jul 26 11:01:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateusz Majewski X-Patchwork-Id: 814738 Received: from mailout2.w1.samsung.com (mailout2.w1.samsung.com [210.118.77.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 371F3176FCF for ; Fri, 26 Jul 2024 11:01:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.118.77.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721991704; cv=none; b=HNnIj6szZewcbNfpwH0VE9bhPsvCnQQwmJcHnvVDjOzdaxUFvB9o5iN4Wa1g0o3L5VCUwK1ZPpD5fSV70fMBMhItS7BLf1Js7i27GlfuHJyyQoumcW0GPF6HCQxOSo6RGRd2lAy3RJlym9SH1yB8izjtoKRFxuzU/xqngqnbVY8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721991704; c=relaxed/simple; bh=G8SGnQGahIJiAKPyeQeKvQveyR8NwK/8b3eWpshYTq4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:MIME-Version: Content-Type:References; b=hitYAktu7YHlPiDTAUXgHTb4sYJWjfrBwzn9dG9LoE7Kwx+4i8gUmPuwvt/OvFGyzxyeokVwqQWQFuuIHGKP4LkHq5riHBeeQ02bhCVv4Mnlq2Zo1dw8eyGSblmOC66gA2neGuNvJmShNciao43MNIGjgHo+kHsGUU3SHC48a6w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=WuebpcVa; arc=none smtp.client-ip=210.118.77.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="WuebpcVa" Received: from eucas1p2.samsung.com (unknown [182.198.249.207]) by mailout2.w1.samsung.com (KnoxPortal) with ESMTP id 20240726110136euoutp028a772841cd734d54d904586ba5b6c3a1~lvlL69nJ20039000390euoutp02m for ; Fri, 26 Jul 2024 11:01:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout2.w1.samsung.com 20240726110136euoutp028a772841cd734d54d904586ba5b6c3a1~lvlL69nJ20039000390euoutp02m DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1721991696; bh=yj+6WZo4Jh1Ovyod4LsdDGfLEkdyiOxcrU/H1erGQ2c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WuebpcVaZpEhBsXuX4L9GF9ljrcQvIGv+A+xxLZB+vvnS3kaLRUjMVs+tj9K2kLxH dwRh7aRPfm2fbrFzIQIX6IilhuR3p/YFCulGHXjEYSuuCSiGtzEMhwSj6N5dma8fEm 5txJw4Jm9DKj5I9gWwDhTPzvE+1Yw/sN3x6uVcxc= Received: from eusmges2new.samsung.com (unknown [203.254.199.244]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20240726110135eucas1p2f440c6f19de370858c5b3edd8bd530d7~lvlLfnYJ12816328163eucas1p24; Fri, 26 Jul 2024 11:01:35 +0000 (GMT) Received: from eucas1p2.samsung.com ( [182.198.249.207]) by eusmges2new.samsung.com (EUCPMTA) with SMTP id D3.C8.09875.F0283A66; Fri, 26 Jul 2024 12:01:35 +0100 (BST) Received: from eusmtrp2.samsung.com (unknown [182.198.249.139]) by eucas1p1.samsung.com (KnoxPortal) with ESMTPA id 20240726110135eucas1p118620038792bd07154f32f7b95f48326~lvlLI2pis1393813938eucas1p1y; Fri, 26 Jul 2024 11:01:35 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20240726110135eusmtrp27822bfa3b67deacdf4b7e23184051d2b~lvlLIJp5H1722117221eusmtrp2W; Fri, 26 Jul 2024 11:01:35 +0000 (GMT) X-AuditID: cbfec7f4-131ff70000002693-ae-66a3820f53dd Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 00.27.08810.F0283A66; Fri, 26 Jul 2024 12:01:35 +0100 (BST) Received: from AMDC4515.eu.corp.samsungelectronics.net (unknown [106.120.51.28]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20240726110134eusmtip2073c6e21bbffe2d00530a31abf252afa~lvlKQNE-H2468524685eusmtip2Q; Fri, 26 Jul 2024 11:01:34 +0000 (GMT) From: Mateusz Majewski To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mateusz Majewski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Anand Moon Subject: [PATCH v2 1/6] drivers/thermal/exynos: use DEFINE_SIMPLE_DEV_PM_OPS Date: Fri, 26 Jul 2024 13:01:05 +0200 Message-ID: <20240726110114.1509733-2-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240726110114.1509733-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrDKsWRmVeSWpSXmKPExsWy7djP87r8TYvTDDa/ULV4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEcVlk5Kak1mWWqRvl8CVsfT0NraCt2wVO1uPsTUw/mDtYuTgkBAw kZiytayLkYtDSGAFo8Tb7rlsEM4XRonGCx1QzmdGiYdP7zN1MXKCdcy50MMIkVjOKDF30zYW CKeVSeLQz+UsIFVsAgYSD94sYwdJiAgsBpr14x0riMMs8IRZ4uerxUD97BzCAj4SMwJA7mAR UJX4vy8IpJVXwE7i5cbvzBDL5CV69/eBLeYUsJdYMukjI0SNoMTJmU/AVjED1TRvnc0MMl1C YDanxKrZ66GaXSRaHl5hh7CFJV4d3wJly0j83zkf6pt8iRmb37NAwqJC4u5BLwjTWuLjGWYQ k1lAU2L9Ln2IYkeJHc0PGSEq+CRuvBWEOIBPYtK26cwQYV6JjjYhiGpVieN7JkGdIi3xpOU2 1EoPiR+d/9knMCrOQvLKLCSvzELYu4CReRWjeGppcW56arFRXmq5XnFibnFpXrpecn7uJkZg gjv97/iXHYzLX33UO8TIxMF4iFGCg1lJhHfZ/YVpQrwpiZVVqUX58UWlOanFhxilOViUxHlV U+RThQTSE0tSs1NTC1KLYLJMHJxSDUwbjjX0rH/enBRQIcbm8sxx2ddTUUJLrdotl60/NDFW YUe+54/YKRpNz+12P+YpnXNlQvtW0ZcGXXyhTkvKr14PV56xzm1KOWPT0s925xz9nBI23q8W 5/GoDhPxMz5stq3XtWupQ+1Jd4ZKFZVp+ofn1XFb+2u7O52O3PX5z7mcbie2PzzfLW4a/Nzc fSecIfu/5oX4x0YyCk0sb9M5mIrnfLfIZvk6+/z8YxJ2M2uu8m1neX5SxCoqZoGxtfbCW2vm qi4Q8YwLY7RLEj2o8ManSDuPd42gdOuOoE+3M55LCZ46fvHM8i933kwUsNxvZ9e1Nd9Uy0b4 hOWlVPmYtskfVX6e3elQ9WnH8ZSlckosxRmJhlrMRcWJAM4ANPXfAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrDIsWRmVeSWpSXmKPExsVy+t/xe7r8TYvTDL4u5bd4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEaVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CXsfT0NraCt2wVO1uPsTUw/mDtYuTkkBAwkZhzoYexi5GLQ0hgKaPEikVN LBAJaYnDX6awQ9jCEn+udbFBFDUzSbyfvZoRJMEmYCDx4M0ysCIRgeWMEpvbPUBsZoF3zBLt 5/26GNk5hAV8JGYEdDFycLAIqEr83xcEUsArYCfxcuN3Zojp8hK9+/uYQGxOAXuJJZM+gg0X Aqq53wuxiFdAUOLkzCcsEMPlJZq3zmaewCgwC0lqFpLUAkamVYwiqaXFuem5xYZ6xYm5xaV5 6XrJ+bmbGIHRuO3Yz807GOe9+qh3iJGJg/EQowQHs5II77L7C9OEeFMSK6tSi/Lji0pzUosP MZoCnT2RWUo0OR+YDvJK4g3NDEwNTcwsDUwtzYyVxHk9CzoShQTSE0tSs1NTC1KLYPqYODil GphiQqbHRVrZbWrWsnoWxlp4hn9CX0x0zEX+dWtvzvpuY8l15OyG2zduLkqf2mq9b9PeG4f3 pv4VEZH5c0DZmu8Xs9r9D8E6B27kbmKbeuyS/csf24JeG365tcBD4ExLyOenM9U2+hotrHuq +r/Y0Ud1R7zb0YBNNnO3pVyc/PrBqfDI0p67+vtvz1e+3HjzR9mhGX1qz+1uuq74O+9nv6Ln rt0qK5Q22FxzCBFYLruMTXf1gstpXuxTG5hElnTwPefk8tv87kbh0UeWui9jp1cvP3jhZTXb 4nlGJ7zNTYV3Npg0Jk4JyXT/deMKn7hmx8o/zIe8TPjm7gz+vP6c1z4WRubi1s+yoU27g9V6 QjOXK7EUZyQaajEXFScCADPq7qtPAwAA X-CMS-MailID: 20240726110135eucas1p118620038792bd07154f32f7b95f48326 X-Msg-Generator: CA X-RootMTR: 20240726110135eucas1p118620038792bd07154f32f7b95f48326 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240726110135eucas1p118620038792bd07154f32f7b95f48326 References: <20240726110114.1509733-1-m.majewski2@samsung.com> SIMPLE_DEV_PM_OPS is deprecated, as noted next to its definition. Signed-off-by: Mateusz Majewski Reviewed-by: Sam Protsenko --- drivers/thermal/samsung/exynos_tmu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 96cffb2c44ba..9b7ca93a72f1 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -1150,8 +1150,8 @@ static int exynos_tmu_resume(struct device *dev) return 0; } -static SIMPLE_DEV_PM_OPS(exynos_tmu_pm, - exynos_tmu_suspend, exynos_tmu_resume); +static DEFINE_SIMPLE_DEV_PM_OPS(exynos_tmu_pm, + exynos_tmu_suspend, exynos_tmu_resume); #define EXYNOS_TMU_PM (&exynos_tmu_pm) #else #define EXYNOS_TMU_PM NULL From patchwork Fri Jul 26 11:01:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateusz Majewski X-Patchwork-Id: 815221 Received: from mailout2.w1.samsung.com (mailout2.w1.samsung.com [210.118.77.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D66E17994D for ; Fri, 26 Jul 2024 11:01:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.118.77.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721991707; cv=none; b=lT9yruVPltVBzuTgZtAtWf0w42iQXhJyz7VNZz4LnO4q+bX/M5aBZraXrOTrbR4gUu1C5ljnUGF+zGCkznXFwn82AmKzd7AFhTPzEbaldtoSmPwPdo2L5tKwG31aQuSQtZ0/JndrIuDssLLOoGQf4Fmke7VYylIACD40pkiy10U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721991707; c=relaxed/simple; bh=6+x2NU+bO6SYQfy5ttoPIJJ+saijMgx572Nw18DrXkU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:MIME-Version: Content-Type:References; b=TgJ7i2yfejQ9qF13HQnB7X02N45aSFSbXKDErv2PqTmPMvq2kQqWY4yziaJfoKHrtHJOX5zWeQ+O+LSAE8HnnRYbo7dMrrVOeNukp5gvq4LVKLtA2XAWBWkY5599W8zO7zhJwNLG173CQ8xjmn8vltgDfUwvjobKv+HRYmrGtr0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com; spf=pass smtp.mailfrom=samsung.com; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b=RQpO+Bpl; arc=none smtp.client-ip=210.118.77.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=samsung.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=samsung.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="RQpO+Bpl" Received: from eucas1p2.samsung.com (unknown [182.198.249.207]) by mailout2.w1.samsung.com (KnoxPortal) with ESMTP id 20240726110137euoutp02a29a6a44b8a13f7aa5be496e80bafe37~lvlNkZLMx0260202602euoutp02U for ; Fri, 26 Jul 2024 11:01:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 mailout2.w1.samsung.com 20240726110137euoutp02a29a6a44b8a13f7aa5be496e80bafe37~lvlNkZLMx0260202602euoutp02U DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=samsung.com; s=mail20170921; t=1721991697; bh=0BeiRE0Ve1CHw9X9pRqdMFWHo53wdnWTEwVCP12z2WY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RQpO+BplCEPdPNcJIP/+0Gau5v/Fihmq0RmwLl/oDRjgbFzHQ/K8YH3GSVlYiwQhQ ba2UmSSjPwWzduYD7tbdQShyJCGl7g4NJpnmRWCLfrFYv3zAjttlJiXZEwrZqeN4Fi QimxMoBJbzu0t6txo3grOkn2+hS0cqjdowur27Bs= Received: from eusmges1new.samsung.com (unknown [203.254.199.242]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20240726110137eucas1p1652a14a57090c22eca8fac649b09c57e~lvlNNESh01887818878eucas1p15; Fri, 26 Jul 2024 11:01:37 +0000 (GMT) Received: from eucas1p1.samsung.com ( [182.198.249.206]) by eusmges1new.samsung.com (EUCPMTA) with SMTP id B6.FB.09624.11283A66; Fri, 26 Jul 2024 12:01:37 +0100 (BST) Received: from eusmtrp2.samsung.com (unknown [182.198.249.139]) by eucas1p2.samsung.com (KnoxPortal) with ESMTPA id 20240726110136eucas1p2c100992bb710acb5a12bb294401d4aeb~lvlMr-E8a2810128101eucas1p2_; Fri, 26 Jul 2024 11:01:36 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20240726110136eusmtrp2bc7ffc6e6474d8bb970f41fb4e1451f7~lvlMrOXnB1722517225eusmtrp2R; Fri, 26 Jul 2024 11:01:36 +0000 (GMT) X-AuditID: cbfec7f2-bfbff70000002598-e7-66a382119a17 Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id C7.B1.09010.01283A66; Fri, 26 Jul 2024 12:01:36 +0100 (BST) Received: from AMDC4515.eu.corp.samsungelectronics.net (unknown [106.120.51.28]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20240726110135eusmtip2e50f4a82cc50608f178a006e78792e12~lvlLvW_zQ2467724677eusmtip2L; Fri, 26 Jul 2024 11:01:35 +0000 (GMT) From: Mateusz Majewski To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mateusz Majewski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Anand Moon Subject: [PATCH v2 2/6] drivers/thermal/exynos: use pm_sleep_ptr instead of conditional compilation Date: Fri, 26 Jul 2024 13:01:06 +0200 Message-ID: <20240726110114.1509733-3-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240726110114.1509733-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrAKsWRmVeSWpSXmKPExsWy7djPc7qCTYvTDFqOi1g8mLeNzeL7lutM Fmv2nmOymPdZ1mL+kXOsFufPb2C32PT4GqvF5V1z2Cw+9x5htJhxfh+TxbqNt9gtFja1sFtM PDaZ2WLul6nMFv/37GC3ePKwj83ied8+JgdBjzXz1jB67Jx1l91j8Z6XTB6bVnWyedy5tofN Y/OSeo++LasYPT5vkgvgiOKySUnNySxLLdK3S+DK2HhoH0vBCq6KQzOmsDQw3uDoYuTkkBAw kdh86ylLFyMXh5DACkaJ3RefsUE4XxglZj3eDeV8ZpRoXbmCCabl8+SvTBCJ5YwSf5v6mSGc ViaJUwsfgVWxCRhIPHizjB0kISKwmFGi8cc7VhCHWeAJs8TPV4sZQaqEBVIlfixYA2azCKhK dH88wgJi8wrYSVyeNIMZYp+8RO/+PrCpnAL2EksmfWSEqBGUODnzCVg9M1BN89bZYGdICEzn lLi5+zYLRLOLxOv7p1ghbGGJV8e3sEPYMhL/d86HeihfYsbm90D1HEB2hcTdg14QprXExzPM ICazgKbE+l36EMWOEvMfPGaCqOCTuPFWEOIAPolJ26YzQ4R5JTrahCCqVSWO75kE9Ye0xJOW 21ArPSQWvbzPPIFRcRaSV2YheWUWwt4FjMyrGMVTS4tz01OLDfNSy/WKE3OLS/PS9ZLzczcx AhPd6X/HP+1gnPvqo94hRiYOxkOMEhzMSiK8y+4vTBPiTUmsrEotyo8vKs1JLT7EKM3BoiTO q5oinyokkJ5YkpqdmlqQWgSTZeLglGpgkolfZa3T2qFfaq/nI9PMvVfv5uRbRRYWHp7P+z+e tr2fm75vs6eYj4bMTfkHP04/t11/6oT1R8ldKdeSBT9wCGvxz7B6Of3WwuY6YdsUc5fEDUXR d2JWL2W2LN9XuuHSUpXwC3HOt8/wJid6C6VyPm/w6U4JflDoHp1+s9xrwRGn0po/HDNfv5x4 5PB2B3HG4q+fi9+/PPbjt02O6uKlbc+1fWK6p6d6iKrv135dXvrHcQbXzcs/Z5UXBWzTnvlu 9u79zFULo7z++Sx57pl/I3GBtzHv9uefM65/S/I4J1nZvzXlTqvWx6b3UQoN3hFtLcqblbJc F/LeOtdx5dmyvoTaFYz6rwoEObimrk1VYinOSDTUYi4qTgQApFXlL+MDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrPIsWRmVeSWpSXmKPExsVy+t/xe7oCTYvTDL5vNrR4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEaVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CXsfHQPpaCFVwVh2ZMYWlgvMHRxcjJISFgIvF58lemLkYuDiGBpYwSJ5Yu YoRISEsc/jKFHcIWlvhzrYsNoqiZSWLrtWtgCTYBA4kHb5aB2SICyxklNrd7gNjMAu+YJdrP +4HYwgLJEnde9jKD2CwCqhLdH4+wgNi8AnYSlyfNYIZYIC/Ru7+PCcTmFLCXWDLpI9gRQkA1 93tXM0LUC0qcnPmEBWK+vETz1tnMExgFZiFJzUKSWsDItIpRJLW0ODc9t9hIrzgxt7g0L10v OT93EyMwJrcd+7llB+PKVx/1DjEycTAeYpTgYFYS4V12f2GaEG9KYmVValF+fFFpTmrxIUZT oLsnMkuJJucDk0JeSbyhmYGpoYmZpYGppZmxkjivZ0FHopBAemJJanZqakFqEUwfEwenVANT UF2w3GydgoVNkWJ3l/59ltJ+rMfczHvqR763ogVKz2eai306bGD7e67khAPH2A6KyP6urpWw fstru2Gfwp5TPlYa8bcYnht9+8YTvsGA8c7Png9z5ttqdOuVTba4EMrtULmq8n/mBHv1TzkG 1m/bu6ZMPdphkzNhpsuXlJ/dxhekbZyudp5SYK996aZ5019+X+JZHqfXcta3GP+1RiQ+eS7b eNz/XIXPJbe1144GTRRb8V8n6fWHYsuG4/5fO6ad1/nza/VvuTXmr08ylAlo+pf9e+5Tcmpa o9OZA5yZ8+MWP+6Ltj/6/06iw8rQipyFCi0L418c5vimZbfebhJ7CZcE63yGS8+d21X+8R1Q YinOSDTUYi4qTgQAoW1ef1IDAAA= X-CMS-MailID: 20240726110136eucas1p2c100992bb710acb5a12bb294401d4aeb X-Msg-Generator: CA X-RootMTR: 20240726110136eucas1p2c100992bb710acb5a12bb294401d4aeb X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240726110136eucas1p2c100992bb710acb5a12bb294401d4aeb References: <20240726110114.1509733-1-m.majewski2@samsung.com> Slightly simpler and nothing is lost if _suspend and _resume functions are built unconditionally. Suggested-by: Anand Moon Signed-off-by: Mateusz Majewski --- drivers/thermal/samsung/exynos_tmu.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 9b7ca93a72f1..b68e9755c933 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -1132,7 +1132,6 @@ static void exynos_tmu_remove(struct platform_device *pdev) clk_unprepare(data->clk_sec); } -#ifdef CONFIG_PM_SLEEP static int exynos_tmu_suspend(struct device *dev) { exynos_tmu_control(to_platform_device(dev), false); @@ -1152,15 +1151,11 @@ static int exynos_tmu_resume(struct device *dev) static DEFINE_SIMPLE_DEV_PM_OPS(exynos_tmu_pm, exynos_tmu_suspend, exynos_tmu_resume); -#define EXYNOS_TMU_PM (&exynos_tmu_pm) -#else -#define EXYNOS_TMU_PM NULL -#endif static struct platform_driver exynos_tmu_driver = { .driver = { .name = "exynos-tmu", - .pm = EXYNOS_TMU_PM, + .pm = pm_sleep_ptr(&exynos_tmu_pm), .of_match_table = exynos_tmu_match, }, .probe = exynos_tmu_probe, From patchwork Fri Jul 26 11:01:07 2024 Content-Type: text/plain; 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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Anand Moon Subject: [PATCH v2 3/6] drivers/thermal/exynos: improve sanitize_temp_error Date: Fri, 26 Jul 2024 13:01:07 +0200 Message-ID: <20240726110114.1509733-4-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240726110114.1509733-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrLKsWRmVeSWpSXmKPExsWy7djP87pCTYvTDD7OM7R4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEcVlk5Kak1mWWqRvl8CVcXHpdNaCe1IV3xbuY2lg7BPrYuTkkBAw kWiadpaxi5GLQ0hgBaPExXXPWSGcL4wSHQ1PWECqhAQ+M0o0vnSF6Tj54DoLRNFyRonu3k5m CKeVSWLB+qOsIFVsAgYSD94sYwdJiAgsBur+8Q5sLrPAE2aJn68WA23k4BAW8JZoOaoJ0sAi oCrR1fGKEcTmFbCT2P75MxPEOnmJ3v19YDangL3EkkkfoWoEJU7OhDiPGaimeetssCskBCZz SpxfvY8dZL6EgIvE5PmMEHOEJV4d38IOYctI/N85H2p+vsSMze9ZIMorJO4e9IIwrSU+nmEG MZkFNCXW79KHKHaU+NT2Amo2n8SNt4IQ+/kkJm2bzgwR5pXoaBOCqFaVOL5nEjOELS3xpOU2 1EoPiYZjU1kmMCrOQvLJLCSfzELYu4CReRWjeGppcW56arFxXmq5XnFibnFpXrpecn7uJkZg ijv97/jXHYwrXn3UO8TIxMF4iFGCg1lJhHfZ/YVpQrwpiZVVqUX58UWlOanFhxilOViUxHlV U+RThQTSE0tSs1NTC1KLYLJMHJxSDUzFWsG8P2vPyFxf6iYwR2/zsd0Vl5MKqrjK1xzcNIn/ iHtRxbFLFx6+CjO5uk2+0yvN5bCy2Z/rpVN2te6/mZ+1Lbgs4AKX0wXz8sLJ5/fvm3JB3+zq qc1xHFd8wmZNv3FDICNw48pNCzWfLs7fka5r6JBx5d7EHaLn95r7i1qkRRYIMbm5iSkzyDZN +Ja8KsT7Q/q0A7eOlVvWubAdP/32tpiz+JdrsReMfKNnmmlUJsn99b5bo3FO5f763/dOSe+q E3rowXY0bcbS6n+L9G4FHGX11g0XXM4qxDd1zexf9dbtD6fIN/96v0GqTGHbhEpGpYc78nus IqO+1M8TmBT8mKHDLcBYQLNJQDJN+bUSS3FGoqEWc1FxIgDJvvKY4AMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrHIsWRmVeSWpSXmKPExsVy+t/xe7pCTYvTDKav5rN4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEaVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CXcXHpdNaCe1IV3xbuY2lg7BPrYuTkkBAwkTj54DpLFyMXh5DAUkaJ1Y3r GSES0hKHv0xhh7CFJf5c62KDKGpmkliy5DcrSIJNwEDiwZtlYEUiAssZJTa3e4DYzALvmCXa z/t1MXJwCAt4S7Qc1QQJswioSnR1vAKbzytgJ7H982cmiPnyEr37+8BsTgF7iSWTPoLVCAHV 3O9dDVUvKHFy5hMWiPHyEs1bZzNPYBSYhSQ1C0lqASPTKkaR1NLi3PTcYkO94sTc4tK8dL3k /NxNjMCI3Hbs5+YdjPNefdQ7xMjEwXiIUYKDWUmEd9n9hWlCvCmJlVWpRfnxRaU5qcWHGE2B 7p7ILCWanA9MCXkl8YZmBqaGJmaWBqaWZsZK4ryeBR2JQgLpiSWp2ampBalFMH1MHJxSDUxz HNvbJ94U31wbIM2bmN96YXXSJwO5WP7JD183+VeGaOQ/K07+17xsr63Q0wUG13uf8UdeVmiY Gf7U7pqx07R3Zaun+EpLMVfb662vKZ11+Zthe69e+uvF0Wfv7rQs8b7rx1CvYTzZ+bac4v1f Wmrb4msOl7FbvlgxJym+76Wf+uakNTveZqgwND4WLi29NlEwZFde7rrFlpE+Cyw/u2Zmarh/ 6LBeVuovPVdn/Z/ipOfG1lflV59Kff2lb36LVU99d8iLQ0KfPv05vTKL/cRhy0Ud6bItk/50 c7exCxUFeQmf2PXvuhxv5H3XLMt8FW+DN1mdB37+7vzBnvw3KuPT4sVpV38LLz2yc15mrxJL cUaioRZzUXEiAJ+QUVpRAwAA X-CMS-MailID: 20240726110138eucas1p27f33fb42af84ba7938703796c3f80727 X-Msg-Generator: CA X-RootMTR: 20240726110138eucas1p27f33fb42af84ba7938703796c3f80727 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240726110138eucas1p27f33fb42af84ba7938703796c3f80727 References: <20240726110114.1509733-1-m.majewski2@samsung.com> There are two minor issues regarding this function. One is that it attempts to calculate the second calibration value even if 1-point trimming is being used; in this case, the calculated value is probably not useful and is never used anyway. Changing this also requires a minor reordering in Exynos5433 initialization function, so that we know which type of trimming is used before we call sanitize_temp_error. The second issue is that the function is not very consistent when it comes to the use of Exynos7-specific parameters. This seems to not be an issue in practice, in part because some of these issues are related to the mentioned calculation of the second calibration value. However, fixing this makes the code a bit less confusing, and will be required for Exynos850 which has 9-bit temperature values and uses 2-point trimming. Signed-off-by: Mateusz Majewski --- v1 -> v2: reworked to change shift instead of only mask and to also fix the 2-point trimming issue. drivers/thermal/samsung/exynos_tmu.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index b68e9755c933..087a09628e23 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -111,6 +111,7 @@ #define EXYNOS7_TMU_REG_EMUL_CON 0x160 #define EXYNOS7_TMU_TEMP_MASK 0x1ff +#define EXYNOS7_TMU_TEMP_SHIFT 9 #define EXYNOS7_PD_DET_EN_SHIFT 23 #define EXYNOS7_TMU_INTEN_RISE0_SHIFT 0 #define EXYNOS7_EMUL_DATA_SHIFT 7 @@ -234,20 +235,23 @@ static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info) u16 tmu_temp_mask = (data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_MASK : EXYNOS_TMU_TEMP_MASK; + int tmu_85_shift = + (data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_SHIFT + : EXYNOS_TRIMINFO_85_SHIFT; data->temp_error1 = trim_info & tmu_temp_mask; - data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) & - EXYNOS_TMU_TEMP_MASK); - if (!data->temp_error1 || (data->min_efuse_value > data->temp_error1) || (data->temp_error1 > data->max_efuse_value)) - data->temp_error1 = data->efuse_value & EXYNOS_TMU_TEMP_MASK; + data->temp_error1 = data->efuse_value & tmu_temp_mask; - if (!data->temp_error2) - data->temp_error2 = - (data->efuse_value >> EXYNOS_TRIMINFO_85_SHIFT) & - EXYNOS_TMU_TEMP_MASK; + if (data->cal_type == TYPE_TWO_POINT_TRIMMING) { + data->temp_error2 = (trim_info >> tmu_85_shift) & tmu_temp_mask; + if (!data->temp_error2) + data->temp_error2 = + (data->efuse_value >> tmu_85_shift) & + tmu_temp_mask; + } } static int exynos_tmu_initialize(struct platform_device *pdev) @@ -510,7 +514,6 @@ static void exynos5433_tmu_initialize(struct platform_device *pdev) int sensor_id, cal_type; trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO); - sanitize_temp_error(data, trim_info); /* Read the temperature sensor id */ sensor_id = (trim_info & EXYNOS5433_TRIMINFO_SENSOR_ID_MASK) @@ -532,6 +535,8 @@ static void exynos5433_tmu_initialize(struct platform_device *pdev) break; } + sanitize_temp_error(data, trim_info); + dev_info(&pdev->dev, "Calibration type is %d-point calibration\n", cal_type ? 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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Anand Moon Subject: [PATCH v2 4/6] dt-bindings: thermal: samsung,exynos: add exynos850-tmu string Date: Fri, 26 Jul 2024 13:01:08 +0200 Message-ID: <20240726110114.1509733-5-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240726110114.1509733-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrPKsWRmVeSWpSXmKPExsWy7djPc7oiTYvTDDY9ZrR4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEcVlk5Kak1mWWqRvl8CVsW/VLraCUxwVW8+eZG9gvMXWxcjJISFg IjFzxgnmLkYuDiGBFYwSx39MZ4FwvjBKTJ1wnQnC+cwocf71TXaYlu2r57GA2EICyxkl/l41 gShqZZJYPu8ZM0iCTcBA4sGbZewgCRGBxYwSjT/esYI4zAJPmCV+vlrMCFIlLBAh0dtzHGws i4CqxNnVF8C6eQXsJO62HmOFWCcv0bu/jwnE5hSwl1gy6SMjRI2gxMmZT8DOYAaqad46G+wL CYHZnBKvph9lhGh2kZh1fhYLhC0s8er4FqgfZCT+75zPBGHnS8zY/B6ohgPIrpC4e9ALwrSW +HiGGcRkFtCUWL9LH6LYUaLxzm6oYj6JG28FIQ7gk5i0bTozRJhXoqNNCKJaVeL4nknMELa0 xJOW21ArPSQuLZ3JOoFRcRaSV2YheWUWwt4FjMyrGMVTS4tz01OLjfNSy/WKE3OLS/PS9ZLz czcxAtPc6X/Hv+5gXPHqo94hRiYOxkOMEhzMSiK8y+4vTBPiTUmsrEotyo8vKs1JLT7EKM3B oiTOq5oinyokkJ5YkpqdmlqQWgSTZeLglGpg4tae4umUetX3xLT0ZNHsmg2r3tl1Vte7KIl0 brnEV3P+ceqnK39vWi46/Hzpf/VTF6IPiak2t9lM5nPxL+ePzBT54LtiqcYs16T9h1yitvuY 2/VmsXu5PLSc0vMm7G2G962ii4JM8a/k5ufu/jXL+dbBGfdvc+//z7e+7YtKVomx6oz9nNbb 1gZM5TuzUfDI4tlaNvNO7ggsLMoSDd0hfvCz5pqM6smiPCdvpdrclbiVy+N5K0m67invi+LA 5bvX7n8m+f1I5nYvv7zr5ba92znM/j5JZHr/0/JewXVDa9PimMSfV1v/BPxyKL9/64XZ9I57 T3Z+8nzPv8qj/XUM+3L2jPudT1XX88jKdujPVGIpzkg01GIuKk4EAF9Vh1PiAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrHIsWRmVeSWpSXmKPExsVy+t/xe7rCTYvTDL5vUbV4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEaVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CXsW/VLraCUxwVW8+eZG9gvMXWxcjJISFgIrF99TyWLkYuDiGBpYwSsze8 YIZISEsc/jKFHcIWlvhzrYsNoqiZSWL13JusIAk2AQOJB2+WgRWJCCxnlNjc7gFiMwu8Y5Zo P+/XxcjBISwQJrFvewRImEVAVeLs6gtg83kF7CTuth5jhZgvL9G7v48JxOYUsJdYMukjI4gt BFRzv3c1I0S9oMTJmU9YIMbLSzRvnc08gVFgFpLULCSpBYxMqxhFUkuLc9Nziw31ihNzi0vz 0vWS83M3MQIjctuxn5t3MM579VHvECMTB+MhRgkOZiUR3mX3F6YJ8aYkVlalFuXHF5XmpBYf YjQFunsis5Rocj4wJeSVxBuaGZgamphZGphamhkrifN6FnQkCgmkJ5akZqemFqQWwfQxcXBK NTBxrvLI4OC62VpXt3rDzpkBZzZJ1Z/ZxZDstmTy7aqZM56e+3Pr19tXJwyCwzOVRDW+TL4l 9OFsvO6aLze+xpv2sO3N2PXM0iCDq8r1yO0tmjnBuz3Y1cUctp/e4Xfvld5KBtndv7oOBnjl sW7/Uig69byZp021r0Kv+NNjEolHFKN2W9Sem/ggIdgwKmBh/ZY3nK/3vOZOU9326ONOyznG KV77lyxbvnhzuU9Xg8T/Uu21tkoci+6LmhXf/yXR1Nx+ILV14r/zF9Pt1u+61VgmsjTlVkhh k/ed4PQ1wVX6cRGpYhyyXJ9Z2F9kuuXqLfueKLhNI019z5JtV65uCZc8ZBuZUaij1dl5MU/+ xXElluKMREMt5qLiRAAqiSS+UQMAAA== X-CMS-MailID: 20240726110139eucas1p24eb41978fdad0d37a95c2c829180a203 X-Msg-Generator: CA X-RootMTR: 20240726110139eucas1p24eb41978fdad0d37a95c2c829180a203 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240726110139eucas1p24eb41978fdad0d37a95c2c829180a203 References: <20240726110114.1509733-1-m.majewski2@samsung.com> Like most of the SoCs, it requires 1 clock and 1 register. Signed-off-by: Mateusz Majewski Reviewed-by: Sam Protsenko --- v1 -> v2: make the clock required in Exynos850. .../devicetree/bindings/thermal/samsung,exynos-thermal.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml index 29a08b0729ee..b8c0bb7f4263 100644 --- a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml @@ -27,6 +27,7 @@ properties: - samsung,exynos5420-tmu-ext-triminfo - samsung,exynos5433-tmu - samsung,exynos7-tmu + - samsung,exynos850-tmu clocks: minItems: 1 @@ -131,6 +132,7 @@ allOf: - samsung,exynos5250-tmu - samsung,exynos5260-tmu - samsung,exynos5420-tmu + - samsung,exynos850-tmu then: properties: clocks: From patchwork Fri Jul 26 11:01:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateusz Majewski X-Patchwork-Id: 815219 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1BC1E17A906 for ; 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Fri, 26 Jul 2024 11:01:40 +0000 (GMT) From: Mateusz Majewski To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mateusz Majewski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Anand Moon Subject: [PATCH v2 5/6] drivers/thermal/exynos: add initial Exynos850 support Date: Fri, 26 Jul 2024 13:01:09 +0200 Message-ID: <20240726110114.1509733-6-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240726110114.1509733-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrPKsWRmVeSWpSXmKPExsWy7djPc7qiTYvTDNqeyVk8mLeNzeL7lutM Fmv2nmOymPdZ1mL+kXOsFufPb2C32PT4GqvF5V1z2Cw+9x5htJhxfh+TxbqNt9gtFja1sFtM PDaZ2WLul6nMFv/37GC3ePKwj83ied8+JgdBjzXz1jB67Jx1l91j8Z6XTB6bVnWyedy5tofN Y/OSeo++LasYPT5vkgvgiOKySUnNySxLLdK3S+DKuL33PUvB84SKr6f72RsYtwR2MXJySAiY SDw4/Z+li5GLQ0hgBaPEvpOfGCGcL4wSp5/eZ4VwPjNKzP4wgRWm5cb3v1CJ5YwSc3b1sUM4 rUwS7V9fMoFUsQkYSDx4swwsISKwmFGi8cc7sBZmgSfMEj9fLWYEqRIW8Jc4tnwrcxcjBweL gKrE12+iIGFeATuJn6t2MkGsk5fo3d8HZnMK2EssmfSREaJGUOLkzCcsIDYzUE3z1tnMIPMl BKZzSizYd5UZotlFYnn3JHYIW1ji1fEtULaMxP+d86EW5EvM2PyeBeQGCYEKibsHvSBMa4mP Z8AuYxbQlFi/Sx+i2FFi2qmvTBAVfBI33gpCHMAnMWnbdGaIMK9ER5sQRLWqxPE9k6BOkZZ4 0nIbaqWHxKwjK1gmMCrOQvLKLCSvzELYu4CReRWjeGppcW56arFhXmq5XnFibnFpXrpecn7u JkZgmjv97/inHYxzX33UO8TIxMF4iFGCg1lJhHfZ/YVpQrwpiZVVqUX58UWlOanFhxilOViU xHlVU+RThQTSE0tSs1NTC1KLYLJMHJxSDUwiuUzxh9NOOZx7wf7neI2dUaPlWotjJ2adiG0S L/hRF3TtnP284EUM5ZUH7x4xWyrQf/rzuZbeoBm/JBYYbfzGlred2/AudzrbyQ1hyV9KzzEk /CmR2vjpGMckLR3tOkW+2JaK3IcV8xg3x29smfn9et0PxreznjanvX1Ypl9yP9jqfJOHkviH +DM3T+0TWG6/5/vHk9GmLHse3fKemh3So9a7K+tNxXY3GWuBh5XhIQc+/e0SjbykWh60R/h4 RvDns8ucpm8VzsvUdt75wUhzflsuw5pXTSyW008eb3dcNbm3SHIBf+LTq4vYG7l+NDoe+pPM +/mJv9pj7WPZCeHa86TtndYGTsvUKhBYW6TEUpyRaKjFXFScCADaDljd4gMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrHIsWRmVeSWpSXmKPExsVy+t/xe7oiTYvTDD422Fo8mLeNzeL7lutM Fmv2nmOymPdZ1mL+kXOsFufPb2C32PT4GqvF5V1z2Cw+9x5htJhxfh+TxbqNt9gtFja1sFtM PDaZ2WLul6nMFv/37GC3ePKwj83ied8+JgdBjzXz1jB67Jx1l91j8Z6XTB6bVnWyedy5tofN Y/OSeo++LasYPT5vkgvgiNKzKcovLUlVyMgvLrFVija0MNIztLTQMzKx1DM0No+1MjJV0rez SUnNySxLLdK3S9DLuL33PUvB84SKr6f72RsYtwR2MXJySAiYSNz4/pe1i5GLQ0hgKaPE8dsn 2SES0hKHv0yBsoUl/lzrYoMoamaSuNt6mwUkwSZgIPHgzTKwIhGB5YwSm9s9QGxmgXfMEu3n /UBsYQFfiSUv9zN1MXJwsAioSnz9JgoS5hWwk/i5aicTxHx5id79fWA2p4C9xJJJHxlBbCGg mvu9qxkh6gUlTs58wgIxXl6ieets5gmMArOQpGYhSS1gZFrFKJJaWpybnltsqFecmFtcmpeu l5yfu4kRGJHbjv3cvINx3quPeocYmTgYDzFKcDArifAuu78wTYg3JbGyKrUoP76oNCe1+BCj KdDZE5mlRJPzgSkhryTe0MzA1NDEzNLA1NLMWEmc17OgI1FIID2xJDU7NbUgtQimj4mDU6qB Kf92Vvflqsf9bc0eu2pq9Ob8drqa+CJTcm2x1EypjVc2a7E8DU+rYXYSXSk7XdxvdlLRI+m7 rXu4LimpL/906dphDsE4j6kbFy35vjZeX8VpqnLiTLPidadSGmLMT0XsTi/PZyxgEZDyC23N 6vzAmbB668SH057x2IT11JyflPhnFUN0wuF6ruySJRER8078MC3/lG7TErzFWTvG9srdxkkr QirvcVa8CT3y4eED83O3UufE9HzeLmnjkZXPf66gyshLcPfPmDKhd+sXXno+j4vDJ9L4a33X BKalO89vsl+yx1/j7eu8aaxnb7u9OizTs+xCQcir/lNRRatlDpqpchu/imfsfd+6gyPKwU1W iaU4I9FQi7moOBEAPPB4LVEDAAA= X-CMS-MailID: 20240726110141eucas1p279c474e8737dcf4752808a20219e12d4 X-Msg-Generator: CA X-RootMTR: 20240726110141eucas1p279c474e8737dcf4752808a20219e12d4 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240726110141eucas1p279c474e8737dcf4752808a20219e12d4 References: <20240726110114.1509733-1-m.majewski2@samsung.com> This is loosely adapted from an implementation available at https://gitlab.com/Linaro/96boards/e850-96/kernel/-/blob/android-exynos-4.14-linaro/drivers/thermal/samsung/exynos_tmu.c Some differences from that implementation: - unlike that implementation, we do not use the ACPM mechanism, instead we just access the registers, like we do for other SoCs, - the SoC is supposed to support multiple sensors inside one unit. The vendor implementation uses one kernel device per sensor, we would probably prefer to have one device for all sensors, have #thermal-sensor-cells = <1> and so on. We implemented this, but we could not get the extra sensors to work on our hardware so far. This might be due to a misconfiguration and we will probably come back to this, however our implementation only supports a single sensor for now, - the vendor implementation supports disabling CPU cores as a cooling device. We did not attempt to port this, and this would not really fit this driver anyway. Additionally, some differences from the other SoCs supported by this driver: - we do not really constrain the e-fuse information like the other SoCs do (data->{min,max}_efuse_value). In our tests, those values (as well as the raw sensor values) were much higher than in the other SoCs, to the degree that reusing the data->{min,max}_efuse_value from the other SoCs would cause instant critical temperature reset on boot, - this SoC provides more information in the e-fuse data than other SoCs, so we read some values inside exynos850_tmu_initialize instead of hardcoding them in exynos_map_dt_data. Signed-off-by: Mateusz Majewski Reviewed-by: Sam Protsenko --- v1 -> v2: rename and reorder some registers, use the correct register offset for EXYNOS850_TMU_REG_AVG_CON, make the clock required, additionally do some minor style changes. drivers/thermal/samsung/exynos_tmu.c | 191 +++++++++++++++++++++++++-- 1 file changed, 182 insertions(+), 9 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 087a09628e23..2618a81fca53 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -117,6 +117,41 @@ #define EXYNOS7_EMUL_DATA_SHIFT 7 #define EXYNOS7_EMUL_DATA_MASK 0x1ff +/* Exynos850 specific registers */ +#define EXYNOS850_TMU_REG_CURRENT_TEMP0_1 0x40 +#define EXYNOS850_TMU_REG_THD_TEMP0_RISE 0x50 +#define EXYNOS850_TMU_REG_THD_TEMP0_FALL 0x60 + +#define EXYNOS850_TMU_TRIMINFO_SHIFT 4 +#define EXYNOS850_TMU_TRIMINFO_OFFSET(n) \ + (EXYNOS_TMU_REG_TRIMINFO + (n) * EXYNOS850_TMU_TRIMINFO_SHIFT) +#define EXYNOS850_TMU_T_TRIM0_SHIFT 18 + +#define EXYNOS850_TMU_REG_CONTROL1 0x24 +#define EXYNOS850_TMU_LPI_MODE_MASK 1 +#define EXYNOS850_TMU_LPI_MODE_SHIFT 10 + +#define EXYNOS850_TMU_REG_COUNTER_VALUE0 0x30 +#define EXYNOS850_TMU_EN_TEMP_SEN_OFF_MASK 0xffff +#define EXYNOS850_TMU_EN_TEMP_SEN_OFF_SHIFT 0 + +#define EXYNOS850_TMU_REG_COUNTER_VALUE1 0x34 +#define EXYNOS850_TMU_CLK_SENSE_ON_MASK 0xffff +#define EXYNOS850_TMU_CLK_SENSE_ON_SHIFT 16 + +#define EXYNOS850_TMU_REG_AVG_CON 0x38 +#define EXYNOS850_TMU_AVG_MODE_MASK 0x7 +#define EXYNOS850_TMU_DEM_ENABLE BIT(4) + +#define EXYNOS850_TMU_REG_TRIM0 0x3c +#define EXYNOS850_TMU_TRIM0_MASK 0xf +#define EXYNOS850_TMU_VBEI_TRIM_SHIFT 8 +#define EXYNOS850_TMU_VREF_TRIM_SHIFT 12 +#define EXYNOS850_TMU_BGRI_TRIM_SHIFT 20 + +#define EXYNOS850_TMU_TEM1051X_SENSE_VALUE 0x028a +#define EXYNOS850_TMU_TEM1456X_SENSE_VALUE 0x0a28 + #define EXYNOS_FIRST_POINT_TRIM 25 #define EXYNOS_SECOND_POINT_TRIM 85 @@ -134,6 +169,7 @@ enum soc_type { SOC_ARCH_EXYNOS5420_TRIMINFO, SOC_ARCH_EXYNOS5433, SOC_ARCH_EXYNOS7, + SOC_ARCH_EXYNOS850, }; /** @@ -232,12 +268,14 @@ static int code_to_temp(struct exynos_tmu_data *data, u16 temp_code) static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info) { - u16 tmu_temp_mask = - (data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_MASK - : EXYNOS_TMU_TEMP_MASK; - int tmu_85_shift = - (data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_SHIFT - : EXYNOS_TRIMINFO_85_SHIFT; + u16 tmu_temp_mask = (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) ? + EXYNOS7_TMU_TEMP_MASK : + EXYNOS_TMU_TEMP_MASK; + int tmu_85_shift = (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) ? + EXYNOS7_TMU_TEMP_SHIFT : + EXYNOS_TRIMINFO_85_SHIFT; data->temp_error1 = trim_info & tmu_temp_mask; if (!data->temp_error1 || @@ -587,6 +625,114 @@ static void exynos7_tmu_initialize(struct platform_device *pdev) sanitize_temp_error(data, trim_info); } +static void exynos850_tmu_set_low_temp(struct exynos_tmu_data *data, u8 temp) +{ + exynos_tmu_update_temp(data, EXYNOS850_TMU_REG_THD_TEMP0_FALL + 12, 0, + temp); + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS_TMU_INTEN_FALL0_SHIFT + 0, true); +} + +static void exynos850_tmu_set_high_temp(struct exynos_tmu_data *data, u8 temp) +{ + exynos_tmu_update_temp(data, EXYNOS850_TMU_REG_THD_TEMP0_RISE + 12, 16, + temp); + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS7_TMU_INTEN_RISE0_SHIFT + 1, true); +} + +static void exynos850_tmu_disable_low(struct exynos_tmu_data *data) +{ + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS_TMU_INTEN_FALL0_SHIFT + 0, false); +} + +static void exynos850_tmu_disable_high(struct exynos_tmu_data *data) +{ + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS7_TMU_INTEN_RISE0_SHIFT + 1, false); +} + +static void exynos850_tmu_set_crit_temp(struct exynos_tmu_data *data, u8 temp) +{ + exynos_tmu_update_temp(data, EXYNOS850_TMU_REG_THD_TEMP0_RISE + 0, 16, + temp); + exynos_tmu_update_bit(data, EXYNOS_TMU_REG_CONTROL, + EXYNOS_TMU_THERM_TRIP_EN_SHIFT, true); + exynos_tmu_update_bit(data, EXYNOS7_TMU_REG_INTEN, + EXYNOS7_TMU_INTEN_RISE0_SHIFT + 7, true); +} + +static void exynos850_tmu_initialize(struct platform_device *pdev) +{ + struct exynos_tmu_data *data = platform_get_drvdata(pdev); + u32 cal_type, avg_mode, reg, bgri, vref, vbei; + + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(0)); + cal_type = (reg & EXYNOS5433_TRIMINFO_CALIB_SEL_MASK) >> + EXYNOS5433_TRIMINFO_CALIB_SEL_SHIFT; + data->reference_voltage = (reg >> EXYNOS850_TMU_T_TRIM0_SHIFT) & + EXYNOS_TMU_REF_VOLTAGE_MASK; + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(1)); + data->gain = (reg >> EXYNOS850_TMU_T_TRIM0_SHIFT) & + EXYNOS_TMU_BUF_SLOPE_SEL_MASK; + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(2)); + avg_mode = (reg >> EXYNOS850_TMU_T_TRIM0_SHIFT) & + EXYNOS850_TMU_AVG_MODE_MASK; + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(3)); + bgri = (reg >> EXYNOS850_TMU_T_TRIM0_SHIFT) & EXYNOS850_TMU_TRIM0_MASK; + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(4)); + vref = (reg >> EXYNOS850_TMU_T_TRIM0_SHIFT) & EXYNOS850_TMU_TRIM0_MASK; + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(5)); + vbei = (reg >> EXYNOS850_TMU_T_TRIM0_SHIFT) & EXYNOS850_TMU_TRIM0_MASK; + + data->cal_type = cal_type == EXYNOS5433_TRIMINFO_TWO_POINT_TRIMMING ? + TYPE_TWO_POINT_TRIMMING : + TYPE_ONE_POINT_TRIMMING; + + reg = readl(data->base + EXYNOS850_TMU_TRIMINFO_OFFSET(0)); + sanitize_temp_error(data, reg); + + dev_info(&pdev->dev, "Calibration type is %d-point calibration\n", + cal_type ? 2 : 1); + + reg = readl(data->base + EXYNOS850_TMU_REG_AVG_CON); + reg &= ~EXYNOS850_TMU_AVG_MODE_MASK; + reg &= ~EXYNOS850_TMU_DEM_ENABLE; + if (avg_mode) { + reg |= avg_mode; + reg |= EXYNOS850_TMU_DEM_ENABLE; + } + writel(reg, data->base + EXYNOS850_TMU_REG_AVG_CON); + + reg = readl(data->base + EXYNOS850_TMU_REG_COUNTER_VALUE0); + reg &= ~(EXYNOS850_TMU_EN_TEMP_SEN_OFF_MASK + << EXYNOS850_TMU_EN_TEMP_SEN_OFF_SHIFT); + reg |= EXYNOS850_TMU_TEM1051X_SENSE_VALUE + << EXYNOS850_TMU_EN_TEMP_SEN_OFF_SHIFT; + writel(reg, data->base + EXYNOS850_TMU_REG_COUNTER_VALUE0); + + reg = readl(data->base + EXYNOS850_TMU_REG_COUNTER_VALUE1); + reg &= ~(EXYNOS850_TMU_CLK_SENSE_ON_MASK + << EXYNOS850_TMU_CLK_SENSE_ON_SHIFT); + reg |= EXYNOS850_TMU_TEM1051X_SENSE_VALUE + << EXYNOS850_TMU_CLK_SENSE_ON_SHIFT; + writel(reg, data->base + EXYNOS850_TMU_REG_COUNTER_VALUE1); + + reg = readl(data->base + EXYNOS850_TMU_REG_TRIM0); + reg &= ~(EXYNOS850_TMU_TRIM0_MASK << EXYNOS850_TMU_BGRI_TRIM_SHIFT); + reg &= ~(EXYNOS850_TMU_TRIM0_MASK << EXYNOS850_TMU_VREF_TRIM_SHIFT); + reg &= ~(EXYNOS850_TMU_TRIM0_MASK << EXYNOS850_TMU_VBEI_TRIM_SHIFT); + reg |= bgri << EXYNOS850_TMU_BGRI_TRIM_SHIFT; + reg |= vref << EXYNOS850_TMU_VREF_TRIM_SHIFT; + reg |= vbei << EXYNOS850_TMU_VBEI_TRIM_SHIFT; + writel(reg, data->base + EXYNOS850_TMU_REG_TRIM0); + + reg = readl(data->base + EXYNOS850_TMU_REG_CONTROL1); + reg &= ~(EXYNOS850_TMU_LPI_MODE_MASK << EXYNOS850_TMU_LPI_MODE_SHIFT); + writel(reg, data->base + EXYNOS850_TMU_REG_CONTROL1); +} + static void exynos4210_tmu_control(struct platform_device *pdev, bool on) { struct exynos_tmu_data *data = platform_get_drvdata(pdev); @@ -676,7 +822,8 @@ static u32 get_emul_con_reg(struct exynos_tmu_data *data, unsigned int val, val &= ~(EXYNOS_EMUL_TIME_MASK << EXYNOS_EMUL_TIME_SHIFT); val |= (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT); - if (data->soc == SOC_ARCH_EXYNOS7) { + if (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) { val &= ~(EXYNOS7_EMUL_DATA_MASK << EXYNOS7_EMUL_DATA_SHIFT); val |= (temp_to_code(data, temp) << @@ -706,7 +853,8 @@ static void exynos4412_tmu_set_emulation(struct exynos_tmu_data *data, emul_con = EXYNOS5260_EMUL_CON; else if (data->soc == SOC_ARCH_EXYNOS5433) emul_con = EXYNOS5433_TMU_EMUL_CON; - else if (data->soc == SOC_ARCH_EXYNOS7) + else if (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) emul_con = EXYNOS7_TMU_REG_EMUL_CON; else emul_con = EXYNOS_EMUL_CON; @@ -761,6 +909,12 @@ static int exynos7_tmu_read(struct exynos_tmu_data *data) EXYNOS7_TMU_TEMP_MASK; } +static int exynos850_tmu_read(struct exynos_tmu_data *data) +{ + return readw(data->base + EXYNOS850_TMU_REG_CURRENT_TEMP0_1) & + EXYNOS7_TMU_TEMP_MASK; +} + static irqreturn_t exynos_tmu_threaded_irq(int irq, void *id) { struct exynos_tmu_data *data = id; @@ -787,7 +941,8 @@ static void exynos4210_tmu_clear_irqs(struct exynos_tmu_data *data) if (data->soc == SOC_ARCH_EXYNOS5260) { tmu_intstat = EXYNOS5260_TMU_REG_INTSTAT; tmu_intclear = EXYNOS5260_TMU_REG_INTCLEAR; - } else if (data->soc == SOC_ARCH_EXYNOS7) { + } else if (data->soc == SOC_ARCH_EXYNOS7 || + data->soc == SOC_ARCH_EXYNOS850) { tmu_intstat = EXYNOS7_TMU_REG_INTPEND; tmu_intclear = EXYNOS7_TMU_REG_INTPEND; } else if (data->soc == SOC_ARCH_EXYNOS5433) { @@ -838,6 +993,9 @@ static const struct of_device_id exynos_tmu_match[] = { }, { .compatible = "samsung,exynos7-tmu", .data = (const void *)SOC_ARCH_EXYNOS7, + }, { + .compatible = "samsung,exynos850-tmu", + .data = (const void *)SOC_ARCH_EXYNOS850, }, { }, }; @@ -950,6 +1108,21 @@ static int exynos_map_dt_data(struct platform_device *pdev) data->min_efuse_value = 15; data->max_efuse_value = 100; break; + case SOC_ARCH_EXYNOS850: + data->tmu_set_low_temp = exynos850_tmu_set_low_temp; + data->tmu_set_high_temp = exynos850_tmu_set_high_temp; + data->tmu_disable_low = exynos850_tmu_disable_low; + data->tmu_disable_high = exynos850_tmu_disable_high; + data->tmu_set_crit_temp = exynos850_tmu_set_crit_temp; + data->tmu_initialize = exynos850_tmu_initialize; + data->tmu_control = exynos4210_tmu_control; + data->tmu_read = exynos850_tmu_read; + data->tmu_set_emulation = exynos4412_tmu_set_emulation; + data->tmu_clear_irqs = exynos4210_tmu_clear_irqs; + data->efuse_value = 55; + data->min_efuse_value = 0; + data->max_efuse_value = 511; + break; default: dev_err(&pdev->dev, "Platform not supported\n"); return -EINVAL; From patchwork Fri Jul 26 11:01:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mateusz Majewski X-Patchwork-Id: 814737 Received: from mailout2.w1.samsung.com (mailout2.w1.samsung.com [210.118.77.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B903817A598 for ; Fri, 26 Jul 2024 11:01:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.118.77.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Fri, 26 Jul 2024 11:01:41 +0000 (GMT) From: Mateusz Majewski To: linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Mateusz Majewski , Bartlomiej Zolnierkiewicz , Krzysztof Kozlowski , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Conor Dooley , Alim Akhtar , Sam Protsenko , Anand Moon Subject: [PATCH v2 6/6] dt-bindings: thermal: samsung,exynos: remove outdated information on trip point count Date: Fri, 26 Jul 2024 13:01:10 +0200 Message-ID: <20240726110114.1509733-7-m.majewski2@samsung.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240726110114.1509733-1-m.majewski2@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrPKsWRmVeSWpSXmKPExsWy7djPc7piTYvTDCbuNbN4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEcVlk5Kak1mWWqRvl8CV8X3Gb+aCJs6K2Z2fWRoYt7F3MXJySAiY SOx7dYAFxBYSWMEocXandhcjF5D9hVFiVvsEVgjnM6PEg9ZGuI55u96xQCSWM0qsXjSfHcJp ZZJYuu8TG0gVm4CBxIM3y8ASIgKLGSUaf7wDm8Us8IRZ4uerxYwgVcIC+RJ/Zk0C284ioCox +fgaZhCbV8BO4taifWwQ++Qlevf3MYHYnAL2EksmfWSEqBGUODnzCVgvM1BN89bZzCALJARm c0pMOP2DGaLZRWL1O5jDhSVeHd8CZctI/N85nwnCzpeYsfk90CAOILtC4u5BLwjTWuLjGWYQ k1lAU2L9Ln2IYkeJm9NOM0FU8EnceCsIcQCfxKRt05khwrwSHW1CENWqEsf3TII6RVriSctt qJUeEh1X+5kmMCrOQvLKLCSvzELYu4CReRWjeGppcW56arFRXmq5XnFibnFpXrpecn7uJkZg mjv97/iXHYzLX33UO8TIxMF4iFGCg1lJhHfZ/YVpQrwpiZVVqUX58UWlOanFhxilOViUxHlV U+RThQTSE0tSs1NTC1KLYLJMHJxSDUzJDha113n8mf8cPzLnk3x9zxZ3ZYebj7K5nvpH1647 +k+op/6Llv3OBZM9bldaKnTUehywi+esk2TLuDqH+/eDZSskGnuFaj5qiMrsu8PfV5XYdptl mnJAk3ZwwVJfc+FW+Ydvmfi+Lu68vifEQurH6gt7D2ctaq5waZOeaOrftPmKu7RCia6aXN5L qcn7OkMaEr7tenLA7bPmuetLs26wGm46yShvO3vdma+JkfmOkUX7lHouzMyzcfi/7I3jmdPN Dy53nGIPf8X7cc3EWZe7SnNv//ih2VMR/3C+nPrJ6yYPW1Y4rNr13PHTe/nvtgWMz04J6Mqq /ZF4qfP986cwnwaLUw7qF7efKbi6r1CJpTgj0VCLuag4EQDScKFC4gMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrHIsWRmVeSWpSXmKPExsVy+t/xe7piTYvTDKbOELN4MG8bm8X3LdeZ LNbsPcdkMe+zrMX8I+dYLc6f38BusenxNVaLy7vmsFl87j3CaDHj/D4mi3Ubb7FbLGxqYbeY eGwys8XcL1OZLf7v2cFu8eRhH5vF8759TA6CHmvmrWH02DnrLrvH4j0vmTw2repk87hzbQ+b x+Yl9R59W1YxenzeJBfAEaVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CX8X3Gb+aCJs6K2Z2fWRoYt7F3MXJySAiYSMzb9Y6li5GLQ0hgKaPExtuT oBLSEoe/TIGyhSX+XOtigyhqZpJ40n6ZGSTBJmAg8eDNMrAiEYHljBKb2z1AbGaBd8wS7ef9 uhg5OIQFciXOXdUCCbMIqEpMPr4GrJVXwE7i1qJ9bBDz5SV69/cxgdicAvYSSyZ9ZASxhYBq 7veuZoSoF5Q4OfMJC8R4eYnmrbOZJzAKzEKSmoUktYCRaRWjSGppcW56brGRXnFibnFpXrpe cn7uJkZgRG479nPLDsaVrz7qHWJk4mA8xCjBwawkwrvs/sI0Id6UxMqq1KL8+KLSnNTiQ4ym QHdPZJYSTc4HpoS8knhDMwNTQxMzSwNTSzNjJXFez4KORCGB9MSS1OzU1ILUIpg+Jg5OqQam 6qcdyzS3PxaYcCvv4z+/E/+qDXOK3HbLdp5qmyK6t07i+ZXP23wnTDB7r5wh8E949laG9dsi Of/dC3ZY8MHFiWmzBYtNrGdj96Stt/errl5jvefJKc1YH42s6sez99u+dth74MAPKeurUzq9 jEt3s61pXh0RFHNXoOGP04PVG88I2R5T//bg5HID1ss/11+z3B9a/iCn+94izzjFT3/qTYMO BR6um3/6s9Gc9AlZnw4uObHu1tWTVyb3NRjf4/qj8/42zyc1/we5q4v6Gm7OTcqynVbt2bxL 3vr4lc/nePcX908tWphZtunHZcfT9YX1G6fZXRFW7pe6LnhphdYnN9b6ZytZZZ/VlKYnRiT2 XVBiKc5INNRiLipOBAB+j/aCUQMAAA== X-CMS-MailID: 20240726110142eucas1p29f261e5e81c177456fd5bb5546871eb4 X-Msg-Generator: CA X-RootMTR: 20240726110142eucas1p29f261e5e81c177456fd5bb5546871eb4 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20240726110142eucas1p29f261e5e81c177456fd5bb5546871eb4 References: <20240726110114.1509733-1-m.majewski2@samsung.com> This is not true as of commit 5314b1543787 ("thermal/drivers/exynos: Use set_trips ops"). Signed-off-by: Mateusz Majewski Reviewed-by: Sam Protsenko --- v1 -> v2: remove an unnecessary sentence. .../devicetree/bindings/thermal/samsung,exynos-thermal.yaml | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml index b8c0bb7f4263..b85b4c420cd3 100644 --- a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml @@ -40,11 +40,7 @@ properties: interrupts: description: | The Exynos TMU supports generating interrupts when reaching given - temperature thresholds. Number of supported thermal trip points depends - on the SoC (only first trip points defined in DT will be configured):: - - most of SoC: 4 - - samsung,exynos5433-tmu: 8 - - samsung,exynos7-tmu: 8 + temperature thresholds. maxItems: 1 reg: