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Add FSD Ethernet YAML schema to enable the DT validation. Signed-off-by: Pankaj Dubey Signed-off-by: Ravi Patel Signed-off-by: Swathi K S --- .../devicetree/bindings/net/snps,dwmac.yaml | 5 +- .../devicetree/bindings/net/tesla,ethqos.yaml | 91 +++++++++++++++++++ 2 files changed, 94 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/tesla,ethqos.yaml diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 3eb65e63fdae..0da11fe98cec 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -98,6 +98,7 @@ properties: - snps,dwxgmac-2.10 - starfive,jh7100-dwmac - starfive,jh7110-dwmac + - tesla,fsd-ethqos reg: minItems: 1 @@ -121,7 +122,7 @@ properties: clocks: minItems: 1 - maxItems: 8 + maxItems: 10 additionalItems: true items: - description: GMAC main clock @@ -133,7 +134,7 @@ properties: clock-names: minItems: 1 - maxItems: 8 + maxItems: 10 additionalItems: true contains: enum: diff --git a/Documentation/devicetree/bindings/net/tesla,ethqos.yaml b/Documentation/devicetree/bindings/net/tesla,ethqos.yaml new file mode 100644 index 000000000000..9246b0395126 --- /dev/null +++ b/Documentation/devicetree/bindings/net/tesla,ethqos.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/tesla,ethqos.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FSD Ethernet Quality of Service + +maintainers: + - Swathi K S + +description: + dwmmac based tesla ethernet devices which support Gigabit + ethernet. + +allOf: + - $ref: snps,dwmac.yaml# + +properties: + compatible: + const: tesla,fsd-ethqos.yaml + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 5 + maxItems: 10 + + clock-names: + minItems: 5 + maxItems: 10 + + iommus: + maxItems: 1 + + phy-mode: + $ref: ethernet-controller.yaml#/properties/phy-connection-type + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - iommus + - phy-mode + +unevaluatedProperties: false + +examples: + - | + #include + #include + + ethernet_1: ethernet@14300000 { + compatible = "tesla,fsd-ethqos"; + reg = <0x0 0x14300000 0x0 0x10000>; + interrupts = ; + clocks = <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_PTP_REF_I>, + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_ACLK_I>, + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_HCLK_I>, + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_RGMII_CLK_I>, + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_RX_I>, + <&clock_peric PERIC_BUS_D_PERIC_IPCLKPORT_EQOSCLK>, + <&clock_peric PERIC_BUS_P_PERIC_IPCLKPORT_EQOSCLK>, + <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>, + <&clock_peric PERIC_EQOS_PHYRXCLK>, + <&clock_peric PERIC_DOUT_RGMII_CLK>; + clock-names = "ptp_ref", + "master_bus", + "slave_bus", + "tx", + "rx", + "master2_bus", + "slave2_bus", + "eqos_rxclk_mux", + "eqos_phyrxclk", + "dout_peric_rgmii_clk"; + pinctrl-names = "default"; + pinctrl-0 = <ð1_tx_clk>, <ð1_tx_data>, <ð1_tx_ctrl>, + <ð1_phy_intr>, <ð1_rx_clk>, <ð1_rx_data>, + <ð1_rx_ctrl>, <ð1_mdio>; + iommus = <&smmu_peric 0x0 0x1>; + phy-mode = "rgmii-id"; + }; + +... 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Tue, 30 Jul 2024 09:29:02 +0000 (GMT) Received: from epsmgms1p2new.samsung.com (unknown [182.195.42.42]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20240730092902epsmtrp21e5ff716fab9c027b7eddfafb28ac916~m85gh-viz2650026500epsmtrp2P; Tue, 30 Jul 2024 09:29:02 +0000 (GMT) X-AuditID: b6c32a50-ef5fe70000004d97-ef-66a8b263e4a5 Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p2new.samsung.com (Symantec Messaging Gateway) with SMTP id 8E.8D.08456.E52B8A66; Tue, 30 Jul 2024 18:29:02 +0900 (KST) Received: from cheetah.sa.corp.samsungelectronics.net (unknown [107.109.115.53]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20240730092858epsmtip2f9ea0d37a205dadf254df185b65ec28b~m85c_cOG72103621036epsmtip2B; Tue, 30 Jul 2024 09:28:58 +0000 (GMT) From: Swathi K S To: krzk@kernel.org, robh@kernel.org, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, conor+dt@kernel.org, richardcochran@gmail.com, mcoquelin.stm32@gmail.com, andrew@lunn.ch, alim.akhtar@samsung.com, linux-fsd@tesla.com Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, alexandre.torgue@foss.st.com, peppe.cavallaro@st.com, joabreu@synopsys.com, swathi.ks@samsung.com, rcsekar@samsung.com, ssiddha@tesla.com, jayati.sahu@samsung.com, pankaj.dubey@samsung.com, ravi.patel@samsung.com, gost.dev@samsung.com Subject: [PATCH v4 2/4] net: stmmac: dwc-qos: Add FSD EQoS support Date: Tue, 30 Jul 2024 14:46:46 +0530 Message-Id: <20240730091648.72322-3-swathi.ks@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240730091648.72322-1-swathi.ks@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VTfVSTVRzuvvt4Bx04rwPySoE0Dxl0gA3HuhgQKeFLcTqYfZ201s54YcDY djZQsyg0UePEAg3wjK9FogaBML4GsYGLXIcCJBDPEBQRPAgCnoaEJNLGRv33/J77/H7P7zz3 XhaNvcj0ZqXIMiilTCTlMF3pLb8EbA8S6y4mca+vbUGP7hUBNF7ewkT9YyYa+snQh6HS/uN0 VNHdx0BTVyZwZOlqw1B3zzkM3aycZ6D+/nocXW1RM5DuzjAD3Z55Hw22lzLR2X4jhnKHJxmo fLWWga5on0FLv98HqLJ5EUdrs80A3X7QgSPNVT0Ddf8xTUNrHXocVY5rGWixwYJHP0c2/WjB yKlvm3GyTTOGk1pdJqmr/ppJNp77kmzTWzFywXiNSaqbqgF52cgjp5YNNLKp0wrIJ8fKcNKq 801w/zAtQkKJEimlHyUTyxNTZMmRnDf3CXcLwwRcXhAvHL3M8ZOJ0qlITkx8QlBsitSWC8fv oEiaaaMSRCoVJyQqQinPzKD8JHJVRiSHUiRKFXxFsEqUrsqUJQfLqIydPC43NMwm/CRNUjxa QFfcRYdNZWosGxSH5AIXFiT40HyzEeQCVxab6ABw9NQkw1H8BWCu4TFmV7GJJQBv/YZtdMw1 9tEcIgOA6qN1mKPIweDkwiDTrmISL8LrF1tx+4EnkY3B03MD6y00opMGLeopul3lQeyCK1PD 65hO+EOzpZBhx27ETqhpMDr9tsKa+i6aHbsQr8ALc7PrgyBR4gLNF6zAIYqB+XlmpgN7wBlz E+7A3tA6b3DyQlijvkZ3YAkcWylw8q/CrqFSG8+ybRcAL7U7k/GBhT116zvQCHeY98+kcx83 qC/fwNvg6uywc+QW2FK14LQl4TfLDbgjFjWA7XVlIB/4av630AJQDbwphSo9mRKHKXhBMurQ fxcnlqfrwPrzD0zQg5r61WATwFjABCCLxvF0Ew5VJbHdEkWfHqGUcqEyU0qpTCDMlmABzdtL LLf9H1mGkMcP5/IFAgE/fIeAx9nsNptTlsgmkkUZVBpFKSjlRh/GcvHOxj7++d1UHPP0rR9s vWGcifU9r2z9KO3WiKm6wehxN3rh6cBidl6TpMJ15J3o6CdFFr8Dz3t1Zn32lbEn6+HeuR/2 7khRH6rwGXjKK1ZVPGKKiNQ8qt1Xot3MfRD6wopP1ZnDvPbLKW99YA1YGZ5Q9MYbo84UBvDf OKZldc1l7T8apr9xhGWYPs87ePY1kWF8j6jxxN/fTW2Ke++keNfAr/1eu0+dfBsw4nr95dun a7YtlXyefCf7Hju7c/xZdaqLOS9n0nWt7UCRp7H59Ymo0IGHy98f/zPJcMJ1IWowLujSUMXp PSFfhPe+tLUmPiZVM1/rL50hDEn5j0fvC0dM0k2tAqt7hGQ/h66SiHiBNKVK9C/dbjtphwQA AA== X-Brightmail-Tracker: H4sIAAAAAAAAAzWRf1CLcRzHfZ8fe7bdjcfq9BinzHEJ/TrnvuLUxblH5zr/4BQxelSqNXuM OK5Y5yqnKdKu3/JrDYep2chipRK2/Kp2KiuN9WOoUeqOqPjv9fm835/353P34aLCSkzETZAe YuRSSZKYw8f0dWLvFTE6zf7Aj408ONZ3EUB7qZ4DrZ1mFN58ZEFgsTUDg2X1Fhw6GnoIaHts RGB98xUEdlV8waHVeoeALfocHOo+tuKwu387fPOgmAPVVhMCs1t7cVj66xYOG8rnwJHngwBW VH8n4MRANYDd32oIWNhiwGH9CycKJ2oMBKywl+Pw+10bETafrqq0IbRDVU3QxsJOgi7XKWid NotD37uSRhsNboT+anrHoXOqtIB+YgqiHT8foXRVrRvQv0+VELRbt2DLzCj+2lgmKeEwIw9Y t4cfX9CRi8k+wVRzSQ6SDgoCsgGPS5ErKdc9CzrJQvIhoEw9e6b7c6lhZT4+zR5U5e/PRDbg //UoEcqpPT01wCF9qTbN/SnBkzyHULeHa5HJAiVfoZSyeYiYdHmQ4dS4oxWbZIxcTDXapmMF ZAhVeNeETK/wpm7ceTyVyiPXUNddA/9OCqHyLr0G58DMcjBDC+YyMjY5LpkNkgVLmSP+rCSZ VUjj/PelJOvA1Df9/AygRvvN3wwQLjADiouKPQW7317dLxTESo4eY+Qpu+WKJIY1g3lcTOwl GBk4Gysk4ySHmESGkTHy/yrC5YnSkTBN1I81S5XqTVeP+CxcdEZfdTT9ZaiU7mh6Hj5m10fY VtmaY3eFb41w91reX+OMdwatO9l0uV41Emj/sOv88FDakLwuRtSU+TITvlD4ZKxOURQ1tBwf OnEgZUf7Tm1qkQhhvaIezH463uVcmHida3XoTO5QtWeMUcoTKc/mrfKofncAOuxtLtWFzQEF ZbnujnYQ2RMhK3o2v5jNc2Le2Cz/jSs5gcvb8lVhGwz6ecuCI31ro/tdr9U9heHbD3qqpGqS H5znkY+KJvSW/qK0GXXDLvpr39rg1JNOy7G0uC6vPuOgxpWfGD26bUXlXvJgguCXfDTrdHr7 2IbD65eIMTZeEuSHylnJH6fS4xM8AwAA X-CMS-MailID: 20240730092902epcas5p1520f9cac624dad29f74a92ed4c559b25 X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20240730092902epcas5p1520f9cac624dad29f74a92ed4c559b25 References: <20240730091648.72322-1-swathi.ks@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: The FSD SoC contains two instance of the Synopsys DWC ethernet QOS IP core. The binding that it uses is slightly different from existing ones because of the integration (clocks, resets). For FSD SoC, a mux switch is needed between internal and external clocks. By default after reset internal clock is used but for receiving packets properly, external clock is needed. Mux switch to external clock happens only when the external clock is present. Signed-off-by: Chandrasekar R Signed-off-by: Suresh Siddha Signed-off-by: Swathi K S --- .../stmicro/stmmac/dwmac-dwc-qos-eth.c | 90 +++++++++++++++++++ .../net/ethernet/stmicro/stmmac/stmmac_main.c | 28 +++++- include/linux/stmmac.h | 1 + 3 files changed, 117 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c index ec924c6c76c6..bc97b3b573b7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "stmmac_platform.h" #include "dwmac4.h" @@ -37,6 +38,13 @@ struct tegra_eqos { struct gpio_desc *reset; }; +struct fsd_eqos_plat_data { + const struct fsd_eqos_variant *fsd_eqos_inst_var; + struct clk_bulk_data *clks; + int num_clks; + struct device *dev; +}; + static int dwc_eth_dwmac_config_dt(struct platform_device *pdev, struct plat_stmmacenet_data *plat_dat) { @@ -265,6 +273,82 @@ static int tegra_eqos_init(struct platform_device *pdev, void *priv) return 0; } +static int dwc_eqos_rxmux_setup(void *priv, bool external) +{ + int i = 0; + struct fsd_eqos_plat_data *plat = priv; + struct clk *rx1 = NULL; + struct clk *rx2 = NULL; + struct clk *rx3 = NULL; + + for (i = 0; i < plat->num_clks; i++) { + if (strcmp(plat->clks[i].id, "eqos_rxclk_mux") == 0) + rx1 = plat->clks[i].clk; + else if (strcmp(plat->clks[i].id, "eqos_phyrxclk") == 0) + rx2 = plat->clks[i].clk; + else if (strcmp(plat->clks[i].id, "dout_peric_rgmii_clk") == 0) + rx3 = plat->clks[i].clk; + } + + /* doesn't support RX clock mux */ + if (!rx1) + return 0; + + if (external) + return clk_set_parent(rx1, rx2); + else + return clk_set_parent(rx1, rx3); +} + +static int fsd_clks_endisable(void *priv, bool enabled) +{ + struct fsd_eqos_plat_data *plat = priv; + + if (enabled) { + return clk_bulk_prepare_enable(plat->num_clks, plat->clks); + } else { + clk_bulk_disable_unprepare(plat->num_clks, plat->clks); + return 0; + } +} + +static int fsd_eqos_probe(struct platform_device *pdev, + struct plat_stmmacenet_data *data, + struct stmmac_resources *res) +{ + struct fsd_eqos_plat_data *priv_plat; + int ret = 0; + + priv_plat = devm_kzalloc(&pdev->dev, sizeof(*priv_plat), GFP_KERNEL); + if (!priv_plat) + return -ENOMEM; + + priv_plat->dev = &pdev->dev; + + ret = devm_clk_bulk_get_all(&pdev->dev, &priv_plat->clks); + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, "No clocks available\n"); + + priv_plat->num_clks = ret; + + data->bsp_priv = priv_plat; + data->clks_config = fsd_clks_endisable; + data->rxmux_setup = dwc_eqos_rxmux_setup; + + ret = fsd_clks_endisable(priv_plat, true); + if (ret) + return dev_err_probe(&pdev->dev, ret, "Unable to enable fsd clock\n"); + + return 0; +} + +static void fsd_eqos_remove(struct platform_device *pdev) +{ + struct fsd_eqos_plat_data *priv_plat = get_stmmac_bsp_priv(&pdev->dev); + + fsd_clks_endisable(priv_plat, false); +} + static int tegra_eqos_probe(struct platform_device *pdev, struct plat_stmmacenet_data *data, struct stmmac_resources *res) @@ -411,6 +495,11 @@ static const struct dwc_eth_dwmac_data tegra_eqos_data = { .remove = tegra_eqos_remove, }; +static const struct dwc_eth_dwmac_data fsd_eqos_data = { + .probe = fsd_eqos_probe, + .remove = fsd_eqos_remove, +}; + static int dwc_eth_dwmac_probe(struct platform_device *pdev) { const struct dwc_eth_dwmac_data *data; @@ -473,6 +562,7 @@ static void dwc_eth_dwmac_remove(struct platform_device *pdev) static const struct of_device_id dwc_eth_dwmac_match[] = { { .compatible = "snps,dwc-qos-ethernet-4.10", .data = &dwc_qos_data }, { .compatible = "nvidia,tegra186-eqos", .data = &tegra_eqos_data }, + { .compatible = "tesla,fsd-ethqos", .data = &fsd_eqos_data }, { } }; MODULE_DEVICE_TABLE(of, dwc_eth_dwmac_match); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 12689774d755..2ef82edec522 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -4001,6 +4001,12 @@ static int __stmmac_open(struct net_device *dev, netif_tx_start_all_queues(priv->dev); stmmac_enable_all_dma_irq(priv); + if (priv->plat->rxmux_setup) { + ret = priv->plat->rxmux_setup(priv->plat->bsp_priv, true); + if (ret) + netdev_err(priv->dev, "Rxmux setup failed\n"); + } + return 0; irq_error: @@ -4056,7 +4062,13 @@ static void stmmac_fpe_stop_wq(struct stmmac_priv *priv) static int stmmac_release(struct net_device *dev) { struct stmmac_priv *priv = netdev_priv(dev); - u32 chan; + u32 chan, ret; + + if (priv->plat->rxmux_setup) { + ret = priv->plat->rxmux_setup(priv->plat->bsp_priv, false); + if (ret) + netdev_err(priv->dev, "Rxmux setup failed\n"); + } if (device_may_wakeup(priv->device)) phylink_speed_down(priv->phylink, false); @@ -7848,11 +7860,17 @@ int stmmac_suspend(struct device *dev) { struct net_device *ndev = dev_get_drvdata(dev); struct stmmac_priv *priv = netdev_priv(ndev); - u32 chan; + u32 chan, ret; if (!ndev || !netif_running(ndev)) return 0; + if (priv->plat->rxmux_setup) { + ret = priv->plat->rxmux_setup(priv->plat->bsp_priv, false); + if (ret) + netdev_err(priv->dev, "Rxmux setup failed\n"); + } + mutex_lock(&priv->lock); netif_device_detach(ndev); @@ -8018,6 +8036,12 @@ int stmmac_resume(struct device *dev) mutex_unlock(&priv->lock); rtnl_unlock(); + if (priv->plat->rxmux_setup) { + ret = priv->plat->rxmux_setup(priv->plat->bsp_priv, true); + if (ret) + netdev_err(priv->dev, "Rxmux setup failed\n"); + } + netif_device_attach(ndev); return 0; diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index 84e13bd5df28..f017b818d421 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -264,6 +264,7 @@ struct plat_stmmacenet_data { void (*ptp_clk_freq_config)(struct stmmac_priv *priv); int (*init)(struct platform_device *pdev, void *priv); void (*exit)(struct platform_device *pdev, void *priv); + int (*rxmux_setup)(void *priv, bool external); struct mac_device_info *(*setup)(void *priv); int (*clks_config)(void *priv, bool enabled); int (*crosststamp)(ktime_t *device, struct system_counterval_t *system, From patchwork Tue Jul 30 09:16:47 2024 Content-Type: text/plain; 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Tue, 30 Jul 2024 09:29:07 +0000 (GMT) Received: from epsmgmcp1.samsung.com (unknown [182.195.42.82]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20240730092907epsmtrp1db888233e42037ae1ea78c458750ad04~m85lx-rqu2339923399epsmtrp1z; Tue, 30 Jul 2024 09:29:07 +0000 (GMT) X-AuditID: b6c32a50-ef5fe70000004d97-ff-66a8b268129c Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgmcp1.samsung.com (Symantec Messaging Gateway) with SMTP id E0.8D.19367.362B8A66; Tue, 30 Jul 2024 18:29:07 +0900 (KST) Received: from cheetah.sa.corp.samsungelectronics.net (unknown [107.109.115.53]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20240730092904epsmtip2deaca156e95ad97a1d73906a62481768~m85iPufd-2110921109epsmtip2i; Tue, 30 Jul 2024 09:29:03 +0000 (GMT) From: Swathi K S To: krzk@kernel.org, robh@kernel.org, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, conor+dt@kernel.org, richardcochran@gmail.com, mcoquelin.stm32@gmail.com, andrew@lunn.ch, alim.akhtar@samsung.com, linux-fsd@tesla.com Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, alexandre.torgue@foss.st.com, peppe.cavallaro@st.com, joabreu@synopsys.com, swathi.ks@samsung.com, rcsekar@samsung.com, ssiddha@tesla.com, jayati.sahu@samsung.com, pankaj.dubey@samsung.com, ravi.patel@samsung.com, gost.dev@samsung.com Subject: [PATCH v4 3/4] arm64: dts: fsd: Add Ethernet support for FSYS0 Block of FSD SoC Date: Tue, 30 Jul 2024 14:46:47 +0530 Message-Id: <20240730091648.72322-4-swathi.ks@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240730091648.72322-1-swathi.ks@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VTe0xTZxTPvbftLS41l8fwg6CDmjlhAu0s7ANlY5Po3SuSmGyOZdY7em2B 0nZ9MJGYVXwwUIuwsPGSNQxmebmuFCyuIDAULUIhQx7JcMhopnQOeUR8IWtpcf/9zu/8fuec nPN9bMxvkRXMTpOpaaWMknJZ6xitv4WHR0pMhkO8B50R8PG97xA4WdXKgvaJbgw2tg+gsNJ+ ggF/6BlgQse1KRyOd7ahsMdWg8Lb1f8yod1uxOFgq44JTX+NMOGdmU/g75crWbDU3oHCgpFp JqxabmLCa/pA+LDvHwRWtyzicMXZgsA7D6w4LB+0MGHPzbsYXLFacFg9qWfCxV/G8cQQ0lw3 jpKOwhacbCufwEm9SUOa6vNZZHPN12SbZQElZztusUiduR4huzr4pONRO0aarywg5PPc8zi5 YNqUvD4lY6eEpkS0MpSWpcpFaTJxAveDfcJdwphYHj+SHwff5IbKqEw6gZv0YXLk7jSpay/c 0CxKqnFRyZRKxY1+a6dSrlHToRK5Sp3ApRUiqUKgiFJRmSqNTBwlo9XxfB7vjRiX8GCGpPHZ BK74M+zw1aJ6VIt8E1KA+LABIQBztb14AbKO7UdYEVAy9oTlCeYRsHSuCH0RHC+awNcs7a2l iCfRhoDmP257LSdR8FOtluVWsYitYNRwabVwAKFFQfH9IcwdYMQVDIzrHAy3yp9IAUM3Rl0J NptBvAoa7L5umkPEg0bTEsvT7hXQYOzE3NiH2AEu3Heu1gFEhQ84PWZgekRJoKE012vwBzO9 Zu+sweBe4SkvFoIG3S2GB0vAxJMir/5t0DlcyXDPgBHh4OfL0R56IyixXUTdGCPWg7NPp1EP zwGWqjW8GSw7R7wlg0Br7ay3FQm0U8+9K9Ih4PubF5jnkE3l/7fQI0g9EkwrVJliOjVGwY+U 0V+9OFyqPNOErD7/iGQL0mBcjupGUDbSjQA2xg3gCIdrD/lxRFT2EVopFyo1UlrVjcS4FliE Bb+cKnf9H5layBfE8QSxsbGCuO2xfO4GjvPkeZEfIabUdAZNK2jlmg9l+wRr0ff6Q8FFzd6P LX/HbzeT07PGiIUB03J4juis79EvEnblYYPa1/woFbpt5nr7Ef2eM4np/fM5N2hVuj26r8pG 0wW+nIChh5Yte1o2kIHNzMLcY3DkVKC6wtZ0/cB8Ulme6p3skP33piOVn1JTialVlKP4UphO 3Bg21mX+MSfOdte6jfvs4GRW3lxIU64UDA6XGIq3CiYn9TUr++yff1bXNOqsW2QHDZfuP71s ff24IXvxsazJMJodWGsVvXts6Qz/JQZDvOWw9tcDMeqZHR+VvR9fY+yTbOxiXx19lFXhDMrP 4MydmOUiX85XpNuOln3r/7Q3P9CRyNsL+1M2DxmZEVyGSkLxIzClivoPKHhC9ocEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAAzWRWUwTURSGuTOdzpTYOhaqV0TQEqOSsAUebqoCiSaODxrFB6Ek0goDgmVJ hyISgwZQlIcqGglBQCh1oYJgpbSoQC1gAqjFBZAYhIooirhQxCUCWohv3zl//vM9HAoX63le VHJaJqtOU6qkfHdec4fUNyDeeCMx2PEpBP36UALQaGUzH9mHbTiqa32CoXJ7AQ9d6XxCoPGH b0g0ZG3BUGePHkOvdZ8JZLc3kqivWUsg49gAgRwfD6Dnd8v5qNTehqGigbcEqpyrJ9DDqpVo tvcTQDrTDIkWJk0AOb7eJ1FZn4VAnY8mcLRw30Ii3WgVgWZuD5GR3kxT7RDGjJ8zkUxL2TDJ VBk1jNFwls/c0Z9gWixOjPnS1s9ntE0GwDxoC2HGf7biTFO7EzDzeRUk4zT67BXJ3bcmsKrk LFYdFK5wP1z3Z5jMGFmf3VVswE6CM95FQEBBOgy2NpeCIuBOiWkzgG8qxvClYDWczr9ELLEH rJ1/T7pYTOdjcG5hl4v59CY4eMNMusqe9HkMNky3Y64Bp5/iML/n22LDg46G3aPz/y5RFI/e AG/aV7jWQloG64w/+EsCX3iz0booFtBb4PWpSXxJJoMXqp+B80BUBdwMQMJmcKlJqfEZIYGc MpXTpCUFxqenGsHiI/2jLOBaw1ygDWAUsAFI4VJPYdyLq4liYYLyWA6rTo9Ta1QsZwNrKJ50 ldBPdTZBTCcpM9kjLJvBqv+nGCXwOoldu3jadiG2IDdLEhTnsTxU4bh4iJfz1C94/WjfuUm9 f4wkLMCtjgh9J4rO21kiKBa2HS1p2DfxzRZcn+xje1zaoT+4W6SbWW4O0/iZ4u3HZcz3sInY 9vqyCMn+nJqAP9uRNdK6S/vSqaC0/lwPf4/br4nMW/uSuqd6Mfk9lbw0clIRrJrqjlKbY2UH U3wtjdmXv4jLvSocXcrcdTEjCkXX9qGCPeHW/nSWjt30qjpiULJZMAvumqrVW7NfG0diahif ZSnOU8eja3PNEduKCwtjpmVaD51m0NtL+1XeEPEbanaHd5YXThXukNeAjQuVtzhubYWIizIk ylqW8aQ87rAyxB9Xc8q/GodSHTcDAAA= X-CMS-MailID: 20240730092907epcas5p1b81eaf13a57535e32e11709602aeee06 X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20240730092907epcas5p1b81eaf13a57535e32e11709602aeee06 References: <20240730091648.72322-1-swathi.ks@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: The FSD SoC contains two instances of Synopsys DWC QoS Ethernet IP, one in FSYS0 block and other in PERIC block. Adds device tree node for Ethernet in FSYS0 Block and enables the same for FSD platform. Signed-off-by: Pankaj Dubey Signed-off-by: Jayati Sahu Signed-off-by: Swathi K S --- arch/arm64/boot/dts/tesla/fsd-evb.dts | 9 ++++ arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 56 ++++++++++++++++++++++ arch/arm64/boot/dts/tesla/fsd.dtsi | 20 ++++++++ 3 files changed, 85 insertions(+) diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts index 8d7794642900..2c37097c709a 100644 --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts @@ -64,6 +64,15 @@ }; }; +ðernet_0 { + status = "okay"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + &fin_pll { clock-frequency = <24000000>; }; diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi index 3f898cf4874c..cb437483ff6e 100644 --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi @@ -64,6 +64,62 @@ samsung,pin-pud = ; samsung,pin-drv = ; }; + + eth0_tx_clk: eth0-tx-clk-pins { + samsung,pins = "gpf0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth0_tx_data: eth0-tx-data-pins { + samsung,pins = "gpf0-1", "gpf0-2", "gpf0-3", "gpf0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth0_tx_ctrl: eth0-tx-ctrl-pins { + samsung,pins = "gpf0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth0_phy_intr: eth0-phy-intr-pins { + samsung,pins = "gpf0-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth0_rx_clk: eth0-rx-clk-pins { + samsung,pins = "gpf1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth0_rx_data: eth0-rx-data-pins { + samsung,pins = "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth0_rx_ctrl: eth0-rx-ctrl-pins { + samsung,pins = "gpf1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth0_mdio: eth0-mdio-pins { + samsung,pins = "gpf1-6", "gpf1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; }; &pinctrl_peric { diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index 690b4ed9c29b..cc67930ebf78 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -1007,6 +1007,26 @@ clocks = <&clock_fsys0 UFS0_MPHY_REFCLK_IXTAL26>; clock-names = "ref_clk"; }; + + ethernet_0: ethernet@15300000 { + compatible = "tesla,fsd-ethqos"; + reg = <0x0 0x15300000 0x0 0x10000>; + interrupts = ; + clocks = <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_CLK_PTP_REF_I>, + <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_ACLK_I>, + <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_HCLK_I>, + <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_RGMII_CLK_I>, + <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_CLK_RX_I>; + clock-names = "ptp_ref", "master_bus", "slave_bus", "tx", "rx"; + pinctrl-names = "default"; + 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Tue, 30 Jul 2024 09:29:13 +0000 (GMT) X-AuditID: b6c32a50-ef5fe70000004d97-11-66a8b26e4aa5 Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgmc1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 8B.AF.07567.962B8A66; Tue, 30 Jul 2024 18:29:13 +0900 (KST) Received: from cheetah.sa.corp.samsungelectronics.net (unknown [107.109.115.53]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20240730092910epsmtip263adb5695f1726963bdef87ff92e4ced~m85n3k4uT2111521115epsmtip26; Tue, 30 Jul 2024 09:29:09 +0000 (GMT) From: Swathi K S To: krzk@kernel.org, robh@kernel.org, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, conor+dt@kernel.org, richardcochran@gmail.com, mcoquelin.stm32@gmail.com, andrew@lunn.ch, alim.akhtar@samsung.com, linux-fsd@tesla.com Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, alexandre.torgue@foss.st.com, peppe.cavallaro@st.com, joabreu@synopsys.com, swathi.ks@samsung.com, rcsekar@samsung.com, ssiddha@tesla.com, jayati.sahu@samsung.com, pankaj.dubey@samsung.com, ravi.patel@samsung.com, gost.dev@samsung.com Subject: [PATCH v4 4/4] arm64: dts: fsd: Add Ethernet support for PERIC Block of FSD SoC Date: Tue, 30 Jul 2024 14:46:48 +0530 Message-Id: <20240730091648.72322-5-swathi.ks@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240730091648.72322-1-swathi.ks@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WTe0xbVRzHd+5tewsKuQLOI1Fk10k2DIyOAodtTI2LXrNHSPaHhkxqQy+U AKX0trrNuOEDp10oA2FDwoCwLbwcj1K6MqHQUovCRmGO51KBdVWh4xE6mbgxpJTpf5/v731+ 5xw+HuDmBfPTZUpGIRNnUjxfjr5nZ3iETFubGnXnSwqtzJwHaKpCz0M2uxlHP3QOYKjc9hUH VVoGuMhpvUug8e52DFn6LmPot+p5LrLZmgk0qNdwkdYxwkXTs++jX6+X81CpzYgh9cg9LqpY vcpF1qqtaLn/PkDVbQ8ItOZqA2h6sYNAZYMGLrLc+BNHax0GAlVPVXHRg5Zx4s2XaF3dOEY7 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woY9+SfKT5dFfKha0SC88h23+u4j/g92l/9YnRCtaJZ3SfilC4/S5MTLJtdcl+WbpH1vsN6p G/TZXnddtmjNwf1ei5qnR9xbfdLNaceGUqsXNmZla1T2ivIt+b0jJyFmxp4TuxZ2nr9f88ru hvDv6qP6gR2CDbf3fffj/B6l+2eW138DHdkQ045NvG2sCtOj9gT+P8t1iO//U0njhoLrjbtU b1gfqi+car3r+ZOr85N7Bb3F0hKnFQRIlq++91Dk7GKRuLSu3gfx4Umugtfsll0OFFOUmr9T 2r24O6CGsWzfKiWW4oxEQy3mouJEAELiedQ6AwAA X-CMS-MailID: 20240730092913epcas5p18c3be42421fffe1a229f83ceeca1ace0 X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20240730092913epcas5p18c3be42421fffe1a229f83ceeca1ace0 References: <20240730091648.72322-1-swathi.ks@samsung.com> Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: The FSD SoC contains two instances of Synopsys DWC QoS Ethernet IP, one in FSYS0 block and other in PERIC block. Adds device tree node for Ethernet in PERIC Block and enables the same for FSD platform. Signed-off-by: Pankaj Dubey Signed-off-by: Jayati Sahu Signed-off-by: Swathi K S --- arch/arm64/boot/dts/tesla/fsd-evb.dts | 9 ++++ arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 56 ++++++++++++++++++++++ arch/arm64/boot/dts/tesla/fsd.dtsi | 27 +++++++++++ 3 files changed, 92 insertions(+) diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts index 2c37097c709a..80ca120b3d7f 100644 --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts @@ -73,6 +73,15 @@ }; }; +ðernet_1 { + status = "okay"; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + &fin_pll { clock-frequency = <24000000>; }; diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi index cb437483ff6e..6f4658f57453 100644 --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi @@ -437,6 +437,62 @@ samsung,pin-pud = ; samsung,pin-drv = ; }; + + eth1_tx_clk: eth1-tx-clk-pins { + samsung,pins = "gpf2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth1_tx_data: eth1-tx-data-pins { + samsung,pins = "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth1_tx_ctrl: eth1-tx-ctrl-pins { + samsung,pins = "gpf2-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth1_phy_intr: eth1-phy-intr-pins { + samsung,pins = "gpf2-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth1_rx_clk: eth1-rx-clk-pins { + samsung,pins = "gpf3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth1_rx_data: eth1-rx-data-pins { + samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3", "gpf3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth1_rx_ctrl: eth1-rx-ctrl-pins { + samsung,pins = "gpf3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + eth1_mdio: eth1-mdio-pins { + samsung,pins = "gpf3-6", "gpf3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; }; &pinctrl_pmu { diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index cc67930ebf78..670f6a852542 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -1027,6 +1027,33 @@ phy-mode = "rgmii-id"; status = "disabled"; }; + + ethernet_1: ethernet@14300000 { + compatible = "tesla,fsd-ethqos"; + reg = <0x0 0x14300000 0x0 0x10000>; + interrupts = ; + clocks = <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_PTP_REF_I>, + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_ACLK_I>, + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_HCLK_I>, + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_RGMII_CLK_I>, + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_RX_I>, + <&clock_peric PERIC_BUS_D_PERIC_IPCLKPORT_EQOSCLK>, + <&clock_peric PERIC_BUS_P_PERIC_IPCLKPORT_EQOSCLK>, + <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>, + <&clock_peric PERIC_EQOS_PHYRXCLK>, + <&clock_peric PERIC_DOUT_RGMII_CLK>; + clock-names = "ptp_ref", "master_bus", "slave_bus", "tx", "rx", + "master2_bus", "slave2_bus", "eqos_rxclk_mux", + "eqos_phyrxclk", "dout_peric_rgmii_clk"; + pinctrl-names = "default"; + pinctrl-0 = <ð1_tx_clk>, <ð1_tx_data>, <ð1_tx_ctrl>, + <ð1_phy_intr>, <ð1_rx_clk>, <ð1_rx_data>, + <ð1_rx_ctrl>, <ð1_mdio>; + local-mac-address = [00 00 00 00 00 00]; + iommus = <&smmu_peric 0x0 0x1>; + phy-mode = "rgmii-id"; + status = "disabled"; + }; }; };