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a=openpgp-sha256; l=6553; i=caleb.connolly@linaro.org; h=from:subject:message-id; bh=vNVYHzG/GpDqOALmDhAq+wjFOy+RwgKs/59qQShLJJs=; b=owEBbQKS/ZANAwAIAQWDMSsZX2S2AcsmYgBmtWdvkSqew5Fqvgdu78XjbkAH/L1NZSv/5U0NI FW0iNqaIjiJAjMEAAEIAB0WIQS2UaFGPGq+0GkMVc0FgzErGV9ktgUCZrVnbwAKCRAFgzErGV9k tuHiEACckJJt/qaDr1eZBmVMg5fQ1UZ/jfq0mFaAlR0OwPIlrqCMzR5/L8IYKeQ5t9qOFIZ5+XB AwGivBTo3p5l1+Qe7qDYF80/UOxmw1kgMq9MwfRkJY8qY+npylO1C+AZeS1Y6Riyc/RfQJ9TyIR xYVBnLmlwkaAn5lLgBC7ACBEUZrSYcMuW7WTvdySX6yVRt25fW4FQn/KxK+ZIkt25zew6xe/oma +ERp426+/lZHUwOP1MJ7qcmM8lsCDLi5DYVjQKDzBLamI/v/doeI8KowYV3KyRVdT3qHJ+zrm0g KAoGjCi+VCWe4luEZ6C/ex9EmEdsuQBjdefhZR/826jynCcKAyvonE7ev/Uuw3HrFGuejzYTERO FVd4vP8LzDaVKqpFbP4JSAgo4bWkdbMhh+oeLh/TBiGyNpYwJNqUgMixIR61Q247UNFzTGtBafL YvkyeeEIE0rBcOLH2reJY7qJ/XedYoB5R47BTuxK6pGSUzqygqWzgvrs/wy8rMmJ1wuxIuhIFKZ dADFPL43yUSqPzP+5ah6hJGSrIgxD0VR5Te6Wlw6ul0VleN7pf9nKzWt7dXvi7QCDRHUrJkS8kx mkinSwMmsdjoo831mHEkDVB7eTA9qdvLQb/CWbZkSIW32+Z2TbvNJACj5s6HYrqgAEWDjPJlsHr rKlCzLiXCmJ+GIg== X-Developer-Key: i=caleb.connolly@linaro.org; a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean We don't actually need any clocks to get UFS up and running, resets are useful though. Signed-off-by: Caleb Connolly Reviewed-by: Neil Armstrong --- drivers/clk/qcom/Kconfig | 8 +++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clock-qcom.h | 1 + drivers/clk/qcom/clock-sc7280.c | 132 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 142 insertions(+) diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index 45d63c6d6dbf..0d2c0ac225c5 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -85,7 +85,15 @@ config CLK_QCOM_SM8650 Say Y here to enable support for the Global Clock Controller on the Snapdragon SM8650 SoC. This driver supports the clocks and resets exposed by the GCC hardware block. +config CLK_QCOM_SC7280 + bool "Qualcomm SC7280 GCC" + select CLK_QCOM + help + Say Y here to enable support for the Global Clock Controller + on the Snapdragon SC7280 SoC. This driver supports the clocks + and resets exposed by the GCC hardware block. + endmenu endif diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile index dec20e4b5943..e223c131ee4d 100644 --- a/drivers/clk/qcom/Makefile +++ b/drivers/clk/qcom/Makefile @@ -8,8 +8,9 @@ obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o obj-$(CONFIG_CLK_QCOM_IPQ4019) += clock-ipq4019.o obj-$(CONFIG_CLK_QCOM_QCM2290) += clock-qcm2290.o obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o +obj-$(CONFIG_CLK_QCOM_SC7280) += clock-sc7280.o obj-$(CONFIG_CLK_QCOM_SM6115) += clock-sm6115.o obj-$(CONFIG_CLK_QCOM_SM8250) += clock-sm8250.o obj-$(CONFIG_CLK_QCOM_SM8550) += clock-sm8550.o obj-$(CONFIG_CLK_QCOM_SM8650) += clock-sm8650.o diff --git a/drivers/clk/qcom/clock-qcom.h b/drivers/clk/qcom/clock-qcom.h index f6445c8f566f..7aa6ca59aad5 100644 --- a/drivers/clk/qcom/clock-qcom.h +++ b/drivers/clk/qcom/clock-qcom.h @@ -10,8 +10,9 @@ #define CFG_CLK_SRC_CXO (0 << 8) #define CFG_CLK_SRC_GPLL0 (1 << 8) #define CFG_CLK_SRC_GPLL0_AUX2 (2 << 8) #define CFG_CLK_SRC_GPLL9 (2 << 8) +#define CFG_CLK_SRC_GPLL0_ODD (3 << 8) #define CFG_CLK_SRC_GPLL6 (4 << 8) #define CFG_CLK_SRC_GPLL7 (3 << 8) #define CFG_CLK_SRC_GPLL4 (5 << 8) #define CFG_CLK_SRC_GPLL0_EVEN (6 << 8) diff --git a/drivers/clk/qcom/clock-sc7280.c b/drivers/clk/qcom/clock-sc7280.c new file mode 100644 index 000000000000..5d343f120519 --- /dev/null +++ b/drivers/clk/qcom/clock-sc7280.c @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Clock drivers for Qualcomm sc7280 + * + * (C) Copyright 2024 Linaro Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "clock-qcom.h" + +#define USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR 0xf038 +#define USB30_PRIM_MASTER_CLK_CMD_RCGR 0xf020 + +static ulong sc7280_set_rate(struct clk *clk, ulong rate) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + if (clk->id < priv->data->num_clks) + debug("%s: %s, requested rate=%ld\n", __func__, priv->data->clks[clk->id].name, rate); + + switch (clk->id) { + case GCC_USB30_PRIM_MOCK_UTMI_CLK: + WARN(rate != 19200000, "Unexpected rate for USB30_PRIM_MOCK_UTMI_CLK: %lu\n", rate); + clk_rcg_set_rate(priv->base, USB30_PRIM_MASTER_CLK_CMD_RCGR, 0, CFG_CLK_SRC_CXO); + return rate; + case GCC_USB30_PRIM_MASTER_CLK: + WARN(rate != 200000000, "Unexpected rate for USB30_PRIM_MASTER_CLK: %lu\n", rate); + clk_rcg_set_rate_mnd(priv->base, USB30_PRIM_MASTER_CLK_CMD_RCGR, + 1, 0, 0, CFG_CLK_SRC_GPLL0_ODD, 8); + clk_rcg_set_rate(priv->base, 0xf064, 0, 0); + return rate; + default: + return 0; + } +} + +static const struct gate_clk sc7280_clks[] = { + GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0xf07c, 1), + GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0xf010, 1), + GATE_CLK(GCC_AGGRE_USB3_PRIM_AXI_CLK, 0xf080, 1), + GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0xf018, 1), + GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0xf01c, 1), + GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0xf054, 1), + GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0xf058, 1), +}; + +static int sc7280_enable(struct clk *clk) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + if (priv->data->num_clks < clk->id) { + debug("%s: unknown clk id %lu\n", __func__, clk->id); + return 0; + } + + debug("%s: clk %ld: %s\n", __func__, clk->id, sc7280_clks[clk->id].name); + + switch (clk->id) { + case GCC_AGGRE_USB3_PRIM_AXI_CLK: + qcom_gate_clk_en(priv, GCC_USB30_PRIM_MASTER_CLK); + fallthrough; + case GCC_USB30_PRIM_MASTER_CLK: + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK); + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK); + break; + } + + qcom_gate_clk_en(priv, clk->id); + + return 0; +} + +static const struct qcom_reset_map sc7280_gcc_resets[] = { + [GCC_PCIE_0_BCR] = { 0x6b000 }, + [GCC_PCIE_0_PHY_BCR] = { 0x6c01c }, + [GCC_PCIE_1_BCR] = { 0x8d000 }, + [GCC_PCIE_1_PHY_BCR] = { 0x8e01c }, + [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 }, + [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 }, + [GCC_SDCC1_BCR] = { 0x75000 }, + [GCC_SDCC2_BCR] = { 0x14000 }, + [GCC_SDCC4_BCR] = { 0x16000 }, + [GCC_UFS_PHY_BCR] = { 0x77000 }, + [GCC_USB30_PRIM_BCR] = { 0xf000 }, + [GCC_USB30_SEC_BCR] = { 0x9e000 }, + [GCC_USB3_DP_PHY_PRIM_BCR] = { 0x50008 }, + [GCC_USB3_PHY_PRIM_BCR] = { 0x50000 }, + [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 }, + [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 }, +}; + +static const struct qcom_power_map sc7280_gdscs[] = { + [GCC_UFS_PHY_GDSC] = { 0x77004 }, + [GCC_USB30_PRIM_GDSC] = { 0xf004 }, +}; + +static struct msm_clk_data qcs404_gcc_data = { + .resets = sc7280_gcc_resets, + .num_resets = ARRAY_SIZE(sc7280_gcc_resets), + .clks = sc7280_clks, + .num_clks = ARRAY_SIZE(sc7280_clks), + + .power_domains = sc7280_gdscs, + .num_power_domains = ARRAY_SIZE(sc7280_gdscs), + + .enable = sc7280_enable, + .set_rate = sc7280_set_rate, +}; + +static const struct udevice_id gcc_sc7280_of_match[] = { + { + .compatible = "qcom,gcc-sc7280", + .data = (ulong)&qcs404_gcc_data, + }, + { } +}; + +U_BOOT_DRIVER(gcc_sc7280) = { + .name = "gcc_sc7280", + .id = UCLASS_NOP, + .of_match = gcc_sc7280_of_match, + .bind = qcom_cc_bind, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, +}; From patchwork Fri Aug 9 00:48:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Connolly X-Patchwork-Id: 818091 Delivered-To: patch@linaro.org Received: by 2002:a5d:5711:0:b0:367:895a:4699 with SMTP id a17csp87892wrv; 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a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean For running U-Boot as primary bootloader we must define the memory layout statically. Signed-off-by: Caleb Connolly --- arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi b/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi new file mode 100644 index 000000000000..c3ec4a317f7c --- /dev/null +++ b/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Linaro Ltd. + */ +/ { + /* When running as the primary bootloader there is no prior + * stage to populate the memory layout for us. We *should* + * have two nodes here, but ABL does NOT like that. + * sooo we're stuck with this. + */ + memory@80000000 { + device_type = "memory"; + reg = <0 0x80000000 0 0x3A800000>, + <0 0xC0000000 0 0x01800000>, + <0 0xC3400000 0 0x3CC00000>, + <1 0x00000000 1 0x00000000>; + }; +}; + +// RAM Entry 0 : Base 0x0080000000 Size 0x003A800000 +// RAM Entry 1 : Base 0x00C0000000 Size 0x0001800000 +// RAM Entry 2 : Base 0x00C3400000 Size 0x003CC00000 +// RAM Entry 3 : Base 0x0100000000 Size 0x0100000000 From patchwork Fri Aug 9 00:48:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Connolly X-Patchwork-Id: 818092 Delivered-To: patch@linaro.org Received: by 2002:a5d:5711:0:b0:367:895a:4699 with SMTP id a17csp87930wrv; Thu, 8 Aug 2024 17:49:26 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX02VJX2CLEz4Tw4G7pKd8eNXFa9NU+SZQX7GFs2Oxly3ytszO5DAH1CeaMRBJEWNyM/bMi87YyczzKzbZXDmMz X-Google-Smtp-Source: AGHT+IGePPpeByF7j361jKMNSo0SyhHGxHkOhByQA6q3/+UdDEv/1QDtRqQvUDE2icTu8LuBxpAv X-Received: by 2002:a17:906:7309:b0:a7a:a212:be48 with SMTP id a640c23a62f3a-a8090eb4695mr253335566b.56.1723164566271; Thu, 08 Aug 2024 17:49:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1723164566; cv=none; d=google.com; s=arc-20160816; b=IIbmpeBC5HEWRcpBaR6I+w1wJ5wU2YomacQfPlGkQ3RveilWLUXCQRUqIhG+fpQV07 dIhGSfmE/P9X3s5oWHnkGyUDchqgzrsj4my0/JkzlM1G8ThBpT85p105lmy8S/5coBiW CgewGh7t9b2/znps8dwLOkfnJHJi4TPGex36viisVnfqjxO6brNMZ/SE3zJJ2uYGGoGQ t7xzod2Oz+/FRqjRvmZ4VPlaDULexCxV3S2+EqevwEfoZ0llUsxllH7d6gzlCohoofeU WTLMhHoweG19P0O6uOp1if1nAWJszXB2/fItsCE7AGv9UR2ckoDmq7kZAANYmaOsxzOO q3Aw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=zLolcdfhpnv2Sr4+jU2o0ZvxpFWa2r7z1o+vmKY3kNM=; fh=Ro0cnTVooG9MaZDVXOehdeJMAZn3oMxKdBjF/qqrBN0=; b=NiP7eU1BMi96nMGOuyZGEIaq+AuWXVHiCbINfyEx6J106rMaj5S/l+BIeOq4FZ8GPE 70bodvFMmE+BE0oe/zAqsOwGN5B6bUAruS5TyV1HNhGU37B55VNrIchOjgnau0Lz/idn h15AvD2JaIgtK/3sjq1KUOlefzkSriTnuCw1P1xkNdBmXMpUY+oq4Shn0HA8LN9uvBV8 D7uiNKqttC8LJ4JrmA2KKNIE5fIB1RzDC/Fb46KgbnA07fS9wpyzPxBn5IY7/JtsCPCz oDKpinYmRj81WiFEPcBmmuHxVRVJNv5hajowFzX4HoYaUFs4uqIWoTLVcLkBWDH65G/y TN1A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ARsy6zkP; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Adjust DTS so USB runs in host mode. The type-c port is the only supported port (since the others need PCIe). Booting from USB is possible with a powered type-c dock. Signed-off-by: Caleb Connolly --- arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi b/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi index c3ec4a317f7c..fbe72595f5ac 100644 --- a/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi +++ b/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi @@ -16,8 +16,13 @@ <1 0x00000000 1 0x00000000>; }; }; +&usb_1_dwc3 { + dr_mode = "host"; + /delete-property/ usb-role-switch; +}; + // RAM Entry 0 : Base 0x0080000000 Size 0x003A800000 // RAM Entry 1 : Base 0x00C0000000 Size 0x0001800000 // RAM Entry 2 : Base 0x00C3400000 Size 0x003CC00000 // RAM Entry 3 : Base 0x0100000000 Size 0x0100000000 From patchwork Fri Aug 9 00:48:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Connolly X-Patchwork-Id: 818094 Delivered-To: patch@linaro.org Received: by 2002:a5d:5711:0:b0:367:895a:4699 with SMTP id a17csp87985wrv; Thu, 8 Aug 2024 17:49:46 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWpb9dMRgjvQAD6v0KoVCABmsgQa6vdtaDgsFx9SvS703ySsIAssCJ1Svur+ad1CnNhjjjHxeXsxxw+NqMuJP20 X-Google-Smtp-Source: AGHT+IHt8csRnY7fjFvLUWBwywd9bD4CqImnjJ3Ygk/bFBhxQ9Q51Gkj5q2YEWb+Ei8gGZrDvR6b X-Received: by 2002:a05:6402:2743:b0:5b9:17c7:93d6 with SMTP id 4fb4d7f45d1cf-5bbb23c8202mr3176865a12.25.1723164585824; Thu, 08 Aug 2024 17:49:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1723164585; cv=none; d=google.com; s=arc-20160816; b=RPHGv67pUGVBGdhPRsM+UJFU5PfcS6Sd9qMq7p+e8+j6l+Xr9722zjEvOzbwm4I/dp yv2mRxknkX5EKTvWVDK0j1L0vETKPv3Kp/3VH2OVKTKzsLq8WzcqYr+QxS73rsfjhHPe D5zb5DpUCZAqvRfa7KVHrINR5QuKVPeWljsYdqURTflPxd/X2pmxNEG/vBo5rHDnWLiv qXy9bgcAxhlweN51T+kGQBJaxH9c4YdNETxbbGw/pd0Hk8JQsXQx8hFH39PmlLYEheWl Muztjcdsg/m3v8dxOKniY2wI7VgBTrUBq7Q+kvn04YtUmpQDr3UEXKW8+H/qm5vmtmSL VlTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=j5mSbK38hTcwjtDq9YqD/jebYPtVMBgOCuwD99/r9IE=; fh=Ro0cnTVooG9MaZDVXOehdeJMAZn3oMxKdBjF/qqrBN0=; b=gNuLPzGMmPF3xkO6iKKdjGGZh3LScMRS7aGuFFS4wlhjsqgU5M/cnGupRUL5jmbmrL mvS0MPylBKWxEPmjv2IyBb7d6rU/GZRy6wlI8rowykApYsDwTzyHiD/dKhg5RolYni0X dJjCZeu3AW/cvoTxJGJgwle7MRx7zvaBYTi6mT+/xKAPP2gqVdW+C3/TXHFyNqWg0dxc 5ZcH3lttYoGTV9Md6AiJuTcbdjYX6iZ71NsGPut+wvgI+utofSSYsEmyDaYtJXhvIqfm YY+aEm82tBBe17HQY9s16rAFSmvO/WllJsrSBm+VmQk7FEM5HLfY93xOYr0PlNt9beii F9QA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ebOEpGlk; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Signed-off-by: Caleb Connolly Reviewed-by: Neil Armstrong --- drivers/iommu/qcom-hyp-smmu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/iommu/qcom-hyp-smmu.c b/drivers/iommu/qcom-hyp-smmu.c index 7b646d840dd4..1b5a09bb7b39 100644 --- a/drivers/iommu/qcom-hyp-smmu.c +++ b/drivers/iommu/qcom-hyp-smmu.c @@ -380,8 +380,9 @@ static struct iommu_ops qcom_smmu_ops = { }; static const struct udevice_id qcom_smmu500_ids[] = { { .compatible = "qcom,sdm845-smmu-500" }, + { .compatible = "qcom,sc7280-smmu-500" }, { .compatible = "qcom,smmu-500", }, { /* sentinel */ } }; From patchwork Fri Aug 9 00:48:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Connolly X-Patchwork-Id: 818093 Delivered-To: patch@linaro.org Received: by 2002:a5d:5711:0:b0:367:895a:4699 with SMTP id a17csp87964wrv; Thu, 8 Aug 2024 17:49:37 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVQKddz31SgmOsElwH4kT70oIgtNq9N2HTmP97q23v9WAy/XYv1WRFbq4Ro5vZVpGJz4GigROvuYfSTYvfAgnyj X-Google-Smtp-Source: AGHT+IGVgnylrPoxflHEN1JsnT/AMkv8s9hb5CQgK0LltdLYSh4bKtXPaXNiG0KEaBOdEm8cEhbg X-Received: by 2002:a05:6402:5204:b0:5a2:a808:a2e0 with SMTP id 4fb4d7f45d1cf-5bbb21f4142mr2515668a12.4.1723164577508; Thu, 08 Aug 2024 17:49:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1723164577; cv=none; d=google.com; s=arc-20160816; b=k1HTuLopXm7TGvlsa7DqX2V4JrryL25DMaDeYzyb5XHCNKgg+d9vPPLDTb4avjVluz 6qRADxJKJ9YYU52tKfd7/xXPE/v35f1F1/LKYDcdmODfwQIq1t3Afn1Ij5yIzgX91ZeU FUPc/221JsJTLC262LRvN01y3OSZYVtAyJn9zVNApVgz8oScYIyadqqfa3q+YqU83e2G XYBtTNs2oPyGNgZWaU1sYHy5VpulgmCHsnXVZtfBeIA2EgU2tswDpNZnhmDjNb1C02hN OQ6EPbTYmQlozu5Dayr0gbzUPHZxa/4iaEPKkowJSbHZkP5U2jHFrFoMhLOt68eg8ZKw EDbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=gUmKdA3keNnEz1rgLV6xOfK0Cqu1oWkwLayT3IpBx4M=; fh=Ro0cnTVooG9MaZDVXOehdeJMAZn3oMxKdBjF/qqrBN0=; b=B0juYRVyGQrOYG5VapdE9J3L5ISjK5UanimHi0IqCgIQ+kk9hR/fz4XkQGN87U4sJ/ tWhOuxA0A9qGdZL09NaaqrT9PcPAg1ONIARsdNw2PY1WsVSlYMgdqcCix/d4BULmdk0C Ykbw4+0nFL+URyq7mtmeNS3xKaCF/MEDdS8ppBUJp3LNiO97NenOY+HGSiEKdaCpAO3k jKvSHSP+DIMd90z4WwrBhDrSi/jMM/uWN7ZYPJ+UdAZg5kiDdMIkxYsz+J5ADNOmLcuH 0iyjHeXzqT3d8RVQSyjxyayruUNAOW0sWL7klsFxIfs3EUSOO91/9LA2g7uxWJbAQ3DE sEiA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DFWsasWd; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Introduce a defconfig for the RB3 Gen 2 and other QCM6490 boards with a dedicated uefi partition. These can replace EDK2 entirely with U-Boot. Signed-off-by: Caleb Connolly --- configs/qcm6490_defconfig | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/configs/qcm6490_defconfig b/configs/qcm6490_defconfig new file mode 100644 index 000000000000..25413ac9ed5a --- /dev/null +++ b/configs/qcm6490_defconfig @@ -0,0 +1,18 @@ +# Configuration for building U-Boot to be flashed +# to the uefi partition of QCM6490 dev boards with +# the "Linux Embedded" partition layout (which have +# a dedicated "uefi" partition for edk2/U-Boot) + +#include "qcom_defconfig" + +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_BASE=0x994000 +CONFIG_DEBUG_UART_MSM_GENI=y +CONFIG_DEBUG_UART_CLOCK=14745600 + +# Address where U-Boot will be loaded +CONFIG_TEXT_BASE=0x9fc00000 +CONFIG_REMAKE_ELF=y + +CONFIG_DEFAULT_DEVICE_TREE="qcom/qcs6490-rb3gen2" From patchwork Fri Aug 9 00:48:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Connolly X-Patchwork-Id: 818096 Delivered-To: patch@linaro.org Received: by 2002:a5d:5711:0:b0:367:895a:4699 with SMTP id a17csp88074wrv; Thu, 8 Aug 2024 17:50:12 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWp3z6QrLCLlPSy6TwOSE/Djqslw7jQDTay3URPrqIERysEBx4UnS2zyA4ZkmWfJ5+vTQwIWty1XSthBKZ6gKbg X-Google-Smtp-Source: AGHT+IF1c04qW9EIolHprmbezJtTJxtEbpLRmshdEVn2dlvQtYaEGbA13wX5Tdre6UQQ837GZtnP X-Received: by 2002:a17:906:eec2:b0:a6f:dd93:7ffb with SMTP id a640c23a62f3a-a8091ec812dmr310480466b.1.1723164612062; Thu, 08 Aug 2024 17:50:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1723164612; cv=none; d=google.com; s=arc-20160816; b=yJhTFlMXDSoDMhljN+ScX1Xd4niTtwI4wgDb7CuMDk/FkFwReL2M8A0+bC5Clr+Azp ox765/+zpY2+Eq8LtIf2tP0fOgjK3ZwL485u8U/5r3tN7Wceb51LNYQoHy0GzHZjKWa6 U2t6IuHOGzXF6Xb4s8eJAz3ILumSfbfyz98h9+54QBqRQFEl6AzcZv/GKqOEM8YrLO9+ hSdGzi3axfPUk43dL3p1QaQBW34XCzyYlGZ7+U/jTOsjpDabSH4P0BH9QzV6z+bmcogP Avos3oM9HB6qBx+O9hpLdielz23YcoMKQ3GEhC/gTUEc9h3Bniry2WO8aggChOcApTr2 Ef9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:cc:to:in-reply-to:references :message-id:content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=NUIaIDYuarjZ2xvaAjlE4GF6abjF8tFPSzm38GjGbjU=; fh=Ro0cnTVooG9MaZDVXOehdeJMAZn3oMxKdBjF/qqrBN0=; b=L4kAZAJnm6T5PpBfRCmyiuigNrb8GFbBTZ8m8jYvub8f0J42SdXQPBA+nLdWEuv6wj kxSfCYWLS/xhRsQlfklQR2U5cejjPwRyhBfIz+he3stPb1PePZI8bfPrPoAscXAkkUVU JV24ZDauFxxk7I3TNhIbV0nn+OlNIDF2BH7cVbITNuWCOoc5RAlFqgGTFZiS7KnOVb/g KB2p5Iqz2h4poVUjys8oAX2DL3TD4Kf+5aHhl9j9YARA1VzaUNwQX9aO86+HCJgrKAFQ PFQ6G8Utfc780qAne4pFUL2oukmLKXm6fU3ocBv0B6QaOuLa/sJFR2d0Bp1Diibg+MqU nNcw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=G8x2jMmV; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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a=openpgp; fpr=83B24DA7FE145076BC38BB250CD904EB673A7C47 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The process here is almost identical to the Dragonboard 410c, we've come full circle! Signed-off-by: Caleb Connolly --- doc/board/qualcomm/rb3gen2.rst | 53 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/doc/board/qualcomm/rb3gen2.rst b/doc/board/qualcomm/rb3gen2.rst new file mode 100644 index 000000000000..4240606224f5 --- /dev/null +++ b/doc/board/qualcomm/rb3gen2.rst @@ -0,0 +1,53 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. sectionauthor:: Caleb Connolly + +Qualcomm Robotics RB3 Gen 2 +=========================== + +The RB3 Gen 2 is a development board based on the Qualcomm QCM6490 SoC (a derivative +of SC7280). More information can be found on `Qualcomm's product page`_. + +U-Boot can be used as a replacement for Qualcomm's original EDK2 bootloader by +flashing it directly to the uefi_a (or _b) partition. + +.. _Qualcomm's product page: https://www.qualcomm.com/developer/hardware/rb3-gen-2-development-kit + +Installation +------------ +First, setup ``CROSS_COMPILE`` for aarch64. Then, build U-Boot for ``qcm6490``:: + + $ export CROSS_COMPILE= + $ make qcm6490_defconfig + $ make -j8 + +This will build ``u-boot.elf`` in the configured output directory. + +Although the RB3 Gen 2 does not have secure boot set up by default, +the firmware still expects firmware ELF images to be "signed". The signature +does not provide any security in this case, but it provides the firmware with +some required metadata. + +To "sign" ``u-boot.elf`` you can use e.g. `qtestsign`_:: + + $ qtestsign -v6 aboot -o u-boot.mbn u-boot.elf + +Then install the resulting ``u-boot.mbn`` to the ``uefi_a`` partition +on your device with ``fastboot flash uefi_a u-boot.mbn``. + +U-Boot should be running after a reboot (``fastboot reboot``). + +Note that fastboot is not yet supported in U-Boot on this board, as a result, +to flash back the original firmware, or new versoins of the U-Boot, EDL mode +must be used. This can be accessed by pressing the EDL mode button as described +in the Qualcomm Linux documentation. A tool like bkerler's `edl`_ can be used +for flashing with the firehose loader binary appropriate for the board. + +.. _qtestsign: https://github.com/msm8916-mainline/qtestsign +.. _edl: https://github.com/bkerler/edl + +Usage +----- + +The USB Type-A ports are connected via a PCIe USB hub, which is not supported yet. +However, the Type-C port can be used with a powered USB dock to connect peripherals +like a USB stick.