From patchwork Fri Nov 8 05:19:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 178851 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2158795ilf; Thu, 7 Nov 2019 21:20:19 -0800 (PST) X-Google-Smtp-Source: APXvYqzTRHWtpPtQBCMrQzTZcpaNeXzRLjyU9trM2RZq09aZYDF8YEVq2fZRGWrLqqbiunxcjokq X-Received: by 2002:a50:f05c:: with SMTP id u28mr7929461edl.265.1573190419315; Thu, 07 Nov 2019 21:20:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573190419; cv=none; d=google.com; s=arc-20160816; b=UPKFCtEyrS4eBbzpNj4vEya4YfwqYD6XU21QkLNrgVyaLlTAlHD3Ps9vKw9537iQ4y DUBuR/G2jEBVp9ZMbuQ6/mKovGgHGCXqXtebwu+mZXopcCwQrqmruKo/kQyEsopmr8vj pU0bHrzIm+OOpP0eI2WlJhjvlHwF/buT+blf07VX9MVaxcLF2fuBpjjUUw86wC64RGTN vI7e16D4YKPkpS2ygLM74IQ8dzVhrgWrWQqWK7qGfywjufiqvDiv7uxOmsmfKryqozPJ zluHZTXXpph5LFmKa+tZ7sfO/5PKIGf80nlO29kvl8+Zy3MWTBY1+75lh91Xf6IrwWTD P2aA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=YuW1ipLzZ/2+gNhmz9GQaaZr1Idsk5f88aGw6tJt1FE=; b=EW9UDeeqrhgma5c11MGv7VWzatXnxq/cYcpoHUISB7TE+5rrQ2RL8sNvs4D5sFhKHM myTBYLbuc06t03dpvVLAQnlXq3rNkuhXT8rpyRzZ2SSWc0WsdKYr1Ydb6lmzOCY3q55a jElEhtlZ52HWv2Ql1VYdKYgkKVGDlSMY1kFxy3i8dYhwca0lUmuzVoZT1cttTlfMZ0fT LmWx5fPXJk+03hSEbqfkJ+/V942vE+5W8J2pQa3IbguRLChvsiGlSGP4qv65j97/6rAb eXHBJEgeza59YHZUk6vbGIa8NC3oCndnx6cd6pceOjGYLNyH361zZ19NTZ1f754yVuzk Ivzw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b="h/Htgv05"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w56si3334581eda.376.2019.11.07.21.20.19; Thu, 07 Nov 2019 21:20:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b="h/Htgv05"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727840AbfKHFUQ (ORCPT + 26 others); Fri, 8 Nov 2019 00:20:16 -0500 Received: from mail-pl1-f175.google.com ([209.85.214.175]:38500 "EHLO mail-pl1-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726125AbfKHFUP (ORCPT ); Fri, 8 Nov 2019 00:20:15 -0500 Received: by mail-pl1-f175.google.com with SMTP id w8so3280171plq.5; Thu, 07 Nov 2019 21:20:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YuW1ipLzZ/2+gNhmz9GQaaZr1Idsk5f88aGw6tJt1FE=; b=h/Htgv05sKRRazJUllEnoeg0JF9DrJfLx+QhhEnGCfV+4oK3XW71fEWR6xZFnu8rba 6l8xLBJWxW51VlEMz/bBR/OiaKWExGgNlNwSMPVRdc3z8I28eVuvr3RFE59DHmKQYBdr sTp4QRQN3orrHUh6AamiEiArid/lOOJqqdhi+a5G2i/o+iL851mAR7eWQVMQ8Yr6aYTb 9ep/S4IbA9aGJpML1MvscFH/stjhsyXwD9dCW+ad5s5+VOb9Pg5Gmamg5f9wkXNHaRK1 3Y7YYfDylifVoNKxvhBOG1r0ggRH0ccAI7Rx0ZTyx6N4PHc/dkabFgMdcCp8cjsXMfAH yuOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=YuW1ipLzZ/2+gNhmz9GQaaZr1Idsk5f88aGw6tJt1FE=; b=DkqST912SbTXGLU0w440K105ENk6S7NMo1Xaj7t+9MmfOhIPxigq7DuYRNqZXbMNQH or60Yz+V05xQsop02AI/vjEpqnRYbStZpBZCDLoSbKBc6hSoaHQrQKfM7wiYZjmyxYZM WkEyPw6Ix9IaR/z74wIq6NnQIfu72/T/TPT78y8n37pDNr9f0Q/ox1xwBYrXda1/Y08z VH0LCG4FIFgZ5IV1rO3rgS7P0I9K7lCkXq6oRGpy94KWEdp355x3PtjcCQxkxHbyUTab Wii13M8pGLGu/pDckp7Wj7fpDtsDAgQfjX4qtA8pp9fbiSrijdC5W6CZSd3AbRQDaerT hwdg== X-Gm-Message-State: APjAAAXKDAsXb7r4X92QWsbjynEb0W5WGs/NeWgu0Dhl+IbMIMbtft7u OuNpwHIiLZGSmv9Q+e+Jw7U= X-Received: by 2002:a17:90a:24b:: with SMTP id t11mr10871279pje.77.1573190414746; Thu, 07 Nov 2019 21:20:14 -0800 (PST) Received: from voyager.ibm.com ([36.255.48.244]) by smtp.gmail.com with ESMTPSA id v19sm3798443pjr.14.2019.11.07.21.20.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Nov 2019 21:20:14 -0800 (PST) From: Joel Stanley To: Rob Herring , Greg KH , Jeremy Kerr Cc: Alistar Popple , Eddie James , Steven Rostedt , Ingo Molnar , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-fsi@lists.ozlabs.org Subject: [PATCH v2 03/11] ABI: Update FSI path documentation Date: Fri, 8 Nov 2019 15:49:37 +1030 Message-Id: <20191108051945.7109-4-joel@jms.id.au> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191108051945.7109-1-joel@jms.id.au> References: <20191108051945.7109-1-joel@jms.id.au> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The paths added back in 4.13 weren't quite correct. The in reality the files documented lived under /sys/devices/../fsi0/rescan /sys/devices/../fsi0/break /sys/devices/../fsi0/slave@00:00/term /sys/devices/../fsi0/slave@00:00/raw In 5.5 with the addition of the FSI class they move to /sys/devices/../fsi-master/fsi0/rescan /sys/devices/../fsi-master/fsi0/break /sys/devices/../fsi-master/fsi0/slave@00:00/term /sys/devices/../fsi-master/fsi0/slave@00:00/raw This is closer to how the (incorrect) documentation described them. Signed-off-by: Joel Stanley --- Documentation/ABI/testing/sysfs-bus-fsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) -- 2.24.0.rc1 Acked-by: Alistair Popple diff --git a/Documentation/ABI/testing/sysfs-bus-fsi b/Documentation/ABI/testing/sysfs-bus-fsi index 57c806350d6c..320697bdf41d 100644 --- a/Documentation/ABI/testing/sysfs-bus-fsi +++ b/Documentation/ABI/testing/sysfs-bus-fsi @@ -1,25 +1,25 @@ -What: /sys/bus/platform/devices/fsi-master/rescan +What: /sys/bus/platform/devices/../fsi-master/fsi0/rescan Date: May 2017 KernelVersion: 4.12 -Contact: cbostic@linux.vnet.ibm.com +Contact: linux-fsi@lists.ozlabs.org Description: Initiates a FSI master scan for all connected slave devices on its links. -What: /sys/bus/platform/devices/fsi-master/break +What: /sys/bus/platform/devices/../fsi-master/fsi0/break Date: May 2017 KernelVersion: 4.12 -Contact: cbostic@linux.vnet.ibm.com +Contact: linux-fsi@lists.ozlabs.org Description: Sends an FSI BREAK command on a master's communication link to any connnected slaves. A BREAK resets connected device's logic and preps it to receive further commands from the master. -What: /sys/bus/platform/devices/fsi-master/slave@00:00/term +What: /sys/bus/platform/devices/../fsi-master/fsi0/slave@00:00/term Date: May 2017 KernelVersion: 4.12 -Contact: cbostic@linux.vnet.ibm.com +Contact: linux-fsi@lists.ozlabs.org Description: Sends an FSI terminate command from the master to its connected slave. A terminate resets the slave's state machines @@ -29,10 +29,10 @@ Description: ongoing operation in case of an expired 'Master Time Out' timer. -What: /sys/bus/platform/devices/fsi-master/slave@00:00/raw +What: /sys/bus/platform/devices/../fsi-master/fsi0/slave@00:00/raw Date: May 2017 KernelVersion: 4.12 -Contact: cbostic@linux.vnet.ibm.com +Contact: linux-fsi@lists.ozlabs.org Description: Provides a means of reading/writing a 32 bit value from/to a specified FSI bus address. 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Add defines to the fsi-master.h header, and introduce headings to delineate the existing low level details. Acked-by: Andrew Jeffery Acked-by: Jeremy Kerr Signed-off-by: Joel Stanley --- drivers/fsi/fsi-master-hub.c | 46 ----------------------- drivers/fsi/fsi-master.h | 71 ++++++++++++++++++++++++++++++++++++ 2 files changed, 71 insertions(+), 46 deletions(-) -- 2.24.0.rc1 diff --git a/drivers/fsi/fsi-master-hub.c b/drivers/fsi/fsi-master-hub.c index f158b1a88286..def35cf92571 100644 --- a/drivers/fsi/fsi-master-hub.c +++ b/drivers/fsi/fsi-master-hub.c @@ -13,53 +13,7 @@ #include "fsi-master.h" -/* Control Registers */ -#define FSI_MMODE 0x0 /* R/W: mode */ -#define FSI_MDLYR 0x4 /* R/W: delay */ -#define FSI_MCRSP 0x8 /* R/W: clock rate */ -#define FSI_MENP0 0x10 /* R/W: enable */ -#define FSI_MLEVP0 0x18 /* R: plug detect */ -#define FSI_MSENP0 0x18 /* S: Set enable */ -#define FSI_MCENP0 0x20 /* C: Clear enable */ -#define FSI_MAEB 0x70 /* R: Error address */ -#define FSI_MVER 0x74 /* R: master version/type */ -#define FSI_MRESP0 0xd0 /* W: Port reset */ -#define FSI_MESRB0 0x1d0 /* R: Master error status */ -#define FSI_MRESB0 0x1d0 /* W: Reset bridge */ -#define FSI_MECTRL 0x2e0 /* W: Error control */ - -/* MMODE: Mode control */ -#define FSI_MMODE_EIP 0x80000000 /* Enable interrupt polling */ -#define FSI_MMODE_ECRC 0x40000000 /* Enable error recovery */ -#define FSI_MMODE_EPC 0x10000000 /* Enable parity checking */ -#define FSI_MMODE_P8_TO_LSB 0x00000010 /* Timeout value LSB */ - /* MSB=1, LSB=0 is 0.8 ms */ - /* MSB=0, LSB=1 is 0.9 ms */ -#define FSI_MMODE_CRS0SHFT 18 /* Clk rate selection 0 shift */ -#define FSI_MMODE_CRS0MASK 0x3ff /* Clk rate selection 0 mask */ -#define FSI_MMODE_CRS1SHFT 8 /* Clk rate selection 1 shift */ -#define FSI_MMODE_CRS1MASK 0x3ff /* Clk rate selection 1 mask */ - -/* MRESB: Reset brindge */ -#define FSI_MRESB_RST_GEN 0x80000000 /* General reset */ -#define FSI_MRESB_RST_ERR 0x40000000 /* Error Reset */ - -/* MRESB: Reset port */ -#define FSI_MRESP_RST_ALL_MASTER 0x20000000 /* Reset all FSI masters */ -#define FSI_MRESP_RST_ALL_LINK 0x10000000 /* Reset all FSI port contr. */ -#define FSI_MRESP_RST_MCR 0x08000000 /* Reset FSI master reg. */ -#define FSI_MRESP_RST_PYE 0x04000000 /* Reset FSI parity error */ -#define FSI_MRESP_RST_ALL 0xfc000000 /* Reset any error */ - -/* MECTRL: Error control */ -#define FSI_MECTRL_EOAE 0x8000 /* Enable machine check when */ - /* master 0 in error */ -#define FSI_MECTRL_P8_AUTO_TERM 0x4000 /* Auto terminate */ - #define FSI_ENGID_HUB_MASTER 0x1c -#define FSI_HUB_LINK_OFFSET 0x80000 -#define FSI_HUB_LINK_SIZE 0x80000 -#define FSI_HUB_MASTER_MAX_LINKS 8 #define FSI_LINK_ENABLE_SETUP_TIME 10 /* in mS */ diff --git a/drivers/fsi/fsi-master.h b/drivers/fsi/fsi-master.h index c7174237e864..6e8d4d4d5149 100644 --- a/drivers/fsi/fsi-master.h +++ b/drivers/fsi/fsi-master.h @@ -12,6 +12,71 @@ #include #include +/* + * Master registers + * + * These are used by hardware masters, such as the one in the FSP2, AST2600 and + * the hub master in POWER processors. + */ + +/* Control Registers */ +#define FSI_MMODE 0x0 /* R/W: mode */ +#define FSI_MDLYR 0x4 /* R/W: delay */ +#define FSI_MCRSP 0x8 /* R/W: clock rate */ +#define FSI_MENP0 0x10 /* R/W: enable */ +#define FSI_MLEVP0 0x18 /* R: plug detect */ +#define FSI_MSENP0 0x18 /* S: Set enable */ +#define FSI_MCENP0 0x20 /* C: Clear enable */ +#define FSI_MAEB 0x70 /* R: Error address */ +#define FSI_MVER 0x74 /* R: master version/type */ +#define FSI_MSTAP0 0xd0 /* R: Port status */ +#define FSI_MRESP0 0xd0 /* W: Port reset */ +#define FSI_MESRB0 0x1d0 /* R: Master error status */ +#define FSI_MRESB0 0x1d0 /* W: Reset bridge */ +#define FSI_MSCSB0 0x1d4 /* R: Master sub command stack */ +#define FSI_MATRB0 0x1d8 /* R: Master address trace */ +#define FSI_MDTRB0 0x1dc /* R: Master data trace */ +#define FSI_MECTRL 0x2e0 /* W: Error control */ + +/* MMODE: Mode control */ +#define FSI_MMODE_EIP 0x80000000 /* Enable interrupt polling */ +#define FSI_MMODE_ECRC 0x40000000 /* Enable error recovery */ +#define FSI_MMODE_RELA 0x20000000 /* Enable relative address commands */ +#define FSI_MMODE_EPC 0x10000000 /* Enable parity checking */ +#define FSI_MMODE_P8_TO_LSB 0x00000010 /* Timeout value LSB */ + /* MSB=1, LSB=0 is 0.8 ms */ + /* MSB=0, LSB=1 is 0.9 ms */ +#define FSI_MMODE_CRS0SHFT 18 /* Clk rate selection 0 shift */ +#define FSI_MMODE_CRS0MASK 0x3ff /* Clk rate selection 0 mask */ +#define FSI_MMODE_CRS1SHFT 8 /* Clk rate selection 1 shift */ +#define FSI_MMODE_CRS1MASK 0x3ff /* Clk rate selection 1 mask */ + +/* MRESB: Reset brindge */ +#define FSI_MRESB_RST_GEN 0x80000000 /* General reset */ +#define FSI_MRESB_RST_ERR 0x40000000 /* Error Reset */ + +/* MRESP: Reset port */ +#define FSI_MRESP_RST_ALL_MASTER 0x20000000 /* Reset all FSI masters */ +#define FSI_MRESP_RST_ALL_LINK 0x10000000 /* Reset all FSI port contr. */ +#define FSI_MRESP_RST_MCR 0x08000000 /* Reset FSI master reg. */ +#define FSI_MRESP_RST_PYE 0x04000000 /* Reset FSI parity error */ +#define FSI_MRESP_RST_ALL 0xfc000000 /* Reset any error */ + +/* MECTRL: Error control */ +#define FSI_MECTRL_EOAE 0x8000 /* Enable machine check when */ + /* master 0 in error */ +#define FSI_MECTRL_P8_AUTO_TERM 0x4000 /* Auto terminate */ + +#define FSI_HUB_LINK_OFFSET 0x80000 +#define FSI_HUB_LINK_SIZE 0x80000 +#define FSI_HUB_MASTER_MAX_LINKS 8 + +/* + * Protocol definitions + * + * These are used by low level masters that bit-bang out the protocol + */ + /* Various protocol delays */ #define FSI_ECHO_DELAY_CLOCKS 16 /* Number clocks for echo delay */ #define FSI_SEND_DELAY_CLOCKS 16 /* Number clocks for send delay */ @@ -47,6 +112,12 @@ /* fsi-master definition and flags */ #define FSI_MASTER_FLAG_SWCLOCK 0x1 +/* + * Structures and function prototypes + * + * These are common to all masters + */ + struct fsi_master { struct device dev; int idx; From patchwork Fri Nov 8 05:19:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 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They show the low level reads, writes and error states of the master. Signed-off-by: Joel Stanley --- v2: remove unnecessary semicolon --- drivers/fsi/fsi-master-aspeed.c | 22 +++++++ include/trace/events/fsi_master_aspeed.h | 77 ++++++++++++++++++++++++ 2 files changed, 99 insertions(+) create mode 100644 include/trace/events/fsi_master_aspeed.h -- 2.24.0.rc1 diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c index d1b83f035483..95e226ac78b9 100644 --- a/drivers/fsi/fsi-master-aspeed.c +++ b/drivers/fsi/fsi-master-aspeed.c @@ -77,6 +77,9 @@ static const u32 fsi_base = 0xa0000000; #define XFER_HALFWORD (BIT(0)) #define XFER_BYTE (0) +#define CREATE_TRACE_POINTS +#include + #define FSI_LINK_ENABLE_SETUP_TIME 10 /* in mS */ #define DEFAULT_DIVISOR 14 @@ -102,6 +105,8 @@ static int __opb_write(struct fsi_master_aspeed *aspeed, u32 addr, status = readl(base + OPB0_STATUS); + trace_fsi_master_aspeed_opb_write(addr, val, transfer_size, status, reg); + /* Return error when poll timed out */ if (ret) return ret; @@ -149,6 +154,10 @@ static int __opb_read(struct fsi_master_aspeed *aspeed, uint32_t addr, result = readl(base + OPB0_FSI_DATA_R); + trace_fsi_master_aspeed_opb_read(addr, transfer_size, result, + readl(base + OPB0_STATUS), + reg); + /* Return error when poll timed out */ if (ret) return ret; @@ -196,6 +205,19 @@ static int check_errors(struct fsi_master_aspeed *aspeed, int err) { int ret; + if (trace_fsi_master_aspeed_opb_error_enabled()) { + __be32 mresp0, mstap0, mesrb0; + + opb_readl(aspeed, ctrl_base + FSI_MRESP0, &mresp0); + opb_readl(aspeed, ctrl_base + FSI_MSTAP0, &mstap0); + opb_readl(aspeed, ctrl_base + FSI_MESRB0, &mesrb0); + + trace_fsi_master_aspeed_opb_error( + be32_to_cpu(mresp0), + be32_to_cpu(mstap0), + be32_to_cpu(mesrb0)); + } + if (err == -EIO) { /* Check MAEB (0x70) ? */ diff --git a/include/trace/events/fsi_master_aspeed.h b/include/trace/events/fsi_master_aspeed.h new file mode 100644 index 000000000000..a355ceacc33f --- /dev/null +++ b/include/trace/events/fsi_master_aspeed.h @@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#undef TRACE_SYSTEM +#define TRACE_SYSTEM fsi_master_aspeed + +#if !defined(_TRACE_FSI_MASTER_ASPEED_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_FSI_MASTER_ASPEED_H + +#include + +TRACE_EVENT(fsi_master_aspeed_opb_read, + TP_PROTO(uint32_t addr, size_t size, uint32_t result, uint32_t status, uint32_t irq_status), + TP_ARGS(addr, size, result, status, irq_status), + TP_STRUCT__entry( + __field(uint32_t, addr) + __field(size_t, size) + __field(uint32_t, result) + __field(uint32_t, status) + __field(uint32_t, irq_status) + ), + TP_fast_assign( + __entry->addr = addr; + __entry->size = size; + __entry->result = result; + __entry->status = status; + __entry->irq_status = irq_status; + ), + TP_printk("addr %08x size %zu: result %08x sts: %08x irq_sts: %08x", + __entry->addr, __entry->size, __entry->result, + __entry->status, __entry->irq_status + ) +); + +TRACE_EVENT(fsi_master_aspeed_opb_write, + TP_PROTO(uint32_t addr, uint32_t val, size_t size, uint32_t status, uint32_t irq_status), + TP_ARGS(addr, val, size, status, irq_status), + TP_STRUCT__entry( + __field(uint32_t, addr) + __field(uint32_t, val) + __field(size_t, size) + __field(uint32_t, status) + __field(uint32_t, irq_status) + ), + TP_fast_assign( + __entry->addr = addr; + __entry->val = val; + __entry->size = size; + __entry->status = status; + __entry->irq_status = irq_status; + ), + TP_printk("addr %08x val %08x size %zu status: %08x irq_sts: %08x", + __entry->addr, __entry->val, __entry->size, + __entry->status, __entry->irq_status + ) + ); + +TRACE_EVENT(fsi_master_aspeed_opb_error, + TP_PROTO(uint32_t mresp0, uint32_t mstap0, uint32_t mesrb0), + TP_ARGS(mresp0, mstap0, mesrb0), + TP_STRUCT__entry( + __field(uint32_t, mresp0) + __field(uint32_t, mstap0) + __field(uint32_t, mesrb0) + ), + TP_fast_assign( + __entry->mresp0 = mresp0; + __entry->mstap0 = mstap0; + __entry->mesrb0 = mesrb0; + ), + TP_printk("mresp0 %08x mstap0 %08x mesrb0 %08x", + __entry->mresp0, __entry->mstap0, __entry->mesrb0 + ) + ); + +#endif + +#include