From patchwork Fri Aug 23 23:23:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunhong Jiang X-Patchwork-Id: 822373 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7DC8E1C6F77; Fri, 23 Aug 2024 23:23:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724455436; cv=none; b=SL1c/eeFI5pWC4sNeb09nNfcKWRq96ENDuP0rljUy9M0km9AYLoXDsBAyr1p8D3HIJ5qNIbhMvxHCTc8L5m8q++QAC7yoBMvWNBZhCnmu1EvnbW5QQxCrOXVdz1Q0eFr9CuV00tGM/TLIqIs6vMGKSxhlMrQUMjxTjg0XwA3eCs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724455436; c=relaxed/simple; bh=xLRdtJ64kQ24k5untrIAz54KexJSdvR2FAmQANoccMo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=RZWilwJovyHnaoLNHsoN6wPHYO8Pw+hO8yKcreDgbVYWE0GPdNplBnCx5LVXdptvSJScA3vfeQLuYBs2rl+mdoDa07xTLZcGkeVVpr00EEAtmXyHglFQzKmYGjEDnblRlsBJNcvCBFOhtfrvujC4xxfm2veA+WS5kjaQ4DPjUAc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=nXDaBW89; arc=none smtp.client-ip=192.198.163.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="nXDaBW89" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1724455435; x=1755991435; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xLRdtJ64kQ24k5untrIAz54KexJSdvR2FAmQANoccMo=; b=nXDaBW89P1mdCVg9owO1QvANbhbhk7fc0VX9B3NC2I6MGJWXQAJlO0CJ QqV/VVwsbXJBzdt/A3PKBIxb6+gozVCyEc6QbX4BpGVARldj1DRiIt2Jr Gs+glwrAmKieplMn2FPo4FIvVkUO+PoFGjOwStUH2TnfovGNQAmk6UKnC pEnh5nVgvTm+QnkAuTDvsTtEZQHt4PhjLESVHml3beAGCHXAPzF3tBlwv M1ILJTtqeTPfU+BYmpn6FmlLGPALEbIlhft0tqgm1PoDdjGZ0uCAHC1Ig FSiguQqBiadiGzwtSUW8+G1RXCQt9+K8lYezyDeIqk9nv/FimlN3ZA+2w w==; X-CSE-ConnectionGUID: y/KaeimPRRGW8yDROCUNOw== X-CSE-MsgGUID: S7NqGuUOR1eB+9sCFZMyug== X-IronPort-AV: E=McAfee;i="6700,10204,11173"; a="33619277" X-IronPort-AV: E=Sophos;i="6.10,171,1719903600"; d="scan'208";a="33619277" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Aug 2024 16:23:52 -0700 X-CSE-ConnectionGUID: XHJC5UBwQz6mZb/8EWTeWg== X-CSE-MsgGUID: nXWzuEMZTquSbbXwR/czRA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,171,1719903600"; d="scan'208";a="61641000" Received: from yjiang5-dev1.sc.intel.com ([172.25.103.134]) by fmviesa007.fm.intel.com with ESMTP; 23 Aug 2024 16:23:52 -0700 From: Yunhong Jiang To: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, rafael@kernel.org, lenb@kernel.org, kirill.shutemov@linux.intel.com, yunhong.jiang@linux.intel.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 1/9] x86/acpi: Move ACPI MADT wakeup to generic code Date: Fri, 23 Aug 2024 16:23:19 -0700 Message-Id: <20240823232327.2408869-2-yunhong.jiang@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> References: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In order to support the ACPI mailbox wakeup in device tree, move the MADT wakeup code out of the acpi directory, so that both ACPI and device tree can use it. Signed-off-by: Yunhong Jiang --- MAINTAINERS | 2 ++ arch/x86/kernel/Makefile | 1 + arch/x86/kernel/acpi/Makefile | 1 - arch/x86/kernel/{acpi => }/madt_playdead.S | 0 arch/x86/kernel/{acpi => }/madt_wakeup.c | 0 5 files changed, 3 insertions(+), 1 deletion(-) rename arch/x86/kernel/{acpi => }/madt_playdead.S (100%) rename arch/x86/kernel/{acpi => }/madt_wakeup.c (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 969eb9c6e759..5555a3bbac5f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -289,6 +289,8 @@ F: Documentation/ABI/testing/configfs-acpi F: Documentation/ABI/testing/sysfs-bus-acpi F: Documentation/firmware-guide/acpi/ F: arch/x86/kernel/acpi/ +F: arch/x86/kernel/madt_playdead.S +F: arch/x86/kernel/madt_wakeup.c F: arch/x86/pci/acpi.c F: drivers/acpi/ F: drivers/pci/*/*acpi* diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index f7918980667a..0823e5ba3aea 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -163,4 +163,5 @@ ifeq ($(CONFIG_X86_64),y) obj-$(CONFIG_MMCONF_FAM10H) += mmconf-fam10h_64.o obj-y += vsmp_64.o + obj-$(CONFIG_ACPI_MADT_WAKEUP) += madt_wakeup.o madt_playdead.o endif diff --git a/arch/x86/kernel/acpi/Makefile b/arch/x86/kernel/acpi/Makefile index 842a5f449404..fc17b3f136fe 100644 --- a/arch/x86/kernel/acpi/Makefile +++ b/arch/x86/kernel/acpi/Makefile @@ -4,7 +4,6 @@ obj-$(CONFIG_ACPI) += boot.o obj-$(CONFIG_ACPI_SLEEP) += sleep.o wakeup_$(BITS).o obj-$(CONFIG_ACPI_APEI) += apei.o obj-$(CONFIG_ACPI_CPPC_LIB) += cppc.o -obj-$(CONFIG_ACPI_MADT_WAKEUP) += madt_wakeup.o madt_playdead.o ifneq ($(CONFIG_ACPI_PROCESSOR),) obj-y += cstate.o diff --git a/arch/x86/kernel/acpi/madt_playdead.S b/arch/x86/kernel/madt_playdead.S similarity index 100% rename from arch/x86/kernel/acpi/madt_playdead.S rename to arch/x86/kernel/madt_playdead.S diff --git a/arch/x86/kernel/acpi/madt_wakeup.c b/arch/x86/kernel/madt_wakeup.c similarity index 100% rename from arch/x86/kernel/acpi/madt_wakeup.c rename to arch/x86/kernel/madt_wakeup.c From patchwork Fri Aug 23 23:23:20 2024 Content-Type: text/plain; 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X-CSE-ConnectionGUID: bFZGr8x7QvaHc0Xqb2vnxA== X-CSE-MsgGUID: WPrbokiKRQ6Bg8quLdIiZg== X-IronPort-AV: E=McAfee;i="6700,10204,11173"; a="33619284" X-IronPort-AV: E=Sophos;i="6.10,171,1719903600"; d="scan'208";a="33619284" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Aug 2024 16:23:53 -0700 X-CSE-ConnectionGUID: 8TBNYtSjTwiYw+s5qjF87w== X-CSE-MsgGUID: ZlVimoh6Qd+DrX0EfbVC0w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,171,1719903600"; d="scan'208";a="61641002" Received: from yjiang5-dev1.sc.intel.com ([172.25.103.134]) by fmviesa007.fm.intel.com with ESMTP; 23 Aug 2024 16:23:52 -0700 From: Yunhong Jiang To: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, rafael@kernel.org, lenb@kernel.org, kirill.shutemov@linux.intel.com, yunhong.jiang@linux.intel.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 2/9] dt-bindings: x86: Add a binding for x86 wakeup mailbox Date: Fri, 23 Aug 2024 16:23:20 -0700 Message-Id: <20240823232327.2408869-3-yunhong.jiang@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> References: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the binding to use mailbox wakeup mechanism to bringup APs. Signed-off-by: Yunhong Jiang --- .../devicetree/bindings/x86/wakeup.yaml | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/x86/wakeup.yaml diff --git a/Documentation/devicetree/bindings/x86/wakeup.yaml b/Documentation/devicetree/bindings/x86/wakeup.yaml new file mode 100644 index 000000000000..cb84e2756bca --- /dev/null +++ b/Documentation/devicetree/bindings/x86/wakeup.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2024 Intel Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/x86/wakeup.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: x86 mailbox wakeup +maintainers: + - Yunhong Jiang + +description: | + The x86 mailbox wakeup mechanism defines a mechanism to let the bootstrap + processor (BSP) to wake up application processors (APs) through a wakeup + mailbox. + + The "wakeup-mailbox-addr" property specifies the wakeup mailbox address. The + wakeup mailbox is a 4K-aligned 4K-size memory block allocated in the reserved + memory. + + The wakeup mailbox structure is defined as follows. + + uint16_t command; + uint16_t reserved; + uint32_t apic_id; + uint64_t wakeup_vector; + uint8_t reservedForOs[2032]; + + The memory after reservedForOs field is reserved and OS should not touch it. + + To wakes up a AP, the BSP prepares the wakeup routine, fills the wakeup + routine's address into the wakeup_vector field, fill the apic_id field with + the target AP's APIC_ID, and write 1 to the command field. After receiving the + wakeup command, the target AP will jump to the wakeup routine. + + For each AP, the mailbox can be used only once for the wakeup command. After + the AP jumps to the wakeup routine, the mailbox will no longer be checked by + this AP. + + The wakeup mailbox structure and the wakeup process is the same as + the Multiprocessor Wakeup Mailbox Structure defined in ACPI spec version 6.5, + section 5.2.12.19 [1]. + + References: + + [1] https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html + +select: false + +properties: + wakeup-mailbox-addr: + $ref: /schemas/types.yaml#/definitions/uint64 + description: | + The physical address of the wakeup mailbox data structure. The address + must be 4K bytes aligned 4k-size memory and it should be in the reserved + memory. + + This requires the "enable-method" property in the cpus node is set to + "acpi-wakeup-mailbox". + +required: + - wakeup-mailbox-addr + +additionalProperties: false From patchwork Fri Aug 23 23:23:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunhong Jiang X-Patchwork-Id: 822372 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E11F1C93AB; Fri, 23 Aug 2024 23:23:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724455437; cv=none; b=QpfsvckNS9aD7VqRKTqHr0jmR3PKy+eboPejurj0hYNWxFI0m0fNBn0+AQpKuNXjUjzANyHewIfYpw+IrBKa4wd/FDLf06cKcs/3OBPJ/lvjyx4VXx8rtfiC2/suM4tRj248D2NLTDLaOqgOlDZpX72Bg3EGBwn/kUhjd1xpUCE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724455437; c=relaxed/simple; bh=nZn1ciyBR2B58kThtRvuFisoY3nNii91Qu7mIDzoZRk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=GWaHI+8BRbrshWukUz53/gyLSlx6kD+hZvEQ5S1OQ5YBEyZ8k3l8h8+tKKJMzTlq3SY0AVa+NUA2vouuKk5p1bHzrd3DqNJ1jWdXpnRfQ/GyeotdcTyvdJw/EbemjS3bCBVCGC/yEhnw0teH4odLsdTK27x0IsMf5ailENOv2SU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Svs1PoSF; arc=none smtp.client-ip=192.198.163.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Svs1PoSF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1724455436; x=1755991436; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nZn1ciyBR2B58kThtRvuFisoY3nNii91Qu7mIDzoZRk=; b=Svs1PoSFDpx4lzFEy+jDVsWKyMrS/KynkMX64MZtXTHjju87XLH6ZsYL 4GG+5e6UuzFLUl56pLz0VQNXu8oYYjGJlA/jj0fIbOGL17pETQa4zEC5E o/TVFRIxSMYsfPpCKo0dmNehSk/45jzFA+DV7uFODp+OtZzM6YFdmeWlW 4lxW/TD8A43ydKYUa+2QYGkH8rsCINwsmufr4/zEE+a0UkDYyry3+cDoV oHdyxajC8vGZjoSEvkuG8eX4MrximiY4oMhwdxFQNGDjuXRJx+tciC6so Ylyma9e4eoDlN4g+3KfarE5v6L27NkLZsPmYaUijobXEaGeb/I2bxQxQH w==; X-CSE-ConnectionGUID: XDCrokDETsWVfz7hbBkwJQ== X-CSE-MsgGUID: mpXhe/XpQjmD5iigTi6tpQ== X-IronPort-AV: E=McAfee;i="6700,10204,11173"; a="33619291" X-IronPort-AV: E=Sophos;i="6.10,171,1719903600"; d="scan'208";a="33619291" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Aug 2024 16:23:53 -0700 X-CSE-ConnectionGUID: cXsBjzu7TOK844sOw0PN9g== X-CSE-MsgGUID: XJ/Gd9XORcmLHgqaB4gRyQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,171,1719903600"; d="scan'208";a="61641005" Received: from yjiang5-dev1.sc.intel.com ([172.25.103.134]) by fmviesa007.fm.intel.com with ESMTP; 23 Aug 2024 16:23:52 -0700 From: Yunhong Jiang To: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, rafael@kernel.org, lenb@kernel.org, kirill.shutemov@linux.intel.com, yunhong.jiang@linux.intel.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 3/9] x86/dt: Support the ACPI multiprocessor wakeup for device tree Date: Fri, 23 Aug 2024 16:23:21 -0700 Message-Id: <20240823232327.2408869-4-yunhong.jiang@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> References: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 When a TDX guest boots with the device tree instead of ACPI, it can reuse the ACPI multiprocessor wakeup mechanism to wake up application processors(AP), without introducing a new mechanism from scrach. In the ACPI spec, two structures are defined to wake up the APs: the multiprocessor wakeup structure and the multiprocessor wakeup mailbox structure. The multiprocessor wakeup structure is passed to OS through a Multiple APIC Description Table(MADT), one field specifying the physical address of the multiprocessor wakeup mailbox structure. The OS sends a message to firmware through the multiprocessor wakeup mailbox structure, to bring up the APs. In device tree environment, the multiprocessor wakeup structure is not used, to reduce the dependency on the generic ACPI table. The information defined in this structure is defined in the properties of cpus node in the device tree. The "wakeup-mailbox-addr" property specifies the physical address of the multiprocessor wakeup mailbox structure. The OS will follow the ACPI spec to send the message to the firmware to bring up the APs. Signed-off-by: Yunhong Jiang --- MAINTAINERS | 1 + arch/x86/Kconfig | 2 +- arch/x86/include/asm/acpi.h | 1 - arch/x86/include/asm/madt_wakeup.h | 16 +++++++++++++ arch/x86/kernel/madt_wakeup.c | 38 ++++++++++++++++++++++++++++++ 5 files changed, 56 insertions(+), 2 deletions(-) create mode 100644 arch/x86/include/asm/madt_wakeup.h diff --git a/MAINTAINERS b/MAINTAINERS index 5555a3bbac5f..900de6501eba 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -288,6 +288,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm F: Documentation/ABI/testing/configfs-acpi F: Documentation/ABI/testing/sysfs-bus-acpi F: Documentation/firmware-guide/acpi/ +F: arch/x86/include/asm/madt_wakeup.h F: arch/x86/kernel/acpi/ F: arch/x86/kernel/madt_playdead.S F: arch/x86/kernel/madt_wakeup.c diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index d422247b2882..dba46dd30049 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1123,7 +1123,7 @@ config X86_LOCAL_APIC config ACPI_MADT_WAKEUP def_bool y depends on X86_64 - depends on ACPI + depends on ACPI || OF depends on SMP depends on X86_LOCAL_APIC diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h index 21bc53f5ed0c..0e082303ca26 100644 --- a/arch/x86/include/asm/acpi.h +++ b/arch/x86/include/asm/acpi.h @@ -83,7 +83,6 @@ union acpi_subtable_headers; int __init acpi_parse_mp_wake(union acpi_subtable_headers *header, const unsigned long end); -void asm_acpi_mp_play_dead(u64 reset_vector, u64 pgd_pa); /* * Check if the CPU can handle C2 and deeper diff --git a/arch/x86/include/asm/madt_wakeup.h b/arch/x86/include/asm/madt_wakeup.h new file mode 100644 index 000000000000..a8cd50af581a --- /dev/null +++ b/arch/x86/include/asm/madt_wakeup.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ASM_X86_MADT_WAKEUP_H +#define __ASM_X86_MADT_WAKEUP_H + +void asm_acpi_mp_play_dead(u64 reset_vector, u64 pgd_pa); + +#if defined(CONFIG_OF) && defined(CONFIG_ACPI_MADT_WAKEUP) +u64 dtb_parse_mp_wake(void); +#else +static inline u64 dtb_parse_mp_wake(void) +{ + return 0; +} +#endif + +#endif /* __ASM_X86_MADT_WAKEUP_H */ diff --git a/arch/x86/kernel/madt_wakeup.c b/arch/x86/kernel/madt_wakeup.c index d5ef6215583b..7257e7484569 100644 --- a/arch/x86/kernel/madt_wakeup.c +++ b/arch/x86/kernel/madt_wakeup.c @@ -14,6 +14,8 @@ #include #include #include +#include +#include /* Physical address of the Multiprocessor Wakeup Structure mailbox */ static u64 acpi_mp_wake_mailbox_paddr __ro_after_init; @@ -122,6 +124,7 @@ static int __init init_transition_pgtable(pgd_t *pgd) return 0; } +#ifdef CONFIG_ACPI static int __init acpi_mp_setup_reset(u64 reset_vector) { struct x86_mapping_info info = { @@ -168,6 +171,7 @@ static int __init acpi_mp_setup_reset(u64 reset_vector) return 0; } +#endif static int acpi_wakeup_cpu(u32 apicid, unsigned long start_ip) { @@ -226,6 +230,7 @@ static int acpi_wakeup_cpu(u32 apicid, unsigned long start_ip) return 0; } +#ifdef CONFIG_ACPI static void acpi_mp_disable_offlining(struct acpi_madt_multiproc_wakeup *mp_wake) { cpu_hotplug_disable_offlining(); @@ -290,3 +295,36 @@ int __init acpi_parse_mp_wake(union acpi_subtable_headers *header, return 0; } +#endif /* CONFIG_ACPI */ + +#ifdef CONFIG_OF +u64 __init dtb_parse_mp_wake(void) +{ + struct device_node *node; + u64 mailaddr = 0; + + node = of_find_node_by_path("/cpus"); + if (!node) + return 0; + + if (of_property_match_string(node, "enable-method", "acpi-wakeup-mailbox") < 0) { + pr_err("No acpi wakeup mailbox enable-method\n"); + goto done; + } + + if (of_property_read_u64(node, "wakeup-mailbox-addr", &mailaddr)) { + pr_err("Invalid wakeup mailbox addr\n"); + goto done; + } + acpi_mp_wake_mailbox_paddr = mailaddr; + pr_info("dt wakeup-mailbox: addr 0x%llx\n", mailaddr); + + /* No support for the MADT reset vector yet */ + cpu_hotplug_disable_offlining(); + apic_update_callback(wakeup_secondary_cpu_64, acpi_wakeup_cpu); + +done: + of_node_put(node); + return mailaddr; +} +#endif /* CONFIG_OF */ From patchwork Fri Aug 23 23:23:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunhong Jiang X-Patchwork-Id: 821785 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55A111C9DC2; Fri, 23 Aug 2024 23:23:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.9 ARC-Seal: i=1; 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d="scan'208";a="33619298" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Aug 2024 16:23:54 -0700 X-CSE-ConnectionGUID: q1uY/s0DTO6DNvor61UFTQ== X-CSE-MsgGUID: ZIkIOQXvT4GM4A6a1pcBmA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,171,1719903600"; d="scan'208";a="61641007" Received: from yjiang5-dev1.sc.intel.com ([172.25.103.134]) by fmviesa007.fm.intel.com with ESMTP; 23 Aug 2024 16:23:53 -0700 From: Yunhong Jiang To: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, rafael@kernel.org, lenb@kernel.org, kirill.shutemov@linux.intel.com, yunhong.jiang@linux.intel.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 4/9] x86/hyperv: Parse the ACPI wakeup mailbox Date: Fri, 23 Aug 2024 16:23:22 -0700 Message-Id: <20240823232327.2408869-5-yunhong.jiang@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> References: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Parse the wakeup mailbox VTL2 TDX guest. Put it to the guest_late_init, so that it will be invoked before hyperv_init() where the mailbox address is checked. Signed-off-by: Yunhong Jiang --- arch/x86/include/asm/mshyperv.h | 3 +++ arch/x86/kernel/cpu/mshyperv.c | 2 ++ drivers/hv/hv_common.c | 8 ++++++++ 3 files changed, 13 insertions(+) diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h index 390c4d13956d..5178b96c7fc9 100644 --- a/arch/x86/include/asm/mshyperv.h +++ b/arch/x86/include/asm/mshyperv.h @@ -10,6 +10,7 @@ #include #include #include +#include /* * Hyper-V always provides a single IO-APIC at this MMIO address. @@ -49,6 +50,8 @@ extern u64 hv_current_partition_id; extern union hv_ghcb * __percpu *hv_ghcb_pg; +extern u64 wakeup_mailbox_addr; + bool hv_isolation_type_snp(void); bool hv_isolation_type_tdx(void); u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2); diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index 3d4237f27569..f6b727b4bd0b 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -43,6 +43,8 @@ struct ms_hyperv_info ms_hyperv; bool hyperv_paravisor_present __ro_after_init; EXPORT_SYMBOL_GPL(hyperv_paravisor_present); +u64 wakeup_mailbox_addr; + #if IS_ENABLED(CONFIG_HYPERV) static inline unsigned int hv_get_nested_msr(unsigned int reg) { diff --git a/drivers/hv/hv_common.c b/drivers/hv/hv_common.c index 9c452bfbd571..14b005b6270f 100644 --- a/drivers/hv/hv_common.c +++ b/drivers/hv/hv_common.c @@ -365,6 +365,14 @@ void __init ms_hyperv_late_init(void) u8 *randomdata; u32 length, i; + /* + * Parse the ACPI wakeup structure information from device tree. + * Currently VTL2 TDX guest only. + */ +#ifdef CONFIG_X86_64 + wakeup_mailbox_addr = dtb_parse_mp_wake(); +#endif + /* * Seed the Linux random number generator with entropy provided by * the Hyper-V host in ACPI table OEM0. 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However, the wakeup mailbox must be accessed as private (encrypted) because it's accessed by the OS and the firmware, both are in the guest's context and encrypted. Set the wakeup mailbox range as private explicitly. Signed-off-by: Yunhong Jiang --- arch/x86/hyperv/hv_vtl.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/x86/hyperv/hv_vtl.c b/arch/x86/hyperv/hv_vtl.c index 04775346369c..987a6a1200b0 100644 --- a/arch/x86/hyperv/hv_vtl.c +++ b/arch/x86/hyperv/hv_vtl.c @@ -22,10 +22,26 @@ static bool __init hv_vtl_msi_ext_dest_id(void) return true; } +static inline bool within_page(u64 addr, u64 start) +{ + return addr >= start && addr < (start + PAGE_SIZE); +} + +/* + * The ACPI wakeup mailbox are accessed by the OS and the BIOS, both are in the + * guest's context, instead of the hypervisor/VMM context. + */ +static bool hv_is_private_mmio_tdx(u64 addr) +{ + return wakeup_mailbox_addr && within_page(addr, wakeup_mailbox_addr); +} + void __init hv_vtl_init_platform(void) { pr_info("Linux runs in Hyper-V Virtual Trust Level\n"); + if (hv_isolation_type_tdx()) + x86_platform.hyper.is_private_mmio = hv_is_private_mmio_tdx; x86_platform.realmode_reserve = x86_init_noop; x86_platform.realmode_init = x86_init_noop; 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23 Aug 2024 16:23:54 -0700 From: Yunhong Jiang To: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, rafael@kernel.org, lenb@kernel.org, kirill.shutemov@linux.intel.com, yunhong.jiang@linux.intel.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 6/9] x86/realmode: Add memory range support to reserve_real_mode Date: Fri, 23 Aug 2024 16:23:24 -0700 Message-Id: <20240823232327.2408869-7-yunhong.jiang@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> References: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Currently the reserve_real_mode() always allocates memory from below 1M range, although some real mode blob code can execute above 1M. The VTL2 TDX hyperv guest may have no memory available below 1M, but it needs to invoke some real mode blob code that can execute above 1M memory. Instead of providing a platform specific realmode_reserve callback, the reserve_real_mode() is updated to support flexible memory range to meet this requirement. Originally-by: Thomas Gleixner Link: https://lore.kernel.org/lkml/87a5ho2q6x.ffs@tglx/ Signed-off-by: Yunhong Jiang --- arch/x86/include/asm/x86_init.h | 6 ++++++ arch/x86/kernel/x86_init.c | 3 +++ arch/x86/realmode/init.c | 14 ++++++-------- 3 files changed, 15 insertions(+), 8 deletions(-) diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h index 213cf5379a5a..9e3198bfe56e 100644 --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -31,12 +31,18 @@ struct x86_init_mpparse { * platform * @memory_setup: platform specific memory setup * @dmi_setup: platform specific DMI setup + * @realmode_limit: platform specific address limit for the realmode trampoline + * (default 1M) + * @reserve_bios: platform specific address limit for reserving the BIOS area + * (default 1M) */ struct x86_init_resources { void (*probe_roms)(void); void (*reserve_resources)(void); char *(*memory_setup)(void); void (*dmi_setup)(void); + unsigned long realmode_limit; + unsigned long reserve_bios; }; /** diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c index 82b128d3f309..f3226aa77bfb 100644 --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include @@ -68,6 +69,8 @@ struct x86_init_ops x86_init __initdata = { .reserve_resources = reserve_standard_io_resources, .memory_setup = e820__memory_setup_default, .dmi_setup = dmi_setup, + .realmode_limit = SZ_1M, + .reserve_bios = SZ_1M, }, .mpparse = { diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c index f9bc444a3064..6d658ad8c0f4 100644 --- a/arch/x86/realmode/init.c +++ b/arch/x86/realmode/init.c @@ -45,7 +45,7 @@ void load_trampoline_pgtable(void) void __init reserve_real_mode(void) { - phys_addr_t mem; + phys_addr_t mem, limit = x86_init.resources.realmode_limit; size_t size = real_mode_size_needed(); if (!size) @@ -54,17 +54,15 @@ void __init reserve_real_mode(void) WARN_ON(slab_is_available()); /* Has to be under 1M so we can execute real-mode AP code. */ - mem = memblock_phys_alloc_range(size, PAGE_SIZE, 0, 1<<20); + mem = memblock_phys_alloc_range(size, PAGE_SIZE, 0, limit); if (!mem) - pr_info("No sub-1M memory is available for the trampoline\n"); + pr_info("No memory below %lluM for the real-mode trampoline\n", limit >> 20); else set_real_mode_mem(mem); - /* - * Unconditionally reserve the entire first 1M, see comment in - * setup_arch(). - */ - memblock_reserve(0, SZ_1M); + /* Reserve the entire first 1M, if enabled. See comment in setup_arch(). */ + if (x86_init.resources.reserve_bios) + memblock_reserve(0, x86_init.resources.reserve_bios); } static void __init sme_sev_setup_real_mode(struct trampoline_header *th) From patchwork Fri Aug 23 23:23:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunhong Jiang X-Patchwork-Id: 822370 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 199881CDA3C; Fri, 23 Aug 2024 23:23:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724455439; cv=none; b=TyWNeswZ/q7GkhBLzCuePQDlrXfTRtQveYylgEyI/jwv1PVSwruJ3dJncC2aKM3zfMDxbXqydCKHiF0s2nvuw3Zy3r+6VctZbZpcJWGearvkMPgZjSdKS1ETFy7hP71D+K2qE8+ogcnY0EpMa7GMXacvOUouCs4t2KQXKPPyO68= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724455439; c=relaxed/simple; bh=2e7sGZyRynvsWmKdrDBVMnvtPnbG9Uh/7HTPebS7aKI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=YB0dn2asxWXZ/zYPlR+NeUOcdw6joN1OiUCZJEaH1MpSV2rE3JpsITFvm4d/rI6hlcAC5mbp0xZpDIoYB62oJv//fUOtSDpOBpC1ILpCNXdA+8sE4BZgWfw/jF+PiHy4J80x0lb9SeCFF+r8ptOdXbkMQUmebIzeB0qY3bEOens= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=kbJkAc59; arc=none smtp.client-ip=192.198.163.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="kbJkAc59" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1724455438; x=1755991438; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2e7sGZyRynvsWmKdrDBVMnvtPnbG9Uh/7HTPebS7aKI=; b=kbJkAc59wGFXPBe3P43RjI0X6wYH2kT5NzfsypBNJDsM3TT7+mr4zqWt jRMSJTyDq0RRNZ+gmkZ4sFFq/Z7X8ao0O6p8aomCqvx2bQvl65cMz6TGz W9s2by3+yUbtT8d93nNArKgsIEDm4AHpLQKvvUZnq+hPet8Z/id9siqV6 PPBGekoZzpGfMiRIqlG1xpNrDt1hPwxl3AVkJtTZn2EJ3Mei5mjhEPFHc OGfqW99+jUcvkolxPcdp8N0Nd6ZLe6ggWlBOkZeQvuVh9889xfiROMLCY 8gu/F5wzcab7N8PVMvi6tuNg2WHur84vRPYZ2FuuTEN1StlxA7mLmG0MI g==; X-CSE-ConnectionGUID: cKKh1XcNSSqKzy546fWJ7A== X-CSE-MsgGUID: yEa+ElfTTUObhm3TdMnJnQ== X-IronPort-AV: E=McAfee;i="6700,10204,11173"; a="33619319" X-IronPort-AV: E=Sophos;i="6.10,171,1719903600"; d="scan'208";a="33619319" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Aug 2024 16:23:54 -0700 X-CSE-ConnectionGUID: bxBRT0axQ/i/+COSXSIVgg== X-CSE-MsgGUID: VUbrnRePTcmM6DK6x9C5fw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,171,1719903600"; d="scan'208";a="61641017" Received: from yjiang5-dev1.sc.intel.com ([172.25.103.134]) by fmviesa007.fm.intel.com with ESMTP; 23 Aug 2024 16:23:54 -0700 From: Yunhong Jiang To: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, rafael@kernel.org, lenb@kernel.org, kirill.shutemov@linux.intel.com, yunhong.jiang@linux.intel.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 7/9] x86/hyperv: Move setting the real_mode_header to hv_vtl_init_platform Date: Fri, 23 Aug 2024 16:23:25 -0700 Message-Id: <20240823232327.2408869-8-yunhong.jiang@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> References: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 For the VTL2 hyperv guest, currently the hv_vtl_init_platform() clears x86_platform.realmode_reserve/init while the hv_vtl_early_init() sets the real_mode_header. Set the real_mode_header together with x86_platform.realmode_reserve/init in hv_vtl_init_platform(). This is ok because x86_platform.realmode_init() is invoked from an early initcall while hv_vtl_init_platform() is called during early boot. Suggested-by: Thomas Gleixner Link: https://lore.kernel.org/lkml/87a5ho2q6x.ffs@tglx/ Signed-off-by: Yunhong Jiang --- arch/x86/hyperv/hv_vtl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/hyperv/hv_vtl.c b/arch/x86/hyperv/hv_vtl.c index 987a6a1200b0..e5aa2688cdd0 100644 --- a/arch/x86/hyperv/hv_vtl.c +++ b/arch/x86/hyperv/hv_vtl.c @@ -44,6 +44,7 @@ void __init hv_vtl_init_platform(void) x86_platform.hyper.is_private_mmio = hv_is_private_mmio_tdx; x86_platform.realmode_reserve = x86_init_noop; x86_platform.realmode_init = x86_init_noop; + real_mode_header = &hv_vtl_real_mode_header; x86_init.irqs.pre_vector_init = x86_init_noop; x86_init.timers.timer_init = x86_init_noop; @@ -259,7 +260,6 @@ int __init hv_vtl_early_init(void) panic("XSAVE has to be disabled as it is not supported by this module.\n" "Please add 'noxsave' to the kernel command line.\n"); - real_mode_header = &hv_vtl_real_mode_header; apic_update_callback(wakeup_secondary_cpu_64, hv_vtl_wakeup_secondary_cpu); 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23 Aug 2024 16:23:54 -0700 From: Yunhong Jiang To: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, rafael@kernel.org, lenb@kernel.org, kirill.shutemov@linux.intel.com, yunhong.jiang@linux.intel.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 8/9] x86/hyperv: Set realmode_limit to 4G for VTL2 TDX guest Date: Fri, 23 Aug 2024 16:23:26 -0700 Message-Id: <20240823232327.2408869-9-yunhong.jiang@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> References: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The VTL2 TDX guest may have no sub-1M memory available, but it needs to invoke trampoline_start64 to wake up the APs through the wakeup mailbox mechanism. Set realmode_limit to 4G for the VTL2 TDX guest, so that reserve_real_mode allocae memory under 4G. Signed-off-by: Yunhong Jiang --- arch/x86/hyperv/hv_vtl.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/x86/hyperv/hv_vtl.c b/arch/x86/hyperv/hv_vtl.c index e5aa2688cdd0..5829aac74f80 100644 --- a/arch/x86/hyperv/hv_vtl.c +++ b/arch/x86/hyperv/hv_vtl.c @@ -40,11 +40,15 @@ void __init hv_vtl_init_platform(void) { pr_info("Linux runs in Hyper-V Virtual Trust Level\n"); - if (hv_isolation_type_tdx()) + if (hv_isolation_type_tdx()) { x86_platform.hyper.is_private_mmio = hv_is_private_mmio_tdx; - x86_platform.realmode_reserve = x86_init_noop; - x86_platform.realmode_init = x86_init_noop; - real_mode_header = &hv_vtl_real_mode_header; + x86_init.resources.realmode_limit = SZ_4G; + x86_init.resources.reserve_bios = 0; + } else { + x86_platform.realmode_reserve = x86_init_noop; + x86_platform.realmode_init = x86_init_noop; + real_mode_header = &hv_vtl_real_mode_header; + } x86_init.irqs.pre_vector_init = x86_init_noop; x86_init.timers.timer_init = x86_init_noop; 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23 Aug 2024 16:23:55 -0700 From: Yunhong Jiang To: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, rafael@kernel.org, lenb@kernel.org, kirill.shutemov@linux.intel.com, yunhong.jiang@linux.intel.com Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 9/9] x86/hyperv: Use wakeup mailbox for VTL2 guests if available Date: Fri, 23 Aug 2024 16:23:27 -0700 Message-Id: <20240823232327.2408869-10-yunhong.jiang@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> References: <20240823232327.2408869-1-yunhong.jiang@linux.intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 For VTL2 hyperv guest with wakeup mailbox in device tree, don't overwrite wakeup_secondary_cpu_64 so that the acpi_wakeup_cpu will be used to bring up the APs. Signed-off-by: Yunhong Jiang --- arch/x86/hyperv/hv_vtl.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/hyperv/hv_vtl.c b/arch/x86/hyperv/hv_vtl.c index 5829aac74f80..09a7410200ba 100644 --- a/arch/x86/hyperv/hv_vtl.c +++ b/arch/x86/hyperv/hv_vtl.c @@ -264,7 +264,8 @@ int __init hv_vtl_early_init(void) panic("XSAVE has to be disabled as it is not supported by this module.\n" "Please add 'noxsave' to the kernel command line.\n"); - apic_update_callback(wakeup_secondary_cpu_64, hv_vtl_wakeup_secondary_cpu); + if (!wakeup_mailbox_addr) + apic_update_callback(wakeup_secondary_cpu_64, hv_vtl_wakeup_secondary_cpu); return 0; }