From patchwork Tue Aug 27 12:23:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 823374 Received: from esa2.hgst.iphmx.com (esa2.hgst.iphmx.com [68.232.143.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC0811B4C54 for ; Tue, 27 Aug 2024 12:25:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.143.124 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724761534; cv=none; b=ZZ15kfNhIc0lJ/L9LIpmxn3TnCJmSz5CJvu0c/JYCuLaqXj/HtZ9EkTN62J6Y5bl1kGtrmu4pEU9FUcDpsO2+EBO3xeqQPAcaWZss4BCnXTqoZOWYQzgeMjX6AI7PWmVeRAMTcdON4IAfhr5oOdh2zIUrLoIPyMc0hqgYpwa2Lw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724761534; c=relaxed/simple; bh=2O1HuIjzD4M2LMH19utpNLMLZL7JQN86MycGhbcGxC0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WPApQcuYY2C6UaRutC9o7HLdivC1ULDzXOfGT8bh3Fn97KwPHtEE3sSuYNrHaa2Oih0iLlSXTDE5O0AJvLZJl3pqFbutgeNeNn22h83qoqvwEayl5H77UJN6FxE0fGx2NvLKxso7Zd9Ryvr8RMJXomRVhS5VfuZsiVEvPhnsmAo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=lKrWWooN; arc=none smtp.client-ip=68.232.143.124 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="lKrWWooN" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1724761531; x=1756297531; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2O1HuIjzD4M2LMH19utpNLMLZL7JQN86MycGhbcGxC0=; b=lKrWWooNq38L0JffgNXGDz0LjxxCANomPPkai7jyx10UkKM1StlxDsrr fNbqzM3cdQjKMhtmvo0X/qhyahhgg6/M9OB61tv0b5Q+VTO28bq3UXFpm aaIm9ZCQgxL0ta4zbTFroXUzwjG0dfmx4hUSGSKI7FiNdL6FbujQwkFzo od7bu56DEUtVjPU77gxmNsPAaZnO5yAmBCCtOzb68ZLk/XB5ksRvDoFe9 ZLXmCzHPzHac+uk6xOJgiifhkrlrkHvvRPS7/GAErGdbTmrjKBzBGYxj8 b1RfHz84ePL9dOcYmNIpm26emD2241dv+hWRpR7vRwPCmaS0cd0lcgdGH g==; X-CSE-ConnectionGUID: FMecOvolTY+SIJv1VLLoNQ== X-CSE-MsgGUID: hUUZVpEwTA29LSh/Szfi5g== X-IronPort-AV: E=Sophos;i="6.10,180,1719849600"; d="scan'208";a="25625962" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 27 Aug 2024 20:25:29 +0800 IronPort-SDR: 66cdb7a6_GLoPIhTdY6LX/6Dsh4p+vmbqhQYoKXA1bew5PAUwMg9Gajn 6kYZN1AGa2Bbayy6sfosOxVZ6icJCcokhar/Kkg== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 04:25:27 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 05:25:28 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v5 1/9] mmc: sd: SDUC Support Recognition Date: Tue, 27 Aug 2024 15:23:34 +0300 Message-Id: <20240827122342.3314173-2-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240827122342.3314173-1-avri.altman@wdc.com> References: <20240827122342.3314173-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Ultra Capacity SD cards (SDUC) was already introduced in SD7.0. Those cards support capacity larger than 2TB and up to including 128TB. ACMD41 was extended to support the host-card handshake during initialization. The card expects that the HCS & HO2T bits to be set in the command argument, and sets the applicable bits in the R3 returned response. On the contrary, if a SDUC card is inserted to a non-supporting host, it will never respond to this ACMD41 until eventually, the host will timed out and give up. Also, add SD CSD version 3.0 - designated for SDUC, and properly parse the csd register as the c_size field got expanded to 28 bits. Do not enable SDUC for now - leave it to the last patch in the series. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/bus.c | 4 +++- drivers/mmc/core/card.h | 3 +++ drivers/mmc/core/sd.c | 33 +++++++++++++++++++++------------ drivers/mmc/core/sd.h | 2 +- drivers/mmc/core/sdio.c | 2 +- include/linux/mmc/card.h | 2 +- include/linux/mmc/sd.h | 1 + 7 files changed, 31 insertions(+), 16 deletions(-) diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c index 0ddaee0eae54..30763b342bd3 100644 --- a/drivers/mmc/core/bus.c +++ b/drivers/mmc/core/bus.c @@ -321,7 +321,9 @@ int mmc_add_card(struct mmc_card *card) case MMC_TYPE_SD: type = "SD"; if (mmc_card_blockaddr(card)) { - if (mmc_card_ext_capacity(card)) + if (mmc_card_ult_capacity(card)) + type = "SDUC"; + else if (mmc_card_ext_capacity(card)) type = "SDXC"; else type = "SDHC"; diff --git a/drivers/mmc/core/card.h b/drivers/mmc/core/card.h index b7754a1b8d97..64dcb463a4f4 100644 --- a/drivers/mmc/core/card.h +++ b/drivers/mmc/core/card.h @@ -23,6 +23,7 @@ #define MMC_CARD_SDXC (1<<3) /* card is SDXC */ #define MMC_CARD_REMOVED (1<<4) /* card has been removed */ #define MMC_STATE_SUSPENDED (1<<5) /* card is suspended */ +#define MMC_CARD_SDUC (1<<6) /* card is SDUC */ #define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) #define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) @@ -30,11 +31,13 @@ #define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC) #define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED)) #define mmc_card_suspended(c) ((c)->state & MMC_STATE_SUSPENDED) +#define mmc_card_ult_capacity(c) ((c)->state & MMC_CARD_SDUC) #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR) #define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC) +#define mmc_card_set_ult_capacity(c) ((c)->state |= MMC_CARD_SDUC) #define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED) #define mmc_card_set_suspended(c) ((c)->state |= MMC_STATE_SUSPENDED) #define mmc_card_clr_suspended(c) ((c)->state &= ~MMC_STATE_SUSPENDED) diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 1c8148cdda50..3df084541e94 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -113,7 +113,7 @@ void mmc_decode_cid(struct mmc_card *card) /* * Given a 128-bit response, decode to our card CSD structure. */ -static int mmc_decode_csd(struct mmc_card *card) +static int mmc_decode_csd(struct mmc_card *card, bool is_sduc) { struct mmc_csd *csd = &card->csd; unsigned int e, m, csd_struct; @@ -157,9 +157,10 @@ static int mmc_decode_csd(struct mmc_card *card) mmc_card_set_readonly(card); break; case 1: + case 2: /* - * This is a block-addressed SDHC or SDXC card. Most - * interesting fields are unused and have fixed + * This is a block-addressed SDHC, SDXC or SDUC card. + * Most interesting fields are unused and have fixed * values. To avoid getting tripped by buggy cards, * we assume those fixed values ourselves. */ @@ -172,14 +173,19 @@ static int mmc_decode_csd(struct mmc_card *card) e = UNSTUFF_BITS(resp, 96, 3); csd->max_dtr = tran_exp[e] * tran_mant[m]; csd->cmdclass = UNSTUFF_BITS(resp, 84, 12); - csd->c_size = UNSTUFF_BITS(resp, 48, 22); - /* SDXC cards have a minimum C_SIZE of 0x00FFFF */ - if (csd->c_size >= 0xFFFF) + if (csd_struct == 1) + m = UNSTUFF_BITS(resp, 48, 22); + else + m = UNSTUFF_BITS(resp, 48, 28); + csd->c_size = m; + + if (csd->c_size >= 0x400000 && is_sduc) + mmc_card_set_ult_capacity(card); + else if (csd->c_size >= 0xFFFF) mmc_card_set_ext_capacity(card); - m = UNSTUFF_BITS(resp, 48, 22); - csd->capacity = (1 + m) << 10; + csd->capacity = (1 + (typeof(sector_t))m) << 10; csd->read_blkbits = 9; csd->read_partial = 0; @@ -840,8 +846,11 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr) * block-addressed SDHC cards. */ err = mmc_send_if_cond(host, ocr); - if (!err) + if (!err) { ocr |= SD_OCR_CCS; + /* Set HO2T as well - SDUC card won't respond otherwise */ + ocr |= SD_OCR_2T; + } /* * If the host supports one of UHS-I modes, request the card @@ -886,7 +895,7 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr) return err; } -int mmc_sd_get_csd(struct mmc_card *card) +int mmc_sd_get_csd(struct mmc_card *card, bool is_sduc) { int err; @@ -897,7 +906,7 @@ int mmc_sd_get_csd(struct mmc_card *card) if (err) return err; - err = mmc_decode_csd(card); + err = mmc_decode_csd(card, is_sduc); if (err) return err; @@ -1452,7 +1461,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, } if (!oldcard) { - err = mmc_sd_get_csd(card); + err = mmc_sd_get_csd(card, false); if (err) goto free_card; diff --git a/drivers/mmc/core/sd.h b/drivers/mmc/core/sd.h index fe6dd46927a4..7e8beface2ca 100644 --- a/drivers/mmc/core/sd.h +++ b/drivers/mmc/core/sd.h @@ -10,7 +10,7 @@ struct mmc_host; struct mmc_card; int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr); -int mmc_sd_get_csd(struct mmc_card *card); +int mmc_sd_get_csd(struct mmc_card *card, bool is_sduc); void mmc_decode_cid(struct mmc_card *card); int mmc_sd_setup_card(struct mmc_host *host, struct mmc_card *card, bool reinit); diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c index 4fb247fde5c0..9566837c9848 100644 --- a/drivers/mmc/core/sdio.c +++ b/drivers/mmc/core/sdio.c @@ -769,7 +769,7 @@ static int mmc_sdio_init_card(struct mmc_host *host, u32 ocr, * Read CSD, before selecting the card */ if (!oldcard && mmc_card_sd_combo(card)) { - err = mmc_sd_get_csd(card); + err = mmc_sd_get_csd(card, false); if (err) goto remove; diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index f34407cc2788..f39bce322365 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -35,7 +35,7 @@ struct mmc_csd { unsigned int wp_grp_size; unsigned int read_blkbits; unsigned int write_blkbits; - unsigned int capacity; + sector_t capacity; unsigned int read_partial:1, read_misalign:1, write_partial:1, diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h index 6727576a8755..865cc0ca8543 100644 --- a/include/linux/mmc/sd.h +++ b/include/linux/mmc/sd.h @@ -36,6 +36,7 @@ /* OCR bit definitions */ #define SD_OCR_S18R (1 << 24) /* 1.8V switching request */ #define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */ +#define SD_OCR_2T (1 << 27) /* HO2T/CO2T - SDUC support */ #define SD_OCR_XPC (1 << 28) /* SDXC power control */ #define SD_OCR_CCS (1 << 30) /* Card Capacity Status */ From patchwork Tue Aug 27 12:23:35 2024 Content-Type: text/plain; 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27 Aug 2024 05:25:41 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v5 2/9] mmc: sd: Add Extension memory addressing Date: Tue, 27 Aug 2024 15:23:35 +0300 Message-Id: <20240827122342.3314173-3-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240827122342.3314173-1-avri.altman@wdc.com> References: <20240827122342.3314173-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SDUC memory addressing spans beyond 2TB and up to 128TB. Therefore, 38 bits are required to access the entire memory space of all sectors. Those extra 6 bits are to be carried by CMD22 prior of sending read/write/erase commands: CMD17, CMD18, CMD24, CMD25, CMD32, and CMD33. CMD22 will carry the higher order 6 bits, and must precedes any of the above commands even if it targets sector < 2TB. No error related to address or length is indicated in CMD22 but rather in the read/write command itself. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/sd_ops.c | 16 ++++++++++++++++ drivers/mmc/core/sd_ops.h | 1 + include/linux/mmc/sd.h | 3 +++ 3 files changed, 20 insertions(+) diff --git a/drivers/mmc/core/sd_ops.c b/drivers/mmc/core/sd_ops.c index 8b9b34286ef3..33f6f33bc109 100644 --- a/drivers/mmc/core/sd_ops.c +++ b/drivers/mmc/core/sd_ops.c @@ -16,6 +16,7 @@ #include #include "core.h" +#include "card.h" #include "sd_ops.h" #include "mmc_ops.h" @@ -188,6 +189,21 @@ int mmc_send_app_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr) return 0; } +int mmc_send_ext_addr(struct mmc_host *host, sector_t addr) +{ + struct mmc_command cmd = { + .opcode = SD_ADDR_EXT, + .arg = (u32)(addr >> 32), + .flags = MMC_RSP_R1 | MMC_CMD_AC, + }; + + if (!mmc_card_ult_capacity(host->card)) + return 0; + + return mmc_wait_for_cmd(host, &cmd, 0); +} +EXPORT_SYMBOL_GPL(mmc_send_ext_addr); + static int __mmc_send_if_cond(struct mmc_host *host, u32 ocr, u8 pcie_bits, u32 *resp) { diff --git a/drivers/mmc/core/sd_ops.h b/drivers/mmc/core/sd_ops.h index 7667fc223b74..462efd43acfa 100644 --- a/drivers/mmc/core/sd_ops.h +++ b/drivers/mmc/core/sd_ops.h @@ -21,6 +21,7 @@ int mmc_send_relative_addr(struct mmc_host *host, unsigned int *rca); int mmc_app_send_scr(struct mmc_card *card); int mmc_app_sd_status(struct mmc_card *card, void *ssr); int mmc_app_cmd(struct mmc_host *host, struct mmc_card *card); +int mmc_send_ext_addr(struct mmc_host *host, sector_t addr); #endif diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h index 865cc0ca8543..af5fc70e09a2 100644 --- a/include/linux/mmc/sd.h +++ b/include/linux/mmc/sd.h @@ -15,6 +15,9 @@ #define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */ #define SD_SWITCH_VOLTAGE 11 /* ac R1 */ +/* Class 2 */ +#define SD_ADDR_EXT 22 /* ac [5:0] R1 */ + /* class 10 */ #define SD_SWITCH 6 /* adtc [31:0] See below R1 */ From patchwork Tue Aug 27 12:23:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 823373 Received: from esa6.hgst.iphmx.com (esa6.hgst.iphmx.com [216.71.154.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BAD981B3F15 for ; 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d="scan'208";a="25318694" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 27 Aug 2024 20:25:46 +0800 IronPort-SDR: 66cdb7b7_1PqbajG1LKyZidell0y/xSctJ0HaG2Q9fUMqdfLr0tOOjSL OwQ9v/zDSQHR/nPZw1uEaXG3RaVjfY1f/AGC/6Q== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 04:25:44 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 05:25:45 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v5 3/9] mmc: core: Add open-ended Ext memory addressing Date: Tue, 27 Aug 2024 15:23:36 +0300 Message-Id: <20240827122342.3314173-4-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240827122342.3314173-1-avri.altman@wdc.com> References: <20240827122342.3314173-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 For open-ended read/write - just send CMD22 before issuing the command. While at it, make sure that the rw command arg is properly casting the lower 32 bits, as it can be larger now. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 2c9963248fcb..8816b3f0a312 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -180,6 +180,7 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, static void mmc_blk_hsq_req_done(struct mmc_request *mrq); static int mmc_spi_err_check(struct mmc_card *card); static int mmc_blk_busy_cb(void *cb_data, bool *busy); +static int mmc_blk_wait_for_idle(struct mmc_queue *mq, struct mmc_host *host); static struct mmc_blk_data *mmc_blk_get(struct gendisk *disk) { @@ -1664,7 +1665,7 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, brq->mrq.cmd = &brq->cmd; - brq->cmd.arg = blk_rq_pos(req); + brq->cmd.arg = blk_rq_pos(req) & 0xFFFFFFFF; if (!mmc_card_blockaddr(card)) brq->cmd.arg <<= 9; brq->cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC; @@ -1712,6 +1713,9 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, (do_data_tag ? (1 << 29) : 0); brq->sbc.flags = MMC_RSP_R1 | MMC_CMD_AC; brq->mrq.sbc = &brq->sbc; + } else if (mmc_card_ult_capacity(card)) { + mmc_blk_wait_for_idle(mq, card->host); + mmc_send_ext_addr(card->host, blk_rq_pos(req)); } } From patchwork Tue Aug 27 12:23:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 822972 Received: from esa6.hgst.iphmx.com (esa6.hgst.iphmx.com [216.71.154.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D1831B3F15 for ; Tue, 27 Aug 2024 12:25:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724761555; cv=none; b=rbxwY7WJauR1tna7QitEO5US2pKLe/abzSZSMDCKz66kiHGtRwYZ/JWsg/W2judKqiryP1NoqF48/+q84TgG1bAP+2s+JiMsP5Ee8iH5+ZbjTGW8uVKuNEtBOjlPMoqvYmW+yfW+FkfCxpx2Jg7qUKct/McQRtU4ZFnB8NYw1MM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724761555; c=relaxed/simple; bh=2w3lXFsm8iyuCgRvGOVoP2GOXWlNzN5mGRAn5vXNM0M=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=oDqWUfPaZILPTycl+n5P3HavO2S8Sl2Peu8OicwQ5B3T9w8kiohLB0OIjbazvgWghp0gC9PagjTzK8xeU15ckGREKLDS4B/1YHlV4XJEuPTylmBNoeXvubHHH8iAQHnOLS8R1wfpW9X77MO9hWtPdYml6d4Rx+OqZas0mjlk0Zc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=Eutn0rNd; arc=none smtp.client-ip=216.71.154.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="Eutn0rNd" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1724761553; x=1756297553; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2w3lXFsm8iyuCgRvGOVoP2GOXWlNzN5mGRAn5vXNM0M=; b=Eutn0rNdb24BpUIeC0+k8SvX2rZip28NrB0pecCk9iJ3RFbsAk0m616B k+fIJKAA7TRYWz3Y6wbj9iYt4t250TlAUNRI8AO+OYn4HiLa+NHylSsdj GCPGs+XKnqSvGMfxV17X4Z+OiSj+CoZ/EgmnUTwvRwJzHcGFoYu16uwIj eHrg/lEiEAEf/VzXdGS/tlmCJiId+XdQp4BTL78hUAb8zD2joSkgS6MTI H7nMUxxp6Qv4Gz/AsfOJrfSQ8oTSlT/7zTe3ZhbTPxUzzIIkHPAaf5RK/ 4lHLZQG7JmVb6FaEhQ8QoQAT88RgHKcNZfk7+hM8EJhpETyUZuU008Hwt Q==; X-CSE-ConnectionGUID: 5RwoswySR+OoPbZ2hPX5Fw== X-CSE-MsgGUID: qqpO/mhBQsueJe1XED9y6Q== X-IronPort-AV: E=Sophos;i="6.10,180,1719849600"; d="scan'208";a="25318704" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 27 Aug 2024 20:25:53 +0800 IronPort-SDR: 66cdb912_xYUxuqihdigG5BIBR9wqHaS7meopef/MQ0mT1LYpcfv+bx/ 3U0lrgf8S9DK57/hHeG2VK41tGrloIQpKVo6rWw== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 04:31:31 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 05:25:51 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v5 4/9] mmc: core: Don't use close-ended rw for SDUC Date: Tue, 27 Aug 2024 15:23:37 +0300 Message-Id: <20240827122342.3314173-5-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240827122342.3314173-1-avri.altman@wdc.com> References: <20240827122342.3314173-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The SDUC spec expects CMD22 to get squeezed between CMD23 and the read/write command, e.g. CMD23->CMD22->CMD18 and CMD23->CMD22->CMD25. At this early stage of adoption, we want to avoid an amid stream of fixes & quirks of bogus hw, that tends to apply extra logic specifically around auto-cmd12 & auto-cmd23. Let's leave close-ended out for now, and re-consider this should those cards become ubiquitous, if any. Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 8816b3f0a312..713b22eced72 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -2505,7 +2505,7 @@ static struct mmc_blk_data *mmc_blk_alloc_req(struct mmc_card *card, if (mmc_host_cmd23(card->host)) { if ((mmc_card_mmc(card) && card->csd.mmca_vsn >= CSD_SPEC_VER_3) || - (mmc_card_sd(card) && + (mmc_card_sd(card) && !mmc_card_ult_capacity(card) && card->scr.cmds & SD_SCR_CMD23_SUPPORT)) md->flags |= MMC_BLK_CMD23; } From patchwork Tue Aug 27 12:23:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 823372 Received: from esa4.hgst.iphmx.com (esa4.hgst.iphmx.com [216.71.154.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 546E51B3F33 for ; Tue, 27 Aug 2024 12:26:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724761564; cv=none; b=oG6hZ7OVOJmNyAT5gh6mQLKiuSmzabWUBN66yWkkZ9XiSY+yob8C51RNnhbKh74f35WoJoApz+8VLmTUoLfLrrc2eZZKYBSHiGEIG9oED5JHnCX5ZzEQDZFVvweaa3uIFW30L8T0hn8gwTlw4fmzb4i/FMtwxhCHUlfMk0nWjJ4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724761564; c=relaxed/simple; bh=rLk22sRGccB3KUKwz+2I87l5+mNkveFfoXrTJFrpWgs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=KvEdTj2DkA4aVyxPGsDf7BLmvV14PjUn4n+DisEEQtxRsAjx0EWZXxrWQniI/QEYr3PBG4oCU/i4sbfzcEEoBjnHkdrCEuJnDJMq5sAn3L+2goDe8wuFESOR5O+k9TVDof2tfMliwAoZSt9LhGnhOay1zuyNjsbWGzfXEzQEz6Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=Kd+06baz; arc=none smtp.client-ip=216.71.154.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="Kd+06baz" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1724761562; x=1756297562; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rLk22sRGccB3KUKwz+2I87l5+mNkveFfoXrTJFrpWgs=; b=Kd+06bazgxnf54cdpG2gdcmDYiJ5yE350si3H4eEWPU+C97RRQjGNKwb +iSjfybgfMpnMXPHXhaoJ7Oj8iZ2cu2h3RCe7oYKWwCM3vFx4hSPNZvVC e+oLP1Vw14fuSsnbvQPCUqxlqR4bh6s6VHWPWzFKnx3F52Gi1BtXi0Qyt mOi+oFkeuupS223zb45S4eWkqNJDNIJlSfPoj98mivobkCDb4UxBwQrDf n1qhxaEBL0SmQryxSIKBTQ2REUVyOLKr9XRneKXh8887ygO1ZqX20Afsv 1wVMLthdCtd4WmIjwXp/MADHG2EFzUZVzOaVCNuywvYSrFNlvbC8Sw70T A==; X-CSE-ConnectionGUID: 0EGnSVfFTEy7h0/qm9JSGA== X-CSE-MsgGUID: M7IaJyi/QOKmz+7vjFFNfQ== X-IronPort-AV: E=Sophos;i="6.10,180,1719849600"; d="scan'208";a="24660678" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 27 Aug 2024 20:26:01 +0800 IronPort-SDR: 66cdb7c6_4fYeP9JLP+XNqPUO3ZZxMKC9LCB8GWm5rFtwZBIaYCGiabo 7/NO4NuveZjxko8n4vSHCHvSQM2ILxTN/v8qMXA== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 04:25:58 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 05:25:59 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v5 5/9] mmc: core: Allow mmc erase to carry large addresses Date: Tue, 27 Aug 2024 15:23:38 +0300 Message-Id: <20240827122342.3314173-6-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240827122342.3314173-1-avri.altman@wdc.com> References: <20240827122342.3314173-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Preparing for SDUC, Allow the erase address to be larger beyond a 32 bit address. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 6 ++++-- drivers/mmc/core/core.c | 33 ++++++++++++++++++--------------- drivers/mmc/core/core.h | 16 ++++++++++++---- 3 files changed, 34 insertions(+), 21 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 713b22eced72..0484d7031c0c 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -1154,7 +1154,8 @@ static void mmc_blk_issue_erase_rq(struct mmc_queue *mq, struct request *req, { struct mmc_blk_data *md = mq->blkdata; struct mmc_card *card = md->queue.card; - unsigned int from, nr; + unsigned int nr; + sector_t from; int err = 0; blk_status_t status = BLK_STS_OK; @@ -1209,7 +1210,8 @@ static void mmc_blk_issue_secdiscard_rq(struct mmc_queue *mq, { struct mmc_blk_data *md = mq->blkdata; struct mmc_card *card = md->queue.card; - unsigned int from, nr, arg; + unsigned int nr, arg; + sector_t from; int err = 0, type = MMC_BLK_SECDISCARD; blk_status_t status = BLK_STS_OK; diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index d6c819dd68ed..349e5c578da5 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -1598,8 +1598,8 @@ static unsigned int mmc_erase_timeout(struct mmc_card *card, return mmc_mmc_erase_timeout(card, arg, qty); } -static int mmc_do_erase(struct mmc_card *card, unsigned int from, - unsigned int to, unsigned int arg) +static int mmc_do_erase(struct mmc_card *card, sector_t from, + sector_t to, unsigned int arg) { struct mmc_command cmd = {}; unsigned int qty = 0, busy_timeout = 0; @@ -1630,8 +1630,8 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, else if (mmc_card_sd(card)) qty += to - from + 1; else - qty += ((to / card->erase_size) - - (from / card->erase_size)) + 1; + qty += (mmc_sector_div(to, card->erase_size) - + mmc_sector_div(from, card->erase_size)) + 1; if (!mmc_card_blockaddr(card)) { from <<= 9; @@ -1700,18 +1700,19 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, } static unsigned int mmc_align_erase_size(struct mmc_card *card, - unsigned int *from, - unsigned int *to, + sector_t *from, + sector_t *to, unsigned int nr) { - unsigned int from_new = *from, nr_new = nr, rem; + sector_t from_new = *from; + unsigned int nr_new = nr, rem; /* * When the 'card->erase_size' is power of 2, we can use round_up/down() * to align the erase size efficiently. */ if (is_power_of_2(card->erase_size)) { - unsigned int temp = from_new; + sector_t temp = from_new; from_new = round_up(temp, card->erase_size); rem = from_new - temp; @@ -1723,7 +1724,7 @@ static unsigned int mmc_align_erase_size(struct mmc_card *card, nr_new = round_down(nr_new, card->erase_size); } else { - rem = from_new % card->erase_size; + rem = mmc_sector_mod(from_new, card->erase_size); if (rem) { rem = card->erase_size - rem; from_new += rem; @@ -1756,10 +1757,12 @@ static unsigned int mmc_align_erase_size(struct mmc_card *card, * * Caller must claim host before calling this function. */ -int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, +int mmc_erase(struct mmc_card *card, sector_t from, unsigned int nr, unsigned int arg) { - unsigned int rem, to = from + nr; + unsigned int rem; + sector_t to = from + nr; + int err; if (!(card->csd.cmdclass & CCC_ERASE)) @@ -1780,7 +1783,7 @@ int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, return -EOPNOTSUPP; if (arg == MMC_SECURE_ERASE_ARG) { - if (from % card->erase_size || nr % card->erase_size) + if (mmc_sector_mod(from, card->erase_size) || nr % card->erase_size) return -EINVAL; } @@ -1804,7 +1807,7 @@ int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, * and call mmc_do_erase() twice if necessary. This special case is * identified by the card->eg_boundary flag. */ - rem = card->erase_size - (from % card->erase_size); + rem = card->erase_size - mmc_sector_mod(from, card->erase_size); if ((arg & MMC_TRIM_OR_DISCARD_ARGS) && card->eg_boundary && nr > rem) { err = mmc_do_erase(card, from, from + rem - 1, arg); from += rem; @@ -1863,12 +1866,12 @@ int mmc_can_secure_erase_trim(struct mmc_card *card) } EXPORT_SYMBOL(mmc_can_secure_erase_trim); -int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, +int mmc_erase_group_aligned(struct mmc_card *card, sector_t from, unsigned int nr) { if (!card->erase_size) return 0; - if (from % card->erase_size || nr % card->erase_size) + if (mmc_sector_mod(from, card->erase_size) || nr % card->erase_size) return 0; return 1; } diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h index 37091a6589ed..fc9d5e9620b1 100644 --- a/drivers/mmc/core/core.h +++ b/drivers/mmc/core/core.h @@ -116,15 +116,13 @@ bool mmc_is_req_done(struct mmc_host *host, struct mmc_request *mrq); int mmc_start_request(struct mmc_host *host, struct mmc_request *mrq); -int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, - unsigned int arg); +int mmc_erase(struct mmc_card *card, sector_t from, unsigned int nr, unsigned int arg); int mmc_can_erase(struct mmc_card *card); int mmc_can_trim(struct mmc_card *card); int mmc_can_discard(struct mmc_card *card); int mmc_can_sanitize(struct mmc_card *card); int mmc_can_secure_erase_trim(struct mmc_card *card); -int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, - unsigned int nr); +int mmc_erase_group_aligned(struct mmc_card *card, sector_t from, unsigned int nr); unsigned int mmc_calc_max_discard(struct mmc_card *card); int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen); @@ -199,4 +197,14 @@ static inline int mmc_flush_cache(struct mmc_host *host) return 0; } +static inline unsigned int mmc_sector_div(sector_t dividend, u32 divisor) +{ + return div_u64(dividend, divisor); +} + +static inline unsigned int mmc_sector_mod(sector_t dividend, u32 divisor) +{ + return sector_div(dividend, divisor); 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27 Aug 2024 05:26:05 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v5 6/9] mmc: core: Add Ext memory addressing for erase Date: Tue, 27 Aug 2024 15:23:39 +0300 Message-Id: <20240827122342.3314173-7-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240827122342.3314173-1-avri.altman@wdc.com> References: <20240827122342.3314173-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 CMD22 shall precede CMD32 and CMD33 to configure 38-bit erase start address and 38 bit erase stop address. Tested-by: Ricky WU Signed-off-by: Avri Altman --- drivers/mmc/core/core.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index 349e5c578da5..f43e6532702d 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -1642,8 +1642,12 @@ static int mmc_do_erase(struct mmc_card *card, sector_t from, cmd.opcode = SD_ERASE_WR_BLK_START; else cmd.opcode = MMC_ERASE_GROUP_START; - cmd.arg = from; + cmd.arg = from & 0xFFFFFFFF; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; + + if (mmc_card_ult_capacity(card)) + mmc_send_ext_addr(card->host, from); + err = mmc_wait_for_cmd(card->host, &cmd, 0); if (err) { pr_err("mmc_erase: group start error %d, " @@ -1657,8 +1661,12 @@ static int mmc_do_erase(struct mmc_card *card, sector_t from, cmd.opcode = SD_ERASE_WR_BLK_END; else cmd.opcode = MMC_ERASE_GROUP_END; - cmd.arg = to; + cmd.arg = to & 0xFFFFFFFF; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; 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27 Aug 2024 04:26:11 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 05:26:12 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v5 7/9] mmc: core: Adjust ACMD22 to SDUC Date: Tue, 27 Aug 2024 15:23:40 +0300 Message-Id: <20240827122342.3314173-8-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240827122342.3314173-1-avri.altman@wdc.com> References: <20240827122342.3314173-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 ACMD22 is used to verify the previously write operation. Normally, it returns the number of written sectors as u32. SDUC, however, returns it as u64. This is not a superfluous requirement, because SDUC writes may exceeds 2TB. For Linux mmc however, the previously write operation could not be more than the block layer limits, thus we make room for a u64 and cast the returning value to u32. Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 0484d7031c0c..894bd53c49b2 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -48,6 +48,7 @@ #include #include +#include #include "queue.h" #include "block.h" @@ -948,11 +949,10 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) int err; u32 result; __be32 *blocks; - + u8 resp_sz; struct mmc_request mrq = {}; struct mmc_command cmd = {}; struct mmc_data data = {}; - struct scatterlist sg; err = mmc_app_cmd(card->host, card); @@ -963,7 +963,14 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) cmd.arg = 0; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC; - data.blksz = 4; + /* + * Normally, ACMD22 returns the number of written sectors as u32. + * SDUC, however, returns it as u64. This is not a superfluous + * requirement, because SDUC writes may exceed 2TB. + */ + resp_sz = mmc_card_ult_capacity(card) ? 8 : 4; + + data.blksz = resp_sz; data.blocks = 1; data.flags = MMC_DATA_READ; data.sg = &sg; @@ -973,15 +980,25 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) mrq.cmd = &cmd; mrq.data = &data; - blocks = kmalloc(4, GFP_KERNEL); + blocks = kmalloc(resp_sz, GFP_KERNEL); if (!blocks) return -ENOMEM; - sg_init_one(&sg, blocks, 4); + sg_init_one(&sg, blocks, resp_sz); mmc_wait_for_req(card->host, &mrq); - result = ntohl(*blocks); + if (mmc_card_ult_capacity(card)) { + u64 blocks_64 = get_unaligned_be64(blocks); + /* + * For Linux mmc however, the previously write operation could + * not be more than the block layer limits, thus just make room + * for a u64 and cast the response back to u32. + */ + result = blocks_64 > UINT_MAX ? UINT_MAX : (u32)blocks_64; + } else { + result = ntohl(*blocks); + } kfree(blocks); if (cmd.error || data.error) From patchwork Tue Aug 27 12:23:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 822970 Received: from esa5.hgst.iphmx.com (esa5.hgst.iphmx.com [216.71.153.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17A761B4C2D for ; Tue, 27 Aug 2024 12:26:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.153.144 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724761587; cv=none; b=rBg79NJ+KXJk67rvOiUDDXP5WI+sZQI/nLAPHlUAj7JFAKNlG5VZErPj3eB2G3duODrgKv33daKIT8HNBMRrO48agiYALiOkexf1Knb+96U8LsBi2kM+gsvLKGYJ8rULp+x22S1kxj/lNP1vHIIjhevyIrzyudOkbOW9phA7JaA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724761587; c=relaxed/simple; bh=KhLw2cIeU26Njm3pIvs0KiFLLn7t2hzqXdK9b6qDqJI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Vl8Lq5Zm+WNMfaZ1ISziCNn+OemRhs5rg78RlsC1D/6+KVnEsjDuThHj8Q17YwQ/57xQZlc172/FeznRaeoxgAn2Zu+xT/0tCSe50pT+PePWHYji09uXMRo5CUNr34UR/O3BIMYqRjjKAFoVBtl5W9q1F7KLDIi4iBHF2lRmqmA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=FXKganJK; arc=none smtp.client-ip=216.71.153.144 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="FXKganJK" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1724761585; x=1756297585; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KhLw2cIeU26Njm3pIvs0KiFLLn7t2hzqXdK9b6qDqJI=; b=FXKganJKouxBL/HxLZwzvhUEhEXO9IGoNfbatGruAljHNiz3IC7AfEI+ NtsAqsD4jvm3RvUU2fTaZdaCS2+LnFYW2VuA5Ca0tU1IqmFzy8Tid7OvR q9lH7yqBLiIWbsLuOBVkR5ijo5eKoQthJJJl8hfec/fNaQSgulkWn3P3C ICZ9D+ZnL93gb0Owrfi3Oq1zedAd8GipjhZmNTsnPx3AlJJKeRAQGxAz4 b94M0GjOkIfvgj9IJ/KjQNsJDFrpRAY6+9X4EtQnumZSsDCCXy00gPoP1 0g/0iGBMy0efWkaIeEP+eF7dRcSMrnp0+rUhEzOEaiJbtOUk5RrksnAgA A==; X-CSE-ConnectionGUID: nS6ot2NLTMm/rPsI7Vny6w== X-CSE-MsgGUID: 6D7n2vRlSQqH6wyL1PXg6Q== X-IronPort-AV: E=Sophos;i="6.10,180,1719849600"; d="scan'208";a="26277174" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 27 Aug 2024 20:26:24 +0800 IronPort-SDR: 66cdb7dd_R9CZ4Q9BeQF18TfL8y+mDI0ivJjA+mw8E/8tOenGvrVNFXs Av7muS5xTqWvGAzGzim/j3WYpg8Sq3pVBMaiWsQ== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 04:26:22 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 05:26:23 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v5 8/9] mmc: core: Disable SDUC for mmc_test Date: Tue, 27 Aug 2024 15:23:41 +0300 Message-Id: <20240827122342.3314173-9-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240827122342.3314173-1-avri.altman@wdc.com> References: <20240827122342.3314173-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Panning to ameliorate it in the very near future. Signed-off-by: Avri Altman --- drivers/mmc/core/mmc_test.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/mmc/core/mmc_test.c b/drivers/mmc/core/mmc_test.c index b7f627a9fdea..a28e1a1aded3 100644 --- a/drivers/mmc/core/mmc_test.c +++ b/drivers/mmc/core/mmc_test.c @@ -3218,6 +3218,13 @@ static int mmc_test_register_dbgfs_file(struct mmc_card *card) mutex_lock(&mmc_test_lock); + if (mmc_card_ult_capacity(card)) { + pr_info("%s: mmc-test currently UNSUPPORTED for SDUC\n", + mmc_hostname(card->host)); + ret = -EOPNOTSUPP; + goto err; + } + ret = __mmc_test_register_dbgfs_file(card, "test", S_IWUSR | S_IRUGO, &mmc_test_fops_test); if (ret) From patchwork Tue Aug 27 12:23:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 823370 Received: from esa5.hgst.iphmx.com (esa5.hgst.iphmx.com [216.71.153.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 344BC1B3F15 for ; Tue, 27 Aug 2024 12:26:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.153.144 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724761592; cv=none; b=NarhSxPSj4Ie4kM6C4QGdcmm2DFkG3jVW5ZDHXH26/MZ2/4QCSyEDViEdeOOhuRwwu9lSk4KcZ+vI6LZ4fTPjnP41Ck1+pf5mCGgWWc4Uh3sM3gGMshpTCJk4+/6gs8RFWrLje87Pt6KaxFU56fsNflFYsLynPgyY7LzB9NaPUk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724761592; c=relaxed/simple; bh=n4BvqYcyG5fJisECdT2jrsquwHyCgbpgYrJUh0vWBrw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=N78Gp5fMq1AJNl71gytFwFV7jFLG8VmD1Tq8JMczw7BZI8lcXMbj4zT/Sjzs5bE88QdPu11ueUgn3MbzEvz5hErR31R0nMaqfwWHPtjoEP7cwuhhcnQphvoeWBLEFIL5VjZchrjPnhx6+Szx9clhhfzJtOmc2HWQzCgw/ONAYEA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=IU91r7Ri; arc=none smtp.client-ip=216.71.153.144 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="IU91r7Ri" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1724761590; x=1756297590; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=n4BvqYcyG5fJisECdT2jrsquwHyCgbpgYrJUh0vWBrw=; b=IU91r7Ri/KrDXE4NXEhZVb28mChDAmqsK/HvBW67ex6IJQUvP15gFM0h jQ0i3o6pDJRJ3I4VmeWQgBJ1KipvefUKj/Q62FoFv2TteMtYdLqUFWqNy xyXoUnSvTDCau3ercGFDT74mdwh+yLKW/SS1lKgLFLQLm6K8Qm+gkoh8e p41wHAhuYsrFlSFgTOF4Uzortc506f70AjWH1w0bK4IuMwrwQEeww4j7x E66jUK5W1AHsGwt1IiyaKU7+Y+iNf+org1kSeNYrDAM6BycSIFoCEhLga xbNJ9WVEqO5P2I1CMqfjaRMk9IVY4Fc4PU5vbPzJDOwpMZZzoeM/WYmr2 w==; X-CSE-ConnectionGUID: FcCv3K1kS0C+1wKtmWlVnw== X-CSE-MsgGUID: r4/fMp7QRZGEW1QrEU9MeA== X-IronPort-AV: E=Sophos;i="6.10,180,1719849600"; d="scan'208";a="26277190" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 27 Aug 2024 20:26:30 +0800 IronPort-SDR: 66cdb938_HSBnZMEBpAGenVDBvzAQmHboUu26E+DB+WOn5hEL+zBlVBq Qwqso7E91sTJ1P2NLVdCixcbajXvktf8SPuGFig== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 04:32:08 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 27 Aug 2024 05:26:29 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Avri Altman Subject: [PATCH v5 9/9] mmc: core: Enable SDUC Date: Tue, 27 Aug 2024 15:23:42 +0300 Message-Id: <20240827122342.3314173-10-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240827122342.3314173-1-avri.altman@wdc.com> References: <20240827122342.3314173-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable SDUC if the card responded to ACMD41 with HCS & HO2T bits set. Signed-off-by: Avri Altman --- drivers/mmc/core/sd.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 3df084541e94..616bd7d5915d 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -1461,7 +1461,10 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, } if (!oldcard) { - err = mmc_sd_get_csd(card, false); + u32 sduc_arg = SD_OCR_CCS | SD_OCR_2T; + bool is_sduc = (rocr & sduc_arg) == sduc_arg; + + err = mmc_sd_get_csd(card, is_sduc); if (err) goto free_card;