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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a8989223199sm678461566b.219.2024.09.03.05.44.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Sep 2024 05:44:34 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 01/10] dt-bindings: arm: cpus: Add Samsung Mongoose M2 Date: Tue, 3 Sep 2024 15:44:20 +0300 Message-Id: <20240903124429.107076-2-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240903124429.107076-1-ivo.ivanov.ivanov1@gmail.com> References: <20240903124429.107076-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a compatible for the Samsung Mongoose M2, found in exynos8895. Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index f308ff6c3..e41a8aec6 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -206,6 +206,7 @@ properties: - qcom,kryo780 - qcom,oryon - qcom,scorpion + - samsung,mongoose-m2 enable-method: $ref: /schemas/types.yaml#/definitions/string From patchwork Tue Sep 3 12:44:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivaylo Ivanov X-Patchwork-Id: 825060 Received: from mail-lf1-f48.google.com (mail-lf1-f48.google.com [209.85.167.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 48DE41DAC50; Tue, 3 Sep 2024 12:44:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725367481; cv=none; b=girfkwZMg2cSOHtd9V2WaMdWL9UcjWLfwiuH8OyHcKemqXbycfP8Ol+H6s5Whh3Tc3NWnb8t0bfA1J7Sra33rtROJ4dk3muNdTqNQu9r2IXdiHz2wCc7W+HvHM+uhhXhyDHhHEasKlA6Abf8RAEgL/MfY/ei6dHmw6hcJ4iAf1U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725367481; c=relaxed/simple; bh=/Ruh32dQtV6C6tPWdAdXoTd28+iuhF5xcHCs657ajK8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=IrpGH791Z2z8n2AtoFO8R8mnuoP+GZxTIljZMfL+s9dLouuRXqcC2sW/WIP5HBTF63HoYBqcJGyDCJyDVGzI6BtyP+fRa/oMTonl+cNcBSMRr6f+khD3nWhEUgXrmvalDF0Y731PZS9ynxiJsqM3tVER2m4JiWsc3v8LHwxLHN0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=UK04jfb+; arc=none smtp.client-ip=209.85.167.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="UK04jfb+" Received: by mail-lf1-f48.google.com with SMTP id 2adb3069b0e04-5343617fdddso9064843e87.0; Tue, 03 Sep 2024 05:44:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1725367478; x=1725972278; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mchOkTk5Az/RlZsBiRAPflqmETPo/14771bmRbvFbew=; b=UK04jfb+yuNJ23rN2WUVEhW6HICoPk4ySEpMhbDheq7ize7R7eeP9zIYdeY6Cr1fCe hSoZebvxFhfh4Qb9DiBmPVDRcDttIpch+X60WmVJ3eiuT1HMkmy9O3lebGK+zqdPNc5D PBAJzChM+f/iMGZXBWrtgs36j4XUw7q7Wygz18xTslzRWT8A8I5LDpOSqu11kVaAGVLa w+qor9MJfRR4hocs9CLP8XbFDs2waQRvff6MkYvRUIyajGhXmHJm7qr6Ww0M5iOoljVo +09McMGSKBPRavso+GzJIJU5nIjRFqGHLtItl596EygCOpP6fxjWOui2Ahlvsf9788cU VS+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725367478; x=1725972278; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mchOkTk5Az/RlZsBiRAPflqmETPo/14771bmRbvFbew=; b=VpOrAAIl8TYgWDp5eQE26c6Q04uxPc/h7MX2lM7UYE4I0OKt4+JZlSt2w1bICFvIAb 5YAC6BSkuD4weBuOHkZ71OhbiYbfey85hzmelJOtrN6W9mBwqWQKo9YGo/V1bSbnBjGL 1HE0lrCBLn9F4hNZUg5Yb4VZ1TXNGyTDGiRKzWQuRsKBQLQauTAH7/LCC2GO9o3EyGQZ 5HATOs17/InB466W4Uyys2PtBCYdEiyQmFJv/mlWGFkMA2bjYyuAlAkZJe6veZl265jS XabAppBNRoiOouNPHMCNESZd6wXoBcWTHimKEfEiIom07whOum1fmsP7wAt9oHB2tkjd V29w== X-Forwarded-Encrypted: i=1; AJvYcCUBpVdliNqS8qerv2jNIwNRv9mzHcudj8q3iRMfsxF3u1wXJP/cy2x5ROGwkgXNvSyIuTmzgeO9DvX3Ew==@vger.kernel.org, AJvYcCXYx8KJOdjXkS3LZgrSybtr3UGujc+II/OhdMvtVU4Oj4Eifxbap8WmnWmj6iNl8/l97qLoobGzBpXAvXyS@vger.kernel.org, AJvYcCXdxg05gicwKaKn0xlixd5qiYxnzk8zU7nTLvwWNfBs9u7an7eQJCP68iS0Zt3/7podU55/142FNXmQ@vger.kernel.org X-Gm-Message-State: AOJu0YwP1YQbx3RCF/mpU0p/kKh3B50ABCTlw6qLhL/Okpzki+wX2qeq VoxZ5h4tnuakgos20W7k5gvf09jIhppMdaOLsNM1Z07odfOpGi23 X-Google-Smtp-Source: AGHT+IG64E1pMDrb8+tfxPYYMpB+Om0xzHbVLJbn21+++8CeZbRf7+akZlhm8KDxBv5WA5eKn+vOAw== X-Received: by 2002:a05:6512:31cf:b0:52c:e119:7f1 with SMTP id 2adb3069b0e04-53546bfcc07mr12389696e87.51.1725367477971; Tue, 03 Sep 2024 05:44:37 -0700 (PDT) Received: from ivaylo-desktop.. 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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a8989223199sm678461566b.219.2024.09.03.05.44.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Sep 2024 05:44:37 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 03/10] soc: samsung: exynos-chipid: add exynos8895 SoC support Date: Tue, 3 Sep 2024 15:44:22 +0300 Message-Id: <20240903124429.107076-4-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240903124429.107076-1-ivo.ivanov.ivanov1@gmail.com> References: <20240903124429.107076-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add EXYNOS8895 information to soc_ids tables. This SoC product id is "0xE8895000". Acked-by: Rob Herring (Arm) Signed-off-by: Ivaylo Ivanov --- drivers/soc/samsung/exynos-chipid.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/samsung/exynos-chipid.c b/drivers/soc/samsung/exynos-chipid.c index b1118d377..9e00ac8de 100644 --- a/drivers/soc/samsung/exynos-chipid.c +++ b/drivers/soc/samsung/exynos-chipid.c @@ -58,6 +58,7 @@ static const struct exynos_soc_id { /* Compatible with: samsung,exynos850-chipid */ { "EXYNOS7885", 0xE7885000 }, { "EXYNOS850", 0xE3830000 }, + { "EXYNOS8895", 0xE8895000 }, { "EXYNOSAUTOV9", 0xAAA80000 }, { "EXYNOSAUTOV920", 0x0A920000 }, }; From patchwork Tue Sep 3 12:44:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivaylo Ivanov X-Patchwork-Id: 825059 Received: from mail-lj1-f181.google.com (mail-lj1-f181.google.com [209.85.208.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B97FB21C162; Tue, 3 Sep 2024 12:44:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725367484; cv=none; b=rTphK2CrDvPH2jYDCWDmUVM6SD/TlclQy9FF61gPdqiXEphiyR62tm0Li/pLAlb3ixr9HJmYbyi/95IGl0OcHmauvtyNKWWBt+j+P9/J0qcQldAO3/KamYjXQahIq6eoIlrhR+UPzHQOJgvYfIxFewMZbcQIRyMdjnZYW77w/po= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725367484; c=relaxed/simple; bh=mZW6LVvOr0rb6Y5eS6JfaqNqF5Ms/86Af9ek/a+TwIg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qTpdfYXlUFimdoZwHL74ow0a6016TXpU65yzoudZGh9mJLzG3r/7QPgwqg1cXyN1kR9T2/NPXGdEUeUo7pB3WmBwtUGR0yyx/3Qgn5Dm1c0ixYXPVhEQVDCKZnJomG8EvksYmuZ//2Ai/crk0Zh0Jzn91QOr2Tc9NTasT6UiYqw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=jNnYqPR7; arc=none smtp.client-ip=209.85.208.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="jNnYqPR7" Received: by mail-lj1-f181.google.com with SMTP id 38308e7fff4ca-2f3f163e379so86214851fa.3; Tue, 03 Sep 2024 05:44:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1725367481; x=1725972281; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Fg6TDI/ymSvpZz8cB2j55+ySmpwuSQLoPBVrpi6SoNE=; b=jNnYqPR7N/WLU97DK8DhMEBR+D4k0J6V1RcFgjzFVzTP8HG4033FxzQLA3VoSGxyQe jgbDreSrzXsH0lGY2g73kO4o1/P9+nJj34BHbOAk4osoD4xz7RhxIS1syq2Oaev5k/OG Dfr5AdiIk2/I3H4rgqHTkaB1c4JGBYMlakwSdtCB74fBSirB2jFr+jhG8iHEajPS7D7V uXHmDYia/rC0t3DzpIRAFnPbvnM/qmt7QsU+ApbT6ejdyXT4i0ax+ja1qrxOGNeYHOCf pBQGXfrkXDocMC1EgY1pa5dJYxQp+efx4sCbaijIxivMSdWrAVMwQu0J84l/y/iPMlI8 LFdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725367481; x=1725972281; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Fg6TDI/ymSvpZz8cB2j55+ySmpwuSQLoPBVrpi6SoNE=; b=oadkVvbvxCJHK3HbPrvgl1aLpR7xuBnpbjYzqUuZEP/Vv5+lx7o5qCJL9/WdlMJpSC NlV/WJCm4C8IcUqgnJurV5IMbkxYzlrNbcrAWNQSx3An8lGHRWF74+UcR6AmdPL+kCE7 gQvhSGgCH4hqTbxABrQwESyTIOrSBxYVFdXDOlBWqAGnW95opp0Yyt5dV5dawBcQ0cKe ouYBx1n64YtATQV232gJXZqRX2+39ut1O4RCsB0hKsK7PIPybGkXHdvGJAPNaqbVVn0o CyBRyxwxQ46bXOs9ulTc3pNik/+PiQaZnStR099C4sVR+s7AEhRUZEseAVNzNrLqpFOJ xEuw== X-Forwarded-Encrypted: i=1; AJvYcCUpW1QMnJoNaQpdmCp6cQVQIFwoNUglDnXzv23Pp2r2j5GPkLTj4jyeMeW66oP9ppmbKVc9ZYQsogR+tg==@vger.kernel.org, AJvYcCX3IH2gLzELREEjDFgQlMnflfJpG/27A4cQtIJo3A6ySfu1ouQyLbwrN72yPnBQ5cn9Eo/WQ1aRtnCF6P4b@vger.kernel.org, AJvYcCXmJvG8ibE4p8dCmbFvpdZSrlHaaA7dh8Cnskv5yCAVKy6MC/6kLRIR82lZt4iAIV++CgGe9tQ3LXga@vger.kernel.org X-Gm-Message-State: AOJu0Yz+E7paAC3fS8HhpUaD1pY/xqpr61Pj63n1+M7vuAqDSPstzDrO 9dZMNHnqJPocOtarsjZB2D1oUqV6dt7BaO/QSAZmsqagHbPSau/t X-Google-Smtp-Source: AGHT+IHFSQo8MF5Vxh5axyeImE5IJ7XEPv6QgyKZNlqWEuli451scMZDNbi5w8hJopbjOEpMs9hNXQ== X-Received: by 2002:a05:6512:3089:b0:533:324a:9df6 with SMTP id 2adb3069b0e04-53546b5043cmr13285845e87.29.1725367480684; Tue, 03 Sep 2024 05:44:40 -0700 (PDT) Received: from ivaylo-desktop.. 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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a8989223199sm678461566b.219.2024.09.03.05.44.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Sep 2024 05:44:40 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 05/10] pinctrl: samsung: Add exynos8895 SoC pinctrl configuration Date: Tue, 3 Sep 2024 15:44:24 +0300 Message-Id: <20240903124429.107076-6-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240903124429.107076-1-ivo.ivanov.ivanov1@gmail.com> References: <20240903124429.107076-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add support for the pin-controller found on the Exynos8895 SoC used in Samsung Galaxy S8 and S8 Plus phones. It has a newly applied pinctrl register layer for FSYS0 with a different bank type offset that consists of the following bit fields: CON: 4, DAT: 1, PUD: 2, DRV: 3, CONPDN: 2, PUDPDN: 2 Signed-off-by: Ivaylo Ivanov --- .../pinctrl/samsung/pinctrl-exynos-arm64.c | 137 ++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-exynos.h | 10 ++ drivers/pinctrl/samsung/pinctrl-samsung.c | 2 + drivers/pinctrl/samsung/pinctrl-samsung.h | 1 + 4 files changed, 150 insertions(+) diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c index 5480e0884..0d5d14cf0 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c @@ -58,6 +58,15 @@ static const struct samsung_pin_bank_type exynos850_bank_type_alive = { .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, }; +/* + * Bank type for non-alive type. Bit fields: + * CON: 4, DAT: 1, PUD: 2, DRV: 3, CONPDN: 2, PUDPDN: 2 + */ +static const struct samsung_pin_bank_type exynos8895_bank_type_off = { + .fld_width = { 4, 1, 2, 3, 2, 2, }, + .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, }, +}; + /* Pad retention control code for accessing PMU regmap */ static atomic_t exynos_shared_retention_refcnt; @@ -866,6 +875,134 @@ const struct samsung_pinctrl_of_match_data exynosautov920_of_data __initconst = .num_ctrl = ARRAY_SIZE(exynosautov920_pin_ctrl), }; +/* pin banks of exynos8895 pin-controller 0 (ALIVE) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks0[] __initconst = { + EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa0", 0x00), + EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa1", 0x04), + EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa2", 0x08), + EXYNOS_PIN_BANK_EINTW(8, 0x080, "gpa3", 0x0c), + EXYNOS_PIN_BANK_EINTW(7, 0x0A0, "gpa4", 0x24), +}; + +/* pin banks of exynos8895 pin-controller 1 (ABOX) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks1[] __initconst = { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gph0", 0x00), + EXYNOS_PIN_BANK_EINTG(7, 0x020, "gph1", 0x04), + EXYNOS_PIN_BANK_EINTG(4, 0x040, "gph3", 0x08), +}; + +/* pin banks of exynos8895 pin-controller 2 (VTS) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks2[] __initconst = { + EXYNOS_PIN_BANK_EINTG(3, 0x000, "gph2", 0x00), +}; + +/* pin banks of exynos8895 pin-controller 3 (FSYS0) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks3[] __initconst = { + EXYNOS8895_PIN_BANK_EINTG(3, 0x000, "gpi0", 0x00), + EXYNOS8895_PIN_BANK_EINTG(8, 0x020, "gpi1", 0x04), +}; + +/* pin banks of exynos8895 pin-controller 4 (FSYS1) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks4[] __initconst = { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpj1", 0x00), + EXYNOS_PIN_BANK_EINTG(7, 0x020, "gpj0", 0x04), +}; + +/* pin banks of exynos8895 pin-controller 5 (BUSC) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks5[] __initconst = { + EXYNOS_PIN_BANK_EINTG(2, 0x000, "gpb2", 0x00), +}; + +/* pin banks of exynos8895 pin-controller 6 (PERIC0) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks6[] __initconst = { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpd0", 0x00), + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpd1", 0x04), + EXYNOS_PIN_BANK_EINTG(4, 0x040, "gpd2", 0x08), + EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpd3", 0x0C), + EXYNOS_PIN_BANK_EINTG(4, 0x080, "gpb1", 0x10), + EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpe7", 0x14), + EXYNOS_PIN_BANK_EINTG(8, 0x0C0, "gpf1", 0x18), +}; + +/* pin banks of exynos8895 pin-controller 7 (PERIC1) */ +static const struct samsung_pin_bank_data exynos8895_pin_banks7[] __initconst = { + EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpb0", 0x00), + EXYNOS_PIN_BANK_EINTG(5, 0x020, "gpc0", 0x04), + EXYNOS_PIN_BANK_EINTG(5, 0x040, "gpc1", 0x08), + EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpc2", 0x0C), + EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpc3", 0x10), + EXYNOS_PIN_BANK_EINTG(4, 0x0A0, "gpk0", 0x14), + EXYNOS_PIN_BANK_EINTG(8, 0x0C0, "gpe5", 0x18), + EXYNOS_PIN_BANK_EINTG(8, 0x0e0, "gpe6", 0x1C), + EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpe2", 0x20), + EXYNOS_PIN_BANK_EINTG(8, 0x120, "gpe3", 0x24), + EXYNOS_PIN_BANK_EINTG(8, 0x140, "gpe4", 0x28), + EXYNOS_PIN_BANK_EINTG(4, 0x160, "gpf0", 0x2C), + EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpe1", 0x30), + EXYNOS_PIN_BANK_EINTG(2, 0x1A0, "gpg0", 0x34), +}; + +static const struct samsung_pin_ctrl exynos8895_pin_ctrl[] __initconst = { + { + /* pin-controller instance 0 Alive data */ + .pin_banks = exynos8895_pin_banks0, + .nr_banks = ARRAY_SIZE(exynos8895_pin_banks0), + .eint_gpio_init = exynos_eint_gpio_init, + .eint_wkup_init = exynos_eint_wkup_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 1 ABOX data */ + .pin_banks = exynos8895_pin_banks1, + .nr_banks = ARRAY_SIZE(exynos8895_pin_banks1), + }, { + /* pin-controller instance 2 VTS data */ + .pin_banks = exynos8895_pin_banks2, + .nr_banks = ARRAY_SIZE(exynos8895_pin_banks2), + .eint_gpio_init = exynos_eint_gpio_init, + }, { + /* pin-controller instance 3 FSYS0 data */ + .pin_banks = exynos8895_pin_banks3, + .nr_banks = ARRAY_SIZE(exynos8895_pin_banks3), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 4 FSYS1 data */ + .pin_banks = exynos8895_pin_banks4, + .nr_banks = ARRAY_SIZE(exynos8895_pin_banks4), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 5 BUSC data */ + .pin_banks = exynos8895_pin_banks5, + .nr_banks = ARRAY_SIZE(exynos8895_pin_banks5), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 6 PERIC0 data */ + .pin_banks = exynos8895_pin_banks6, + .nr_banks = ARRAY_SIZE(exynos8895_pin_banks6), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 7 PERIC1 data */ + .pin_banks = exynos8895_pin_banks7, + .nr_banks = ARRAY_SIZE(exynos8895_pin_banks7), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, +}; + +const struct samsung_pinctrl_of_match_data exynos8895_of_data __initconst = { + .ctrl = exynos8895_pin_ctrl, + .num_ctrl = ARRAY_SIZE(exynos8895_pin_ctrl), +}; + /* * Pinctrl driver data for Tesla FSD SoC. FSD SoC includes three * gpio/pin-mux/pinconfig controllers. diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.h b/drivers/pinctrl/samsung/pinctrl-exynos.h index 305cb1d31..7b7ff7ffe 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.h +++ b/drivers/pinctrl/samsung/pinctrl-exynos.h @@ -141,6 +141,16 @@ .name = id \ } +#define EXYNOS8895_PIN_BANK_EINTG(pins, reg, id, offs) \ + { \ + .type = &exynos8895_bank_type_off, \ + .pctl_offset = reg, \ + .nr_pins = pins, \ + .eint_type = EINT_TYPE_GPIO, \ + .eint_offset = offs, \ + .name = id \ + } + #define EXYNOSV920_PIN_BANK_EINTG(pins, reg, id, con_offs, mask_offs, pend_offs) \ { \ .type = &exynos850_bank_type_off, \ diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index 623df65a5..ea3214897 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1409,6 +1409,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { .data = &exynos7885_of_data }, { .compatible = "samsung,exynos850-pinctrl", .data = &exynos850_of_data }, + { .compatible = "samsung,exynos8895-pinctrl", + .data = &exynos8895_of_data }, { .compatible = "samsung,exynosautov9-pinctrl", .data = &exynosautov9_of_data }, { .compatible = "samsung,exynosautov920-pinctrl", diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h index d50ba6f07..f18877f2f 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -363,6 +363,7 @@ extern const struct samsung_pinctrl_of_match_data exynos5433_of_data; extern const struct samsung_pinctrl_of_match_data exynos7_of_data; extern const struct samsung_pinctrl_of_match_data exynos7885_of_data; extern const struct samsung_pinctrl_of_match_data exynos850_of_data; +extern const struct samsung_pinctrl_of_match_data exynos8895_of_data; extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data; extern const struct samsung_pinctrl_of_match_data exynosautov920_of_data; extern const struct samsung_pinctrl_of_match_data fsd_of_data; From patchwork Tue Sep 3 12:44:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivaylo Ivanov X-Patchwork-Id: 825058 Received: from mail-ej1-f51.google.com (mail-ej1-f51.google.com [209.85.218.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A0BB1D61A4; Tue, 3 Sep 2024 12:44:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a8989223199sm678461566b.219.2024.09.03.05.44.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Sep 2024 05:44:42 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 07/10] dt-bindings: soc: samsung: exynos-pmu: Add exynos8895 compatible Date: Tue, 3 Sep 2024 15:44:26 +0300 Message-Id: <20240903124429.107076-8-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240903124429.107076-1-ivo.ivanov.ivanov1@gmail.com> References: <20240903124429.107076-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add exynos8895-pmu compatible to the bindings documentation. Since Samsung, as usual, reuses devices from older designs, use the samsung,exynos7-pmu compatible. Signed-off-by: Ivaylo Ivanov Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml index 15fcd8f1d..5c4ba6c65 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml @@ -53,6 +53,7 @@ properties: - items: - enum: - samsung,exynos7885-pmu + - samsung,exynos8895-pmu - samsung,exynosautov9-pmu - samsung,exynosautov920-pmu - tesla,fsd-pmu From patchwork Tue Sep 3 12:44:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivaylo Ivanov X-Patchwork-Id: 825057 Received: from mail-ej1-f49.google.com (mail-ej1-f49.google.com [209.85.218.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D126F1A7278; Tue, 3 Sep 2024 12:44:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725367491; cv=none; b=TDx3HxJTMzcNHvcQq05DHcuKB8T/qa6UkJWow4PVf1U7QwQo2ZODRSWVwQXETmiYyDjqnpcIz43LpW/zk6ToThFovFhvTAXB4WSjaOdq0XDxy3s7d1fPX+FwqamKiaqh0RfSQUjdlKrJPmmgKoa8Xna8du7mVtHI5VUS2lrq+JU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725367491; c=relaxed/simple; bh=uOKDmApkZqNIZZEBF+/Ug/qhzi5j1NebKthwPb3r4qI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fbkgiz0xhwOm1J9bpAy7qJu0Io1J5XuQQVSod75laKdQ8P6JBFzWNWqR6tDD6Nw10NBcdeUiYKNc0bTWs8P8VslEkFmxqx4OYaFypoqVXNhothQt2EA+DgxPbRgheftusjGDd/qlqjcnbv1fmfM3sMOaia1v7nHhblg4QQu8Q4w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=kQIw99KA; arc=none smtp.client-ip=209.85.218.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="kQIw99KA" Received: by mail-ej1-f49.google.com with SMTP id a640c23a62f3a-a868b739cd9so620910066b.2; Tue, 03 Sep 2024 05:44:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1725367485; x=1725972285; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jtF2XzpNvwCWPSdBQNVKvMWy8enXtk6Qcj5ygtYNWL8=; b=kQIw99KA9Os6ep1/uxPA4UTV3o/gVUrIyy5MdoESRwAhkPaapBjATmt9JDR8aKbiBu ch9nF+MmiMra2j8mNLE5DX3GPMind4XyNug4Lj9ZIrQhKadZzDTzHqkoi5gUcaA/jb2s k3kDLL1YzZXNyDJWnsZuOzRhw2TJSW6GFOMuUc12hRmXl/Tv379sPGymWdDKid4M2/t2 s3229ye9J4Vt/G1RNkiauoC0GgsYh37F72hg1ht4wL+7zNrHpEDK1y97valDVdqagG4q 58RZAkYbAyqtTDm7p3GVaKqk3dk6mJ67DrVNB0POyoXdkgSk9tE9YdjMPhefupYfPU06 ngKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725367485; x=1725972285; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jtF2XzpNvwCWPSdBQNVKvMWy8enXtk6Qcj5ygtYNWL8=; b=pcqrejg7g2rxG+xJlN+ry1ZbZh2CXzcimICHUyOrfa4GLmTxU0Ym9gvbZPbOLno18R ZMzK2aVquSkMB1niIf7KWr0/lu5WGMA26WxwbKDfCSW9nmd17k3EnYRUfdbxrBG/zU5q SWJcFZ/9L2Iog/PFReQCwoT67cFveycOFfquwWdPXfiB9JUIzvsnPQcHVMbqc7RZVUzd uE19rQSBgvp+Cnw+vg0Aik5TC2bVcebIAVPmLHE6eVoAkpxbTI7PUNv31/+MKjjmDkRM EKiqz8cs8FLUkriOy0VptmTZOp6ULmPXUI0VtPgva2ZxiT8sSr9t7h1Zxh4Tq25MAeeC gAcQ== X-Forwarded-Encrypted: i=1; AJvYcCVP7qZNPdQPa5/Nx3IJeRLFoZd3qrQgcBEgouYENLNLAPlWUmkXhNacXD5OJ3L8ntKf4ivB3cPbuM3APQ==@vger.kernel.org, AJvYcCWLbbGr9NudIrm2bnHeBgKnEJtlu/hY9+cLVLjLdIXdM0v03eWVndrj/hHNxAjt4kN+TbUqSm2x36yV@vger.kernel.org, AJvYcCWoBpPGJgqZcbrDkJPX4IsinLq2KX8OnnYdxtHbVCpyrJZDkgHd0mods5kXgh3HcwGS5VPMMIodJkf0esTc@vger.kernel.org X-Gm-Message-State: AOJu0YwGgJBF2AMXXKumNhxL1XM1ZT+RbkZcpO4YBeK+EV+4XGcdiu7I V4pKxJnpFs82GoY6aJ0hbO0o9APnWUfKwQckDI2J4OISgGYDTGrc X-Google-Smtp-Source: AGHT+IHifelMbB8nlq/jYrCCurFiEcS/ANvCz2KJEpBjyDx+Td0kWUSlc3Kf0fC4xJIrsDdw9O09eg== X-Received: by 2002:a17:907:3fa6:b0:a77:cf9d:f495 with SMTP id a640c23a62f3a-a897f9309e2mr1374470466b.40.1725367484762; Tue, 03 Sep 2024 05:44:44 -0700 (PDT) Received: from ivaylo-desktop.. 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[91.139.201.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a8989223199sm678461566b.219.2024.09.03.05.44.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Sep 2024 05:44:44 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Rob Herring Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 08/10] arm64: dts: exynos: Add initial support for exynos8895 SoC Date: Tue, 3 Sep 2024 15:44:27 +0300 Message-Id: <20240903124429.107076-9-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240903124429.107076-1-ivo.ivanov.ivanov1@gmail.com> References: <20240903124429.107076-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Exynos 8895 SoC is an ARMv8 mobile SoC found in the Samsung Galaxy S8 (dreamlte), S8 Plus (dream2lte), Note 8 (greatlte) and the Meizu 15 Plus (m1891). Add minimal support for that SoC, including: - All 8 cores via PSCI - ChipID - Generic ARMV8 Timer - Enumarate all pinctrl nodes The devices using this SoC suffer from an issue caused by the stock Samsung bootloader, as it doesn't configure CNTFRQ_EL0. Hence it's needed to hardcode the adequate frequency in the timer node, otherwise the kernel panics. Further platform support will be added over time. Signed-off-by: Ivaylo Ivanov --- .../boot/dts/exynos/exynos8895-pinctrl.dtsi | 1092 +++++++++++++++++ arch/arm64/boot/dts/exynos/exynos8895.dtsi | 249 ++++ 2 files changed, 1341 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynos8895.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi new file mode 100644 index 000000000..a100cd3fa --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos8895-pinctrl.dtsi @@ -0,0 +1,1092 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung's Exynos 8895 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2024, Ivaylo Ivanov + */ + +#include +#include "exynos-pinctrl.h" + +&pinctrl_alive { + gpa0: gpa0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + }; + + gpa1: gpa1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + }; + + gpa2: gpa2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa3: gpa3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa4: gpa4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + }; + + bt_hostwake: bt-hostwake-pins { + samsung,pins = "gpa2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + uart1_bus: uart1-bus-pins { + samsung,pins = "gpa4-4", "gpa4-3", "gpa4-2", "gpa4-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pcie_wake: pcie_wake-pins { + samsung,pins = "gpa3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + wlan_host_wake: wlan_host_wake-pins { + samsung,pins = "gpa0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; +}; + +&pinctrl_abox { + gph0: gph0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph1: gph1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph3: gph3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_vts { + gph2: gph2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_fsys0 { + gpi0: gpi0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + gpi1: gpi1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins = "gpi0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins = "gpi0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; +}; + +&pinctrl_fsys1 { + gpj1: gpj1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + gpj0: gpj0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + sd2_clk: sd2-clk-pins { + samsung,pins = "gpj0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_cmd: sd2-cmd-pins { + samsung,pins = "gpj0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_bus1: sd2-bus-width1-pins { + samsung,pins = "gpj0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_bus4: sd2-bus-width4-pins { + samsung,pins = "gpj0-3", "gpj0-4", "gpj0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* For Drive strength swapping */ + sd2_clk_fast_slew_rate_1x: sd2-clk_fast_slew_rate_1x-pins { + samsung,pins = "gpj0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_clk_fast_slew_rate_2x: sd2-clk_fast_slew_rate_2x-pins { + samsung,pins = "gpj0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_clk_fast_slew_rate_3x: sd2-clk_fast_slew_rate_3x-pins { + samsung,pins = "gpj0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + sd2_clk_fast_slew_rate_4x: sd2-clk_fast_slew_rate_4x-pins { + samsung,pins = "gpj0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + cfg_wlanen: cfg-wlanen-pins { + samsung,pins = "gpj1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + bt_en: bt-en-pins { + samsung,pins ="gpj1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + bt_btwake: bt-btwake-pins { + samsung,pins = "gpj1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; +}; + +&pinctrl_busc { + gpb2: gpb2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins = "gpb2-1", "gpb2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + speedy_bus: speedy-bus-pins { + samsung,pins = "gpb2-0"; + samsung,pin-function = ; + samsung,pin-con-pdn = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; +}; + +&pinctrl_peric0 { + gpd0: gpd0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd1: gpd1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd2: gpd2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd3: gpd3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe7: gpe7-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + uart0_bus: uart0-bus-pins { + samsung,pins = "gpd0-7", "gpd0-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart2_bus: uart2-bus-pins { + samsung,pins = "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart2_bus_dual: uart2-bus-dual-pins { + samsung,pins = "gpd1-1", "gpd1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart3_bus: uart3-bus-pins { + samsung,pins = "gpd1-7", "gpd1-6", "gpd1-5", "gpd1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart3_bus_dual: uart3-bus-dual-pins { + samsung,pins = "gpd1-5", "gpd1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart4_bus: uart4-bus-pins { + samsung,pins = "gpd2-3", "gpd2-2", "gpd2-1", "gpd2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart4_bus_dual: uart4-bus-dual-pins { + samsung,pins = "gpd2-1", "gpd2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart5_bus: uart5-bus-pins { + samsung,pins = "gpd3-3", "gpd3-2", "gpd3-1", "gpd3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart5_bus_dual: uart5-bus-dual-pins { + samsung,pins = "gpd3-1", "gpd3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + hsi2c5_bus: hsi2c5-bus-pins { + samsung,pins = "gpd1-1", "gpd1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c6_bus: hsi2c6-bus-pins { + samsung,pins = "gpd1-3", "gpd1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c7_bus: hsi2c7-bus-pins { + samsung,pins = "gpd1-5", "gpd1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c8_bus: hsi2c8-bus-pins { + samsung,pins = "gpd1-7", "gpd1-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c9_bus: hsi2c9-bus-pins { + samsung,pins = "gpd2-1", "gpd2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c10_bus: hsi2c10-bus-pins { + samsung,pins = "gpd2-3", "gpd2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c11_bus: hsi2c11-bus-pins { + samsung,pins = "gpd3-1", "gpd3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c12_bus: hsi2c12-bus-pins { + samsung,pins = "gpd3-3", "gpd3-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hs_i2c14_bus: hs-i2c14-bus-pins { + samsung,pins = "gpe6-3", "gpe6-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi2_bus: spi2-bus-pins { + samsung,pins = "gpd1-3", "gpd1-2", "gpd1-1", "gpd1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi2_cs: spi2-cs-pins { + samsung,pins = "gpd1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi3_bus: spi3-bus-pins { + samsung,pins = "gpd1-7", "gpd1-5", "gpd1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi3_cs: spi3-cs-pins { + samsung,pins = "gpd1-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi4_bus: spi4-bus-pins { + samsung,pins = "gpd2-3", "gpd2-1", "gpd2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi4_cs: spi4-cs-pins { + samsung,pins = "gpd2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi5_bus: spi5-bus-pins { + samsung,pins = "gpd3-3", "gpd3-1", "gpd3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi5_cs: spi5-cs-pins { + samsung,pins = "gpd3-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; +}; + +&pinctrl_peric1 { + gpb0: gpb0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc0: gpc0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc1: gpc1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc2: gpc2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc3: gpc3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk0: gpk0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe5: gpe5-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe6: gpe6-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe2: gpe2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe3: gpe3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe4: gpe4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf0: gpf0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe1: gpe1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + uart6_bus: uart6-bus-pins { + samsung,pins = "gpe5-3", "gpe5-2", "gpe5-1", "gpe5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart6_bus_dual: uart6-bus-dual-pins { + samsung,pins = "gpe5-1", "gpe5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart7_bus: uart7-bus-pins { + samsung,pins = "gpe1-3", "gpe1-2", "gpe1-1", "gpe1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart7_bus_dual: uart7-bus-dual-pins { + samsung,pins = "gpe1-1", "gpe1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart8_bus: uart8-bus-pins { + samsung,pins = "gpe1-7", "gpe1-6", "gpe1-5", "gpe1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart8_bus_dual: uart8-bus-dual-pins { + samsung,pins = "gpe1-5", "gpe1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart9_bus: uart9-bus-pins { + samsung,pins = "gpe2-3", "gpe2-2", "gpe2-1", "gpe2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart9_bus_dual: uart9-bus-dual-pins { + samsung,pins = "gpe2-1", "gpe2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart10_bus: uart10-bus-pins { + samsung,pins = "gpe2-7", "gpe2-6", "gpe2-5", "gpe2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart10_bus_dual: uart10-bus-dual-pins { + samsung,pins = "gpe2-5", "gpe2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart11_bus: uart11-bus-pins { + samsung,pins = "gpe3-3", "gpe3-2", "gpe3-1", "gpe3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart11_bus_dual: uart11-bus-dual-pins { + samsung,pins = "gpe3-1", "gpe3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart12_bus: uart12-bus-pins { + samsung,pins = "gpe3-7", "gpe3-6", "gpe3-5", "gpe3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart12_bus_dual: uart12-bus-dual-pins { + samsung,pins = "gpe3-5", "gpe3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart13_bus: uart13-bus-pins { + samsung,pins = "gpe4-3", "gpe4-2", "gpe4-1", "gpe4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart13_bus_dual: uart13-bus-dual-pins { + samsung,pins = "gpe4-1", "gpe4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart14_bus: uart14-bus-pins { + samsung,pins = "gpe4-7", "gpe4-6", "gpe4-5", "gpe4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart14_bus_dual: uart14-bus-dual-pins { + samsung,pins = "gpe4-5", "gpe4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart15_bus: uart15-bus-pins { + samsung,pins = "gpe5-7", "gpe5-6", "gpe5-5", "gpe5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart15_bus_dual: uart15-bus-dual-pins { + samsung,pins = "gpe5-5", "gpe5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins = "gpc2-1", "gpc2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c2_bus: hsi2c2-bus-pins { + samsung,pins = "gpc2-3", "gpc2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c3_bus: hsi2c3-bus-pins { + samsung,pins = "gpc2-5", "gpc2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c4_bus: hsi2c4-bus-pins { + samsung,pins = "gpc2-7", "gpc2-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c13_bus: hsi2c13-bus-pins { + samsung,pins = "gpe5-1", "gpe5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c14_bus: hsi2c14-bus-pins { + samsung,pins = "gpe5-3", "gpe5-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c15_bus: hsi2c15-bus-pins { + samsung,pins = "gpe1-1", "gpe1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c16_bus: hsi2c16-bus-pins { + samsung,pins = "gpe1-3", "gpe1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c17_bus: hsi2c17-bus-pins { + samsung,pins = "gpe1-5", "gpe1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c18_bus: hsi2c18-bus-pins { + samsung,pins = "gpe1-7", "gpe1-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c19_bus: hsi2c19-bus-pins { + samsung,pins = "gpe2-1", "gpe2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c20_bus: hsi2c20-bus-pins { + samsung,pins = "gpe2-3", "gpe2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c21_bus: hsi2c21-bus-pins { + samsung,pins = "gpe2-5", "gpe2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c22_bus: hsi2c22-bus-pins { + samsung,pins = "gpe2-7", "gpe2-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c23_bus: hsi2c23-bus-pins { + samsung,pins = "gpe3-1", "gpe3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c24_bus: hsi2c24-bus-pins { + samsung,pins = "gpe3-3", "gpe3-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c25_bus: hsi2c25-bus-pins { + samsung,pins = "gpe3-5", "gpe3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c26_bus: hsi2c26-bus-pins { + samsung,pins = "gpe3-7", "gpe3-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c27_bus: hsi2c27-bus-pins { + samsung,pins = "gpe4-1", "gpe4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c28_bus: hsi2c28-bus-pins { + samsung,pins = "gpe4-3", "gpe4-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c29_bus: hsi2c29-bus-pins { + samsung,pins = "gpe4-5", "gpe4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c30_bus: hsi2c30-bus-pins { + samsung,pins = "gpe4-7", "gpe4-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c31_bus: hsi2c31-bus-pins { + samsung,pins = "gpe5-5", "gpe5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hsi2c32_bus: hsi2c32-bus-pins { + samsung,pins = "gpe5-7", "gpe5-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi0_bus: spi0-bus-pins { + samsung,pins = "gpc3-3", "gpc3-2", "gpc3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi0_cs: spi0-cs-pins { + samsung,pins = "gpc3-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi1_bus: spi1-bus-pins { + samsung,pins = "gpc3-7", "gpc3-6", "gpc3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi1_cs: spi1-cs-pins { + samsung,pins = "gpc3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_bus: spi6-bus-pins { + samsung,pins = "gpe5-3", "gpe5-1", "gpe5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_cs: spi6-cs-pins { + samsung,pins = "gpe5-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_bus: spi7-bus-pins { + samsung,pins = "gpe1-3", "gpe1-1", "gpe1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_cs: spi7-cs-pins { + samsung,pins = "gpe1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_bus: spi8-bus-pins { + samsung,pins = "gpe1-7", "gpe1-5", "gpe1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_cs: spi8-cs-pins { + samsung,pins = "gpe1-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_bus: spi9-bus-pins { + samsung,pins = "gpe2-3", "gpe2-1", "gpe2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_cs: spi9-cs-pins { + samsung,pins = "gpe2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_bus: spi10-bus-pins { + samsung,pins = "gpe2-7", "gpe2-5", "gpe2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_cs: spi10-cs-pins { + samsung,pins = "gpe2-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_bus: spi11-bus-pins { + samsung,pins = "gpe3-3", "gpe3-1", "gpe3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_cs: spi11-cs-pins { + samsung,pins = "gpe3-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi12_bus: spi12-bus-pins { + samsung,pins = "gpe3-7", "gpe3-5", "gpe3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi12_cs: spi12-cs-pins { + samsung,pins = "gpe3-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi13_bus: spi13-bus-pins { + samsung,pins = "gpe4-3", "gpe4-1", "gpe4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi13_cs: spi13-cs-pins { + samsung,pins = "gpe4-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi14_bus: spi14-bus-pins { + samsung,pins = "gpe4-7", "gpe4-5", "gpe4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi14_cs: spi14-cs-pins { + samsung,pins = "gpe4-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi15_bus: spi15-bus-pins { + samsung,pins = "gpe5-7", "gpe5-5", "gpe5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi15_cs: spi15-cs-pins { + samsung,pins = "gpe5-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + hrm_irq: hrm-irq-pins { + samsung,pins = "gpe6-6"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi new file mode 100644 index 000000000..ec3659789 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi @@ -0,0 +1,249 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung's Exynos 8895 SoC device tree source + * + * Copyright (c) 2024, Ivaylo Ivanov + */ + +#include + +/ { + compatible = "samsung,exynos8895"; + #address-cells = <2>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + aliases { + pinctrl0 = &pinctrl_alive; + pinctrl1 = &pinctrl_abox; + pinctrl2 = &pinctrl_vts; + pinctrl3 = &pinctrl_fsys0; + pinctrl4 = &pinctrl_fsys1; + pinctrl5 = &pinctrl_busc; + pinctrl6 = &pinctrl_peric0; + pinctrl7 = &pinctrl_peric1; + }; + + arm-a53-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; + }; + + /* There's no PMU model for the Mongoose cores */ + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu0: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x100>; + enable-method = "psci"; + }; + + cpu1: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x101>; + enable-method = "psci"; + }; + + cpu2: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x102>; + enable-method = "psci"; + }; + + cpu3: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x103>; + enable-method = "psci"; + }; + + cpu4: cpu@0 { + device_type = "cpu"; + compatible = "samsung,mongoose-m2"; + reg = <0x0>; + enable-method = "psci"; + }; + + cpu5: cpu@1 { + device_type = "cpu"; + compatible = "samsung,mongoose-m2"; + reg = <0x1>; + enable-method = "psci"; + }; + + cpu6: cpu@2 { + device_type = "cpu"; + compatible = "samsung,mongoose-m2"; + reg = <0x2>; + enable-method = "psci"; + }; + + cpu7: cpu@3 { + device_type = "cpu"; + compatible = "samsung,mongoose-m2"; + reg = <0x3>; + enable-method = "psci"; + }; + }; + + oscclk: osc-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "oscclk"; + }; + + psci { + compatible = "arm,psci"; + method = "smc"; + cpu_suspend = <0xc4000001>; + cpu_off = <0x84000002>; + cpu_on = <0xc4000003>; + }; + + timer { + compatible = "arm,armv8-timer"; + /* Hypervisor Virtual Timer interrupt is not wired to GIC */ + interrupts = , + , + , + ; + /* + * Non-updatable, broken stock Samsung bootloader does not + * configure CNTFRQ_EL0 + */ + clock-frequency = <26000000>; + }; + + soc: soc@0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0x20000000>; + + chipid@10000000 { + compatible = "samsung,exynos8895-chipid", + "samsung,exynos850-chipid"; + reg = <0x10000000 0x24>; + }; + + gic: interrupt-controller@10200000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x10201000 0x1000>, + <0x10202000 0x1000>, + <0x10204000 0x2000>, + <0x10206000 0x2000>; + interrupts = ; + }; + + pinctrl_peric0: pinctrl@104d0000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x104d0000 0x1000>; + interrupts = ; + }; + + pinctrl_peric1: pinctrl@10980000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x10980000 0x1000>; + interrupts = ; + }; + + pinctrl_fsys0: pinctrl@11050000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x11050000 0x1000>; + interrupts = ; + }; + + pinctrl_fsys1: pinctrl@11430000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x11430000 0x1000>; + interrupts = ; + }; + + pinctrl_abox: pinctrl@13e60000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x13e60000 0x1000>; + }; + + pinctrl_vts: pinctrl@14080000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x14080000 0x1000>; + }; + + pinctrl_busc: pinctrl@15a30000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x15a30000 0x1000>; + interrupts = ; + }; + + pmu_system_controller: system-controller@16480000 { + compatible = "samsung,exynos8895-pmu", + "samsung,exynos7-pmu", "syscon"; + reg = <0x16480000 0x10000>; + }; + + pinctrl_alive: pinctrl@164b0000 { + compatible = "samsung,exynos8895-pinctrl"; + reg = <0x164b0000 0x1000>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos8895-wakeup-eint", + "samsung,exynos7-wakeup-eint"; + interrupt-parent = <&gic>; + interrupts = ; + }; + }; + }; +}; + +#include "exynos8895-pinctrl.dtsi" +#include "arm/samsung/exynos-syscon-restart.dtsi"