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Those cards support capacity larger than 2TB and up to including 128TB. ACMD41 was extended to support the host-card handshake during initialization. The card expects that the HCS & HO2T bits to be set in the command argument, and sets the applicable bits in the R3 returned response. On the contrary, if a SDUC card is inserted to a non-supporting host, it will never respond to this ACMD41 until eventually, the host will timed out and give up. Also, add SD CSD version 3.0 - designated for SDUC, and properly parse the csd register as the c_size field got expanded to 28 bits. Do not enable SDUC for now - leave it to the last patch in the series. Tested-by: Ricky WU Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/bus.c | 4 +++- drivers/mmc/core/card.h | 3 +++ drivers/mmc/core/sd.c | 28 +++++++++++++++++----------- drivers/mmc/core/sd.h | 2 +- drivers/mmc/core/sdio.c | 2 +- include/linux/mmc/card.h | 2 +- include/linux/mmc/sd.h | 1 + 7 files changed, 27 insertions(+), 15 deletions(-) diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c index 0ddaee0eae54..30763b342bd3 100644 --- a/drivers/mmc/core/bus.c +++ b/drivers/mmc/core/bus.c @@ -321,7 +321,9 @@ int mmc_add_card(struct mmc_card *card) case MMC_TYPE_SD: type = "SD"; if (mmc_card_blockaddr(card)) { - if (mmc_card_ext_capacity(card)) + if (mmc_card_ult_capacity(card)) + type = "SDUC"; + else if (mmc_card_ext_capacity(card)) type = "SDXC"; else type = "SDHC"; diff --git a/drivers/mmc/core/card.h b/drivers/mmc/core/card.h index b7754a1b8d97..64dcb463a4f4 100644 --- a/drivers/mmc/core/card.h +++ b/drivers/mmc/core/card.h @@ -23,6 +23,7 @@ #define MMC_CARD_SDXC (1<<3) /* card is SDXC */ #define MMC_CARD_REMOVED (1<<4) /* card has been removed */ #define MMC_STATE_SUSPENDED (1<<5) /* card is suspended */ +#define MMC_CARD_SDUC (1<<6) /* card is SDUC */ #define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) #define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) @@ -30,11 +31,13 @@ #define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC) #define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED)) #define mmc_card_suspended(c) ((c)->state & MMC_STATE_SUSPENDED) +#define mmc_card_ult_capacity(c) ((c)->state & MMC_CARD_SDUC) #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR) #define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC) +#define mmc_card_set_ult_capacity(c) ((c)->state |= MMC_CARD_SDUC) #define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED) #define mmc_card_set_suspended(c) ((c)->state |= MMC_STATE_SUSPENDED) #define mmc_card_clr_suspended(c) ((c)->state &= ~MMC_STATE_SUSPENDED) diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 12fe282bea77..1d09f0f2e769 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -100,7 +100,7 @@ void mmc_decode_cid(struct mmc_card *card) /* * Given a 128-bit response, decode to our card CSD structure. */ -static int mmc_decode_csd(struct mmc_card *card) +static int mmc_decode_csd(struct mmc_card *card, bool is_sduc) { struct mmc_csd *csd = &card->csd; unsigned int e, m, csd_struct; @@ -144,9 +144,10 @@ static int mmc_decode_csd(struct mmc_card *card) mmc_card_set_readonly(card); break; case 1: + case 2: /* - * This is a block-addressed SDHC or SDXC card. Most - * interesting fields are unused and have fixed + * This is a block-addressed SDHC, SDXC or SDUC card. + * Most interesting fields are unused and have fixed * values. To avoid getting tripped by buggy cards, * we assume those fixed values ourselves. */ @@ -159,14 +160,19 @@ static int mmc_decode_csd(struct mmc_card *card) e = unstuff_bits(resp, 96, 3); csd->max_dtr = tran_exp[e] * tran_mant[m]; csd->cmdclass = unstuff_bits(resp, 84, 12); - csd->c_size = unstuff_bits(resp, 48, 22); - /* SDXC cards have a minimum C_SIZE of 0x00FFFF */ - if (csd->c_size >= 0xFFFF) + if (csd_struct == 1) + m = unstuff_bits(resp, 48, 22); + else + m = unstuff_bits(resp, 48, 28); + csd->c_size = m; + + if (csd->c_size >= 0x400000 && is_sduc) + mmc_card_set_ult_capacity(card); + else if (csd->c_size >= 0xFFFF) mmc_card_set_ext_capacity(card); - m = unstuff_bits(resp, 48, 22); - csd->capacity = (1 + m) << 10; + csd->capacity = (1 + (typeof(sector_t))m) << 10; csd->read_blkbits = 9; csd->read_partial = 0; @@ -876,7 +882,7 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr) return err; } -int mmc_sd_get_csd(struct mmc_card *card) +int mmc_sd_get_csd(struct mmc_card *card, bool is_sduc) { int err; @@ -887,7 +893,7 @@ int mmc_sd_get_csd(struct mmc_card *card) if (err) return err; - err = mmc_decode_csd(card); + err = mmc_decode_csd(card, is_sduc); if (err) return err; @@ -1442,7 +1448,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, } if (!oldcard) { - err = mmc_sd_get_csd(card); + err = mmc_sd_get_csd(card, false); if (err) goto free_card; diff --git a/drivers/mmc/core/sd.h b/drivers/mmc/core/sd.h index fe6dd46927a4..7e8beface2ca 100644 --- a/drivers/mmc/core/sd.h +++ b/drivers/mmc/core/sd.h @@ -10,7 +10,7 @@ struct mmc_host; struct mmc_card; int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr); -int mmc_sd_get_csd(struct mmc_card *card); +int mmc_sd_get_csd(struct mmc_card *card, bool is_sduc); void mmc_decode_cid(struct mmc_card *card); int mmc_sd_setup_card(struct mmc_host *host, struct mmc_card *card, bool reinit); diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c index 4fb247fde5c0..9566837c9848 100644 --- a/drivers/mmc/core/sdio.c +++ b/drivers/mmc/core/sdio.c @@ -769,7 +769,7 @@ static int mmc_sdio_init_card(struct mmc_host *host, u32 ocr, * Read CSD, before selecting the card */ if (!oldcard && mmc_card_sd_combo(card)) { - err = mmc_sd_get_csd(card); + err = mmc_sd_get_csd(card, false); if (err) goto remove; diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index f34407cc2788..f39bce322365 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -35,7 +35,7 @@ struct mmc_csd { unsigned int wp_grp_size; unsigned int read_blkbits; unsigned int write_blkbits; - unsigned int capacity; + sector_t capacity; unsigned int read_partial:1, read_misalign:1, write_partial:1, diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h index 6727576a8755..865cc0ca8543 100644 --- a/include/linux/mmc/sd.h +++ b/include/linux/mmc/sd.h @@ -36,6 +36,7 @@ /* OCR bit definitions */ #define SD_OCR_S18R (1 << 24) /* 1.8V switching request */ #define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */ +#define SD_OCR_2T (1 << 27) /* HO2T/CO2T - SDUC support */ #define SD_OCR_XPC (1 << 28) /* SDXC power control */ #define SD_OCR_CCS (1 << 30) /* Card Capacity Status */ From patchwork Sun Sep 8 10:20:10 2024 Content-Type: text/plain; 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08 Sep 2024 03:22:10 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v7 02/10] mmc: sd: Add Extension memory addressing Date: Sun, 8 Sep 2024 13:20:10 +0300 Message-Id: <20240908102018.3711527-3-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240908102018.3711527-1-avri.altman@wdc.com> References: <20240908102018.3711527-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SDUC memory addressing spans beyond 2TB and up to 128TB. Therefore, 38 bits are required to access the entire memory space of all sectors. Those extra 6 bits are to be carried by CMD22 prior of sending read/write/erase commands: CMD17, CMD18, CMD24, CMD25, CMD32, and CMD33. CMD22 will carry the higher order 6 bits, and must precedes any of the above commands even if it targets sector < 2TB. No error related to address or length is indicated in CMD22 but rather in the read/write command itself. Tested-by: Ricky WU Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/sd_ops.c | 16 ++++++++++++++++ drivers/mmc/core/sd_ops.h | 1 + include/linux/mmc/sd.h | 3 +++ 3 files changed, 20 insertions(+) diff --git a/drivers/mmc/core/sd_ops.c b/drivers/mmc/core/sd_ops.c index f93c392040ae..bb83db85a689 100644 --- a/drivers/mmc/core/sd_ops.c +++ b/drivers/mmc/core/sd_ops.c @@ -16,6 +16,7 @@ #include #include "core.h" +#include "card.h" #include "sd_ops.h" #include "mmc_ops.h" @@ -188,6 +189,21 @@ int mmc_send_app_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr) return 0; } +int mmc_send_ext_addr(struct mmc_host *host, u32 addr) +{ + struct mmc_command cmd = { + .opcode = SD_ADDR_EXT, + .arg = addr, + .flags = MMC_RSP_R1 | MMC_CMD_AC, + }; + + if (!mmc_card_ult_capacity(host->card)) + return 0; + + return mmc_wait_for_cmd(host, &cmd, 0); +} +EXPORT_SYMBOL_GPL(mmc_send_ext_addr); + static int __mmc_send_if_cond(struct mmc_host *host, u32 ocr, u8 pcie_bits, u32 *resp) { diff --git a/drivers/mmc/core/sd_ops.h b/drivers/mmc/core/sd_ops.h index 7667fc223b74..fd3f10b9cf86 100644 --- a/drivers/mmc/core/sd_ops.h +++ b/drivers/mmc/core/sd_ops.h @@ -21,6 +21,7 @@ int mmc_send_relative_addr(struct mmc_host *host, unsigned int *rca); int mmc_app_send_scr(struct mmc_card *card); int mmc_app_sd_status(struct mmc_card *card, void *ssr); int mmc_app_cmd(struct mmc_host *host, struct mmc_card *card); +int mmc_send_ext_addr(struct mmc_host *host, u32 addr); #endif diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h index 865cc0ca8543..af5fc70e09a2 100644 --- a/include/linux/mmc/sd.h +++ b/include/linux/mmc/sd.h @@ -15,6 +15,9 @@ #define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */ #define SD_SWITCH_VOLTAGE 11 /* ac R1 */ +/* Class 2 */ +#define SD_ADDR_EXT 22 /* ac [5:0] R1 */ + /* class 10 */ #define SD_SWITCH 6 /* adtc [31:0] See below R1 */ From patchwork Sun Sep 8 10:20:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 826795 Received: from esa4.hgst.iphmx.com (esa4.hgst.iphmx.com [216.71.154.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED06A14F9F3 for ; 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d="scan'208";a="25553869" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 08 Sep 2024 18:22:17 +0800 IronPort-SDR: 66dd6dfd_L9xZgLjT18Ui1oxodvWyxPiPeYKJGPCffI6GYK0Hs9qIz4A w21+O4kI7M+5SwyX+8SMD7QlTTr74r/NnDFA3Vg== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 02:27:26 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 03:22:15 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v7 03/10] mmc: core: Don't use close-ended rw for SDUC Date: Sun, 8 Sep 2024 13:20:11 +0300 Message-Id: <20240908102018.3711527-4-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240908102018.3711527-1-avri.altman@wdc.com> References: <20240908102018.3711527-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The SDUC spec expects CMD22 to get squeezed between CMD23 and the read/write command, e.g. CMD23->CMD22->CMD18 and CMD23->CMD22->CMD25. At this early stage of adoption, we want to avoid an amid stream of fixes & quirks of bogus hw, that tends to apply extra logic specifically around auto-cmd12 & auto-cmd23. Let's leave close-ended out for now, and re-consider this should those cards become ubiquitous, if any. Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index f58bea534004..05a7745c2a68 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -2547,7 +2547,7 @@ static struct mmc_blk_data *mmc_blk_alloc_req(struct mmc_card *card, if (mmc_host_cmd23(card->host)) { if ((mmc_card_mmc(card) && card->csd.mmca_vsn >= CSD_SPEC_VER_3) || - (mmc_card_sd(card) && + (mmc_card_sd(card) && !mmc_card_ult_capacity(card) && card->scr.cmds & SD_SCR_CMD23_SUPPORT)) md->flags |= MMC_BLK_CMD23; } From patchwork Sun Sep 8 10:20:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 826519 Received: from esa4.hgst.iphmx.com (esa4.hgst.iphmx.com [216.71.154.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43A0A14F9F3 for ; Sun, 8 Sep 2024 10:22:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725790942; cv=none; b=V606R/t2bQrNTRt/WJfFAruuZHY9bKFzHiGHI+hqfthB0WPoT2ZsIavaOoTVkwCd+I9RjXXMnz6AVhpCoNOCtFMSYIdJYuGc1ltLWHYxJdGr31CbI+/sKgcpsOFt6FYe9pU9RxrPcsUR8bguEO7pyeUYKMH9K3PVCwQ+Qmg9n0w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725790942; c=relaxed/simple; bh=V0H1R/07QQ0AdlV4nx+kg5YIDmVJWtgRKA8iwpqbBIc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=loGGMSpC9LL1AWxoYiLsp2nhJWn/nlcczyHkTjtq3t3F37NaidtSDUxFsTA/Wc9s/my63H9XAHzJB0823w0QYkZn8aMMF6++u1eW9mPgJazGVDts0UfBoFeM6H8Z/VguyOX3IlUNEKeZ3y0/4GCLQ71GntcZXPelIGXXOJiXi/A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=hsP/TXLa; arc=none smtp.client-ip=216.71.154.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="hsP/TXLa" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1725790941; x=1757326941; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=V0H1R/07QQ0AdlV4nx+kg5YIDmVJWtgRKA8iwpqbBIc=; b=hsP/TXLaNGDMo31ThPwdy3PcigFLGIgOhPZLrerzXdfdBWqcGm1tK+fN qFqWPlyE7FN9wgbaZTN31L9UoNHwqdvtTCyU8wNyg2J3gt7/SPvtj1/G6 3FSyj8UmibiM7jQV1vRvgmAZI3eGbhjbbF1W9N170JwJBsxXAFIjaxEzT aMx/gdqrZAALG6j9ab/wkOO2YjM7C6TKiH4w+nVOXoGa9S3wbn/9QwPnw 1g0Qzug08AjXk7CvTG8OeyRyC+PwDGzLiuNoNICKGoQLtVbx59GjhdCrp uXvesgVGrqrI9SGqz27oD2rnnnYtceRPwqxiMi4jCUbWnOD3AZ80SXNjd Q==; X-CSE-ConnectionGUID: ON2Sf1EwQAGYDwde8+5vOg== X-CSE-MsgGUID: uTNKOudKRgajxvyUcYXxAw== X-IronPort-AV: E=Sophos;i="6.10,212,1719849600"; d="scan'208";a="25553873" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 08 Sep 2024 18:22:21 +0800 IronPort-SDR: 66dd6e01_AvhU7/i8qrr40r4khOEk8lLqAuSzldxgrbtjkjjycMA+d0+ LzaDM00QcBTCyF/72sqjln2VsJgHTFOqgY0u51Q== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 02:27:30 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 03:22:19 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v7 04/10] mmc: core: Add open-ended Ext memory addressing Date: Sun, 8 Sep 2024 13:20:12 +0300 Message-Id: <20240908102018.3711527-5-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240908102018.3711527-1-avri.altman@wdc.com> References: <20240908102018.3711527-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 For open-ended read/write - just send CMD22 before issuing the command. Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 5 +++++ drivers/mmc/core/core.c | 3 +++ include/linux/mmc/core.h | 5 +++++ 3 files changed, 13 insertions(+) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 05a7745c2a68..ba2ed413be5c 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -1759,6 +1759,11 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, brq->sbc.flags = MMC_RSP_R1 | MMC_CMD_AC; brq->mrq.sbc = &brq->sbc; } + + if (mmc_card_ult_capacity(card)) { + brq->cmd.ext_addr = blk_rq_pos(req) >> 32; + brq->cmd.has_ext_addr = true; + } } #define MMC_MAX_RETRIES 5 diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index d6c819dd68ed..a0b2999684b3 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -336,6 +336,9 @@ int mmc_start_request(struct mmc_host *host, struct mmc_request *mrq) { int err; + if (mrq->cmd && mrq->cmd->has_ext_addr) + mmc_send_ext_addr(host, mrq->cmd->ext_addr); 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d="scan'208";a="25553875" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 08 Sep 2024 18:22:25 +0800 IronPort-SDR: 66dd6e06_EEQxyOyGn5jlRS/lf/UHjFyEdcQ0pxMxugtkgrxmTLTZLXX XVOtKKkJfuehoHqzmFx4/yx4MIKOZPnWtlOu81g== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 02:27:34 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 03:22:23 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v7 05/10] mmc: core: Allow mmc erase to carry large addresses Date: Sun, 8 Sep 2024 13:20:13 +0300 Message-Id: <20240908102018.3711527-6-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240908102018.3711527-1-avri.altman@wdc.com> References: <20240908102018.3711527-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Preparing for SDUC, Allow the erase address to be larger beyond a 32 bit address. Tested-by: Ricky WU Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 6 ++++-- drivers/mmc/core/core.c | 33 ++++++++++++++++++--------------- drivers/mmc/core/core.h | 16 ++++++++++++---- 3 files changed, 34 insertions(+), 21 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index ba2ed413be5c..308d7c1dd0b0 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -1199,7 +1199,8 @@ static void mmc_blk_issue_erase_rq(struct mmc_queue *mq, struct request *req, { struct mmc_blk_data *md = mq->blkdata; struct mmc_card *card = md->queue.card; - unsigned int from, nr; + unsigned int nr; + sector_t from; int err = 0; blk_status_t status = BLK_STS_OK; @@ -1254,7 +1255,8 @@ static void mmc_blk_issue_secdiscard_rq(struct mmc_queue *mq, { struct mmc_blk_data *md = mq->blkdata; struct mmc_card *card = md->queue.card; - unsigned int from, nr, arg; + unsigned int nr, arg; + sector_t from; int err = 0, type = MMC_BLK_SECDISCARD; blk_status_t status = BLK_STS_OK; diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index a0b2999684b3..06f63fbaadfb 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -1601,8 +1601,8 @@ static unsigned int mmc_erase_timeout(struct mmc_card *card, return mmc_mmc_erase_timeout(card, arg, qty); } -static int mmc_do_erase(struct mmc_card *card, unsigned int from, - unsigned int to, unsigned int arg) +static int mmc_do_erase(struct mmc_card *card, sector_t from, + sector_t to, unsigned int arg) { struct mmc_command cmd = {}; unsigned int qty = 0, busy_timeout = 0; @@ -1633,8 +1633,8 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, else if (mmc_card_sd(card)) qty += to - from + 1; else - qty += ((to / card->erase_size) - - (from / card->erase_size)) + 1; + qty += (mmc_sector_div(to, card->erase_size) - + mmc_sector_div(from, card->erase_size)) + 1; if (!mmc_card_blockaddr(card)) { from <<= 9; @@ -1703,18 +1703,19 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, } static unsigned int mmc_align_erase_size(struct mmc_card *card, - unsigned int *from, - unsigned int *to, + sector_t *from, + sector_t *to, unsigned int nr) { - unsigned int from_new = *from, nr_new = nr, rem; + sector_t from_new = *from; + unsigned int nr_new = nr, rem; /* * When the 'card->erase_size' is power of 2, we can use round_up/down() * to align the erase size efficiently. */ if (is_power_of_2(card->erase_size)) { - unsigned int temp = from_new; + sector_t temp = from_new; from_new = round_up(temp, card->erase_size); rem = from_new - temp; @@ -1726,7 +1727,7 @@ static unsigned int mmc_align_erase_size(struct mmc_card *card, nr_new = round_down(nr_new, card->erase_size); } else { - rem = from_new % card->erase_size; + rem = mmc_sector_mod(from_new, card->erase_size); if (rem) { rem = card->erase_size - rem; from_new += rem; @@ -1759,10 +1760,12 @@ static unsigned int mmc_align_erase_size(struct mmc_card *card, * * Caller must claim host before calling this function. */ -int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, +int mmc_erase(struct mmc_card *card, sector_t from, unsigned int nr, unsigned int arg) { - unsigned int rem, to = from + nr; + unsigned int rem; + sector_t to = from + nr; + int err; if (!(card->csd.cmdclass & CCC_ERASE)) @@ -1783,7 +1786,7 @@ int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, return -EOPNOTSUPP; if (arg == MMC_SECURE_ERASE_ARG) { - if (from % card->erase_size || nr % card->erase_size) + if (mmc_sector_mod(from, card->erase_size) || nr % card->erase_size) return -EINVAL; } @@ -1807,7 +1810,7 @@ int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, * and call mmc_do_erase() twice if necessary. This special case is * identified by the card->eg_boundary flag. */ - rem = card->erase_size - (from % card->erase_size); + rem = card->erase_size - mmc_sector_mod(from, card->erase_size); if ((arg & MMC_TRIM_OR_DISCARD_ARGS) && card->eg_boundary && nr > rem) { err = mmc_do_erase(card, from, from + rem - 1, arg); from += rem; @@ -1866,12 +1869,12 @@ int mmc_can_secure_erase_trim(struct mmc_card *card) } EXPORT_SYMBOL(mmc_can_secure_erase_trim); -int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, +int mmc_erase_group_aligned(struct mmc_card *card, sector_t from, unsigned int nr) { if (!card->erase_size) return 0; - if (from % card->erase_size || nr % card->erase_size) + if (mmc_sector_mod(from, card->erase_size) || nr % card->erase_size) return 0; return 1; } diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h index 37091a6589ed..fc9d5e9620b1 100644 --- a/drivers/mmc/core/core.h +++ b/drivers/mmc/core/core.h @@ -116,15 +116,13 @@ bool mmc_is_req_done(struct mmc_host *host, struct mmc_request *mrq); int mmc_start_request(struct mmc_host *host, struct mmc_request *mrq); -int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, - unsigned int arg); +int mmc_erase(struct mmc_card *card, sector_t from, unsigned int nr, unsigned int arg); int mmc_can_erase(struct mmc_card *card); int mmc_can_trim(struct mmc_card *card); int mmc_can_discard(struct mmc_card *card); int mmc_can_sanitize(struct mmc_card *card); int mmc_can_secure_erase_trim(struct mmc_card *card); -int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, - unsigned int nr); +int mmc_erase_group_aligned(struct mmc_card *card, sector_t from, unsigned int nr); unsigned int mmc_calc_max_discard(struct mmc_card *card); int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen); @@ -199,4 +197,14 @@ static inline int mmc_flush_cache(struct mmc_host *host) return 0; } +static inline unsigned int mmc_sector_div(sector_t dividend, u32 divisor) +{ + return div_u64(dividend, divisor); +} + +static inline unsigned int mmc_sector_mod(sector_t dividend, u32 divisor) +{ + return sector_div(dividend, divisor); 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08 Sep 2024 03:22:28 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v7 06/10] mmc: core: Add Ext memory addressing for erase Date: Sun, 8 Sep 2024 13:20:14 +0300 Message-Id: <20240908102018.3711527-7-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240908102018.3711527-1-avri.altman@wdc.com> References: <20240908102018.3711527-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 CMD22 shall precede CMD32 and CMD33 to configure 38-bit erase start address and 38 bit erase stop address. Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/core.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index 06f63fbaadfb..01a7142eada3 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -1647,6 +1647,12 @@ static int mmc_do_erase(struct mmc_card *card, sector_t from, cmd.opcode = MMC_ERASE_GROUP_START; cmd.arg = from; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; + + if (mmc_card_ult_capacity(card)) { + cmd.ext_addr = from >> 32; + cmd.has_ext_addr = true; + } + err = mmc_wait_for_cmd(card->host, &cmd, 0); if (err) { pr_err("mmc_erase: group start error %d, " @@ -1662,6 +1668,12 @@ static int mmc_do_erase(struct mmc_card *card, sector_t from, cmd.opcode = MMC_ERASE_GROUP_END; cmd.arg = to; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_AC; + + if (mmc_card_ult_capacity(card)) { + cmd.ext_addr = to >> 32; + cmd.has_ext_addr = true; + } + err = mmc_wait_for_cmd(card->host, &cmd, 0); if (err) { pr_err("mmc_erase: group end error %d, status %#x\n", From patchwork Sun Sep 8 10:20:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 826793 Received: from esa4.hgst.iphmx.com (esa4.hgst.iphmx.com [216.71.154.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 512626F06B for ; Sun, 8 Sep 2024 10:22:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725790957; cv=none; b=EW9+oHSu8WmO7SdVZrWp+x0/vGXUrhqPXcStU3WMRlUEzwkqznDF2ybfOXmjNHBJYuGtcNQE1CEYyMx5pSdSS/rIhDUpksknHqf6T2nHxmEAGxKh1In/BTKKzvsNS2b1bjcgvXmozuAehGktfWRcmb7xVM/oSSj8iRZV9vJ8KZA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725790957; c=relaxed/simple; bh=1JaQc5SS+ZS0y2N+fbsd3RSuH7ReLEBD3nAnCl1NFFA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Xakdr4iGTCicf4PG6btnk9icKlYlulcTRBrlrv+8VKvur0ipGfk6pX0n44mdJ6qs5T2nAZEyn0RZ9ObRNyVz9yXsSwT0b1crsbkoK4HQsKZikmOvDnb+TzMG09Pj7AGQPQtfD61N1LyJIHdRAmuhtN/SVACL43RHHSWeamq/BLg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=h4u0Hixx; arc=none smtp.client-ip=216.71.154.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="h4u0Hixx" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1725790955; x=1757326955; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1JaQc5SS+ZS0y2N+fbsd3RSuH7ReLEBD3nAnCl1NFFA=; b=h4u0HixxuH2/KTxlIsBTVxBeqyleuHBagacykqztHPx1hFuBHSyy29Ce ZtziGp8FpScki8QJ59WC4B2VU3px+Tj44LruJuHorO3413OAdrYuyFuEA eMt3ti43bcjHbjoD8+NMnHgYZfupptZ6iwBC9PkuF1qo93lGhqV8zP5Gn fu5gayBNF3qFwAtXW7OTtTZQ8Y9+nF+sbPOsUeIM71rbMT2Xsdvp8m36S QBDPLjPUUQSFvGoQaAz//Rz65XZ9u09OPTeJWNrVkit+Oq1G+XvPZQeuc 8+qjlDut+rIspU+0Bnrl50yq/TRvJzPYk2EDwjklmDnSNeq1W/BKyVBi3 g==; X-CSE-ConnectionGUID: mDasXLdJSEiJRAiWRtktIA== X-CSE-MsgGUID: WGI05CZbRlG00X2pWeUyEA== X-IronPort-AV: E=Sophos;i="6.10,212,1719849600"; d="scan'208";a="25553885" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 08 Sep 2024 18:22:35 +0800 IronPort-SDR: 66dd6e0f_IfaT6Xx2MYWmH0+gYRpc9hv4ZttYgh0xt8VtB35Gb9Erg3K /nyUGq2oFrgT19F0tUeHBS/HvNsgHrecsHzK4ow== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 02:27:44 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 03:22:33 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v7 07/10] mmc: core: Adjust ACMD22 to SDUC Date: Sun, 8 Sep 2024 13:20:15 +0300 Message-Id: <20240908102018.3711527-8-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240908102018.3711527-1-avri.altman@wdc.com> References: <20240908102018.3711527-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 ACMD22 is used to verify the previously write operation. Normally, it returns the number of written sectors as u32. SDUC, however, returns it as u64. This is not a superfluous requirement, because SDUC writes may exceeds 2TB. For Linux mmc however, the previously write operation could not be more than the block layer limits, thus we make room for a u64 and cast the returning value to u32. Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/block.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 308d7c1dd0b0..74b56198ce42 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -50,6 +50,7 @@ #include #include +#include #include "queue.h" #include "block.h" @@ -993,11 +994,10 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) int err; u32 result; __be32 *blocks; - + u8 resp_sz = mmc_card_ult_capacity(card) ? 8 : 4; struct mmc_request mrq = {}; struct mmc_command cmd = {}; struct mmc_data data = {}; - struct scatterlist sg; err = mmc_app_cmd(card->host, card); @@ -1008,7 +1008,7 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) cmd.arg = 0; cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC; - data.blksz = 4; + data.blksz = resp_sz; data.blocks = 1; data.flags = MMC_DATA_READ; data.sg = &sg; @@ -1018,15 +1018,27 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) mrq.cmd = &cmd; mrq.data = &data; - blocks = kmalloc(4, GFP_KERNEL); + blocks = kmalloc(resp_sz, GFP_KERNEL); if (!blocks) return -ENOMEM; - sg_init_one(&sg, blocks, 4); + sg_init_one(&sg, blocks, resp_sz); mmc_wait_for_req(card->host, &mrq); - result = ntohl(*blocks); + if (mmc_card_ult_capacity(card)) { + /* + * Normally, ACMD22 returns the number of written sectors as + * u32. SDUC, however, returns it as u64. This is not a + * superfluous requirement, because SDUC writes may exceed 2TB. + * For Linux mmc however, the previously write operation could + * not be more than the block layer limits, thus just make room + * for a u64 and cast the response back to u32. + */ + result = clamp_val(get_unaligned_be64(blocks), 0, UINT_MAX); + } else { + result = ntohl(*blocks); + } kfree(blocks); if (cmd.error || data.error) From patchwork Sun Sep 8 10:20:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 826517 Received: from esa4.hgst.iphmx.com (esa4.hgst.iphmx.com [216.71.154.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E20E14D71F for ; Sun, 8 Sep 2024 10:22:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725790961; cv=none; b=LgZAYe8HnHwr/z4BNr7Gx7nlwnjKpfJk7xuMXQ9uyqQNEUZlmFDdZ3Oe+Lm0DIjwr4PYOZfnr6CkjuvgLmpGCOyt9CJQQXUZSPVj6dBXgpbrZ/n6vBmj+C7EWx3vD4Eo0H3kPsbCdUsnyK2VzSsR3EkuEIeAfv4uGLlHW/42Ppg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725790961; c=relaxed/simple; bh=DsY7FEGA26mIOq/BNXWWOggrIsTPTayjqBPzwh9Dq5w=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ZEbheLFPCB3JkqYJ7/LF+sCwYIlF5pgwsJ8Baz0T/UTBfyBHVAfjhn5gz+0BgGX8+fOwqmJBDl3b1wwr/Ti69v95ys5y1HS2ZZwrdqfdLoGwD2RBsm8BtpJscC23f4xzq1Z3KYiPltq+iZBJGVNNZZZsyAI710fF6q6UqMAIHqk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=SBJtCOTm; arc=none smtp.client-ip=216.71.154.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="SBJtCOTm" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1725790959; x=1757326959; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DsY7FEGA26mIOq/BNXWWOggrIsTPTayjqBPzwh9Dq5w=; b=SBJtCOTmWCrgoK5lMs03uI9vIwFOvIZthnsqBm2Nh6iVff05Qi7juD4v 1ROYDNXE49E6YglabNsz4vHjYIG4q+BIcl6D8mEgFYbTuR4muVo+8o1M+ DWPbbq9NgfRBaxdE5WfhciX76LP7cNMaAP+GB+kzYv4l303VFpS+cciYG 5LRQSGmUxpZYCmhs2he+diuZl0MvooBm0mt+tTpFs0VlalayzsqTk18/V CF4fEW4KukHnGxeNRlE3wrd/IM5YQ+pRsp9veOjK47wcphUbNw1qoV+Q7 in3HPx4J5HIbHyup5XYF6pK5kIC9dsuiyTlu4BrVTgXVN1q9TVMjsdGfv w==; X-CSE-ConnectionGUID: NxyGLCDiRc6Qz5p7gzbZZw== X-CSE-MsgGUID: yhlgFYW+RHyx4N/Da8XezQ== X-IronPort-AV: E=Sophos;i="6.10,212,1719849600"; d="scan'208";a="25553888" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 08 Sep 2024 18:22:39 +0800 IronPort-SDR: 66dd6e13_1/X19dIaWq6lQeaVRLAOi8WLzUmUqCxkVgXE7vV1OwAOjnw CK9KhFIUWdcPnaeWHCqIloUa1X3mqjEg8oojJdw== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 02:27:48 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 03:22:37 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v7 08/10] mmc: core: Disable SDUC for mmc_test Date: Sun, 8 Sep 2024 13:20:16 +0300 Message-Id: <20240908102018.3711527-9-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240908102018.3711527-1-avri.altman@wdc.com> References: <20240908102018.3711527-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Planning to ameliorate it in the very near future. Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/mmc_test.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mmc/core/mmc_test.c b/drivers/mmc/core/mmc_test.c index b7f627a9fdea..4f4286b8e0f2 100644 --- a/drivers/mmc/core/mmc_test.c +++ b/drivers/mmc/core/mmc_test.c @@ -3241,6 +3241,12 @@ static int mmc_test_probe(struct mmc_card *card) if (!mmc_card_mmc(card) && !mmc_card_sd(card)) return -ENODEV; + if (mmc_card_ult_capacity(card)) { + pr_info("%s: mmc-test currently UNSUPPORTED for SDUC\n", + mmc_hostname(card->host)); + return -EOPNOTSUPP; + } + ret = mmc_test_register_dbgfs_file(card); if (ret) return ret; From patchwork Sun Sep 8 10:20:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 826792 Received: from esa4.hgst.iphmx.com (esa4.hgst.iphmx.com [216.71.154.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 862C51531CC for ; Sun, 8 Sep 2024 10:22:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725790964; cv=none; b=V9l7316G1EEmEegUg8GithEDbmbdLSqWxmbsZyZ3xcXjwIH25drqgt5hcYR7lVdi86XwX84uE0gFggMsKX9M+c/ye/uaB13FEZze/gB5QYiNS4KQOWUwnQ+sPhsLLjkfKTfPy8zT/6dnLxdKBxf7/3kaDXuLj9ZmyrkcEW1Dd6c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725790964; c=relaxed/simple; bh=9kqbHJzYDSY3n5nRcl0yORyub7SvJhqQwK0th1vVNV0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=kEK7l22RWSQWKx5caL9USs+8n3kuGIi0Lc7d7r7ssGqlhfzpi+JdEmg2ePyi4DNSa5Wh7TZcwFL7DvdI2MAP1ihBKIwCvNThihLj51dsiNDs+YO05XJspGx6QYV/faaizqUG+HKOe9uZgVdw/Gu+8uySKeoltOD8TgDFPOSLmCI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=E45H50hi; arc=none smtp.client-ip=216.71.154.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="E45H50hi" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1725790963; x=1757326963; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9kqbHJzYDSY3n5nRcl0yORyub7SvJhqQwK0th1vVNV0=; b=E45H50hi6T4gSwhG2yXvmEqlrtwhRTHKIbJEZ2itvCMQYyEArXusVzNj WP2aKa8wZY+ankDXPYaf+owh6wDounLrkaiz3tYbQdcMMQ8FzLmBu9x0G Nq/cCx6BsKxUbyRQqt+rKDqeQ/CMtHCf6RChYvqvVSnrebxkLgSXsmCrp 3lSRTrlJqFxuTK0gjGkFdUFLpSH6tFZ4SujB5I3htPbAbWA9QbYL3KadX PfAPfEPeAgl3W4Ovt8BGIKMD9isuF1wjoruqyFFnbzckJyuHe/pu4VxWe 3oAzP/EKg0b2n91bXtnfYuEUyzxBlFL2zBJzEgR3efFT8aOUc597AesBJ Q==; X-CSE-ConnectionGUID: 6gsl9c2DQNi0JCJP1jbT5w== X-CSE-MsgGUID: kvjO3W4ETzCTJV003xikpg== X-IronPort-AV: E=Sophos;i="6.10,212,1719849600"; d="scan'208";a="25553890" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 08 Sep 2024 18:22:43 +0800 IronPort-SDR: 66dd6e17_G8TmnwUX90cxBXH8ISUfma5FcJhkp63A4I/hjLfnWVvb6uH OV+sNUoCa7bMO0vBICds52q8pSsrqc9Bo8nA1BA== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 02:27:52 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 03:22:41 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v7 09/10] mmc: core: Prevent HSQ from enabling for SDUC Date: Sun, 8 Sep 2024 13:20:17 +0300 Message-Id: <20240908102018.3711527-10-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240908102018.3711527-1-avri.altman@wdc.com> References: <20240908102018.3711527-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Prevent Host Software Queue from enabling for SDUC. In SDUC, CMD44 is modified to include 6-bit upper address by utilizing its reserved bits. Exclude hsq for SDUC for now. Signed-off-by: Avri Altman --- drivers/mmc/core/sd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 1d09f0f2e769..5d35fc8802c7 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -1558,7 +1558,7 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, goto free_card; } - if (host->cqe_ops && !host->cqe_enabled) { + if (!mmc_card_ult_capacity(card) && host->cqe_ops && !host->cqe_enabled) { err = host->cqe_ops->cqe_enable(host, card); if (!err) { host->cqe_enabled = true; From patchwork Sun Sep 8 10:20:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avri Altman X-Patchwork-Id: 826516 Received: from esa4.hgst.iphmx.com (esa4.hgst.iphmx.com [216.71.154.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 54E781531D1 for ; Sun, 8 Sep 2024 10:22:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=216.71.154.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725790970; cv=none; b=WrUFfPVMUq1dnbDpSsKNAh9zTbL6HF5SsYhdHSlMezD7JnXZd4TI4QOc4b6WDdMadMKNJa0H8p/f0IIHAt3Hi+57TkvWVNj0tfeJYJEjJbf1L7Uv4k1EkIYgWcuhGv1GWaW4XrBCsKha6YwtdEyhbOJyoFNojonSl8l6QQsG1lc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725790970; c=relaxed/simple; bh=U563Mhh0q1723MHDkGoEkWrVPGt30/RE8nUI/CW64Fc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=eSd/FOO1rbQ8pyolskxjjccI6zGi+kj02+VQewXhQ1nHMaGa+xydKEfybWuKX3gQam2mE4ZGuVxjOSj6uDiTgbug/nWSF+qXHWp5HF/n1aUZtUzpyZMjAYNRsZK64aqNjGubEh1SDnVV6oAl/Su1YICCre2cuJ1pwiCOMR6sZwk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com; spf=pass smtp.mailfrom=wdc.com; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b=lAsYGRTO; arc=none smtp.client-ip=216.71.154.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=wdc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wdc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wdc.com header.i=@wdc.com header.b="lAsYGRTO" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1725790968; x=1757326968; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=U563Mhh0q1723MHDkGoEkWrVPGt30/RE8nUI/CW64Fc=; b=lAsYGRTOzupvb+b8dbrmH0ux8l073EDucvIUM/Nsw5SgYislK/NsFsnD TYUHM/K542OAc5vQK9wqPw9LXHHK62YpH6B1QfkNEVUW4KMI6VDF2hwAs gwO1E/E9VbDMsHEr40p35VwQDu9MNQCeHNWN+RZhHzWlJ2FlfCqQAwLHw EaW4DFmgbF8VUqoM6Hx5GTMKeXwidjacuK8F73beWEAgHjMsBrZiqWvfx vbNmBftihI8hi8BSVC4wGJhbVwX3YUdMM/s9At3RDmLRK7oR6wKxsFu3p v+YLp7R3gNtESNXeZoHVyLJBHOXpzVFxLCm9GPHSiq/0a9ukRg42GSlG+ A==; X-CSE-ConnectionGUID: Jsxe9BNgRGuMnnyb2wTvQw== X-CSE-MsgGUID: L+kA3hdwQByx6dEB33GkSA== X-IronPort-AV: E=Sophos;i="6.10,212,1719849600"; d="scan'208";a="25553894" Received: from h199-255-45-14.hgst.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 08 Sep 2024 18:22:48 +0800 IronPort-SDR: 66dd6e1c_f0CqIGIKsWIdiBvxFW2wkEoY7GK/zm0GkKUdwO0g2lWBH11 ojjRnwyALH+3umxy7n2rU7BhWSQlAddeQOldDSQ== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 02:27:57 -0700 WDCIronportException: Internal Received: from avri-office.ad.shared (HELO avri-office.sdcorp.global.sandisk.com) ([10.45.31.142]) by uls-op-cesaip02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Sep 2024 03:22:46 -0700 From: Avri Altman To: Ulf Hansson , linux-mmc@vger.kernel.org Cc: Adrian Hunter , Ricky WU , Shawn Lin , Christian Loehle , Avri Altman Subject: [PATCH v7 10/10] mmc: core: Enable SDUC Date: Sun, 8 Sep 2024 13:20:18 +0300 Message-Id: <20240908102018.3711527-11-avri.altman@wdc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240908102018.3711527-1-avri.altman@wdc.com> References: <20240908102018.3711527-1-avri.altman@wdc.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable SDUC if the card responded to ACMD41 with HCS & HO2T bits set. Reviewed-by: Adrian Hunter Signed-off-by: Avri Altman --- drivers/mmc/core/sd.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 5d35fc8802c7..0ee89e3e8f94 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -836,8 +836,11 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr) * block-addressed SDHC cards. */ err = mmc_send_if_cond(host, ocr); - if (!err) + if (!err) { ocr |= SD_OCR_CCS; + /* Set HO2T as well - SDUC card won't respond otherwise */ + ocr |= SD_OCR_2T; + } /* * If the host supports one of UHS-I modes, request the card @@ -1448,7 +1451,10 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, } if (!oldcard) { - err = mmc_sd_get_csd(card, false); + u32 sduc_arg = SD_OCR_CCS | SD_OCR_2T; + bool is_sduc = (rocr & sduc_arg) == sduc_arg; + + err = mmc_sd_get_csd(card, is_sduc); if (err) goto free_card;