From patchwork Fri Sep 13 21:07:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 828868 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D1AD126C01 for ; Fri, 13 Sep 2024 21:07:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726261658; cv=none; b=Sihk2hhyA8l1m4BmUjkuOLgXo/JqizkGaHAmjMNQ2L0QI8VEKXBdEK4Zh+yORN3ICncmkDHYvjYg3Dbj1m7/tesj3ndwYuKHFiVyT/hmlJGHbE1JIYQOOcr3JVlw+NGl/Rk9ercDWVgzA/x975QMvP3fbsLWJF5fXAgDbsMbg5E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726261658; c=relaxed/simple; bh=YQLWHS/MsoePx6rxsH4eENXnN+TYWJB2F/5JkR3bs6M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=o2b9qNj55T8uCqJLhPUiHfGIlv61/H0pB+LJp197Q6PWWDU6QJ3rPMCzA5/eHH6JdZ//0w3rmCckgXsvij+qIAyzu9FK0S4n676qCA8h7iqmuwgcMdiVCV9mfrJec0EpMohxOj+nUI4k7oyDhAxP8YhB3JqFdjClBKr4f0++T4M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=rlo8Ga5z; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="rlo8Ga5z" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C1BBDC4CEC0; Fri, 13 Sep 2024 21:07:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726261658; bh=YQLWHS/MsoePx6rxsH4eENXnN+TYWJB2F/5JkR3bs6M=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=rlo8Ga5zuHd5bgKxfDTXp6yl0pSgelwMH5wCi8zrbsmf+l/7MSIO75bGG399X+O09 xacjXexmd7zpAxG688IJKhCQFXoYe4irWMdBjMtiXHnKLPb7ZFAjprDS3uVH8Qka+z e4p/IR5/UL5vMknvDuGLiUIqg6Gho3Y2RXC/9DDO3jw47tJCvRB+ZZ/lMuU3r8k0lb n8BoiEp5UmnODQR7O0BX+4cUN1tbtr5P8lf+hgJ1H8oV7pffrLAIHot7ZBuH5Cet2K bTSlZI3m3x6YwQS5yhvCZL3mcdqQVJVRIUP0FpIR7mOzGxjGb8YdfaItFsiFHJWXgR dgmjnH6tcbWUA== From: Lorenzo Bianconi Date: Fri, 13 Sep 2024 23:07:13 +0200 Subject: [PATCH 1/4] spi: airoha: fix dirmap_{read,write} operations Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240913-airoha-spi-fixes-v1-1-de2e74ed4664@kernel.org> References: <20240913-airoha-spi-fixes-v1-0-de2e74ed4664@kernel.org> In-Reply-To: <20240913-airoha-spi-fixes-v1-0-de2e74ed4664@kernel.org> To: Lorenzo Bianconi , Ray Liu , Mark Brown , AngeloGioacchino Del Regno , Andy Shevchenko Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, upstream@airoha.com X-Mailer: b4 0.14.1 SPI_NFI_READ_FROM_CACHE_DONE bit must be written at the end of dirmap_read operation even if it is already set. In the same way, SPI_NFI_LOAD_TO_CACHE_DONE bit must be written at the end of dirmap_write operation even if it is already set. For this reason use regmap_write_bits() instead of regmap_set_bits(). This patch fixes mtd_pagetest kernel module test. Fixes: a403997c1201 ("spi: airoha: add SPI-NAND Flash controller driver") Tested-by: Christian Marangi Signed-off-by: Lorenzo Bianconi --- drivers/spi/spi-airoha-snfi.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-airoha-snfi.c b/drivers/spi/spi-airoha-snfi.c index 9d97ec98881c..be3e4ac42153 100644 --- a/drivers/spi/spi-airoha-snfi.c +++ b/drivers/spi/spi-airoha-snfi.c @@ -739,8 +739,13 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc, if (err) return err; - err = regmap_set_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_STA_CTL1, - SPI_NFI_READ_FROM_CACHE_DONE); + /* + * SPI_NFI_READ_FROM_CACHE_DONE bit must be written at the end + * of dirmap_read operation even if it is already set. + */ + err = regmap_write_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_STA_CTL1, + SPI_NFI_READ_FROM_CACHE_DONE, + SPI_NFI_READ_FROM_CACHE_DONE); if (err) return err; @@ -870,8 +875,13 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc, if (err) return err; - err = regmap_set_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_STA_CTL1, - SPI_NFI_LOAD_TO_CACHE_DONE); + /* + * SPI_NFI_LOAD_TO_CACHE_DONE bit must be written at the end + * of dirmap_write operation even if it is already set. + */ + err = regmap_write_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_STA_CTL1, + SPI_NFI_LOAD_TO_CACHE_DONE, + SPI_NFI_LOAD_TO_CACHE_DONE); if (err) return err; From patchwork Fri Sep 13 21:07:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 828600 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5C29126C01 for ; Fri, 13 Sep 2024 21:07:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726261661; cv=none; b=A+/JWR7bG1XpL2CFqbht3EeTXFjf7hf+UO87KWAgmDEoQEpabHgnRvMMN+3vYoY5yt6jLPlVCZ2YHa95s/gX1srXF3OYDjG2XufEzfTxQric3FYHa8p+yXoxEt4QTz1ZxWK7knOCJsaiWJLr1wvxgrDwgMZxXgUvW6w7p1MhxlI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726261661; c=relaxed/simple; bh=+TB9oObE8jFM8lByBhuspz+4OeFWOAzD//N1khf/Abo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=I+li2OP4GJAeQMSFMkU5uAbRefPqe4+B+a803zeeQ0Uu1F4D+R5YQMX+GgPBcWJlgfNB25EMbt9HgWY/cW/Oq2xLBa9hf3gQrQM+L/xrukFn5UsR8V+r8M0itYUcKLX2KdElw4N3MveOudrpWwntu65/6c0xxQZjD+nMms2pFrM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=X5xqBXgs; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="X5xqBXgs" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 69ACDC4CEC0; Fri, 13 Sep 2024 21:07:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726261660; bh=+TB9oObE8jFM8lByBhuspz+4OeFWOAzD//N1khf/Abo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=X5xqBXgsgcd9ObFakEuqbRgwvTe06H77CeQAVaw1UF/fofsX0aj6XVRFKSAqYM+l6 mAWT5alixveEBy+s/HG05AWEUX1/rV9vRYPrh8ORVADjDrGwrMI3gEwrECKYsF282L SgaY9kC81rA0Yr7Lab4J4RPcvJuiBU8eLcigE47fi4W8u5gm0ggebbzSB90io2MOp9 mBFPI/K2pA7kTFbHEAhwGQj4XI8WzR0C5p0rK2qrYdm7CBhGHMri3fnf83ZrjyZaGj 5/FAQblwIfGmyeK1wkfpNn6uCKHIXLkzSvFcdUD9o10dVQQIQK5xzrqk2cF3zt7Pk1 7E/NgLSjKa/lw== From: Lorenzo Bianconi Date: Fri, 13 Sep 2024 23:07:14 +0200 Subject: [PATCH 2/4] spi: airoha: fix airoha_snand_{write,read}_data data_len estimation Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240913-airoha-spi-fixes-v1-2-de2e74ed4664@kernel.org> References: <20240913-airoha-spi-fixes-v1-0-de2e74ed4664@kernel.org> In-Reply-To: <20240913-airoha-spi-fixes-v1-0-de2e74ed4664@kernel.org> To: Lorenzo Bianconi , Ray Liu , Mark Brown , AngeloGioacchino Del Regno , Andy Shevchenko Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, upstream@airoha.com X-Mailer: b4 0.14.1 Fix data length written and read in airoha_snand_write_data and airoha_snand_read_data routines respectively if it is bigger than SPI_MAX_TRANSFER_SIZE. Fixes: a403997c1201 ("spi: airoha: add SPI-NAND Flash controller driver") Tested-by: Christian Marangi Signed-off-by: Lorenzo Bianconi --- drivers/spi/spi-airoha-snfi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-airoha-snfi.c b/drivers/spi/spi-airoha-snfi.c index be3e4ac42153..c71be702cf6f 100644 --- a/drivers/spi/spi-airoha-snfi.c +++ b/drivers/spi/spi-airoha-snfi.c @@ -405,7 +405,7 @@ static int airoha_snand_write_data(struct airoha_snand_ctrl *as_ctrl, u8 cmd, for (i = 0; i < len; i += data_len) { int err; - data_len = min(len, SPI_MAX_TRANSFER_SIZE); + data_len = min(len - i, SPI_MAX_TRANSFER_SIZE); err = airoha_snand_set_fifo_op(as_ctrl, cmd, data_len); if (err) return err; @@ -427,7 +427,7 @@ static int airoha_snand_read_data(struct airoha_snand_ctrl *as_ctrl, u8 *data, for (i = 0; i < len; i += data_len) { int err; - data_len = min(len, SPI_MAX_TRANSFER_SIZE); + data_len = min(len - i, SPI_MAX_TRANSFER_SIZE); err = airoha_snand_set_fifo_op(as_ctrl, 0xc, data_len); if (err) return err; From patchwork Fri Sep 13 21:07:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 828867 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BBBD3126C01 for ; Fri, 13 Sep 2024 21:07:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726261663; cv=none; b=ALeqDTUl16/dKzlN2wbv9f71UkVh/HKtIRLe3jxx80hXnbQ0Ge5dZwqOQwaeYUWhLFEPGHj7lwujLbNvP29/ECEhS7MyjQyEriX+y2TLpmDu9I6AxTQVpxSdig6xU36VqGBZY9FyHeGotcyiOUrPhXbFEQxUM+x0Pev6hl9NpQM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726261663; c=relaxed/simple; bh=sVwfHoXKnb1nvxGo5YmthEsmu41bkHDt+t3Z3PhqUGE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ij/kveZH5BvkY7QnrLDXIy8g99ltkjRHWjSciU8LVqaVfGW+7pNzxNpEKYgUfwXBdss1rLFCsOzCYb4fINgEgzjodaRx3zKP7Sh5m4KGKox4dv2GRYlYebWu3fD0TXYw68SqlZJU3KH0PoQZPrPjtSEZ4VcRwwRDK1IB0/Ik7c8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JS+XAp+3; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JS+XAp+3" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0B147C4CEC0; Fri, 13 Sep 2024 21:07:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726261663; bh=sVwfHoXKnb1nvxGo5YmthEsmu41bkHDt+t3Z3PhqUGE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=JS+XAp+31Rumk0g/OvmlItf9smz0FHGU4JFHhh1P3nu+vUE6acVYjApB7WR/jbHpx m8ztuNp8mOBCVKZqFnJaY35+52V+AJix8fqYKNXD5DVkXxhdTmpE2GLpkirht1tWMC i9bUmUu65YR94wp6E6w0tckMccPCx/q7lnAjZHbuOeHbj9mSYZO4d1iU+LFRgxkljq oQDcAFMyxCUyDp93+PFB8BuXNWmJpB5T5lHV8o7nJOwNgvs4oehguHGopF5frj6yy9 lG+TyBaRoAGf990xFbLJts7GDHimhqpsEPlkXWPqavUuMrgPI8/Q8zW1Sf36aBiaCj e+ab6yRQ9W9Cw== From: Lorenzo Bianconi Date: Fri, 13 Sep 2024 23:07:15 +0200 Subject: [PATCH 3/4] spi: airoha: remove read cache in airoha_snand_dirmap_read Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240913-airoha-spi-fixes-v1-3-de2e74ed4664@kernel.org> References: <20240913-airoha-spi-fixes-v1-0-de2e74ed4664@kernel.org> In-Reply-To: <20240913-airoha-spi-fixes-v1-0-de2e74ed4664@kernel.org> To: Lorenzo Bianconi , Ray Liu , Mark Brown , AngeloGioacchino Del Regno , Andy Shevchenko Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, upstream@airoha.com X-Mailer: b4 0.14.1 Get rid of read cache in airoha_snand_dirmap_read routine since it introduces errors in mtd_oobtest kernel module test and it does not add any performance improvements in mtd_speedtest kernel module test. Fixes: a403997c1201 ("spi: airoha: add SPI-NAND Flash controller driver") Tested-by: Christian Marangi Signed-off-by: Lorenzo Bianconi --- drivers/spi/spi-airoha-snfi.c | 21 --------------------- 1 file changed, 21 deletions(-) diff --git a/drivers/spi/spi-airoha-snfi.c b/drivers/spi/spi-airoha-snfi.c index c71be702cf6f..94458df53eae 100644 --- a/drivers/spi/spi-airoha-snfi.c +++ b/drivers/spi/spi-airoha-snfi.c @@ -211,9 +211,6 @@ struct airoha_snand_dev { u8 *txrx_buf; dma_addr_t dma_addr; - - u64 cur_page_num; - bool data_need_update; }; struct airoha_snand_ctrl { @@ -644,11 +641,6 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc, u32 val, rd_mode; int err; - if (!as_dev->data_need_update) - return len; - - as_dev->data_need_update = false; - switch (op->cmd.opcode) { case SPI_NAND_OP_READ_FROM_CACHE_DUAL: rd_mode = 1; @@ -895,23 +887,11 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc, static int airoha_snand_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) { - struct airoha_snand_dev *as_dev = spi_get_ctldata(mem->spi); u8 data[8], cmd, opcode = op->cmd.opcode; struct airoha_snand_ctrl *as_ctrl; int i, err; as_ctrl = spi_controller_get_devdata(mem->spi->controller); - if (opcode == SPI_NAND_OP_PROGRAM_EXECUTE && - op->addr.val == as_dev->cur_page_num) { - as_dev->data_need_update = true; - } else if (opcode == SPI_NAND_OP_PAGE_READ) { - if (!as_dev->data_need_update && - op->addr.val == as_dev->cur_page_num) - return 0; - - as_dev->data_need_update = true; - as_dev->cur_page_num = op->addr.val; - } /* switch to manual mode */ err = airoha_snand_set_mode(as_ctrl, SPI_MODE_MANUAL); @@ -996,7 +976,6 @@ static int airoha_snand_setup(struct spi_device *spi) if (dma_mapping_error(as_ctrl->dev, as_dev->dma_addr)) return -ENOMEM; - as_dev->data_need_update = true; spi_set_ctldata(spi, as_dev); return 0; From patchwork Fri Sep 13 21:07:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 828599 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB38F126C01 for ; Fri, 13 Sep 2024 21:07:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726261667; cv=none; b=XQxcjd33kNTETHDe6JmqJM1WufLkwG2huLnLC126t0/AI0LipHiurxiM7P0hjfSrb0palwza+Z82Jl117nB5AJPfW+L8k/tKaKFnJX4Z9hjyqo/3DlRcLdwkaUQ4BCaPdtI7NXfuGM4AXFos6cQQan3PisuiGx8WKd8csqqJb5c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726261667; c=relaxed/simple; bh=oguSULFJRSSUqbNjkm6OMrWDpYu2DfA9lEtQvbYP2j0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YBWDFiQAHm3x3NyjJse9BaO01NK9SOgHW6pDy7aTFhVnIMOjV1IDzfB+KgF+Zqb/pcZzCSxHqEEd/Ac5ciHJ52Avf6kAaLMR3/Lwe3ffRYSPHrGm7ZfIfZ217W5tap62tzk/c42tsRqGWGXLLZuk+3e/rWNpjvEX559g9jgYSeY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=J6zsKAKg; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="J6zsKAKg" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D9CBFC4CEC0; Fri, 13 Sep 2024 21:07:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1726261666; bh=oguSULFJRSSUqbNjkm6OMrWDpYu2DfA9lEtQvbYP2j0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=J6zsKAKgTJiWzj2PWe8uE+1ouHR4PTs6HAjyd607q8boNqrW+CtPOe2lF2j3N0i9j jHL3UJqbgz2IY+0DwBZa02PfyY3Fsm5OUGUGhIfLcjaJei69PhFjqlCUn3niGmht/8 o0wV42Mkm26udMsSGDaR7WpUwojrsI39CFhjfM60sfvg4hZOCzTmHMD65Zz597Tpbb B34e1bVUBqyJr3+JTWnm8SYDmstRAi2lOBT5thvbfVC3ot8ylRqFuHQr95YfKJ25o1 Fu6efUsbi081Rzv8bEkmhKSKzNmBAR58PlPtqceK+J1i+2AV7d4TInulpKOaxukfDh XG3Wlbcc1qRCQ== From: Lorenzo Bianconi Date: Fri, 13 Sep 2024 23:07:16 +0200 Subject: [PATCH 4/4] spi: airoha: do not keep {tx,rx} dma buffer always mapped Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240913-airoha-spi-fixes-v1-4-de2e74ed4664@kernel.org> References: <20240913-airoha-spi-fixes-v1-0-de2e74ed4664@kernel.org> In-Reply-To: <20240913-airoha-spi-fixes-v1-0-de2e74ed4664@kernel.org> To: Lorenzo Bianconi , Ray Liu , Mark Brown , AngeloGioacchino Del Regno , Andy Shevchenko Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, upstream@airoha.com X-Mailer: b4 0.14.1 DMA map txrx_buf on demand and do not keep it always mapped. This patch does not introduce any functional change to the driver, it just simplifies the code without any performance degradation according to the results of the mtd_speedtest kernel module test. Tested-by: Christian Marangi Signed-off-by: Lorenzo Bianconi --- drivers/spi/spi-airoha-snfi.c | 152 +++++++++++++++++++----------------------- 1 file changed, 69 insertions(+), 83 deletions(-) diff --git a/drivers/spi/spi-airoha-snfi.c b/drivers/spi/spi-airoha-snfi.c index 94458df53eae..16c528883cca 100644 --- a/drivers/spi/spi-airoha-snfi.c +++ b/drivers/spi/spi-airoha-snfi.c @@ -206,13 +206,6 @@ enum airoha_snand_cs { SPI_CHIP_SEL_LOW, }; -struct airoha_snand_dev { - size_t buf_len; - - u8 *txrx_buf; - dma_addr_t dma_addr; -}; - struct airoha_snand_ctrl { struct device *dev; struct regmap *regmap_ctrl; @@ -617,9 +610,9 @@ static bool airoha_snand_supports_op(struct spi_mem *mem, static int airoha_snand_dirmap_create(struct spi_mem_dirmap_desc *desc) { - struct airoha_snand_dev *as_dev = spi_get_ctldata(desc->mem->spi); + u8 *txrx_buf = spi_get_ctldata(desc->mem->spi); - if (!as_dev->txrx_buf) + if (!txrx_buf) return -EINVAL; if (desc->info.offset + desc->info.length > U32_MAX) @@ -634,10 +627,11 @@ static int airoha_snand_dirmap_create(struct spi_mem_dirmap_desc *desc) static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc, u64 offs, size_t len, void *buf) { - struct spi_device *spi = desc->mem->spi; - struct airoha_snand_dev *as_dev = spi_get_ctldata(spi); struct spi_mem_op *op = &desc->info.op_tmpl; + struct spi_device *spi = desc->mem->spi; struct airoha_snand_ctrl *as_ctrl; + u8 *txrx_buf = spi_get_ctldata(spi); + dma_addr_t dma_addr; u32 val, rd_mode; int err; @@ -662,14 +656,16 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc, if (err) return err; - dma_sync_single_for_device(as_ctrl->dev, as_dev->dma_addr, - as_dev->buf_len, DMA_BIDIRECTIONAL); + dma_addr = dma_map_single(as_ctrl->dev, txrx_buf, SPI_NAND_CACHE_SIZE, + DMA_FROM_DEVICE); + if (dma_mapping_error(as_ctrl->dev, dma_addr)) + return -ENOMEM; /* set dma addr */ err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_STRADDR, - as_dev->dma_addr); + dma_addr); if (err) - return err; + goto error_dma_unmap; /* set cust sec size */ val = as_ctrl->nfi_cfg.sec_size * as_ctrl->nfi_cfg.sec_num; @@ -678,58 +674,58 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc, REG_SPI_NFI_SNF_MISC_CTL2, SPI_NFI_READ_DATA_BYTE_NUM, val); if (err) - return err; + goto error_dma_unmap; /* set read command */ err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_RD_CTL2, op->cmd.opcode); if (err) - return err; + goto error_dma_unmap; /* set read mode */ err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_MISC_CTL, FIELD_PREP(SPI_NFI_DATA_READ_WR_MODE, rd_mode)); if (err) - return err; + goto error_dma_unmap; /* set read addr */ err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_RD_CTL3, 0x0); if (err) - return err; + goto error_dma_unmap; /* set nfi read */ err = regmap_update_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG, SPI_NFI_OPMODE, FIELD_PREP(SPI_NFI_OPMODE, 6)); if (err) - return err; + goto error_dma_unmap; err = regmap_set_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG, SPI_NFI_READ_MODE | SPI_NFI_DMA_MODE); if (err) - return err; + goto error_dma_unmap; err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_CMD, 0x0); if (err) - return err; + goto error_dma_unmap; /* trigger dma start read */ err = regmap_clear_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON, SPI_NFI_RD_TRIG); if (err) - return err; + goto error_dma_unmap; err = regmap_set_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON, SPI_NFI_RD_TRIG); if (err) - return err; + goto error_dma_unmap; err = regmap_read_poll_timeout(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_STA_CTL1, val, (val & SPI_NFI_READ_FROM_CACHE_DONE), 0, 1 * USEC_PER_SEC); if (err) - return err; + goto error_dma_unmap; /* * SPI_NFI_READ_FROM_CACHE_DONE bit must be written at the end @@ -739,35 +735,41 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc, SPI_NFI_READ_FROM_CACHE_DONE, SPI_NFI_READ_FROM_CACHE_DONE); if (err) - return err; + goto error_dma_unmap; err = regmap_read_poll_timeout(as_ctrl->regmap_nfi, REG_SPI_NFI_INTR, val, (val & SPI_NFI_AHB_DONE), 0, 1 * USEC_PER_SEC); if (err) - return err; + goto error_dma_unmap; /* DMA read need delay for data ready from controller to DRAM */ udelay(1); - dma_sync_single_for_cpu(as_ctrl->dev, as_dev->dma_addr, - as_dev->buf_len, DMA_BIDIRECTIONAL); + dma_unmap_single(as_ctrl->dev, dma_addr, SPI_NAND_CACHE_SIZE, + DMA_FROM_DEVICE); err = airoha_snand_set_mode(as_ctrl, SPI_MODE_MANUAL); if (err < 0) return err; - memcpy(buf, as_dev->txrx_buf + offs, len); + memcpy(buf, txrx_buf + offs, len); return len; + +error_dma_unmap: + dma_unmap_single(as_ctrl->dev, dma_addr, SPI_NAND_CACHE_SIZE, + DMA_FROM_DEVICE); + return err; } static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc, u64 offs, size_t len, const void *buf) { - struct spi_device *spi = desc->mem->spi; - struct airoha_snand_dev *as_dev = spi_get_ctldata(spi); struct spi_mem_op *op = &desc->info.op_tmpl; + struct spi_device *spi = desc->mem->spi; + u8 *txrx_buf = spi_get_ctldata(spi); struct airoha_snand_ctrl *as_ctrl; + dma_addr_t dma_addr; u32 wr_mode, val; int err; @@ -776,19 +778,19 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc, if (err < 0) return err; - dma_sync_single_for_cpu(as_ctrl->dev, as_dev->dma_addr, - as_dev->buf_len, DMA_BIDIRECTIONAL); - memcpy(as_dev->txrx_buf + offs, buf, len); - dma_sync_single_for_device(as_ctrl->dev, as_dev->dma_addr, - as_dev->buf_len, DMA_BIDIRECTIONAL); + memcpy(txrx_buf + offs, buf, len); + dma_addr = dma_map_single(as_ctrl->dev, txrx_buf, SPI_NAND_CACHE_SIZE, + DMA_TO_DEVICE); + if (dma_mapping_error(as_ctrl->dev, dma_addr)) + return -ENOMEM; err = airoha_snand_set_mode(as_ctrl, SPI_MODE_DMA); if (err < 0) - return err; + goto error_dma_unmap; err = airoha_snand_nfi_config(as_ctrl); if (err) - return err; + goto error_dma_unmap; if (op->cmd.opcode == SPI_NAND_OP_PROGRAM_LOAD_QUAD || op->cmd.opcode == SPI_NAND_OP_PROGRAM_LOAD_RAMDON_QUAD) @@ -797,9 +799,9 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc, wr_mode = 0; err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_STRADDR, - as_dev->dma_addr); + dma_addr); if (err) - return err; + goto error_dma_unmap; val = FIELD_PREP(SPI_NFI_PROG_LOAD_BYTE_NUM, as_ctrl->nfi_cfg.sec_size * as_ctrl->nfi_cfg.sec_num); @@ -807,65 +809,65 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc, REG_SPI_NFI_SNF_MISC_CTL2, SPI_NFI_PROG_LOAD_BYTE_NUM, val); if (err) - return err; + goto error_dma_unmap; err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_PG_CTL1, FIELD_PREP(SPI_NFI_PG_LOAD_CMD, op->cmd.opcode)); if (err) - return err; + goto error_dma_unmap; err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_MISC_CTL, FIELD_PREP(SPI_NFI_DATA_READ_WR_MODE, wr_mode)); if (err) - return err; + goto error_dma_unmap; err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_PG_CTL2, 0x0); if (err) - return err; + goto error_dma_unmap; err = regmap_clear_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG, SPI_NFI_READ_MODE); if (err) - return err; + goto error_dma_unmap; err = regmap_update_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG, SPI_NFI_OPMODE, FIELD_PREP(SPI_NFI_OPMODE, 3)); if (err) - return err; + goto error_dma_unmap; err = regmap_set_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CNFG, SPI_NFI_DMA_MODE); if (err) - return err; + goto error_dma_unmap; err = regmap_write(as_ctrl->regmap_nfi, REG_SPI_NFI_CMD, 0x80); if (err) - return err; + goto error_dma_unmap; err = regmap_clear_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON, SPI_NFI_WR_TRIG); if (err) - return err; + goto error_dma_unmap; err = regmap_set_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON, SPI_NFI_WR_TRIG); if (err) - return err; + goto error_dma_unmap; err = regmap_read_poll_timeout(as_ctrl->regmap_nfi, REG_SPI_NFI_INTR, val, (val & SPI_NFI_AHB_DONE), 0, 1 * USEC_PER_SEC); if (err) - return err; + goto error_dma_unmap; err = regmap_read_poll_timeout(as_ctrl->regmap_nfi, REG_SPI_NFI_SNF_STA_CTL1, val, (val & SPI_NFI_LOAD_TO_CACHE_DONE), 0, 1 * USEC_PER_SEC); if (err) - return err; + goto error_dma_unmap; /* * SPI_NFI_LOAD_TO_CACHE_DONE bit must be written at the end @@ -875,13 +877,20 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc, SPI_NFI_LOAD_TO_CACHE_DONE, SPI_NFI_LOAD_TO_CACHE_DONE); if (err) - return err; + goto error_dma_unmap; + dma_unmap_single(as_ctrl->dev, dma_addr, SPI_NAND_CACHE_SIZE, + DMA_TO_DEVICE); err = airoha_snand_set_mode(as_ctrl, SPI_MODE_MANUAL); if (err < 0) return err; return len; + +error_dma_unmap: + dma_unmap_single(as_ctrl->dev, dma_addr, SPI_NAND_CACHE_SIZE, + DMA_TO_DEVICE); + return err; } static int airoha_snand_exec_op(struct spi_mem *mem, @@ -956,42 +965,20 @@ static const struct spi_controller_mem_ops airoha_snand_mem_ops = { static int airoha_snand_setup(struct spi_device *spi) { struct airoha_snand_ctrl *as_ctrl; - struct airoha_snand_dev *as_dev; - - as_ctrl = spi_controller_get_devdata(spi->controller); - - as_dev = devm_kzalloc(as_ctrl->dev, sizeof(*as_dev), GFP_KERNEL); - if (!as_dev) - return -ENOMEM; + u8 *txrx_buf; /* prepare device buffer */ - as_dev->buf_len = SPI_NAND_CACHE_SIZE; - as_dev->txrx_buf = devm_kzalloc(as_ctrl->dev, as_dev->buf_len, - GFP_KERNEL); - if (!as_dev->txrx_buf) - return -ENOMEM; - - as_dev->dma_addr = dma_map_single(as_ctrl->dev, as_dev->txrx_buf, - as_dev->buf_len, DMA_BIDIRECTIONAL); - if (dma_mapping_error(as_ctrl->dev, as_dev->dma_addr)) + as_ctrl = spi_controller_get_devdata(spi->controller); + txrx_buf = devm_kzalloc(as_ctrl->dev, SPI_NAND_CACHE_SIZE, + GFP_KERNEL); + if (!txrx_buf) return -ENOMEM; - spi_set_ctldata(spi, as_dev); + spi_set_ctldata(spi, txrx_buf); return 0; } -static void airoha_snand_cleanup(struct spi_device *spi) -{ - struct airoha_snand_dev *as_dev = spi_get_ctldata(spi); - struct airoha_snand_ctrl *as_ctrl; - - as_ctrl = spi_controller_get_devdata(spi->controller); - dma_unmap_single(as_ctrl->dev, as_dev->dma_addr, - as_dev->buf_len, DMA_BIDIRECTIONAL); - spi_set_ctldata(spi, NULL); -} - static int airoha_snand_nfi_setup(struct airoha_snand_ctrl *as_ctrl) { u32 val, sec_size, sec_num; @@ -1093,7 +1080,6 @@ static int airoha_snand_probe(struct platform_device *pdev) ctrl->bits_per_word_mask = SPI_BPW_MASK(8); ctrl->mode_bits = SPI_RX_DUAL; ctrl->setup = airoha_snand_setup; - ctrl->cleanup = airoha_snand_cleanup; device_set_node(&ctrl->dev, dev_fwnode(dev)); err = airoha_snand_nfi_setup(as_ctrl);