From patchwork Mon Sep 16 12:01:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 829086 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E628F158DA0; Mon, 16 Sep 2024 12:02:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726488173; cv=none; b=hQPJY3rvRtmhCDpcjuV3LAQUeyBGLUiR8tpurTMQ1w1fBWN/nGkqNVfYuZlUGWDIp/eChRRkvlFnTvZH/K4GosM7VQCy+5eFvBrc3y4OBhtSL/Ztx7jeqlYMECpCtZiNEjG1StuMwzAJFcOuf04eo5CYKqHXLLVeb33fzwYCmxo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726488173; c=relaxed/simple; bh=WxtYlBGVCCxL+Las691qhrqx8d/+iyr6qXtIQAGc/Ic=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FgvJrpLe1A1uxgcuA//4nCEg4ONPFv4mq0g32cdkVrzu4W7JZol917Z3xM0wKpWVcj4N+B9y1wLT1LE7Ze2WaiTSAFNSj3Gh2QvFnBbHxSL/r6DKI+GIDk0miKZIhJpZmMuU+iEhaUR8Yc9b4XRaLThPLDSKtuvJLj1cWz5HpJk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=HaVvNJGB; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="HaVvNJGB" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726488172; x=1758024172; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WxtYlBGVCCxL+Las691qhrqx8d/+iyr6qXtIQAGc/Ic=; b=HaVvNJGBN50oi2JAlGSlegXmDBwcq6Zw0J2eackhXO/3dYgs2xaCIiQP 8Eq5lKfSEz0WYoyin6Lt7r6O4Hnn7huLF3+qbtahIvsBG6D0azSzVEDTb s2nF2+j5XVHK0GiPecVjzmLq5IWwf1oRDI6+wKM79bUunR+DQ3w1ESLYv vW9VcvulJwHMVbc2nqFteehZuu6D60YchxGtXOoup5lLV8XoqRClGqI5m R+Y5nPMDZJUrn5SAmmZysD1lAVpk/laWKz6BlnnxT2iuzPCHsaTWMlL1J Z0i/J5/M/o4nbxhX4Do7zUKIyrPd9XZt3oBQprU2Bn93C1nvjJZoiVKGL g==; X-CSE-ConnectionGUID: fyF7t7kzR+a6dTuU2kE8cA== X-CSE-MsgGUID: rNCrHRzORAWk1n6nuyhIiA== X-IronPort-AV: E=McAfee;i="6700,10204,11196"; a="50725465" X-IronPort-AV: E=Sophos;i="6.10,233,1719903600"; d="scan'208";a="50725465" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2024 05:02:41 -0700 X-CSE-ConnectionGUID: oIHKOEOwRnO4a2ffpVE3BQ== X-CSE-MsgGUID: 1uBf27j1SnGh25yb0UNc1w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,233,1719903600"; d="scan'208";a="72939876" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa003.fm.intel.com with ESMTP; 16 Sep 2024 05:02:40 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id AB6F03CB; Mon, 16 Sep 2024 15:02:38 +0300 (EEST) From: Andy Shevchenko To: Andi Shyti , Wolfram Sang , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andy Shevchenko Subject: [PATCH v2 01/11] i2c: isch: Pass pointer to struct i2c_adapter down Date: Mon, 16 Sep 2024 15:01:28 +0300 Message-ID: <20240916120237.1385982-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240916120237.1385982-1-andriy.shevchenko@linux.intel.com> References: <20240916120237.1385982-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 There are a lot of messaging calls that use global variable of struct i2c_adapter. Instead, to make code better and flexible for further improvements, pass the pointer to the actual adapter used for transfers. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 53 +++++++++++++++-------------------- 1 file changed, 23 insertions(+), 30 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index f59158489ad9..96ee73fe6e81 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -55,14 +55,15 @@ MODULE_PARM_DESC(backbone_speed, "Backbone speed in kHz, (default = 33000)"); * and this function will execute it. * return 0 for success and others for failure. */ -static int sch_transaction(void) +static int sch_transaction(struct i2c_adapter *adap) { int temp; int result = 0; int retries = 0; - dev_dbg(&sch_adapter.dev, "Transaction (pre): CNT=%02x, CMD=%02x, " - "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb(SMBHSTCNT), + dev_dbg(&adap->dev, + "Transaction (pre): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", + inb(SMBHSTCNT), inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0), inb(SMBHSTDAT1)); @@ -70,19 +71,14 @@ static int sch_transaction(void) temp = inb(SMBHSTSTS) & 0x0f; if (temp) { /* Can not be busy since we checked it in sch_access */ - if (temp & 0x01) { - dev_dbg(&sch_adapter.dev, "Completion (%02x). " - "Clear...\n", temp); - } - if (temp & 0x06) { - dev_dbg(&sch_adapter.dev, "SMBus error (%02x). " - "Resetting...\n", temp); - } + if (temp & 0x01) + dev_dbg(&adap->dev, "Completion (%02x). Clear...\n", temp); + if (temp & 0x06) + dev_dbg(&adap->dev, "SMBus error (%02x). Resetting...\n", temp); outb(temp, SMBHSTSTS); temp = inb(SMBHSTSTS) & 0x0f; if (temp) { - dev_err(&sch_adapter.dev, - "SMBus is not ready: (%02x)\n", temp); + dev_err(&adap->dev, "SMBus is not ready: (%02x)\n", temp); return -EAGAIN; } } @@ -97,31 +93,30 @@ static int sch_transaction(void) /* If the SMBus is still busy, we give up */ if (retries > MAX_RETRIES) { - dev_err(&sch_adapter.dev, "SMBus Timeout!\n"); + dev_err(&adap->dev, "SMBus Timeout!\n"); result = -ETIMEDOUT; } else if (temp & 0x04) { result = -EIO; - dev_dbg(&sch_adapter.dev, "Bus collision! SMBus may be " - "locked until next hard reset. (sorry!)\n"); + dev_dbg(&adap->dev, "Bus collision! SMBus may be locked until next hard reset. (sorry!)\n"); /* Clock stops and target is stuck in mid-transmission */ } else if (temp & 0x02) { result = -EIO; - dev_err(&sch_adapter.dev, "Error: no response!\n"); + dev_err(&adap->dev, "Error: no response!\n"); } else if (temp & 0x01) { - dev_dbg(&sch_adapter.dev, "Post complete!\n"); + dev_dbg(&adap->dev, "Post complete!\n"); outb(temp, SMBHSTSTS); temp = inb(SMBHSTSTS) & 0x07; if (temp & 0x06) { /* Completion clear failed */ - dev_dbg(&sch_adapter.dev, "Failed reset at end of " - "transaction (%02x), Bus error!\n", temp); + dev_dbg(&adap->dev, + "Failed reset at end of transaction (%02x), Bus error!\n", temp); } } else { result = -ENXIO; - dev_dbg(&sch_adapter.dev, "No such address.\n"); + dev_dbg(&adap->dev, "No such address.\n"); } - dev_dbg(&sch_adapter.dev, "Transaction (post): CNT=%02x, CMD=%02x, " - "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb(SMBHSTCNT), + dev_dbg(&adap->dev, "Transaction (post): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", + inb(SMBHSTCNT), inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0), inb(SMBHSTDAT1)); return result; @@ -143,7 +138,7 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, /* Make sure the SMBus host is not busy */ temp = inb(SMBHSTSTS) & 0x0f; if (temp & 0x08) { - dev_dbg(&sch_adapter.dev, "SMBus busy (%02x)\n", temp); + dev_dbg(&adap->dev, "SMBus busy (%02x)\n", temp); return -EAGAIN; } temp = inw(SMBHSTCLK); @@ -154,13 +149,11 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, * 100 kHz. If we actually run at 25 MHz the bus will be * run ~75 kHz instead which should do no harm. */ - dev_notice(&sch_adapter.dev, - "Clock divider uninitialized. Setting defaults\n"); + dev_notice(&adap->dev, "Clock divider uninitialized. Setting defaults\n"); outw(backbone_speed / (4 * 100), SMBHSTCLK); } - dev_dbg(&sch_adapter.dev, "access size: %d %s\n", size, - (read_write)?"READ":"WRITE"); + dev_dbg(&adap->dev, "access size: %d %s\n", size, (read_write)?"READ":"WRITE"); switch (size) { case I2C_SMBUS_QUICK: outb((addr << 1) | read_write, SMBHSTADD); @@ -205,10 +198,10 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, dev_warn(&adap->dev, "Unsupported transaction %d\n", size); return -EOPNOTSUPP; } - dev_dbg(&sch_adapter.dev, "write size %d to 0x%04x\n", size, SMBHSTCNT); + dev_dbg(&adap->dev, "write size %d to 0x%04x\n", size, SMBHSTCNT); outb((inb(SMBHSTCNT) & 0xb0) | (size & 0x7), SMBHSTCNT); - rc = sch_transaction(); + rc = sch_transaction(adap); if (rc) /* Error in transaction */ return rc; From patchwork Mon Sep 16 12:01:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 829090 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 607D1155336; Mon, 16 Sep 2024 12:02:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726488164; cv=none; b=hpshSZ594U/7sDWY2gd83ZpeNID88lWuab1GQuVYmLe6yx7EG74uaZM0yzN4e5XYAg55DMt6CsG3tMS08MKjghbEUrXthyluXULWUSA2xwJ7kPXjiFaCfEugCyO7O+V7eELIX/t2fBE+bvhR03wVd2rY5sEBmTigLKJE0opPigg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726488164; c=relaxed/simple; bh=3+5K77XZCfuqChhbs/2CXk8I7TKi0QsRyShTaJryNVg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NekbEfPwngEs3bGgS2n803Gy38W4RTr7EySRdvV0Se6bwzffWT+/AcqAYCi3HDgmHKN7/kuNSvTY5DsSjyDEhKp4BN1DnVGk68/7YdAD8x8Pjd7ADUQpNQhHGuOOahaXxbuxcCLsP4a0I5OvtSnExSpTD3lZiz5nrkX0xv6Q8ms= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=D60d0ALZ; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="D60d0ALZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726488163; x=1758024163; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3+5K77XZCfuqChhbs/2CXk8I7TKi0QsRyShTaJryNVg=; b=D60d0ALZYiq9rbAQaGt5ThEEtpyMtUeB3B1+gRp6aKL4OxaChbfqK2UW agpoHYuuqcFYiS3gY4OztcSYm6W6k4KDQQTLzayV8CeHkrGXc6dOd2YcF AHvCWByl/yeKeiMMk39BWK/rGU17oHttatsiJR85Uz4FmLHE2I0oYXslF eiahzBPdbqWCI7SLqLYfdzp/h6xeupkY6amrd1f2In+njWO4IrRkLgElO KwmkJ3yGHxu/CKVx3GG7VdCpH5lxNpH+fILymjJL097GRtCQ05C531aFa cz1Yz/nJHH7YISfy7StnmIL1UxGlvF2P4hGqEiDfQRh3v4GWULkcaeNXC Q==; X-CSE-ConnectionGUID: e9CZKYjYR5mZvxE/xpbgKw== X-CSE-MsgGUID: V4360GjrS5+rDQZDni4ssg== X-IronPort-AV: E=McAfee;i="6700,10204,11196"; a="24842806" X-IronPort-AV: E=Sophos;i="6.10,233,1719903600"; d="scan'208";a="24842806" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2024 05:02:42 -0700 X-CSE-ConnectionGUID: P4UM+2LLQo+ODqetOc3lVg== X-CSE-MsgGUID: MSCHM0yFR3SSTBOy0jzNIw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,233,1719903600"; d="scan'208";a="68540771" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa007.fm.intel.com with ESMTP; 16 Sep 2024 05:02:39 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id BFEB6641; Mon, 16 Sep 2024 15:02:38 +0300 (EEST) From: Andy Shevchenko To: Andi Shyti , Wolfram Sang , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andy Shevchenko Subject: [PATCH v2 03/11] i2c: isch: Switch to memory mapped IO accessors Date: Mon, 16 Sep 2024 15:01:30 +0300 Message-ID: <20240916120237.1385982-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240916120237.1385982-1-andriy.shevchenko@linux.intel.com> References: <20240916120237.1385982-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert driver to use memory mapped IO accessors. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 133 ++++++++++++++++++++-------------- 1 file changed, 78 insertions(+), 55 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index f44c5fa276dc..0eaefb7b8bca 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -24,16 +24,17 @@ #include #include #include +#include /* SCH SMBus address offsets */ -#define SMBHSTCNT (0 + sch_smba) -#define SMBHSTSTS (1 + sch_smba) -#define SMBHSTCLK (2 + sch_smba) -#define SMBHSTADD (4 + sch_smba) /* TSA */ -#define SMBHSTCMD (5 + sch_smba) -#define SMBHSTDAT0 (6 + sch_smba) -#define SMBHSTDAT1 (7 + sch_smba) -#define SMBBLKDAT (0x20 + sch_smba) +#define SMBHSTCNT 0x00 +#define SMBHSTSTS 0x01 +#define SMBHSTCLK 0x02 +#define SMBHSTADD 0x04 /* TSA */ +#define SMBHSTCMD 0x05 +#define SMBHSTDAT0 0x06 +#define SMBHSTDAT1 0x07 +#define SMBBLKDAT 0x20 /* Other settings */ #define MAX_RETRIES 5000 @@ -45,12 +46,33 @@ #define SCH_WORD_DATA 0x03 #define SCH_BLOCK_DATA 0x05 -static unsigned short sch_smba; static struct i2c_adapter sch_adapter; +static void __iomem *sch_smba; + static int backbone_speed = 33000; /* backbone speed in kHz */ module_param(backbone_speed, int, S_IRUSR | S_IWUSR); MODULE_PARM_DESC(backbone_speed, "Backbone speed in kHz, (default = 33000)"); +static inline u8 sch_io_rd8(void __iomem *smba, unsigned int offset) +{ + return ioread8(smba + offset); +} + +static inline void sch_io_wr8(void __iomem *smba, unsigned int offset, u8 value) +{ + iowrite8(value, smba + offset); +} + +static inline u16 sch_io_rd16(void __iomem *smba, unsigned int offset) +{ + return ioread16(smba + offset); +} + +static inline void sch_io_wr16(void __iomem *smba, unsigned int offset, u16 value) +{ + iowrite16(value, smba + offset); +} + /* * Start the i2c transaction -- the i2c_access will prepare the transaction * and this function will execute it. @@ -64,20 +86,20 @@ static int sch_transaction(struct i2c_adapter *adap) dev_dbg(&adap->dev, "Transaction (pre): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", - inb(SMBHSTCNT), - inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0), - inb(SMBHSTDAT1)); + sch_io_rd8(sch_smba, SMBHSTCNT), sch_io_rd8(sch_smba, SMBHSTCMD), + sch_io_rd8(sch_smba, SMBHSTADD), + sch_io_rd8(sch_smba, SMBHSTDAT0), sch_io_rd8(sch_smba, SMBHSTDAT1)); /* Make sure the SMBus host is ready to start transmitting */ - temp = inb(SMBHSTSTS) & 0x0f; + temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; if (temp) { /* Can not be busy since we checked it in sch_access */ if (temp & 0x01) dev_dbg(&adap->dev, "Completion (%02x). Clear...\n", temp); if (temp & 0x06) dev_dbg(&adap->dev, "SMBus error (%02x). Resetting...\n", temp); - outb(temp, SMBHSTSTS); - temp = inb(SMBHSTSTS) & 0x0f; + sch_io_wr8(sch_smba, SMBHSTSTS, temp); + temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; if (temp) { dev_err(&adap->dev, "SMBus is not ready: (%02x)\n", temp); return -EAGAIN; @@ -85,11 +107,13 @@ static int sch_transaction(struct i2c_adapter *adap) } /* start the transaction by setting bit 4 */ - outb(inb(SMBHSTCNT) | 0x10, SMBHSTCNT); + temp = sch_io_rd8(sch_smba, SMBHSTCNT); + temp |= 0x10; + sch_io_wr8(sch_smba, SMBHSTCNT, temp); do { usleep_range(100, 200); - temp = inb(SMBHSTSTS) & 0x0f; + temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; } while ((temp & 0x08) && (retries++ < MAX_RETRIES)); /* If the SMBus is still busy, we give up */ @@ -105,8 +129,8 @@ static int sch_transaction(struct i2c_adapter *adap) dev_err(&adap->dev, "Error: no response!\n"); } else if (temp & 0x01) { dev_dbg(&adap->dev, "Post complete!\n"); - outb(temp, SMBHSTSTS); - temp = inb(SMBHSTSTS) & 0x07; + sch_io_wr8(sch_smba, SMBHSTSTS, temp); + temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x07; if (temp & 0x06) { /* Completion clear failed */ dev_dbg(&adap->dev, @@ -117,9 +141,9 @@ static int sch_transaction(struct i2c_adapter *adap) dev_dbg(&adap->dev, "No such address.\n"); } dev_dbg(&adap->dev, "Transaction (post): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", - inb(SMBHSTCNT), - inb(SMBHSTCMD), inb(SMBHSTADD), inb(SMBHSTDAT0), - inb(SMBHSTDAT1)); + sch_io_rd8(sch_smba, SMBHSTCNT), sch_io_rd8(sch_smba, SMBHSTCMD), + sch_io_rd8(sch_smba, SMBHSTADD), + sch_io_rd8(sch_smba, SMBHSTDAT0), sch_io_rd8(sch_smba, SMBHSTDAT1)); return result; } @@ -137,12 +161,12 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, int i, len, temp, rc; /* Make sure the SMBus host is not busy */ - temp = inb(SMBHSTSTS) & 0x0f; + temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; if (temp & 0x08) { dev_dbg(&adap->dev, "SMBus busy (%02x)\n", temp); return -EAGAIN; } - temp = inw(SMBHSTCLK); + temp = sch_io_rd16(sch_smba, SMBHSTCLK); if (!temp) { /* * We can't determine if we have 33 or 25 MHz clock for @@ -151,47 +175,47 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, * run ~75 kHz instead which should do no harm. */ dev_notice(&adap->dev, "Clock divider uninitialized. Setting defaults\n"); - outw(backbone_speed / (4 * 100), SMBHSTCLK); + sch_io_wr16(sch_smba, SMBHSTCLK, backbone_speed / (4 * 100)); } dev_dbg(&adap->dev, "access size: %d %s\n", size, str_read_write(read_write)); switch (size) { case I2C_SMBUS_QUICK: - outb((addr << 1) | read_write, SMBHSTADD); + sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); size = SCH_QUICK; break; case I2C_SMBUS_BYTE: - outb((addr << 1) | read_write, SMBHSTADD); + sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); if (read_write == I2C_SMBUS_WRITE) - outb(command, SMBHSTCMD); + sch_io_wr8(sch_smba, SMBHSTCMD, command); size = SCH_BYTE; break; case I2C_SMBUS_BYTE_DATA: - outb((addr << 1) | read_write, SMBHSTADD); - outb(command, SMBHSTCMD); + sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(sch_smba, SMBHSTCMD, command); if (read_write == I2C_SMBUS_WRITE) - outb(data->byte, SMBHSTDAT0); + sch_io_wr8(sch_smba, SMBHSTDAT0, data->byte); size = SCH_BYTE_DATA; break; case I2C_SMBUS_WORD_DATA: - outb((addr << 1) | read_write, SMBHSTADD); - outb(command, SMBHSTCMD); + sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(sch_smba, SMBHSTCMD, command); if (read_write == I2C_SMBUS_WRITE) { - outb(data->word & 0xff, SMBHSTDAT0); - outb((data->word & 0xff00) >> 8, SMBHSTDAT1); + sch_io_wr8(sch_smba, SMBHSTDAT0, data->word >> 0); + sch_io_wr8(sch_smba, SMBHSTDAT1, data->word >> 8); } size = SCH_WORD_DATA; break; case I2C_SMBUS_BLOCK_DATA: - outb((addr << 1) | read_write, SMBHSTADD); - outb(command, SMBHSTCMD); + sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(sch_smba, SMBHSTCMD, command); if (read_write == I2C_SMBUS_WRITE) { len = data->block[0]; if (len == 0 || len > I2C_SMBUS_BLOCK_MAX) return -EINVAL; - outb(len, SMBHSTDAT0); + sch_io_wr8(sch_smba, SMBHSTDAT0, len); for (i = 1; i <= len; i++) - outb(data->block[i], SMBBLKDAT+i-1); + sch_io_wr8(sch_smba, SMBBLKDAT + i - 1, data->block[i]); } size = SCH_BLOCK_DATA; break; @@ -200,7 +224,10 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, return -EOPNOTSUPP; } dev_dbg(&adap->dev, "write size %d to 0x%04x\n", size, SMBHSTCNT); - outb((inb(SMBHSTCNT) & 0xb0) | (size & 0x7), SMBHSTCNT); + + temp = sch_io_rd8(sch_smba, SMBHSTCNT); + temp = (temp & 0xb0) | (size & 0x7); + sch_io_wr8(sch_smba, SMBHSTCNT, temp); rc = sch_transaction(adap); if (rc) /* Error in transaction */ @@ -212,17 +239,18 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, switch (size) { case SCH_BYTE: case SCH_BYTE_DATA: - data->byte = inb(SMBHSTDAT0); + data->byte = sch_io_rd8(sch_smba, SMBHSTDAT0); break; case SCH_WORD_DATA: - data->word = inb(SMBHSTDAT0) + (inb(SMBHSTDAT1) << 8); + data->word = (sch_io_rd8(sch_smba, SMBHSTDAT0) << 0) + + (sch_io_rd8(sch_smba, SMBHSTDAT1) << 8); break; case SCH_BLOCK_DATA: - data->block[0] = inb(SMBHSTDAT0); + data->block[0] = sch_io_rd8(sch_smba, SMBHSTDAT0); if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX) return -EPROTO; for (i = 1; i <= data->block[0]; i++) - data->block[i] = inb(SMBBLKDAT+i-1); + data->block[i] = sch_io_rd8(sch_smba, SMBBLKDAT + i - 1); break; } return 0; @@ -255,26 +283,21 @@ static int smbus_sch_probe(struct platform_device *dev) if (!res) return -EBUSY; - if (!devm_request_region(&dev->dev, res->start, resource_size(res), - dev->name)) { - dev_err(&dev->dev, "SMBus region 0x%x already in use!\n", - sch_smba); + sch_smba = devm_ioport_map(&dev->dev, res->start, resource_size(res)); + if (!sch_smba) { + dev_err(&dev->dev, "SMBus region %pR already in use!\n", res); return -EBUSY; } - sch_smba = res->start; - - dev_dbg(&dev->dev, "SMBA = 0x%X\n", sch_smba); - /* set up the sysfs linkage to our parent device */ sch_adapter.dev.parent = &dev->dev; snprintf(sch_adapter.name, sizeof(sch_adapter.name), - "SMBus SCH adapter at %04x", sch_smba); + "SMBus SCH adapter at %04x", (unsigned short)res->start); retval = i2c_add_adapter(&sch_adapter); if (retval) - sch_smba = 0; + sch_smba = NULL; return retval; } @@ -283,7 +306,7 @@ static void smbus_sch_remove(struct platform_device *pdev) { if (sch_smba) { i2c_del_adapter(&sch_adapter); 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16 Sep 2024 05:02:39 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id CBCCC64A; Mon, 16 Sep 2024 15:02:38 +0300 (EEST) From: Andy Shevchenko To: Andi Shyti , Wolfram Sang , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andy Shevchenko Subject: [PATCH v2 04/11] i2c: isch: Use custom private data structure Date: Mon, 16 Sep 2024 15:01:31 +0300 Message-ID: <20240916120237.1385982-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240916120237.1385982-1-andriy.shevchenko@linux.intel.com> References: <20240916120237.1385982-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Use custom private data structure instead of global variables. With that, remove not anymore true comment. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 145 ++++++++++++++++++---------------- 1 file changed, 75 insertions(+), 70 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index 0eaefb7b8bca..0fe7c9d1dd0d 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -9,16 +9,14 @@ */ -/* - Supports: - Intel SCH chipsets (AF82US15W, AF82US15L, AF82UL11L) - Note: we assume there can only be one device, with one SMBus interface. -*/ +/* Supports: Intel SCH chipsets (AF82US15W, AF82US15L, AF82UL11L) */ #include #include #include +#include #include +#include #include #include #include @@ -46,31 +44,33 @@ #define SCH_WORD_DATA 0x03 #define SCH_BLOCK_DATA 0x05 -static struct i2c_adapter sch_adapter; -static void __iomem *sch_smba; +struct sch_i2c { + struct i2c_adapter adapter; + void __iomem *smba; +}; static int backbone_speed = 33000; /* backbone speed in kHz */ module_param(backbone_speed, int, S_IRUSR | S_IWUSR); MODULE_PARM_DESC(backbone_speed, "Backbone speed in kHz, (default = 33000)"); -static inline u8 sch_io_rd8(void __iomem *smba, unsigned int offset) +static inline u8 sch_io_rd8(struct sch_i2c *priv, unsigned int offset) { - return ioread8(smba + offset); + return ioread8(priv->smba + offset); } -static inline void sch_io_wr8(void __iomem *smba, unsigned int offset, u8 value) +static inline void sch_io_wr8(struct sch_i2c *priv, unsigned int offset, u8 value) { - iowrite8(value, smba + offset); + iowrite8(value, priv->smba + offset); } -static inline u16 sch_io_rd16(void __iomem *smba, unsigned int offset) +static inline u16 sch_io_rd16(struct sch_i2c *priv, unsigned int offset) { - return ioread16(smba + offset); + return ioread16(priv->smba + offset); } -static inline void sch_io_wr16(void __iomem *smba, unsigned int offset, u16 value) +static inline void sch_io_wr16(struct sch_i2c *priv, unsigned int offset, u16 value) { - iowrite16(value, smba + offset); + iowrite16(value, priv->smba + offset); } /* @@ -80,26 +80,27 @@ static inline void sch_io_wr16(void __iomem *smba, unsigned int offset, u16 valu */ static int sch_transaction(struct i2c_adapter *adap) { + struct sch_i2c *priv = container_of(adap, struct sch_i2c, adapter); int temp; int result = 0; int retries = 0; dev_dbg(&adap->dev, "Transaction (pre): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", - sch_io_rd8(sch_smba, SMBHSTCNT), sch_io_rd8(sch_smba, SMBHSTCMD), - sch_io_rd8(sch_smba, SMBHSTADD), - sch_io_rd8(sch_smba, SMBHSTDAT0), sch_io_rd8(sch_smba, SMBHSTDAT1)); + sch_io_rd8(priv, SMBHSTCNT), sch_io_rd8(priv, SMBHSTCMD), + sch_io_rd8(priv, SMBHSTADD), + sch_io_rd8(priv, SMBHSTDAT0), sch_io_rd8(priv, SMBHSTDAT1)); /* Make sure the SMBus host is ready to start transmitting */ - temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; + temp = sch_io_rd8(priv, SMBHSTSTS) & 0x0f; if (temp) { /* Can not be busy since we checked it in sch_access */ if (temp & 0x01) dev_dbg(&adap->dev, "Completion (%02x). Clear...\n", temp); if (temp & 0x06) dev_dbg(&adap->dev, "SMBus error (%02x). Resetting...\n", temp); - sch_io_wr8(sch_smba, SMBHSTSTS, temp); - temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; + sch_io_wr8(priv, SMBHSTSTS, temp); + temp = sch_io_rd8(priv, SMBHSTSTS) & 0x0f; if (temp) { dev_err(&adap->dev, "SMBus is not ready: (%02x)\n", temp); return -EAGAIN; @@ -107,13 +108,13 @@ static int sch_transaction(struct i2c_adapter *adap) } /* start the transaction by setting bit 4 */ - temp = sch_io_rd8(sch_smba, SMBHSTCNT); + temp = sch_io_rd8(priv, SMBHSTCNT); temp |= 0x10; - sch_io_wr8(sch_smba, SMBHSTCNT, temp); + sch_io_wr8(priv, SMBHSTCNT, temp); do { usleep_range(100, 200); - temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; + temp = sch_io_rd8(priv, SMBHSTSTS) & 0x0f; } while ((temp & 0x08) && (retries++ < MAX_RETRIES)); /* If the SMBus is still busy, we give up */ @@ -129,8 +130,8 @@ static int sch_transaction(struct i2c_adapter *adap) dev_err(&adap->dev, "Error: no response!\n"); } else if (temp & 0x01) { dev_dbg(&adap->dev, "Post complete!\n"); - sch_io_wr8(sch_smba, SMBHSTSTS, temp); - temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x07; + sch_io_wr8(priv, SMBHSTSTS, temp); + temp = sch_io_rd8(priv, SMBHSTSTS) & 0x07; if (temp & 0x06) { /* Completion clear failed */ dev_dbg(&adap->dev, @@ -141,9 +142,9 @@ static int sch_transaction(struct i2c_adapter *adap) dev_dbg(&adap->dev, "No such address.\n"); } dev_dbg(&adap->dev, "Transaction (post): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", - sch_io_rd8(sch_smba, SMBHSTCNT), sch_io_rd8(sch_smba, SMBHSTCMD), - sch_io_rd8(sch_smba, SMBHSTADD), - sch_io_rd8(sch_smba, SMBHSTDAT0), sch_io_rd8(sch_smba, SMBHSTDAT1)); + sch_io_rd8(priv, SMBHSTCNT), sch_io_rd8(priv, SMBHSTCMD), + sch_io_rd8(priv, SMBHSTADD), + sch_io_rd8(priv, SMBHSTDAT0), sch_io_rd8(priv, SMBHSTDAT1)); return result; } @@ -158,15 +159,16 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data *data) { + struct sch_i2c *priv = container_of(adap, struct sch_i2c, adapter); int i, len, temp, rc; /* Make sure the SMBus host is not busy */ - temp = sch_io_rd8(sch_smba, SMBHSTSTS) & 0x0f; + temp = sch_io_rd8(priv, SMBHSTSTS) & 0x0f; if (temp & 0x08) { dev_dbg(&adap->dev, "SMBus busy (%02x)\n", temp); return -EAGAIN; } - temp = sch_io_rd16(sch_smba, SMBHSTCLK); + temp = sch_io_rd16(priv, SMBHSTCLK); if (!temp) { /* * We can't determine if we have 33 or 25 MHz clock for @@ -175,47 +177,47 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, * run ~75 kHz instead which should do no harm. */ dev_notice(&adap->dev, "Clock divider uninitialized. Setting defaults\n"); - sch_io_wr16(sch_smba, SMBHSTCLK, backbone_speed / (4 * 100)); + sch_io_wr16(priv, SMBHSTCLK, backbone_speed / (4 * 100)); } dev_dbg(&adap->dev, "access size: %d %s\n", size, str_read_write(read_write)); switch (size) { case I2C_SMBUS_QUICK: - sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(priv, SMBHSTADD, (addr << 1) | read_write); size = SCH_QUICK; break; case I2C_SMBUS_BYTE: - sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(priv, SMBHSTADD, (addr << 1) | read_write); if (read_write == I2C_SMBUS_WRITE) - sch_io_wr8(sch_smba, SMBHSTCMD, command); + sch_io_wr8(priv, SMBHSTCMD, command); size = SCH_BYTE; break; case I2C_SMBUS_BYTE_DATA: - sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); - sch_io_wr8(sch_smba, SMBHSTCMD, command); + sch_io_wr8(priv, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(priv, SMBHSTCMD, command); if (read_write == I2C_SMBUS_WRITE) - sch_io_wr8(sch_smba, SMBHSTDAT0, data->byte); + sch_io_wr8(priv, SMBHSTDAT0, data->byte); size = SCH_BYTE_DATA; break; case I2C_SMBUS_WORD_DATA: - sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); - sch_io_wr8(sch_smba, SMBHSTCMD, command); + sch_io_wr8(priv, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(priv, SMBHSTCMD, command); if (read_write == I2C_SMBUS_WRITE) { - sch_io_wr8(sch_smba, SMBHSTDAT0, data->word >> 0); - sch_io_wr8(sch_smba, SMBHSTDAT1, data->word >> 8); + sch_io_wr8(priv, SMBHSTDAT0, data->word >> 0); + sch_io_wr8(priv, SMBHSTDAT1, data->word >> 8); } size = SCH_WORD_DATA; break; case I2C_SMBUS_BLOCK_DATA: - sch_io_wr8(sch_smba, SMBHSTADD, (addr << 1) | read_write); - sch_io_wr8(sch_smba, SMBHSTCMD, command); + sch_io_wr8(priv, SMBHSTADD, (addr << 1) | read_write); + sch_io_wr8(priv, SMBHSTCMD, command); if (read_write == I2C_SMBUS_WRITE) { len = data->block[0]; if (len == 0 || len > I2C_SMBUS_BLOCK_MAX) return -EINVAL; - sch_io_wr8(sch_smba, SMBHSTDAT0, len); + sch_io_wr8(priv, SMBHSTDAT0, len); for (i = 1; i <= len; i++) - sch_io_wr8(sch_smba, SMBBLKDAT + i - 1, data->block[i]); + sch_io_wr8(priv, SMBBLKDAT + i - 1, data->block[i]); } size = SCH_BLOCK_DATA; break; @@ -225,9 +227,9 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, } dev_dbg(&adap->dev, "write size %d to 0x%04x\n", size, SMBHSTCNT); - temp = sch_io_rd8(sch_smba, SMBHSTCNT); + temp = sch_io_rd8(priv, SMBHSTCNT); temp = (temp & 0xb0) | (size & 0x7); - sch_io_wr8(sch_smba, SMBHSTCNT, temp); + sch_io_wr8(priv, SMBHSTCNT, temp); rc = sch_transaction(adap); if (rc) /* Error in transaction */ @@ -239,18 +241,18 @@ static s32 sch_access(struct i2c_adapter *adap, u16 addr, switch (size) { case SCH_BYTE: case SCH_BYTE_DATA: - data->byte = sch_io_rd8(sch_smba, SMBHSTDAT0); + data->byte = sch_io_rd8(priv, SMBHSTDAT0); break; case SCH_WORD_DATA: - data->word = (sch_io_rd8(sch_smba, SMBHSTDAT0) << 0) + - (sch_io_rd8(sch_smba, SMBHSTDAT1) << 8); + data->word = (sch_io_rd8(priv, SMBHSTDAT0) << 0) + + (sch_io_rd8(priv, SMBHSTDAT1) << 8); break; case SCH_BLOCK_DATA: - data->block[0] = sch_io_rd8(sch_smba, SMBHSTDAT0); + data->block[0] = sch_io_rd8(priv, SMBHSTDAT0); if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX) return -EPROTO; for (i = 1; i <= data->block[0]; i++) - data->block[i] = sch_io_rd8(sch_smba, SMBBLKDAT + i - 1); + data->block[i] = sch_io_rd8(priv, SMBBLKDAT + i - 1); break; } return 0; @@ -268,46 +270,49 @@ static const struct i2c_algorithm smbus_algorithm = { .functionality = sch_func, }; -static struct i2c_adapter sch_adapter = { - .owner = THIS_MODULE, - .class = I2C_CLASS_HWMON, - .algo = &smbus_algorithm, -}; - static int smbus_sch_probe(struct platform_device *dev) { + struct sch_i2c *priv; struct resource *res; int retval; + priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + res = platform_get_resource(dev, IORESOURCE_IO, 0); if (!res) return -EBUSY; - sch_smba = devm_ioport_map(&dev->dev, res->start, resource_size(res)); - if (!sch_smba) { + priv->smba = devm_ioport_map(&dev->dev, res->start, resource_size(res)); + if (!priv->smba) { dev_err(&dev->dev, "SMBus region %pR already in use!\n", res); return -EBUSY; } /* set up the sysfs linkage to our parent device */ - sch_adapter.dev.parent = &dev->dev; + priv->adapter.dev.parent = &dev->dev; + priv->adapter.owner = THIS_MODULE, + priv->adapter.class = I2C_CLASS_HWMON, + priv->adapter.algo = &smbus_algorithm, - snprintf(sch_adapter.name, sizeof(sch_adapter.name), + snprintf(priv->adapter.name, sizeof(priv->adapter.name), "SMBus SCH adapter at %04x", (unsigned short)res->start); - retval = i2c_add_adapter(&sch_adapter); + retval = i2c_add_adapter(&priv->adapter); if (retval) - sch_smba = NULL; + return retval; - return retval; + platform_set_drvdata(dev, priv); + + return 0; } static void smbus_sch_remove(struct platform_device *pdev) { - if (sch_smba) { - i2c_del_adapter(&sch_adapter); - sch_smba = NULL; - } + struct sch_i2c *priv = platform_get_drvdata(pdev); + + i2c_del_adapter(&priv->adapter); } static struct platform_driver smbus_sch_driver = { From patchwork Mon Sep 16 12:01:32 2024 Content-Type: text/plain; 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Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index 0fe7c9d1dd0d..d752f822b52e 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -274,7 +274,6 @@ static int smbus_sch_probe(struct platform_device *dev) { struct sch_i2c *priv; struct resource *res; - int retval; priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -299,20 +298,7 @@ static int smbus_sch_probe(struct platform_device *dev) snprintf(priv->adapter.name, sizeof(priv->adapter.name), "SMBus SCH adapter at %04x", (unsigned short)res->start); - retval = i2c_add_adapter(&priv->adapter); - if (retval) - return retval; - - platform_set_drvdata(dev, priv); - - return 0; -} - -static void smbus_sch_remove(struct platform_device *pdev) -{ - struct sch_i2c *priv = platform_get_drvdata(pdev); - - i2c_del_adapter(&priv->adapter); + return devm_i2c_add_adapter(&dev->dev, &priv->adapter); } static struct platform_driver smbus_sch_driver = { @@ -320,7 +306,6 @@ static struct platform_driver smbus_sch_driver = { .name = "isch_smbus", }, .probe = smbus_sch_probe, - .remove_new = smbus_sch_remove, }; module_platform_driver(smbus_sch_driver); From patchwork Mon Sep 16 12:01:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 829087 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7C2D156C5F; Mon, 16 Sep 2024 12:02:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726488169; cv=none; b=GG16hs/gS4pMXNK5P0EKEbQ2c/3JJu5WZi8ODbMPKvIf7+yXHNIfp+2dpKqCrdSw8BwMYStubwo/McygxoQls06/CQkLYWzeB9Q1diRWP1CBkvgFrZ2OdcBEUZiQixpY3/StlIrSqU+nFZmSK8Wt1bFx7BYZBHPFI6tdllglCuU= ARC-Message-Signature: i=1; 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d="scan'208";a="68540778" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa007.fm.intel.com with ESMTP; 16 Sep 2024 05:02:42 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id E17C567E; Mon, 16 Sep 2024 15:02:38 +0300 (EEST) From: Andy Shevchenko To: Andi Shyti , Wolfram Sang , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andy Shevchenko Subject: [PATCH v2 07/11] i2c: isch: Use read_poll_timeout() Date: Mon, 16 Sep 2024 15:01:34 +0300 Message-ID: <20240916120237.1385982-8-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240916120237.1385982-1-andriy.shevchenko@linux.intel.com> References: <20240916120237.1385982-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Simplify the code by using read_poll_timeout(). Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 20 ++++++-------------- 1 file changed, 6 insertions(+), 14 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index d0098b7139a0..e6b99913f4f3 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -17,9 +17,9 @@ #include #include #include -#include #include -#include +#include +#include #include #include #include @@ -34,9 +34,6 @@ #define SMBHSTDAT1 0x07 #define SMBBLKDAT 0x20 -/* Other settings */ -#define MAX_RETRIES 5000 - /* I2C constants */ #define SCH_QUICK 0x00 #define SCH_BYTE 0x01 @@ -83,7 +80,6 @@ static int sch_transaction(struct i2c_adapter *adap) struct sch_i2c *priv = container_of(adap, struct sch_i2c, adapter); int temp; int result = 0; - int retries = 0; dev_dbg(&adap->dev, "Transaction (pre): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", @@ -112,15 +108,11 @@ static int sch_transaction(struct i2c_adapter *adap) temp |= 0x10; sch_io_wr8(priv, SMBHSTCNT, temp); - do { - usleep_range(100, 200); - temp = sch_io_rd8(priv, SMBHSTSTS) & 0x0f; - } while ((temp & 0x08) && (retries++ < MAX_RETRIES)); - + result = read_poll_timeout(sch_io_rd8, temp, !(temp & 0x08), 200, 500000, true, + priv, SMBHSTSTS); /* If the SMBus is still busy, we give up */ - if (retries > MAX_RETRIES) { + if (result) { dev_err(&adap->dev, "SMBus Timeout!\n"); - result = -ETIMEDOUT; } else if (temp & 0x04) { result = -EIO; dev_dbg(&adap->dev, "Bus collision! SMBus may be locked until next hard reset. (sorry!)\n"); @@ -130,7 +122,7 @@ static int sch_transaction(struct i2c_adapter *adap) dev_err(&adap->dev, "Error: no response!\n"); } else if (temp & 0x01) { dev_dbg(&adap->dev, "Post complete!\n"); - sch_io_wr8(priv, SMBHSTSTS, temp); + sch_io_wr8(priv, SMBHSTSTS, temp & 0x0f); temp = sch_io_rd8(priv, SMBHSTSTS) & 0x07; if (temp & 0x06) { /* Completion clear failed */ From patchwork Mon Sep 16 12:01:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 829088 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B818C156237; Mon, 16 Sep 2024 12:02:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726488168; cv=none; b=pLsq+0xZPg07rC9S6Le6iuDTpikwmkYx0zFquTFe+ix+s4PT+KqLmPfL6FpLxCa7baWCMmpndejLaTI7Jv/pZ7XBEyMzIpA2bMcuo3xdTjVUB95jG1loqd20qyzX8+bSJnTQ79jE5xEapTpjPikouomu39kV0PAREbwxYFDB09A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726488168; c=relaxed/simple; bh=aL3gCHi3APo2vDRNIL3hkz/MXq651eltciPJzDM06GU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cD0xxMf51C/jpewPLNSJU9EQmUlq+mJZOzhkwp0SYOfgq16u505eBtvDofBnfldJN5S6tn7nvViEf/Qq+mf8IuNVMU+AbiEaGDYS2Nzkyz3hVww0PiBEZKuPBpq9txMA0MdhGKJDBZrSPSogUG8xTAKpC8wR0YAaaz3iyD7oRlM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=UVytRDYQ; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="UVytRDYQ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726488167; x=1758024167; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aL3gCHi3APo2vDRNIL3hkz/MXq651eltciPJzDM06GU=; b=UVytRDYQVh7Bs29AwvokblmLT6fOnTFuWDBxcg5A+vlbnCeh1U5n49Qb afUouYIIVlsLmQFofFIdBgi9MM8XP2hiKV6XanIxWHubz5IB1hekzq59x LSM67OjFm8vCQIPU7Z9ptcs0ZHTLq6OrBeClv8maablKHxZI4+H7yTlq1 nouYav42GcfqDBc+jqogBDDNM/rRo95AQuPVkWO5eqahmOFGDAgAolN/u DxR/8/w2iHzmVakkxkT8lsRZSPQyv//8jKG1L7vqvkrms3AipiGWN7Whx JiSGKu4KmKNdxuvVUoTHz8o7AxGxWI8q75uNyiq1P7g/gVX9LKTUJVaMa g==; X-CSE-ConnectionGUID: vtgbe30MSIC17aZ7PgqQZQ== X-CSE-MsgGUID: c+NZVy1/TumroeXqRLqLxA== X-IronPort-AV: E=McAfee;i="6700,10204,11196"; a="24842819" X-IronPort-AV: E=Sophos;i="6.10,233,1719903600"; d="scan'208";a="24842819" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2024 05:02:44 -0700 X-CSE-ConnectionGUID: bl69jk88RZOBUYbkJMIvDw== X-CSE-MsgGUID: 6I/rRm3nQsOIeIN684yRgQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,233,1719903600"; d="scan'208";a="68540779" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa007.fm.intel.com with ESMTP; 16 Sep 2024 05:02:42 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id F406868A; Mon, 16 Sep 2024 15:02:38 +0300 (EEST) From: Andy Shevchenko To: Andi Shyti , Wolfram Sang , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jean Delvare , Andy Shevchenko Subject: [PATCH v2 09/11] i2c: isch: Don't use "proxy" headers Date: Mon, 16 Sep 2024 15:01:36 +0300 Message-ID: <20240916120237.1385982-10-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20240916120237.1385982-1-andriy.shevchenko@linux.intel.com> References: <20240916120237.1385982-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Update header inclusions to follow IWYU (Include What You Use) principle. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-isch.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c index d71a42fd9dd9..1a18a276a857 100644 --- a/drivers/i2c/busses/i2c-isch.c +++ b/drivers/i2c/busses/i2c-isch.c @@ -11,15 +11,17 @@ /* Supports: Intel SCH chipsets (AF82US15W, AF82US15L, AF82UL11L) */ -#include -#include -#include #include #include #include +#include +#include #include #include #include +#include +#include +#include #include #include #include