From patchwork Sat Nov 23 20:37:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180123 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp1128456ilf; Sat, 23 Nov 2019 12:38:12 -0800 (PST) X-Google-Smtp-Source: APXvYqy2EMurcgW8PKLPGcbn7kPysEvRLMg4PpxLC4d7akYO+7tQnHpKcmiMzk8dPB6VAAvYcRHp X-Received: by 2002:a50:a2e5:: with SMTP id 92mr9064456edm.195.1574541492765; Sat, 23 Nov 2019 12:38:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574541492; cv=none; d=google.com; s=arc-20160816; b=meEyC0YM2yMQOGTxfqwLpsQyEZDJtp3Y/qmo4UVD3xnSxXnfr+IPNiQxOD76Nc1suP 7oV/lWeMjeCvtSUcBS4wFhG7ip7AIdUaMWtU/95aIG6H+udo1V1fNCyoq3IXaNCO8VCL jsn0GlRum5Bro1oUt7/L4d5L2WrYapHtuTs+TqlYozEXk/iXk0triIeayfRZrWkIXT+W Hemy2pCDGhtq17ya4NctJ9Sv1iyYK95nlB8TtL9KdzPLi34As5pEJS8B+BtxtRlZie0I qfCWd+Poogc1ymiNFgtlqR8GggWpMzvGcPUOadBNPBXJqy4sVvhBqfD0/02jUzQYLREV Ug2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=uTczdc65GI5J0hXwAr0bvOCHn0fWkDG0O4d37Q4eFTA=; b=oNy7aO5WDrBBaS668Rbxs44VBrEEZzqEk51VKyZixfDr6qMaTaxqTuIIFiqk9NRVv9 AMMCDEklxx2JqFrvVlmdCPD+EWdI6lUnozm63VsPr8HwrjxwOtoW+mx5dXglSkZTe5lW /h7LQIyk5Q2yHs7NCSOn4o6S/JS0I5hPNb2GcoT22iDUBzppgdBIm0ZrIrp006GZAikg 4P4X3C/GdAseLfkycl4eLwfGp+O99TBqjHi/+YuJzpmlo1bcGgnha6+XlKAa9zH8EeeX EmB4LncFK1ldcneXdHYTtHRhw+LqgwtpqWIpG6767ivY/J2RFF/+Ktj4TjigTOvex5vw q+Mw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id rv12si1366078ejb.372.2019.11.23.12.38.12; Sat, 23 Nov 2019 12:38:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726887AbfKWUiL (ORCPT + 26 others); Sat, 23 Nov 2019 15:38:11 -0500 Received: from mx2.suse.de ([195.135.220.15]:34312 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726752AbfKWUiK (ORCPT ); Sat, 23 Nov 2019 15:38:10 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id E19C3AEB8; Sat, 23 Nov 2019 20:38:08 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v4 1/8] dt-bindings: arm: realtek: Add RTD1195 and MeLE X1000 Date: Sat, 23 Nov 2019 21:37:52 +0100 Message-Id: <20191123203759.20708-2-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191123203759.20708-1-afaerber@suse.de> References: <20191123203759.20708-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add bindings for Realtek RTD1195 SoC and MeLE X1000 TV box. Reviewed-by: Rob Herring Signed-off-by: Andreas Färber --- v1 -> v2 -> v3 -> v4: Unchanged Documentation/devicetree/bindings/arm/realtek.yaml | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.16.4 diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml index ab59de17152d..091616880d25 100644 --- a/Documentation/devicetree/bindings/arm/realtek.yaml +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -14,6 +14,12 @@ properties: const: '/' compatible: oneOf: + # RTD1195 SoC based boards + - items: + - enum: + - mele,x1000 # MeLE X1000 + - const: realtek,rtd1195 + # RTD1293 SoC based boards - items: - enum: From patchwork Sat Nov 23 20:37:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180125 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp1128514ilf; Sat, 23 Nov 2019 12:38:18 -0800 (PST) X-Google-Smtp-Source: APXvYqxhmm2HD7vW9Pg27vUFJw5gdeGauOVM6WECMQbvNBNdCTga9aUTLGTr0aFjd32K23a2jL2W X-Received: by 2002:a50:f081:: with SMTP id v1mr8893109edl.131.1574541498121; Sat, 23 Nov 2019 12:38:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574541498; cv=none; d=google.com; s=arc-20160816; b=cYzlWZeeZg5GaUUPf8Gb3cuqgD99SOWcGBM8DIQrZhh3Ei95T/2nm5l15muCh9DigX rZPEHD1wtC94VGZ63FjHsJJz9TWFpRhOgQX1dmFjbEAIICvRDKhSqYP/Sxg3KnGrfLB1 jbU7u9pHxRnKnWxunckmZ3QRaVWXfYYuuL+mc91D+Fl4bP+4/qpSqPd7eC5cEPr3yg4L 5izz9mc1+Aztj9YJ31Ff5lnc/9ZEaHNfVTGN8VkNDAgeLM/zY+xwX4iWak29UlmLK0tb L3Z0YQBUni1u5qmuf3mNoxY4qWV7CWMcWMuLOfatqNxGOjUAb7yEypsGxBEJ+lyTjMMo /h8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=OGqD0XOHNzjV67xmklvwuAsANZB3lGomhrKJRWHmssc=; b=iw/4GCN9p0PD5UJesI4V4JWWjNo8EfAU2sdJlvX0R8QGHV9C1LM3P1RZ0s83kC5tVR VlFaUUDAbeCdWSZdFUNID4tFdHy6qAj2E2klRx6D+Nf4RPy+40Bf5oo4/efqHV4sfIB3 FZQida+3XOLZ0KTK1uZbKX3wjlrH7Q2K7nAM95R7E19wxmPw9DTh0bIFD0QL2v6K1neT yeoJwX2tuzzDU8akMWkytlJfvSKY69Be39gqHjfM4Rf9s/LCgV53EAcuDWdGcbvwg0wp Vp149Cfjg42bSwRqYyBlMpVbNJgmvYALRImKdMjTPVLWnmxBZYb/05B7lXhn7eERbvvQ Pm7g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id la17si1375744ejb.433.2019.11.23.12.38.17; Sat, 23 Nov 2019 12:38:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726942AbfKWUiN (ORCPT + 26 others); Sat, 23 Nov 2019 15:38:13 -0500 Received: from mx2.suse.de ([195.135.220.15]:34328 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726759AbfKWUiL (ORCPT ); Sat, 23 Nov 2019 15:38:11 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id A2132AF22; Sat, 23 Nov 2019 20:38:09 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Russell King Subject: [PATCH v4 2/8] ARM: Prepare Realtek RTD1195 Date: Sat, 23 Nov 2019 21:37:53 +0100 Message-Id: <20191123203759.20708-3-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191123203759.20708-1-afaerber@suse.de> References: <20191123203759.20708-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce ARCH_REALTEK Kconfig option also for 32-bit Arm. Override the text offset to cope with boot ROM occupying first 0xa800 bytes and further reservations up to 0xf4000 (compare Device Tree). Add a custom machine_desc to enforce memory carveout for I/O registers. Signed-off-by: Andreas Färber --- v3 -> v4: * Added reservation of boot ROM (James) v2 -> v3: * Fixed r-bus size in .reserve from 0x100000 to 0x70000 (James) v1 -> v2: * Dropped selection of COMMON_CLK (Arnd) * Dropped selection of AMBA, SCU, TWD * Added comment about text offset to distinguish from HTC comment above * Added machine_desc with .reserve to exclude peripheral spaces (Rob) arch/arm/Kconfig | 2 ++ arch/arm/Makefile | 3 +++ arch/arm/mach-realtek/Kconfig | 11 +++++++++++ arch/arm/mach-realtek/Makefile | 2 ++ arch/arm/mach-realtek/rtd1195.c | 40 ++++++++++++++++++++++++++++++++++++++++ 5 files changed, 58 insertions(+) create mode 100644 arch/arm/mach-realtek/Kconfig create mode 100644 arch/arm/mach-realtek/Makefile create mode 100644 arch/arm/mach-realtek/rtd1195.c -- 2.16.4 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9771b56e79f1..cd37b5e9f86d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -699,6 +699,8 @@ source "arch/arm/mach-qcom/Kconfig" source "arch/arm/mach-rda/Kconfig" +source "arch/arm/mach-realtek/Kconfig" + source "arch/arm/mach-realview/Kconfig" source "arch/arm/mach-rockchip/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index db857d07114f..16d41efea7f2 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -148,6 +148,8 @@ head-y := arch/arm/kernel/head$(MMUEXT).o textofs-y := 0x00008000 # We don't want the htc bootloader to corrupt kernel during resume textofs-$(CONFIG_PM_H1940) := 0x00108000 +# RTD1195 has Boot ROM at start of address space +textofs-$(CONFIG_ARCH_REALTEK) := 0x00108000 # SA1111 DMA bug: we don't want the kernel to live in precious DMA-able memory ifeq ($(CONFIG_ARCH_SA1100),y) textofs-$(CONFIG_SA1111) := 0x00208000 @@ -207,6 +209,7 @@ machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell machine-$(CONFIG_ARCH_PXA) += pxa machine-$(CONFIG_ARCH_QCOM) += qcom machine-$(CONFIG_ARCH_RDA) += rda +machine-$(CONFIG_ARCH_REALTEK) += realtek machine-$(CONFIG_ARCH_REALVIEW) += realview machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_ARCH_RPC) += rpc diff --git a/arch/arm/mach-realtek/Kconfig b/arch/arm/mach-realtek/Kconfig new file mode 100644 index 000000000000..19fdcf093fd1 --- /dev/null +++ b/arch/arm/mach-realtek/Kconfig @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +menuconfig ARCH_REALTEK + bool "Realtek SoCs" + depends on ARCH_MULTI_V7 + select ARM_GIC + select ARM_GLOBAL_TIMER + select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK + select GENERIC_IRQ_CHIP + select RESET_CONTROLLER + help + This enables support for the Realtek RTD1195 SoC family. diff --git a/arch/arm/mach-realtek/Makefile b/arch/arm/mach-realtek/Makefile new file mode 100644 index 000000000000..5382d5bbdd3c --- /dev/null +++ b/arch/arm/mach-realtek/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +obj-y += rtd1195.o diff --git a/arch/arm/mach-realtek/rtd1195.c b/arch/arm/mach-realtek/rtd1195.c new file mode 100644 index 000000000000..0381a4447384 --- /dev/null +++ b/arch/arm/mach-realtek/rtd1195.c @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Realtek RTD1195 + * + * Copyright (c) 2017-2019 Andreas Färber + */ + +#include +#include + +static void __init rtd1195_memblock_remove(phys_addr_t base, phys_addr_t size) +{ + int ret; + + ret = memblock_remove(base, size); + if (ret) + pr_err("Failed to remove memblock %pa (%d)\n", &base, ret); +} + +static void __init rtd1195_reserve(void) +{ + /* Exclude boot ROM from RAM */ + rtd1195_memblock_remove(0x00000000, 0x0000a800); + + /* Exclude peripheral register spaces from RAM */ + rtd1195_memblock_remove(0x18000000, 0x00070000); + rtd1195_memblock_remove(0x18100000, 0x01000000); +} + +static const char *const rtd1195_dt_compat[] __initconst = { + "realtek,rtd1195", + NULL +}; + +DT_MACHINE_START(rtd1195, "Realtek RTD1195") + .dt_compat = rtd1195_dt_compat, + .reserve = rtd1195_reserve, + .l2c_aux_val = 0x0, + .l2c_aux_mask = ~0x0, +MACHINE_END From patchwork Sat Nov 23 20:37:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180130 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp1128738ilf; Sat, 23 Nov 2019 12:38:38 -0800 (PST) X-Google-Smtp-Source: APXvYqyv6V1L9OPSNjndfN+wjD/0Qiqppa3zeloJM2q0s06xWJ7i8L79+dsVzwx//wUTLUdRUu5p X-Received: by 2002:a50:baa9:: with SMTP id x38mr8722610ede.106.1574541518103; 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[209.132.180.67]) by mx.google.com with ESMTP id s13si1334639ejx.144.2019.11.23.12.38.37; Sat, 23 Nov 2019 12:38:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727113AbfKWUie (ORCPT + 26 others); Sat, 23 Nov 2019 15:38:34 -0500 Received: from mx2.suse.de ([195.135.220.15]:34340 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726638AbfKWUiM (ORCPT ); Sat, 23 Nov 2019 15:38:12 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 45D66AF10; Sat, 23 Nov 2019 20:38:10 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v4 3/8] ARM: dts: Prepare Realtek RTD1195 and MeLE X1000 Date: Sat, 23 Nov 2019 21:37:54 +0100 Message-Id: <20191123203759.20708-4-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191123203759.20708-1-afaerber@suse.de> References: <20191123203759.20708-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add Device Trees for Realtek RTD1195 SoC and MeLE X1000 TV box. Reuse the existing RTD1295 watchdog compatible for now. Reviewed-by: Rob Herring [AF: Fixed r-bus size, fixed GIC, updated memreserve & memory] Signed-off-by: Andreas Färber --- v3 -> v4: * Inserted /memory reg entry to compensate reduced r-bus size (James) * Extended GIC reg and added interrupt (Marc) * Added comments to /memory node v2 -> v3: * Fixed r-bus size in /soc ranges from 0x1000000 to 0x70000 (James) * Adjusted /memreserve/ to close gap from 0xa800 to 0xc000 for full 0x100000 * Changed arch timer from GIC_CPU_MASK_RAW(0xf) to GIC_CPU_MASK_SIMPLE(2) squashed from RTD1395 v1 series v1 -> v2: * Dropped /memreserve/ and reserved-memory nodes for peripherals and NOR (Rob) * Carved them out from memory reg instead (Rob) * Converted some /memreserve/s to reserved-memory nodes arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/rtd1195-mele-x1000.dts | 32 ++++++++ arch/arm/boot/dts/rtd1195.dtsi | 130 +++++++++++++++++++++++++++++++ 3 files changed, 164 insertions(+) create mode 100644 arch/arm/boot/dts/rtd1195-mele-x1000.dts create mode 100644 arch/arm/boot/dts/rtd1195.dtsi -- 2.16.4 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 08011dc8c7a6..4853a13c8cf2 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -865,6 +865,8 @@ dtb-$(CONFIG_ARCH_QCOM) += \ dtb-$(CONFIG_ARCH_RDA) += \ rda8810pl-orangepi-2g-iot.dtb \ rda8810pl-orangepi-i96.dtb +dtb-$(CONFIG_ARCH_REALTEK) += \ + rtd1195-mele-x1000.dtb dtb-$(CONFIG_ARCH_REALVIEW) += \ arm-realview-pb1176.dtb \ arm-realview-pb11mp.dtb \ diff --git a/arch/arm/boot/dts/rtd1195-mele-x1000.dts b/arch/arm/boot/dts/rtd1195-mele-x1000.dts new file mode 100644 index 000000000000..e2050cb64474 --- /dev/null +++ b/arch/arm/boot/dts/rtd1195-mele-x1000.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Copyright (c) 2017-2019 Andreas Färber + */ + +/dts-v1/; + +#include "rtd1195.dtsi" + +/ { + compatible = "mele,x1000", "realtek,rtd1195"; + model = "MeLE X1000"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x18000000>, /* up to r-bus */ + <0x18070000 0x00090000>, /* r-bus to NOR flash */ + <0x19100000 0x26f00000>; /* NOR flash to 1 GiB */ + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi new file mode 100644 index 000000000000..c5713a5ef472 --- /dev/null +++ b/arch/arm/boot/dts/rtd1195.dtsi @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Copyright (c) 2017-2019 Andreas Färber + */ + +/memreserve/ 0x00000000 0x0000a800; /* boot code */ +/memreserve/ 0x0000a800 0x000f5800; +/memreserve/ 0x17fff000 0x00001000; + +#include + +/ { + compatible = "realtek,rtd1195"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + clock-frequency = <1000000000>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + clock-frequency = <1000000000>; + }; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rpc_comm: rpc@b000 { + reg = <0x0000b000 0x1000>; + }; + + audio@1b00000 { + reg = <0x01b00000 0x400000>; + }; + + rpc_ringbuf: rpc@1ffe000 { + reg = <0x01ffe000 0x4000>; + }; + + secure@10000000 { + reg = <0x10000000 0x100000>; + no-map; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = , + ; + interrupt-affinity = <&cpu0>, <&cpu1>; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + clock-frequency = <27000000>; + }; + + osc27M: osc { + compatible = "fixed-clock"; + clock-frequency = <27000000>; + #clock-cells = <0>; + clock-output-names = "osc27M"; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x18000000 0x18000000 0x00070000>, + <0x18100000 0x18100000 0x01000000>, + <0x80000000 0x80000000 0x80000000>; + + wdt: watchdog@18007680 { + compatible = "realtek,rtd1295-watchdog"; + reg = <0x18007680 0x100>; + clocks = <&osc27M>; + }; + + uart0: serial@18007800 { + compatible = "snps,dw-apb-uart"; + reg = <0x18007800 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <27000000>; + status = "disabled"; + }; + + uart1: serial@1801b200 { + compatible = "snps,dw-apb-uart"; + reg = <0x1801b200 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <27000000>; + status = "disabled"; + }; + + gic: interrupt-controller@ff011000 { + compatible = "arm,cortex-a7-gic"; + reg = <0xff011000 0x1000>, + <0xff012000 0x2000>, + <0xff014000 0x2000>, + <0xff016000 0x2000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + }; + }; +}; From patchwork Sat Nov 23 20:37:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180128 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp1128655ilf; Sat, 23 Nov 2019 12:38:31 -0800 (PST) X-Google-Smtp-Source: APXvYqwCbVMAHjnEAQ8l1iiN5kskuTVNTrVBMSW9euBZIfymTEAyRYLt1xJa3UI+Pu94NHGB+gQ0 X-Received: by 2002:a50:f747:: with SMTP id j7mr8875102edn.247.1574541511758; Sat, 23 Nov 2019 12:38:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574541511; cv=none; d=google.com; s=arc-20160816; b=J0UP2FZEMLD+9NKAQk76sa6TxiJD3v5cSBcl6wIXUmA/XZrZBRc55Y1oUdD327NTLI uJurAUpkAvlxK9H3b7LIlNhPs6b9zWcL6TJjt/VPrQa2Z5dVGQ8D/gq7f43yJdJKOJ2C od80kFqfKSLLxcNBkfxr9siMMOTd5lePpTJ1L/6RXEoxaJm6j/VqsfMOqIMWhMqlE33N S7pXNylhMzOTJMuhvm025AymL6cnGfXN4o8qPs8FJOYXxqnqpYYLOHr81bxAisfSQRAX eQme+ts8mMwkLEbbm4MSGqn/5nAnwX/3GMpDXugodSrbG04R/ehdAUHDtsRJLbrZXtaG 2O4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; 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[209.132.180.67]) by mx.google.com with ESMTP id b17si1610304edj.417.2019.11.23.12.38.31; Sat, 23 Nov 2019 12:38:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727099AbfKWUi2 (ORCPT + 26 others); Sat, 23 Nov 2019 15:38:28 -0500 Received: from mx2.suse.de ([195.135.220.15]:34350 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726752AbfKWUiM (ORCPT ); Sat, 23 Nov 2019 15:38:12 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id C9A29B00A; Sat, 23 Nov 2019 20:38:10 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v4 4/8] ARM: dts: rtd1195: Exclude boot ROM from memory ranges Date: Sat, 23 Nov 2019 21:37:55 +0100 Message-Id: <20191123203759.20708-5-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191123203759.20708-1-afaerber@suse.de> References: <20191123203759.20708-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Carve out 0xa800 for the boot ROM from the /memory@0 node, updating it to /memory@a800, and add it to /soc ranges. Signed-off-by: Andreas Färber --- Could be squashed. v4: New arch/arm/boot/dts/rtd1195-mele-x1000.dts | 4 ++-- arch/arm/boot/dts/rtd1195.dtsi | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) -- 2.16.4 diff --git a/arch/arm/boot/dts/rtd1195-mele-x1000.dts b/arch/arm/boot/dts/rtd1195-mele-x1000.dts index e2050cb64474..c7951b9a2c97 100644 --- a/arch/arm/boot/dts/rtd1195-mele-x1000.dts +++ b/arch/arm/boot/dts/rtd1195-mele-x1000.dts @@ -19,9 +19,9 @@ stdout-path = "serial0:115200n8"; }; - memory@0 { + memory@a800 { device_type = "memory"; - reg = <0x00000000 0x18000000>, /* up to r-bus */ + reg = <0x0000a800 0x17ff5800>, /* boot ROM to r-bus */ <0x18070000 0x00090000>, /* r-bus to NOR flash */ <0x19100000 0x26f00000>; /* NOR flash to 1 GiB */ }; diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi index c5713a5ef472..0d7c2be750f6 100644 --- a/arch/arm/boot/dts/rtd1195.dtsi +++ b/arch/arm/boot/dts/rtd1195.dtsi @@ -88,7 +88,8 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0x18000000 0x18000000 0x00070000>, + ranges = <0x00000000 0x00000000 0x0000a800>, + <0x18000000 0x18000000 0x00070000>, <0x18100000 0x18100000 0x01000000>, <0x80000000 0x80000000 0x80000000>; From patchwork Sat Nov 23 20:37:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180127 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp1128550ilf; Sat, 23 Nov 2019 12:38:22 -0800 (PST) X-Google-Smtp-Source: APXvYqzHHqcqCDe526g6ebjoklULiV/UAiHVv9M+js111ph9as61kS9y51npZ6aWOGwwaPA8l5wx X-Received: by 2002:a50:c408:: with SMTP id v8mr8841366edf.140.1574541502697; Sat, 23 Nov 2019 12:38:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574541502; cv=none; d=google.com; s=arc-20160816; b=b6pfq4FjUDyHMTS/vnnxMhs/mQE49cFAtrdIOmy4KgSV/UYH5TjVgvNClVGS/UY6h3 l04wCNCNRKq9gZ2wuruko1g6Yzik+fG7TrZwITL1dcB7kQVzH9zyZw9GMfz7Ci5LXgm8 oJHLW3+YNsGnK7OStME50DRFapjKx4XwnxdpgHwlGeG0Lcwig7VZnloxOWDDeerzlquY c2ZD5uPsUDihWmZEP/ZPk0UCrvWHaP3pzjMMFfIGeiixYQY7uXnaAj2KVAKHlptBl0oe djYar9yZBoWYIbxITfrAePzB1IgRgskn4CQVg+6OTal9R6Q98/+FTHDVY2Jvjs9g0P9J NkXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=5byhx67lq3UuIdKjgkZCGKY6Izd4djUe+f8e3k4IGjs=; b=Nvgkk9tAftRdZGy80aO1qy7TdOqGuUI5oFdA823aAzFHPZDfPkjGzcYqdGkfLX806N wxTwsLc2nIzluNz2MsqyvV3VnEqSqJ3S6m3zlSU+GYmmAQch0CejvduBtGztwhCF433x NlZQhQIjRq3lQet8iYHYOgWZX9RfPZ2Q1N7uwm9bNn/PbGg/oHVxynON7wQrXIRf3E0h ahFktGfJm+YfpdYrTWLkT1mpdAtSerw8bIyUgPt24NxInAHGwBK5zfxlqH3NKvptgEst WGSkLmQ0VKYC41KLwX8AHFqjSBBmPO+RWrHh+9zr7Bp58kqC2jYSFcTZMpX/j/sVe+m5 fdaw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id rk11si1372491ejb.359.2019.11.23.12.38.22; Sat, 23 Nov 2019 12:38:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727031AbfKWUiU (ORCPT + 26 others); Sat, 23 Nov 2019 15:38:20 -0500 Received: from mx2.suse.de ([195.135.220.15]:34374 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726921AbfKWUiN (ORCPT ); Sat, 23 Nov 2019 15:38:13 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 90E3FB14D; Sat, 23 Nov 2019 20:38:11 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v4 6/8] dt-bindings: arm: realtek: Add Realtek Horseradish EVB Date: Sat, 23 Nov 2019 21:37:57 +0100 Message-Id: <20191123203759.20708-7-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191123203759.20708-1-afaerber@suse.de> References: <20191123203759.20708-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Define a compatible string for Realtek Horseradish EVB for RTD1195 SoC. Signed-off-by: Andreas Färber --- v4: New Documentation/devicetree/bindings/arm/realtek.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.16.4 diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml index 091616880d25..d1c726ed6b79 100644 --- a/Documentation/devicetree/bindings/arm/realtek.yaml +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -18,6 +18,7 @@ properties: - items: - enum: - mele,x1000 # MeLE X1000 + - realtek,horseradish # Realtek Horseradish EVB - const: realtek,rtd1195 # RTD1293 SoC based boards From patchwork Sat Nov 23 20:37:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180126 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp1128546ilf; Sat, 23 Nov 2019 12:38:22 -0800 (PST) X-Google-Smtp-Source: APXvYqyKmAhMjZcwpzHQwf9sU+YJw/P8PWBJsik2fA31bp/jo8/ukjqNPfglH6bdtoOuNWTmHD5l X-Received: by 2002:a17:906:69d2:: with SMTP id g18mr23332014ejs.153.1574541502320; Sat, 23 Nov 2019 12:38:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574541502; cv=none; d=google.com; s=arc-20160816; b=NGZ/w3xnjFJgXfdkw2OyR7zx+nL2FRdWr3Y9DTvhX7LGQUfjVlwG8SWPvssN3fIwzZ Oae74y9sFi9dUUHyzgsWf9U2tRrlIJZ5CT4CnCFQ5wrUAdVCo7BlCkJhOu6bbS/s1DHh eMFkwv18CNMfczlQuuwV/ulY4XVgCStqWwwrna5CB/JT8j79gZsBJnTxhvFVxzLiwVQM X8U5DgvAmGPQ+xdYeajprn0Fo5VVbFccikxf40xeT0UlYHrM6wnlodjB7ZvDu3kgcORG /7w+Gv/GmBfF9t3tqEvFx/jrbr9Tx94OQRqtBRidXi6h08zvuBZ+zTKXYfHX7Un9GPcw Yo9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=yzZh2IoLuY+jZof/fSWxWCcoG0McvIDzPIzTy5bwK2Q=; b=QG/zdTyRqpMQ/skVDakThV3k+ibwuFati1DhCxTjog3SioxlOqjt32HIvTDUnPXfqN KsLGAgYBopYLtsE8tc+6n6Oy4XCkOK221JKw0Ol+53vol5wIP8Vjaz4O+ujfk+JESyjt QbbR9whKS/bFrzMKssy60SHR4Peng+7nO2M2fHb+QU63QJuvWN2CsOPMFBSsJCXljbYM 2UorpU/6RpdsptBMzG7FNnthWnfTBZS7RDo1onogFB5PqCUEYU9IZHRPpNsKc6c1YcKV WPI3jzcSb3TjCOnqpqe5Po76iwbEfnLlCUBsNdKtQKYpoRf4rDy7ftf/iREqIFVNRhzf OWQg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id rk11si1372491ejb.359.2019.11.23.12.38.22; Sat, 23 Nov 2019 12:38:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726998AbfKWUiS (ORCPT + 26 others); Sat, 23 Nov 2019 15:38:18 -0500 Received: from mx2.suse.de ([195.135.220.15]:34386 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726912AbfKWUiN (ORCPT ); Sat, 23 Nov 2019 15:38:13 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 2AB49B14F; Sat, 23 Nov 2019 20:38:12 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v4 7/8] ARM: dts: rtd1195: Add Realtek Horseradish EVB Date: Sat, 23 Nov 2019 21:37:58 +0100 Message-Id: <20191123203759.20708-8-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191123203759.20708-1-afaerber@suse.de> References: <20191123203759.20708-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a Device Tree for Realtek's RTD1195 EVB "Horseradish". Signed-off-by: Andreas Färber --- v4: New arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/rtd1195-horseradish.dts | 32 +++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+) create mode 100644 arch/arm/boot/dts/rtd1195-horseradish.dts -- 2.16.4 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 4853a13c8cf2..7f1410ea7dff 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -866,6 +866,7 @@ dtb-$(CONFIG_ARCH_RDA) += \ rda8810pl-orangepi-2g-iot.dtb \ rda8810pl-orangepi-i96.dtb dtb-$(CONFIG_ARCH_REALTEK) += \ + rtd1195-horseradish.dtb \ rtd1195-mele-x1000.dtb dtb-$(CONFIG_ARCH_REALVIEW) += \ arm-realview-pb1176.dtb \ diff --git a/arch/arm/boot/dts/rtd1195-horseradish.dts b/arch/arm/boot/dts/rtd1195-horseradish.dts new file mode 100644 index 000000000000..9d06d3d34c74 --- /dev/null +++ b/arch/arm/boot/dts/rtd1195-horseradish.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Copyright (c) 2019 Andreas Färber + */ + +/dts-v1/; + +#include "rtd1195.dtsi" + +/ { + compatible = "realtek,horseradish", "realtek,rtd1195"; + model = "Realtek Horseradish EVB"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@a800 { + device_type = "memory"; + reg = <0x0000a800 0x17ff5800>, /* boot ROM to r-bus */ + <0x18070000 0x00090000>, /* r-bus to NOR flash */ + <0x19100000 0x26f00000>; /* NOR flash to 1 GiB */ + }; +}; + +&uart0 { + status = "okay"; +}; From patchwork Sat Nov 23 20:37:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 180129 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp1128673ilf; Sat, 23 Nov 2019 12:38:32 -0800 (PST) X-Google-Smtp-Source: APXvYqzwSIkQIQcm1+0RjKG/vYEcEKAdw83OjBmDNcOP1EXeUewlTK9wOMaF+QawUqWT0HpefSN/ X-Received: by 2002:a05:6402:22a8:: with SMTP id cx8mr3532796edb.270.1574541512224; Sat, 23 Nov 2019 12:38:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1574541512; cv=none; d=google.com; s=arc-20160816; b=hVC1sYrV1r7OQGTAqNVNpl9StS5C1WRyMlE72qq2vM/YNwWzbdSGIChNjJVCHsolWx 1Qh1Jy0CCyW9SH4K0KaljbewebLKjjJDkLAECQ5TnSWei7t1tNfEFgX4w7yWaTCjL3l+ DguDx95Ko6VZjxzsFoW7NEEKHzenfyuWXMM0L3XrK+0i8OxhMntRG56BDZ0lj9vWnQ2L fMvfAjWGFMJJtHd0ImHN3Efu9ECXbSuy84dz3cx3qcJ55kuwSiNNB0ep9XKNmNFEgzI7 WunB283sEUnPtrksEd3YfjiCmqUqnE4+yc60CvGeizaATXnpji+oR/iB4mdZWm7ne7RW rWpA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=wj/eO5/gvi/aG7+Qf2LmIf8TRyQFouXfWrh6ebQmduc=; b=tKTMIxlw4agIwD/X+O0go5rUQrE4pYDGswOwfGmwm7uLqJ3TP49BMHHEDNmxfSOX/+ JC+FZwAI19+h234Nf/+IywXGulX8bQu+yXQV1QZqMjTA+avtwFfdyb+JSCNXHgvZ7fHd gAYRkTTjsvYeML19uF40r2Lcz/n2wfwxSuK4jrV82JP24lIMnqIGVRDw3MLhThus0cJT exi3YdDs0nZMi418yyCJAn1YtTlu31NJWYy9Xya+rmsGKgtzE1YKmkJfKpuXjpBBK1EZ V34PQfHmhAovqb8Lj+HrfWWNlULlkg5HhKq2EJJOI2SzGMVLcZijuIdDZSCQOC41t04B hpEA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b17si1610304edj.417.2019.11.23.12.38.32; Sat, 23 Nov 2019 12:38:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727073AbfKWUi0 (ORCPT + 26 others); Sat, 23 Nov 2019 15:38:26 -0500 Received: from mx2.suse.de ([195.135.220.15]:34394 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726861AbfKWUiO (ORCPT ); Sat, 23 Nov 2019 15:38:14 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 84761B166; Sat, 23 Nov 2019 20:38:12 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Russell King Subject: [PATCH v4 8/8] ARM: realtek: Enable RTD1195 arch timer Date: Sat, 23 Nov 2019 21:37:59 +0100 Message-Id: <20191123203759.20708-9-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191123203759.20708-1-afaerber@suse.de> References: <20191123203759.20708-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Without this magic write the timer doesn't work and boot gets stuck. Signed-off-by: Andreas Färber --- What is the name of the register 0xff018000? Is 0x1 a BIT(0) write, or how are the register bits defined? Is this a reset or a clock gate? How should we model it in DT? v3 -> v4: * Use writel_relaxed() instead of writel() v2 -> v3: Unchanged v2: New arch/arm/mach-realtek/rtd1195.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.16.4 diff --git a/arch/arm/mach-realtek/rtd1195.c b/arch/arm/mach-realtek/rtd1195.c index 0381a4447384..8d4de0c2308d 100644 --- a/arch/arm/mach-realtek/rtd1195.c +++ b/arch/arm/mach-realtek/rtd1195.c @@ -5,6 +5,9 @@ * Copyright (c) 2017-2019 Andreas Färber */ +#include +#include +#include #include #include @@ -27,6 +30,18 @@ static void __init rtd1195_reserve(void) rtd1195_memblock_remove(0x18100000, 0x01000000); } +static void __init rtd1195_init_time(void) +{ + void __iomem *base; + + base = ioremap(0xff018000, 4); + writel_relaxed(0x1, base); + iounmap(base); + + of_clk_init(NULL); + timer_probe(); +} + static const char *const rtd1195_dt_compat[] __initconst = { "realtek,rtd1195", NULL @@ -34,6 +49,7 @@ static const char *const rtd1195_dt_compat[] __initconst = { DT_MACHINE_START(rtd1195, "Realtek RTD1195") .dt_compat = rtd1195_dt_compat, + .init_time = rtd1195_init_time, .reserve = rtd1195_reserve, .l2c_aux_val = 0x0, .l2c_aux_mask = ~0x0,