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[209.132.180.131]) by mx.google.com with ESMTPS id o17si5255322edv.258.2019.11.25.08.41.08 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 Nov 2019 08:41:08 -0800 (PST) Received-SPF: pass (google.com: domain of libc-alpha-return-107352-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=CV06tLN1; dkim=pass header.i=@linaro.org header.s=google header.b=pf2VWkB3; spf=pass (google.com: domain of libc-alpha-return-107352-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="libc-alpha-return-107352-patch=linaro.org@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id; q=dns; s= default; b=gDroqUDBOYWyj7i+8IuMJwxHREj3pKZ48Zcl3YPObjGd/3TUrn1VA TBQy260bOuI4HUIt5vEH+he2YNHVq0qHszwABZQfnC5Y4k8eq/oHRCP936PWBup9 QWPTNMcp4QVx4xj8/LdLFDJwWfVgw9Ob2wgsA4iJ5yWLyzVrccRCII= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id; s=default; bh=DhPjqzG2uO5ig6vSEl11Hssdf7w=; b=CV06tLN1q/Ag7WKTaDQGQyRd+5yC Ts2VRKJYyjBkqVOR2RxoIj8p65fS2sE6/LjmWI35DvtAGK2Xhol0RTceepFaF13w N2XJSyvmEdOsrhk/6j9oPIWe5hAEoLWy+AIKPlyAGKlOmv6LqqecjzI+h+IYsBgA Cm/q4EUZ2h/pKhs= Received: (qmail 92357 invoked by alias); 25 Nov 2019 16:40:51 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 92293 invoked by uid 89); 25 Nov 2019 16:40:51 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-21.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=arch-specific, archspecific, HX-Languages-Length:2122, aforementioned X-HELO: mail-qv1-f43.google.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id; bh=iH6SpOzTu6/YVzTikD8pdwXl6Gt1ak7jwfdxesXWXdo=; b=pf2VWkB3zBKWyw0VwCrpuXxlelT/Tk3tF/dBO7md3xr2FYmIFHBcg65XLQzbjFhF9i njawn3Qenw4Oxh+11B+KdwWAGPyk9ylFPPpF/QelNZGJav9UKJRaJMeZrld+yQQHTWcd YRYLORasb1gLPCQp2FksqNzawFD1tB//4pEfDXws9ypcrz9Bh2p2/XALAzChr7hbGhYD sfqvaa5vR0QaTPvYkJb0j6nFxGe+0jNNTkYUNn4DaU9tji4ap5KU7AtFPxPG7WhosY13 +i58r3RJexwrchJZb5Nn4t5UtHoXQd1TH5p2pGgU0CWwu8qThIqpICZQdC17dEKj3niy bLeA== Return-Path: From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [COMMITTED] arm: Fix armv7 selection after 'Split BE/LE abilist' Date: Mon, 25 Nov 2019 13:40:41 -0300 Message-Id: <20191125164041.30875-1-adhemerval.zanella@linaro.org> It adds the missing Implies for armv7, armv6, armv6t2 after the commit 1673ba87fefe019c. Without the Implies a build with the compiler targeting the aforementioned architecture does not select the arch-specific optimization including the ifunc selectors. I checked with a build against armv5, armv6, armv6t2, armv7, and armv7-neon for both LE and BE. For armv6 and armv7 I also checked that both sysdeps selection and the resulting implementation built is the expected ones. --- sysdeps/arm/be/armv7/multiarch/Implies | 1 + sysdeps/arm/le/armv6/Implies | 1 + sysdeps/arm/le/armv6t2/Implies | 1 + sysdeps/arm/le/armv7/Implies | 1 + sysdeps/arm/le/armv7/multiarch/Implies | 1 + 5 files changed, 5 insertions(+) create mode 100644 sysdeps/arm/be/armv7/multiarch/Implies create mode 100644 sysdeps/arm/le/armv6/Implies create mode 100644 sysdeps/arm/le/armv6t2/Implies create mode 100644 sysdeps/arm/le/armv7/Implies create mode 100644 sysdeps/arm/le/armv7/multiarch/Implies -- 2.17.1 diff --git a/sysdeps/arm/be/armv7/multiarch/Implies b/sysdeps/arm/be/armv7/multiarch/Implies new file mode 100644 index 0000000000..ac212e6658 --- /dev/null +++ b/sysdeps/arm/be/armv7/multiarch/Implies @@ -0,0 +1 @@ +arm/armv7/multiarch diff --git a/sysdeps/arm/le/armv6/Implies b/sysdeps/arm/le/armv6/Implies new file mode 100644 index 0000000000..137a8ab20f --- /dev/null +++ b/sysdeps/arm/le/armv6/Implies @@ -0,0 +1 @@ +arm/armv6 diff --git a/sysdeps/arm/le/armv6t2/Implies b/sysdeps/arm/le/armv6t2/Implies new file mode 100644 index 0000000000..d777cf8eef --- /dev/null +++ b/sysdeps/arm/le/armv6t2/Implies @@ -0,0 +1 @@ +arm/armv6t2 diff --git a/sysdeps/arm/le/armv7/Implies b/sysdeps/arm/le/armv7/Implies new file mode 100644 index 0000000000..3a1446ba1b --- /dev/null +++ b/sysdeps/arm/le/armv7/Implies @@ -0,0 +1 @@ +arm/armv7 diff --git a/sysdeps/arm/le/armv7/multiarch/Implies b/sysdeps/arm/le/armv7/multiarch/Implies new file mode 100644 index 0000000000..ac212e6658 --- /dev/null +++ b/sysdeps/arm/le/armv7/multiarch/Implies @@ -0,0 +1 @@ +arm/armv7/multiarch