From patchwork Thu Oct 3 15:41:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 832620 Received: from mail-ej1-f44.google.com (mail-ej1-f44.google.com [209.85.218.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 45BA41A08AD for ; Thu, 3 Oct 2024 15:41:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727970092; cv=none; b=OlpuAJ6zyBCzoRhxvULajEH4zdbCFH9dEPmjdkwJ+eZzO0PWLP/ayxr4ywOelYcgno1h8DmhAWws+2O0X8DP+L5hGlBKSSpKosr6s04x6bRJ/uYp4xyhzfqNpsmmLgaDPDm30VYrsWyUysKcZaXjv4rA2sFW6LxNF7KEgs7bKdg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727970092; c=relaxed/simple; bh=vTwVvG8iZlHzHza+YS67mEwp2zyunt+kNzBDYWtFYWc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ePJ1tYBRxQXr6/g9Io7f6sMKQF8dABBIH594/xNCvAVFD1D7h7FLGtKKQEbO1BwLQ9+8Bntn5n85PGCsi2gJcrXtDtPT+3xSFODECM+Lo0CxPF9J85SaS+eaqGzq1+FwuCWRkSACo5bbQSd5NOM5jcdUZCd0/KgOmmrMIbNTyM8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=TL4Q4bWR; arc=none smtp.client-ip=209.85.218.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="TL4Q4bWR" Received: by mail-ej1-f44.google.com with SMTP id a640c23a62f3a-a93b2070e0cso127108166b.3 for ; Thu, 03 Oct 2024 08:41:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1727970089; x=1728574889; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=E7nKjwcfTxwC0PwN6GrPgJAgBaaTNk6QSx4URpDS/gc=; b=TL4Q4bWRRiP1qoLuPCXD3dOh8f7piOzc3j/QC/fg7+dMJurG4zzZpFMQuc5LodDfGI Y48u/kKB853zeg9aWe9EekI53lFE89U1xDldaOiIwykkwjyL6SFe4vvdatrFo3C1FEeS /nqgw5MhdUpDHBiH/PBn4Aim3tfOQ+1xD1uoeWUJJZPv40wH9surip0dhbNhD08SZ5VW t3zKtyaEJw4aKW69l1Z75fRYa1euthTu+2d1gmPSjAvEfV8ZcXlyKApTK/VNfJ7iHcCv 4YY+Qun7qvdqzavRsnIWcYdJkO12B7CP9wFQWCMP6kTnSuvuM+9YsPwEghcgXisP7EVI 46cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1727970089; x=1728574889; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E7nKjwcfTxwC0PwN6GrPgJAgBaaTNk6QSx4URpDS/gc=; b=eUtuJIbIcCLj2zGnQk6bS2MuMMtfriJgAMTJTXiCh9pqNa9ABL7vI8SihwkvoVo7b2 0GewRVDUVddgNW4YZp5TQmHESth24nnFu6mVbIksvE0H8dlvuGqAowGa+4SuG8dzyp11 3UrremEprhh6kWLD710+1Hqh2tR5vbgNgWdtQvaRArKL+g2cskAG9UZFdaflXkOZgirS Krojv1pn/Un3Y+JhjAFqqXe9BiWRA6R2N8EKT9VpHdNwkeO3/IDe3gafaxpMXpEFdSSj T2BSuy8ed/w4g8CjWLr6UulG1iREE0bfz1fgfjehzWBJsoA9xhdNU1crbghkNVl8vJSg WoIg== X-Gm-Message-State: AOJu0YwmNAfTvDOh0/UNw3AKIZPqMmSnM1F5yij4djTeHRGnL6FeQHyn k4hdbAzdg77M3SNzrxRjKLcmtGsY16eFNOJxopem/7JlLfva2jkHsmPcraLwenk= X-Google-Smtp-Source: AGHT+IG7VzE6KIRS5Oggy5S2KMymWBvAJcUH8H6bPiRroXsOEd0yFu8CHZMFl+zLCXUZVh4IIyvvxg== X-Received: by 2002:a17:907:6093:b0:a8a:58c5:78f1 with SMTP id a640c23a62f3a-a98f8201512mr692467466b.11.1727970088513; Thu, 03 Oct 2024 08:41:28 -0700 (PDT) Received: from [127.0.0.1] ([176.61.106.227]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99104c4f3fsm98492866b.200.2024.10.03.08.41.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Oct 2024 08:41:28 -0700 (PDT) From: Bryan O'Donoghue Date: Thu, 03 Oct 2024 16:41:25 +0100 Subject: [PATCH v4 1/4] media: ov08x40: Fix burst write sequence Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241003-b4-master-24-11-25-ov08x40-v4-1-7ee2c45fdc8c@linaro.org> References: <20241003-b4-master-24-11-25-ov08x40-v4-0-7ee2c45fdc8c@linaro.org> In-Reply-To: <20241003-b4-master-24-11-25-ov08x40-v4-0-7ee2c45fdc8c@linaro.org> To: Sakari Ailus , Jason Chen , Mauro Carvalho Chehab , Sergey Senozhatsky , Hans Verkuil , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bryan O'Donoghue , stable@vger.kernel.org X-Mailer: b4 0.15-dev-dedf8 It is necessary to account for I2C quirks in the burst mode path of this driver. Not all I2C controllers can accept arbitrarily long writes and this is represented in the quirks field of the adapter structure. Prior to this patch the following error message is seen on a Qualcomm X1E80100 CRD. [ 38.773524] i2c i2c-2: adapter quirk: msg too long (addr 0x0036, size 290, write) [ 38.781454] ov08x40 2-0036: Failed regs transferred: -95 [ 38.787076] ov08x40 2-0036: ov08x40_start_streaming failed to set regs Fix the error by breaking up the write sequence into the advertised maximum write size of the quirks field if the quirks field is populated. Fixes: 8f667d202384 ("media: ov08x40: Reduce start streaming time") Cc: stable@vger.kernel.org # v6.9+ Tested-by: Bryan O'Donoghue # x1e80100-crd Signed-off-by: Bryan O'Donoghue --- drivers/media/i2c/ov08x40.c | 33 ++++++++++++++++++++++++++++----- 1 file changed, 28 insertions(+), 5 deletions(-) diff --git a/drivers/media/i2c/ov08x40.c b/drivers/media/i2c/ov08x40.c index 48df077522ad0bb2b5f64a6def8844c02af6a193..be25e45175b1322145dca428e845242d8fea2698 100644 --- a/drivers/media/i2c/ov08x40.c +++ b/drivers/media/i2c/ov08x40.c @@ -1339,15 +1339,13 @@ static int ov08x40_read_reg(struct ov08x40 *ov08x, return 0; } -static int ov08x40_burst_fill_regs(struct ov08x40 *ov08x, u16 first_reg, - u16 last_reg, u8 val) +static int __ov08x40_burst_fill_regs(struct i2c_client *client, u16 first_reg, + u16 last_reg, size_t num_regs, u8 val) { - struct i2c_client *client = v4l2_get_subdevdata(&ov08x->sd); struct i2c_msg msgs; - size_t i, num_regs; + size_t i; int ret; - num_regs = last_reg - first_reg + 1; msgs.addr = client->addr; msgs.flags = 0; msgs.len = 2 + num_regs; @@ -1373,6 +1371,31 @@ static int ov08x40_burst_fill_regs(struct ov08x40 *ov08x, u16 first_reg, return 0; } +static int ov08x40_burst_fill_regs(struct ov08x40 *ov08x, u16 first_reg, + u16 last_reg, u8 val) +{ + struct i2c_client *client = v4l2_get_subdevdata(&ov08x->sd); + size_t num_regs, num_write_regs; + int ret; + + num_regs = last_reg - first_reg + 1; + num_write_regs = num_regs; + + if (client->adapter->quirks && client->adapter->quirks->max_write_len) + num_write_regs = client->adapter->quirks->max_write_len - 2; + + while (first_reg < last_reg) { + ret = __ov08x40_burst_fill_regs(client, first_reg, last_reg, + num_write_regs, val); + if (ret) + return ret; + + first_reg += num_write_regs; + } + + return 0; +} + /* Write registers up to 4 at a time */ static int ov08x40_write_reg(struct ov08x40 *ov08x, u16 reg, u32 len, u32 __val) From patchwork Thu Oct 3 15:41:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 832619 Received: from mail-ed1-f54.google.com (mail-ed1-f54.google.com [209.85.208.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AFA01A4F21 for ; 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Thu, 03 Oct 2024 08:41:29 -0700 (PDT) Received: from [127.0.0.1] ([176.61.106.227]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99104c4f3fsm98492866b.200.2024.10.03.08.41.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Oct 2024 08:41:29 -0700 (PDT) From: Bryan O'Donoghue Date: Thu, 03 Oct 2024 16:41:26 +0100 Subject: [PATCH v4 2/4] media: dt-bindings: Add OmniVision OV08X40 Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241003-b4-master-24-11-25-ov08x40-v4-2-7ee2c45fdc8c@linaro.org> References: <20241003-b4-master-24-11-25-ov08x40-v4-0-7ee2c45fdc8c@linaro.org> In-Reply-To: <20241003-b4-master-24-11-25-ov08x40-v4-0-7ee2c45fdc8c@linaro.org> To: Sakari Ailus , Jason Chen , Mauro Carvalho Chehab , Sergey Senozhatsky , Hans Verkuil , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.15-dev-dedf8 Add bindings for the already upstream OV08X40 to enable usage of this sensor on DTS based systems. Signed-off-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/i2c/ovti,ov08x40.yaml | 114 +++++++++++++++++++++ 1 file changed, 114 insertions(+) diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov08x40.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov08x40.yaml new file mode 100644 index 0000000000000000000000000000000000000000..51f29033e1d94b1822fcfd90a6eee4bacd677c18 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ovti,ov08x40.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (c) 2024 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/ovti,ov08x40.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Omnivision OV08X40 CMOS Sensor + +maintainers: + - Bryan O'Donoghue + +description: | + The Omnivision OV08X40 is a 9.2 megapixel, CMOS image sensor which supports: + - Automatic black level calibration (ABLC) + - Programmable controls for frame rate, mirror and flip, binning, cropping + and windowing + - Output formats 10-bit 4C RGB RAW, 10-bit Bayer RAW + - 4-lane MIPI D-PHY TX @ 1 Gbps per lane + - 2-lane MPIP D-PHY TX @ 2 Gbps per lane + - Dynamic defect pixel cancellation + - Standard SCCB command interface + +properties: + compatible: + const: ovti,ov08x40 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + avdd-supply: + description: Analogue circuit voltage supply. + + dovdd-supply: + description: I/O circuit voltage supply. + + dvdd-supply: + description: Digital circuit voltage supply. + + reset-gpios: + description: Active low GPIO connected to XSHUTDOWN pad of the sensor. + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + additionalProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + oneOf: + - items: + - const: 1 + - const: 2 + - items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + + required: + - data-lanes + - link-frequencies + +required: + - compatible + - reg + - clocks + - port + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ov08x40: camera@36 { + compatible = "ovti,ov08x40"; + reg = <0x36>; + + reset-gpios = <&tlmm 111 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_rgb_defaultt>; + + clocks = <&ov08x40_clk>; + + assigned-clocks = <&ov08x40_clk>; + assigned-clock-parents = <&ov08x40_clk_parent>; + assigned-clock-rates = <19200000>; + + avdd-supply = <&vreg_l7b_2p8>; + dvdd-supply = <&vreg_l7b_1p8>; + dovdd-supply = <&vreg_l3m_1p8>; + + port { + ov08x40_ep: endpoint { + remote-endpoint = <&csiphy4_ep>; + data-lanes = <1 2 3 4>; + link-frequencies = /bits/ 64 <400000000>; + }; + }; + }; + }; +... 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Thu, 03 Oct 2024 08:41:31 -0700 (PDT) Received: from [127.0.0.1] ([176.61.106.227]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99104c4f3fsm98492866b.200.2024.10.03.08.41.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Oct 2024 08:41:31 -0700 (PDT) From: Bryan O'Donoghue Date: Thu, 03 Oct 2024 16:41:28 +0100 Subject: [PATCH v4 4/4] media: ov08x40: Add OF probe support Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241003-b4-master-24-11-25-ov08x40-v4-4-7ee2c45fdc8c@linaro.org> References: <20241003-b4-master-24-11-25-ov08x40-v4-0-7ee2c45fdc8c@linaro.org> In-Reply-To: <20241003-b4-master-24-11-25-ov08x40-v4-0-7ee2c45fdc8c@linaro.org> To: Sakari Ailus , Jason Chen , Mauro Carvalho Chehab , Sergey Senozhatsky , Hans Verkuil , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.15-dev-dedf8 The ACPI version of this driver "just works" on dts based systems with a few extensions to facilitate. - Add support for DT based probing - Add support for taking the part out of reset via a GPIO reset pin - Add in regulator bulk on/off logic for the power rails. Once done this sensor works nicely on a Qualcomm X1E80100 CRD. Tested-by: Bryan O'Donoghue # x1e80100-crd Signed-off-by: Bryan O'Donoghue --- drivers/media/i2c/ov08x40.c | 138 +++++++++++++++++++++++++++++++++++++++----- 1 file changed, 124 insertions(+), 14 deletions(-) diff --git a/drivers/media/i2c/ov08x40.c b/drivers/media/i2c/ov08x40.c index 3ab8b51df157af78fcccc1aaef73aedb2ae759c9..821102287580acecd544402254cfe0fb5c8dc299 100644 --- a/drivers/media/i2c/ov08x40.c +++ b/drivers/media/i2c/ov08x40.c @@ -3,10 +3,13 @@ #include #include +#include #include +#include #include #include #include +#include #include #include #include @@ -1279,6 +1282,12 @@ static const struct ov08x40_mode supported_modes[] = { }, }; +static const char * const ov08x40_supply_names[] = { + "dovdd", /* Digital I/O power */ + "avdd", /* Analog power */ + "dvdd", /* Digital core power */ +}; + struct ov08x40 { struct v4l2_subdev sd; struct media_pad pad; @@ -1291,6 +1300,10 @@ struct ov08x40 { struct v4l2_ctrl *hblank; struct v4l2_ctrl *exposure; + struct clk *xvclk; + struct gpio_desc *reset_gpio; + struct regulator_bulk_data supplies[ARRAY_SIZE(ov08x40_supply_names)]; + /* Current mode */ const struct ov08x40_mode *cur_mode; @@ -1303,6 +1316,61 @@ struct ov08x40 { #define to_ov08x40(_sd) container_of(_sd, struct ov08x40, sd) +static int ov08x40_power_on(struct device *dev) +{ + struct v4l2_subdev *sd = dev_get_drvdata(dev); + struct ov08x40 *ov08x = to_ov08x40(sd); + int ret; + + if (is_acpi_node(dev_fwnode(dev))) + return 0; + + ret = clk_prepare_enable(ov08x->xvclk); + if (ret < 0) { + dev_err(dev, "failed to enable xvclk\n"); + return ret; + } + + if (ov08x->reset_gpio) { + gpiod_set_value_cansleep(ov08x->reset_gpio, 1); + usleep_range(1000, 2000); + } + + ret = regulator_bulk_enable(ARRAY_SIZE(ov08x40_supply_names), + ov08x->supplies); + if (ret < 0) { + dev_err(dev, "failed to enable regulators\n"); + goto disable_clk; + } + + gpiod_set_value_cansleep(ov08x->reset_gpio, 0); + usleep_range(1500, 1800); + + return 0; + +disable_clk: + gpiod_set_value_cansleep(ov08x->reset_gpio, 1); + clk_disable_unprepare(ov08x->xvclk); + + return ret; +} + +static int ov08x40_power_off(struct device *dev) +{ + struct v4l2_subdev *sd = dev_get_drvdata(dev); + struct ov08x40 *ov08x = to_ov08x40(sd); + + if (is_acpi_node(dev_fwnode(dev))) + return 0; + + gpiod_set_value_cansleep(ov08x->reset_gpio, 1); + regulator_bulk_disable(ARRAY_SIZE(ov08x40_supply_names), + ov08x->supplies); + clk_disable_unprepare(ov08x->xvclk); + + return 0; +} + /* Read registers up to 4 at a time */ static int ov08x40_read_reg(struct ov08x40 *ov08x, u16 reg, u32 len, u32 *val) @@ -2072,7 +2140,7 @@ static void ov08x40_free_controls(struct ov08x40 *ov08x) mutex_destroy(&ov08x->mutex); } -static int ov08x40_check_hwcfg(struct device *dev) +static int ov08x40_check_hwcfg(struct ov08x40 *ov08x, struct device *dev) { struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = V4L2_MBUS_CSI2_DPHY @@ -2086,11 +2154,36 @@ static int ov08x40_check_hwcfg(struct device *dev) if (!fwnode) return -ENXIO; - ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency", - &xvclk_rate); - if (ret) { - dev_err(dev, "can't get clock frequency"); - return ret; + if (!is_acpi_node(fwnode)) { + ov08x->xvclk = devm_clk_get(dev, NULL); + if (IS_ERR(ov08x->xvclk)) { + dev_err(dev, "could not get xvclk clock (%pe)\n", + ov08x->xvclk); + return PTR_ERR(ov08x->xvclk); + } + + xvclk_rate = clk_get_rate(ov08x->xvclk); + + ov08x->reset_gpio = devm_gpiod_get_optional(dev, "reset", + GPIOD_OUT_LOW); + if (IS_ERR(ov08x->reset_gpio)) + return PTR_ERR(ov08x->reset_gpio); + + for (i = 0; i < ARRAY_SIZE(ov08x40_supply_names); i++) + ov08x->supplies[i].supply = ov08x40_supply_names[i]; + + ret = devm_regulator_bulk_get(dev, + ARRAY_SIZE(ov08x40_supply_names), + ov08x->supplies); + if (ret) + return ret; + } else { + ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency", + &xvclk_rate); + if (ret) { + dev_err(dev, "can't get clock frequency"); + return ret; + } } if (xvclk_rate != OV08X40_XVCLK) { @@ -2143,32 +2236,37 @@ static int ov08x40_check_hwcfg(struct device *dev) } static int ov08x40_probe(struct i2c_client *client) -{ - struct ov08x40 *ov08x; +{ struct ov08x40 *ov08x; int ret; bool full_power; + ov08x = devm_kzalloc(&client->dev, sizeof(*ov08x), GFP_KERNEL); + if (!ov08x) + return -ENOMEM; + /* Check HW config */ - ret = ov08x40_check_hwcfg(&client->dev); + ret = ov08x40_check_hwcfg(ov08x, &client->dev); if (ret) { dev_err(&client->dev, "failed to check hwcfg: %d", ret); return ret; } - ov08x = devm_kzalloc(&client->dev, sizeof(*ov08x), GFP_KERNEL); - if (!ov08x) - return -ENOMEM; - /* Initialize subdev */ v4l2_i2c_subdev_init(&ov08x->sd, client, &ov08x40_subdev_ops); full_power = acpi_dev_state_d0(&client->dev); if (full_power) { + ret = ov08x40_power_on(&client->dev); + if (ret) { + dev_err(&client->dev, "failed to power on\n"); + return ret; + } + /* Check module identity */ ret = ov08x40_identify_module(ov08x); if (ret) { dev_err(&client->dev, "failed to find sensor: %d\n", ret); - return ret; + goto probe_power_off; } } @@ -2210,6 +2308,9 @@ static int ov08x40_probe(struct i2c_client *client) error_handler_free: ov08x40_free_controls(ov08x); +probe_power_off: + ov08x40_power_off(&client->dev); + return ret; } @@ -2224,6 +2325,8 @@ static void ov08x40_remove(struct i2c_client *client) pm_runtime_disable(&client->dev); pm_runtime_set_suspended(&client->dev); + + ov08x40_power_off(&client->dev); } #ifdef CONFIG_ACPI @@ -2235,10 +2338,17 @@ static const struct acpi_device_id ov08x40_acpi_ids[] = { MODULE_DEVICE_TABLE(acpi, ov08x40_acpi_ids); #endif +static const struct of_device_id ov08x40_of_match[] = { + { .compatible = "ovti,ov08x40" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, ov08x40_of_match); + static struct i2c_driver ov08x40_i2c_driver = { .driver = { .name = "ov08x40", .acpi_match_table = ACPI_PTR(ov08x40_acpi_ids), + .of_match_table = ov08x40_of_match, }, .probe = ov08x40_probe, .remove = ov08x40_remove,