From patchwork Tue Oct 8 10:29:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 833733 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C95FB1C1745; Tue, 8 Oct 2024 10:29:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.196 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728383394; cv=none; b=Jy8R8VRYqyulW0EYKd8FEn5i5U5m9hBmo4kATjHtojotxSCvXGGhKnS8NNsM+LxiA+uXIQr4QVbRlB3wWh9bRXr2nlx6HXRTt8pRxPu3qlS8qB71LHIZy4gCDckNo7yGyhc7Q8hRpZPPWIeLzpWn6FOHd9wpEqLiMb4V3ZWf4QA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728383394; c=relaxed/simple; bh=I2Stt0MS2ZA3zwuO5y5wV2zeuA+3MTgcPN8X0D5FW3o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dBwpmuW6Vy8iabwDmZD936bvwiKo7XEOLTEjdax0IMeGP/R0thxH4ubBfASX23A0HglET2lSQZBX+uqVmKyxbF92BBHXpsIpXc1kTPYmx4vf36MCqMmUxFG04FtjULa94uW1XiR/5PtmnxFXPanRCrJJVoKu9h5YDTG5GGYM2mw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Z7uD+DCK; arc=none smtp.client-ip=217.70.183.196 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Z7uD+DCK" Received: by mail.gandi.net (Postfix) with ESMTPSA id AFA76E0002; Tue, 8 Oct 2024 10:29:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1728383384; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=PtMmHbPZ23pwesmORM0pCnGzFJGwj7VpWxVSSzjsLkQ=; b=Z7uD+DCK6v4FGhL99TUZKfwrJsnhkqG0UVklqLvkNggxE3Tcpyd1ndQ24xFqjANZZEECjn oKq7L1SwWTZuNfX2uGb6e+dzTjbpEByx3xZqnQ0NhWTdlXFG70uUeYrEdVDEowJbvNDEas xrn8WGlP8+RYZYsCgEMc5z1yFJHAa2QTySSj4kvsKqz8zLN9drSft3vFlee2Tcae3HsjYb 9/imEtE6hfw8KPK5eRH9hTg6tbAhrvRuBMel2fX+mSw3u4Tyd90GMHm9vjWBxgbkXS0/jE GLjkAio7LAR7VMjHsPtQvFtg6sci/z0GupRVmfBKh8bTu0kTO2inc/49maQ25A== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Tue, 08 Oct 2024 12:29:41 +0200 Subject: [PATCH 2/4] i2c: nomadik: support Mobileye EyeQ6H I2C controller Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241008-mbly-i2c-v1-2-a06c1317a2f7@bootlin.com> References: <20241008-mbly-i2c-v1-0-a06c1317a2f7@bootlin.com> In-Reply-To: <20241008-mbly-i2c-v1-0-a06c1317a2f7@bootlin.com> To: Linus Walleij , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vladimir Kondratiev , =?utf-8?q?Gr=C3=A9?= =?utf-8?q?gory_Clement?= , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.14.2 X-GND-Sasl: theo.lebrun@bootlin.com Add EyeQ6H support to the nmk-i2c AMBA driver. It shares the same quirk as EyeQ5: the memory bus only supports 32-bit accesses. Avoid writeb() and readb() by reusing the same `priv->has_32b_bus` flag. It does NOT need to write speed-mode specific value into a register; therefore it does not depend on the mobileye,olb DT property. Refactoring is done using is_eyeq5 and is_eyeq6h boolean local variables. Sort variables in reverse christmas tree to try and introduce some logic into the ordering. Signed-off-by: Théo Lebrun --- drivers/i2c/busses/i2c-nomadik.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c index ad0f02acdb1215a1c04729f97bb14a4d93f88456..ea511d3a58073eaedb63850026e05b59427a69c6 100644 --- a/drivers/i2c/busses/i2c-nomadik.c +++ b/drivers/i2c/busses/i2c-nomadik.c @@ -6,10 +6,10 @@ * I2C master mode controller driver, used in Nomadik 8815 * and Ux500 platforms. * - * The Mobileye EyeQ5 platform is also supported; it uses + * The Mobileye EyeQ5 and EyeQ6H platforms are also supported; they use * the same Ux500/DB8500 IP block with two quirks: * - The memory bus only supports 32-bit accesses. - * - A register must be configured for the I2C speed mode; + * - (only EyeQ5) A register must be configured for the I2C speed mode; * it is located in a shared register region called OLB. * * Author: Srinidhi Kasagar @@ -1046,8 +1046,6 @@ static int nmk_i2c_eyeq5_probe(struct nmk_i2c_dev *priv) struct regmap *olb; unsigned int id; - priv->has_32b_bus = true; - olb = syscon_regmap_lookup_by_phandle_args(np, "mobileye,olb", 1, &id); if (IS_ERR(olb)) return PTR_ERR(olb); @@ -1070,13 +1068,15 @@ static int nmk_i2c_eyeq5_probe(struct nmk_i2c_dev *priv) static int nmk_i2c_probe(struct amba_device *adev, const struct amba_id *id) { - int ret = 0; - struct nmk_i2c_dev *priv; - struct device_node *np = adev->dev.of_node; - struct device *dev = &adev->dev; - struct i2c_adapter *adap; struct i2c_vendor_data *vendor = id->data; + struct device_node *np = adev->dev.of_node; + bool is_eyeq6h = of_device_is_compatible(np, "mobileye,eyeq6h-i2c"); + bool is_eyeq5 = of_device_is_compatible(np, "mobileye,eyeq5-i2c"); u32 max_fifo_threshold = (vendor->fifodepth / 2) - 1; + struct device *dev = &adev->dev; + struct nmk_i2c_dev *priv; + struct i2c_adapter *adap; + int ret = 0; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -1084,10 +1084,10 @@ static int nmk_i2c_probe(struct amba_device *adev, const struct amba_id *id) priv->vendor = vendor; priv->adev = adev; - priv->has_32b_bus = false; + priv->has_32b_bus = is_eyeq5 || is_eyeq6h; nmk_i2c_of_probe(np, priv); - if (of_device_is_compatible(np, "mobileye,eyeq5-i2c")) { + if (is_eyeq5) { ret = nmk_i2c_eyeq5_probe(priv); if (ret) return dev_err_probe(dev, ret, "failed OLB lookup\n"); From patchwork Tue Oct 8 10:29:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 833732 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 57503192B6F; Tue, 8 Oct 2024 10:29:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.196 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728383395; cv=none; b=LwePZwJwDovqoXc7RqJzLmHBiRPsWqCE3s6BDxYQ0/q/4Mqq3+IIPhN8jcjurh4L8gUSmTzSL8nptOf2gJmZbA3ll3QXBLNc8AVPaaCd07Kf+QwLjyVdLKaj2wlCXWpT9qNpF70cqpXBBUS7tr0b2w9u/MyXTekZ1Y55gKFNUJ4= ARC-Message-Signature: i=1; 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Tue, 8 Oct 2024 10:29:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1728383385; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ANQX8H7crnEHXkyTrpbWnxCPQMuaKFHhdRyusFeiLjE=; b=ldUoZrFei8MWb9I7J39PmFVdEQubxARTCjr9daNCIvTUXc18GUm0WZnEr1qCPG83UXGMmY mNdWfc64N3H57bgBsq+hCv/AjRPAZsAJiVggLUfoOSRBTRzrxDuFDIihgfXWKfSp+lS7FQ +lPc3Pyiib3wGbUZGgpvRIawbvt/ZFYkq3VhJ5Hgqu+fQFijIB3BiE+ywpgoS0CVw5PuTX 3x5t1lS3SvY8ECgJkfDmpZr7tBJSexZmo2wIORGMVEfASUWuegIHlqEzZmPQ4Ry30II2Qw hZnlJ5o6sGI8ggVF8jT2K6sC6p9olLZAcbvsont0B/4jDwm0ojcFIApuG21JjQ== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Tue, 08 Oct 2024 12:29:43 +0200 Subject: [PATCH 4/4] i2c: nomadik: support >=1MHz speed modes Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241008-mbly-i2c-v1-4-a06c1317a2f7@bootlin.com> References: <20241008-mbly-i2c-v1-0-a06c1317a2f7@bootlin.com> In-Reply-To: <20241008-mbly-i2c-v1-0-a06c1317a2f7@bootlin.com> To: Linus Walleij , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vladimir Kondratiev , =?utf-8?q?Gr=C3=A9?= =?utf-8?q?gory_Clement?= , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.14.2 X-GND-Sasl: theo.lebrun@bootlin.com - BRCR value must go into the BRCR1 field when in high-speed mode. It goes into BRCR2 otherwise. - Remove fallback to standard mode if priv->sm > I2C_FREQ_MODE_FAST. - Set SM properly in probe; previously it only checked STANDARD versus FAST. Now we set STANDARD, FAST, FAST_PLUS or HIGH_SPEED. - Remove all comment sections saying we only support low-speeds. Signed-off-by: Théo Lebrun --- drivers/i2c/busses/i2c-nomadik.c | 40 ++++++++++++++++------------------------ 1 file changed, 16 insertions(+), 24 deletions(-) diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c index 68ce39352d67477fa22424e2dc0f8d1741498cd1..82571983bbca5ebcd8a689d4d717ea96eb3d2ad2 100644 --- a/drivers/i2c/busses/i2c-nomadik.c +++ b/drivers/i2c/busses/i2c-nomadik.c @@ -396,7 +396,7 @@ static u32 load_i2c_mcr_reg(struct nmk_i2c_dev *priv, u16 flags) */ static void setup_i2c_controller(struct nmk_i2c_dev *priv) { - u32 brcr1, brcr2; + u32 brcr; u32 i2c_clk, div; u32 ns; u16 slsu; @@ -443,7 +443,7 @@ static void setup_i2c_controller(struct nmk_i2c_dev *priv) /* * The spec says, in case of std. mode the divider is * 2 whereas it is 3 for fast and fastplus mode of - * operation. TODO - high speed support. + * operation. */ div = (priv->clk_freq > I2C_MAX_STANDARD_MODE_FREQ) ? 3 : 2; @@ -451,33 +451,22 @@ static void setup_i2c_controller(struct nmk_i2c_dev *priv) * generate the mask for baud rate counters. The controller * has two baud rate counters. One is used for High speed * operation, and the other is for std, fast mode, fast mode - * plus operation. Currently we do not supprt high speed mode - * so set brcr1 to 0. + * plus operation. * * BRCR is a clock divider amount. Pick highest value that * leads to rate strictly below target. */ - brcr1 = FIELD_PREP(I2C_BRCR_BRCNT1, 0); - brcr2 = FIELD_PREP(I2C_BRCR_BRCNT2, i2c_clk / (priv->clk_freq * div) + 1); + brcr = i2c_clk / (priv->clk_freq * div) + 1; + + if (priv->sm == I2C_FREQ_MODE_HIGH_SPEED) + brcr = FIELD_PREP(I2C_BRCR_BRCNT1, brcr); + else + brcr = FIELD_PREP(I2C_BRCR_BRCNT2, brcr); /* set the baud rate counter register */ - writel((brcr1 | brcr2), priv->virtbase + I2C_BRCR); + writel(brcr, priv->virtbase + I2C_BRCR); - /* - * set the speed mode. Currently we support - * only standard and fast mode of operation - * TODO - support for fast mode plus (up to 1Mb/s) - * and high speed (up to 3.4 Mb/s) - */ - if (priv->sm > I2C_FREQ_MODE_FAST) { - dev_err(&priv->adev->dev, - "do not support this mode defaulting to std. mode\n"); - brcr2 = FIELD_PREP(I2C_BRCR_BRCNT2, - i2c_clk / (I2C_MAX_STANDARD_MODE_FREQ * 2)); - writel((brcr1 | brcr2), priv->virtbase + I2C_BRCR); - writel(FIELD_PREP(I2C_CR_SM, I2C_FREQ_MODE_STANDARD), - priv->virtbase + I2C_CR); - } + /* set the speed mode */ writel(FIELD_PREP(I2C_CR_SM, priv->sm), priv->virtbase + I2C_CR); /* set the Tx and Rx FIFO threshold */ @@ -1018,11 +1007,14 @@ static void nmk_i2c_of_probe(struct device_node *np, if (of_property_read_u32(np, "clock-frequency", &priv->clk_freq)) priv->clk_freq = I2C_MAX_STANDARD_MODE_FREQ; - /* This driver only supports 'standard' and 'fast' modes of operation. */ if (priv->clk_freq <= I2C_MAX_STANDARD_MODE_FREQ) priv->sm = I2C_FREQ_MODE_STANDARD; - else + else if (priv->clk_freq <= I2C_MAX_FAST_MODE_FREQ) priv->sm = I2C_FREQ_MODE_FAST; + else if (priv->clk_freq <= I2C_MAX_FAST_MODE_PLUS_FREQ) + priv->sm = I2C_FREQ_MODE_FAST_PLUS; + else + priv->sm = I2C_FREQ_MODE_HIGH_SPEED; priv->tft = 1; /* Tx FIFO threshold */ priv->rft = 8; /* Rx FIFO threshold */