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[209.132.180.67]) by mx.google.com with ESMTP id dd28si18126211edb.99.2019.11.29.11.06.01; Fri, 29 Nov 2019 11:06:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RmDkARxB; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727097AbfK2TF7 (ORCPT + 8 others); Fri, 29 Nov 2019 14:05:59 -0500 Received: from mail-pg1-f194.google.com ([209.85.215.194]:36923 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727060AbfK2TF7 (ORCPT ); Fri, 29 Nov 2019 14:05:59 -0500 Received: by mail-pg1-f194.google.com with SMTP id b10so14782909pgd.4 for ; Fri, 29 Nov 2019 11:05:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=QXtKRsM6VynlwjQE/FnWYU2XuBlYVR0gGpHghDHCIH8=; b=RmDkARxBBTcYThIJI3g+u2wq205gjr1lUn/84Vws2La/pdINoBSMb0o+CvsHOuDWKr L1I4cDK+MgUwEAHoDqaeWXZyMGi8/VehvqdmfzSpUPHLtRM7KWzuLP+t5+4UFHV8PpjV J4vv8k9V7kB2x4kzso/6j/rtotD26N/zqcFFMN4lB9TcWeTjqUsEPrju1OV2rYaRotwG xxp+JRJpge8iTeT5CXlHl2e2qh1Ar+zB8iih19I/rENm4D+HzuRAbPO30ZoVzEOThR+I 2Dv5r5vDJiETJa8fadSHSZYD2ZFvJDxhPo/X1ahLYeSmlp1w63HH+YLYWTOM7LHWjLTy dKbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QXtKRsM6VynlwjQE/FnWYU2XuBlYVR0gGpHghDHCIH8=; b=bC3bapp8dhTma92neh1ckXFeEU8iOze3NABX8/odZj9sufMfndXUAilTsfwRwql5v7 U8GGa00REGTlVXmg7HBFOWdv91zx4vKyCF90DZqmThLXDM/rip+x+MzenR1lJPH/p2Yk m/vpNG5DP2hDD49TKEN7LTdhzFsOo+4mRxpNkWxNbDwSX6AQlXbY2PnoOH/9jEfeMhYS Llj7f5gPCXCuP21VzIfvZIPFnEkCH6jmk/4mZpHdgrRDRmvBW+18/04yqO+lmVON2JPp zHwfWcAewdSuJn6+gYKiVB65GnAZ19/YjzLMSniWR7uSGbYfq8f8Hq+gYnqC6aUXObO7 MgIA== X-Gm-Message-State: APjAAAXJhUyfyIK/s5qg9n898t0xou26OgGQqqRozW4IqzaKVk7euqdG P/VAwdt4tZRnIEc0FV3obOMM X-Received: by 2002:a63:154d:: with SMTP id 13mr9273440pgv.248.1575054358658; Fri, 29 Nov 2019 11:05:58 -0800 (PST) Received: from localhost.localdomain ([2409:4072:638d:cc55:d006:f721:cde2:1059]) by smtp.gmail.com with ESMTPSA id h9sm25159974pgk.84.2019.11.29.11.05.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Nov 2019 11:05:58 -0800 (PST) From: Manivannan Sadhasivam To: mchehab@kernel.org, sakari.ailus@iki.fi Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, c.barrett@framos.com, a.brela@framos.com, peter.griffin@linaro.org, Manivannan Sadhasivam Subject: [PATCH 1/5] media: i2c: imx290: Add support for 2 data lanes Date: Sat, 30 Nov 2019 00:35:37 +0530 Message-Id: <20191129190541.30315-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191129190541.30315-1-manivannan.sadhasivam@linaro.org> References: <20191129190541.30315-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IMX290 sensor can output frames with 2/4 CSI2 data lanes. This commit adds support for 2 lane mode in addition to the 4 lane and also configuring the data lane settings in the driver based on system configuration. Signed-off-by: Manivannan Sadhasivam --- drivers/media/i2c/imx290.c | 130 ++++++++++++++++++++++++++++++++++--- 1 file changed, 121 insertions(+), 9 deletions(-) -- 2.17.1 diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index f7678e5a5d87..1d49910937fb 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -25,7 +25,18 @@ #define IMX290_STANDBY 0x3000 #define IMX290_REGHOLD 0x3001 #define IMX290_XMSTA 0x3002 +#define IMX290_FR_FDG_SEL 0x3009 #define IMX290_GAIN 0x3014 +#define IMX290_HMAX_LOW 0x301c +#define IMX290_HMAX_HIGH 0x301d +#define IMX290_PHY_LANE_NUM 0x3407 +#define IMX290_CSI_LANE_MODE 0x3443 + +/* HMAX fields */ +#define IMX290_HMAX_2_1920 0x1130 +#define IMX290_HMAX_4_1920 0x0898 +#define IMX290_HMAX_2_720 0x19C8 +#define IMX290_HMAX_4_720 0x0CE4 #define IMX290_DEFAULT_LINK_FREQ 445500000 @@ -56,6 +67,7 @@ struct imx290 { struct device *dev; struct clk *xclk; struct regmap *regmap; + int nlanes; struct v4l2_subdev sd; struct v4l2_fwnode_endpoint ep; @@ -89,14 +101,11 @@ static const struct regmap_config imx290_regmap_config = { static const struct imx290_regval imx290_global_init_settings[] = { { 0x3007, 0x00 }, - { 0x3009, 0x00 }, { 0x3018, 0x65 }, { 0x3019, 0x04 }, { 0x301a, 0x00 }, - { 0x3443, 0x03 }, { 0x3444, 0x20 }, { 0x3445, 0x25 }, - { 0x3407, 0x03 }, { 0x303a, 0x0c }, { 0x3040, 0x00 }, { 0x3041, 0x00 }, @@ -169,7 +178,6 @@ static const struct imx290_regval imx290_1080p_settings[] = { { 0x3164, 0x1a }, { 0x3480, 0x49 }, /* data rate settings */ - { 0x3009, 0x01 }, { 0x3405, 0x10 }, { 0x3446, 0x57 }, { 0x3447, 0x00 }, @@ -187,8 +195,6 @@ static const struct imx290_regval imx290_1080p_settings[] = { { 0x3453, 0x00 }, { 0x3454, 0x17 }, { 0x3455, 0x00 }, - { 0x301c, 0x98 }, - { 0x301d, 0x08 }, }; static const struct imx290_regval imx290_720p_settings[] = { @@ -210,7 +216,6 @@ static const struct imx290_regval imx290_720p_settings[] = { { 0x3164, 0x1a }, { 0x3480, 0x49 }, /* data rate settings */ - { 0x3009, 0x01 }, { 0x3405, 0x10 }, { 0x3446, 0x4f }, { 0x3447, 0x00 }, @@ -228,8 +233,6 @@ static const struct imx290_regval imx290_720p_settings[] = { { 0x3453, 0x00 }, { 0x3454, 0x17 }, { 0x3455, 0x00 }, - { 0x301c, 0xe4 }, - { 0x301d, 0x0c }, }; static const struct imx290_regval imx290_10bit_settings[] = { @@ -522,6 +525,25 @@ static int imx290_write_current_format(struct imx290 *imx290, return 0; } +static int imx290_set_hmax(struct imx290 *imx290, u32 val) +{ + int ret; + + ret = imx290_write_reg(imx290, IMX290_HMAX_LOW, (val & 0xff)); + if (ret) { + dev_err(imx290->dev, "Error setting HMAX register\n"); + return ret; + } + + ret = imx290_write_reg(imx290, IMX290_HMAX_HIGH, ((val >> 8) & 0xff)); + if (ret) { + dev_err(imx290->dev, "Error setting HMAX register\n"); + return ret; + } + + return 0; +} + /* Start streaming */ static int imx290_start_streaming(struct imx290 *imx290) { @@ -551,6 +573,40 @@ static int imx290_start_streaming(struct imx290 *imx290) return ret; } + switch (imx290->nlanes) { + case 2: + if (imx290->current_mode->width == 1920) { + ret = imx290_set_hmax(imx290, IMX290_HMAX_2_1920); + if (ret < 0) + return ret; + } else { + ret = imx290_set_hmax(imx290, IMX290_HMAX_2_720); + if (ret < 0) + return ret; + } + + break; + case 4: + if (imx290->current_mode->width == 1920) { + ret = imx290_set_hmax(imx290, IMX290_HMAX_4_1920); + if (ret < 0) + return ret; + } else { + ret = imx290_set_hmax(imx290, IMX290_HMAX_4_720); + if (ret < 0) + return ret; + } + + break; + default: + /* + * We should never hit this since the data lane count is + * validated in probe itself + */ + dev_err(imx290->dev, "Lane configuration not supported\n"); + return -EINVAL; + } + /* Apply customized values from user */ ret = v4l2_ctrl_handler_setup(imx290->sd.ctrl_handler); if (ret) { @@ -607,6 +663,49 @@ static int imx290_get_regulators(struct device *dev, struct imx290 *imx290) imx290->supplies); } +static int imx290_set_data_lanes(struct imx290 *imx290) +{ + int ret = 0, laneval, frsel; + + switch (imx290->nlanes) { + case 2: + laneval = 0x01; + frsel = 0x02; + break; + case 4: + laneval = 0x03; + frsel = 0x01; + break; + default: + /* + * We should never hit this since the data lane count is + * validated in probe itself + */ + dev_err(imx290->dev, "Lane configuration not supported\n"); + ret = -EINVAL; + goto exit; + } + + ret = imx290_write_reg(imx290, IMX290_PHY_LANE_NUM, laneval); + if (ret) { + dev_err(imx290->dev, "Error setting Physical Lane number register\n"); + goto exit; + } + + ret = imx290_write_reg(imx290, IMX290_CSI_LANE_MODE, laneval); + if (ret) { + dev_err(imx290->dev, "Error setting CSI Lane mode register\n"); + goto exit; + } + + ret = imx290_write_reg(imx290, IMX290_FR_FDG_SEL, frsel); + if (ret) + dev_err(imx290->dev, "Error setting FR/FDG SEL register\n"); + +exit: + return ret; +} + static int imx290_power_on(struct device *dev) { struct i2c_client *client = to_i2c_client(dev); @@ -703,6 +802,16 @@ static int imx290_probe(struct i2c_client *client) goto free_err; } + /* Get number of data lanes */ + imx290->nlanes = imx290->ep.bus.mipi_csi2.num_data_lanes; + if (imx290->nlanes != 2 && imx290->nlanes != 4) { + dev_err(dev, "Invalid data lanes: %d\n", imx290->nlanes); + ret = -EINVAL; + goto free_err; + } + + dev_dbg(dev, "Using %u data lanes\n", imx290->nlanes); + if (!imx290->ep.nr_of_link_frequencies) { dev_err(dev, "link-frequency property not found in DT\n"); ret = -EINVAL; @@ -822,6 +931,9 @@ static int imx290_probe(struct i2c_client *client) goto free_entity; } + /* Set data lane count */ + imx290_set_data_lanes(imx290); + pm_runtime_set_active(dev); pm_runtime_enable(dev); pm_runtime_idle(dev); From patchwork Fri Nov 29 19:05:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 180494 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp1972301ile; Fri, 29 Nov 2019 11:06:08 -0800 (PST) X-Google-Smtp-Source: APXvYqwVFt7QpVXVXUscNjGVGOgTjO6cBupDXfEBfvkctQU0HHuagTGbhYBrUAmyEJHtxdEhkOaU X-Received: by 2002:a17:906:600b:: with SMTP id o11mr62262578ejj.175.1575054368019; Fri, 29 Nov 2019 11:06:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1575054368; cv=none; d=google.com; s=arc-20160816; b=OTD1Vp4YgWSZHvQl7Mfp4Kg2Wf5IHh5VZSmlKHuDNfEtThS2XzU2C7KUFNSjstFM6A h210tgR8zptJQSW5zk3fs1q7BJZVSeRWfxSk9CGmR+i00B7SahjX6g0CfwiPC2TPRn+n MyjI5vGJUbarPOFrIWTx+1jp5sV/hepm1KygAD2lqWdaQKWSUTeQ56cMjVaKccJ7vhG+ EhIaD5pBmDy8iOtxA+yIHp0l5hbwNiCR8U3Vu/4IVO4PQBlESfxZVTiNkpleb2iBSlRi DZ3xcQod8drqDC5zQFKBZTpgmvTu1CH18/gJjM6YctxP4UKXGC1OiPNzDeNoJVYAUzlQ c/6Q== ARC-Message-Signature: i=1; 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Fri, 29 Nov 2019 11:06:04 -0800 (PST) Received: from localhost.localdomain ([2409:4072:638d:cc55:d006:f721:cde2:1059]) by smtp.gmail.com with ESMTPSA id h9sm25159974pgk.84.2019.11.29.11.05.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Nov 2019 11:06:04 -0800 (PST) From: Manivannan Sadhasivam To: mchehab@kernel.org, sakari.ailus@iki.fi Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, c.barrett@framos.com, a.brela@framos.com, peter.griffin@linaro.org, Manivannan Sadhasivam Subject: [PATCH 2/5] media: i2c: imx290: Add support for test pattern generation Date: Sat, 30 Nov 2019 00:35:38 +0530 Message-Id: <20191129190541.30315-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191129190541.30315-1-manivannan.sadhasivam@linaro.org> References: <20191129190541.30315-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support for generating following test patterns by IMX290: * Sequence Pattern 1 * Horizontal Color-bar Chart * Vertical Color-bar Chart * Sequence Pattern 2 * Gradation Pattern 1 * Gradation Pattern 2 * 000/555h Toggle Pattern Signed-off-by: Manivannan Sadhasivam --- drivers/media/i2c/imx290.c | 41 +++++++++++++++++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index 1d49910937fb..e218c959a729 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -26,12 +26,19 @@ #define IMX290_REGHOLD 0x3001 #define IMX290_XMSTA 0x3002 #define IMX290_FR_FDG_SEL 0x3009 +#define IMX290_BLKLEVEL_LOW 0x300a +#define IMX290_BLKLEVEL_HIGH 0x300b #define IMX290_GAIN 0x3014 #define IMX290_HMAX_LOW 0x301c #define IMX290_HMAX_HIGH 0x301d +#define IMX290_PGCTRL 0x308c #define IMX290_PHY_LANE_NUM 0x3407 #define IMX290_CSI_LANE_MODE 0x3443 +#define IMX290_PGCTRL_REGEN BIT(0) +#define IMX290_PGCTRL_THRU BIT(1) +#define IMX290_PGCTRL_MODE(n) ((n) << 4) + /* HMAX fields */ #define IMX290_HMAX_2_1920 0x1130 #define IMX290_HMAX_4_1920 0x0898 @@ -99,6 +106,17 @@ static const struct regmap_config imx290_regmap_config = { .cache_type = REGCACHE_RBTREE, }; +static const char * const imx290_test_pattern_menu[] = { + "Disabled", + "Sequence Pattern 1", + "Horizontal Color-bar Chart", + "Vertical Color-bar Chart", + "Sequence Pattern 2", + "Gradation Pattern 1", + "Gradation Pattern 2", + "000/555h Toggle Pattern", +}; + static const struct imx290_regval imx290_global_init_settings[] = { { 0x3007, 0x00 }, { 0x3018, 0x65 }, @@ -394,6 +412,22 @@ static int imx290_set_ctrl(struct v4l2_ctrl *ctrl) case V4L2_CID_GAIN: ret = imx290_set_gain(imx290, ctrl->val); break; + case V4L2_CID_TEST_PATTERN: + if (ctrl->val) { + imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW, 0x00); + imx290_write_reg(imx290, IMX290_BLKLEVEL_HIGH, 0x00); + mdelay(10); + imx290_write_reg(imx290, IMX290_PGCTRL, + (u8)(IMX290_PGCTRL_REGEN | + IMX290_PGCTRL_THRU | + IMX290_PGCTRL_MODE(ctrl->val))); + } else { + imx290_write_reg(imx290, IMX290_PGCTRL, 0x00); + mdelay(10); + imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW, 0x3c); + imx290_write_reg(imx290, IMX290_BLKLEVEL_HIGH, 0x00); + } + break; default: ret = -EINVAL; break; @@ -878,7 +912,7 @@ static int imx290_probe(struct i2c_client *client) mutex_init(&imx290->lock); - v4l2_ctrl_handler_init(&imx290->ctrls, 3); + v4l2_ctrl_handler_init(&imx290->ctrls, 4); v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops, V4L2_CID_GAIN, 0, 72, 1, 0); @@ -896,6 +930,11 @@ static int imx290_probe(struct i2c_client *client) INT_MAX, 1, imx290_modes[0].pixel_rate); + v4l2_ctrl_new_std_menu_items(&imx290->ctrls, &imx290_ctrl_ops, + V4L2_CID_TEST_PATTERN, + ARRAY_SIZE(imx290_test_pattern_menu) - 1, + 0, 0, imx290_test_pattern_menu); + imx290->sd.ctrl_handler = &imx290->ctrls; if (imx290->ctrls.error) { From patchwork Fri Nov 29 19:05:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 180497 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp1972649ile; Fri, 29 Nov 2019 11:06:24 -0800 (PST) X-Google-Smtp-Source: APXvYqxXNwO3pQyUVmPePuPvQOSfmnCbNfB/c/Ae/Hq2UPTasWvyg8VOUtYKPNpWauE2wETmGmCP X-Received: by 2002:a17:906:f2c9:: with SMTP id gz9mr37588404ejb.171.1575054384087; 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The initial driver used a single setting for both but since we now have the lane count support in place, let's add configurable link frequency and pixel rate. Signed-off-by: Manivannan Sadhasivam --- drivers/media/i2c/imx290.c | 155 +++++++++++++++++++++---------------- 1 file changed, 89 insertions(+), 66 deletions(-) -- 2.17.1 diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index f26c4a0ee0a0..d794ade26609 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -45,8 +45,6 @@ #define IMX290_HMAX_2_720 0x19C8 #define IMX290_HMAX_4_720 0x0CE4 -#define IMX290_DEFAULT_LINK_FREQ 445500000 - static const char * const imx290_supply_name[] = { "vdda", "vddd", @@ -63,8 +61,6 @@ struct imx290_regval { struct imx290_mode { u32 width; u32 height; - u32 pixel_rate; - u32 link_freq_index; const struct imx290_regval *data; u32 data_size; @@ -281,7 +277,10 @@ static const struct imx290_regval imx290_12bit_settings[] = { /* supported link frequencies */ static const s64 imx290_link_freq[] = { - IMX290_DEFAULT_LINK_FREQ, + 891000000, /* 1920x1080 - 2 lane */ + 445500000, /* 1920x1080 - 4 lane */ + 594000000, /* 1280x720 - 2 lane */ + 297000000, /* 1280x720 - 4 lane */ }; /* Mode configs */ @@ -291,16 +290,12 @@ static const struct imx290_mode imx290_modes[] = { .height = 1080, .data = imx290_1080p_settings, .data_size = ARRAY_SIZE(imx290_1080p_settings), - .pixel_rate = 178200000, - .link_freq_index = 0, }, { .width = 1280, .height = 720, .data = imx290_720p_settings, .data_size = ARRAY_SIZE(imx290_720p_settings), - .pixel_rate = 178200000, - .link_freq_index = 0, }, }; @@ -509,6 +504,73 @@ static int imx290_get_fmt(struct v4l2_subdev *sd, return 0; } +static s64 imx290_get_link_freq_index(struct imx290 *imx290) +{ + const struct imx290_mode *cur_mode = imx290->current_mode; + u8 index; + + if (cur_mode->width == 1920) + index = imx290->nlanes / 4; + else + index = (imx290->nlanes / 4) + 2; + + return index; +} + +static s64 imx290_get_link_freq(struct imx290 *imx290) +{ + u8 index = imx290_get_link_freq_index(imx290); + + return imx290_link_freq[index]; +} + +static u64 imx290_calc_pixel_rate(struct imx290 *imx290) +{ + s64 link_freq = imx290_get_link_freq(imx290); + u8 nlanes = imx290->nlanes; + + /* pixel rate = link_freq * 2 * nr_of_lanes / bits_per_sample */ + return (link_freq * 2 * nlanes / imx290->bpp); +} + +static int imx290_write_current_format(struct imx290 *imx290, + struct v4l2_mbus_framefmt *format) +{ + int ret; + + switch (format->code) { + case MEDIA_BUS_FMT_SRGGB10_1X10: + ret = imx290_set_register_array(imx290, imx290_10bit_settings, + ARRAY_SIZE( + imx290_10bit_settings)); + if (ret < 0) { + dev_err(imx290->dev, "Could not set format registers\n"); + return ret; + } + + imx290->bpp = 10; + + break; + case MEDIA_BUS_FMT_SRGGB12_1X12: + ret = imx290_set_register_array(imx290, imx290_12bit_settings, + ARRAY_SIZE( + imx290_12bit_settings)); + if (ret < 0) { + dev_err(imx290->dev, "Could not set format registers\n"); + return ret; + } + + imx290->bpp = 12; + + break; + default: + dev_err(imx290->dev, "Unknown pixel format\n"); + return -EINVAL; + } + + return 0; +} + static int imx290_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg, struct v4l2_subdev_format *fmt) @@ -517,6 +579,7 @@ static int imx290_set_fmt(struct v4l2_subdev *sd, const struct imx290_mode *mode; struct v4l2_mbus_framefmt *format; unsigned int i; + int ret = 0; mutex_lock(&imx290->lock); @@ -542,17 +605,27 @@ static int imx290_set_fmt(struct v4l2_subdev *sd, format = v4l2_subdev_get_try_format(sd, cfg, fmt->pad); } else { format = &imx290->current_format; - __v4l2_ctrl_s_ctrl(imx290->link_freq, mode->link_freq_index); - __v4l2_ctrl_s_ctrl_int64(imx290->pixel_rate, mode->pixel_rate); - imx290->current_mode = mode; + + /* Set current frame format */ + ret = imx290_write_current_format(imx290, &fmt->format); + if (ret < 0) { + dev_err(imx290->dev, "Could not set frame format\n"); + goto err_out; + } + + __v4l2_ctrl_s_ctrl(imx290->link_freq, + imx290_get_link_freq_index(imx290)); + __v4l2_ctrl_s_ctrl_int64(imx290->pixel_rate, + imx290_calc_pixel_rate(imx290)); } *format = fmt->format; +err_out: mutex_unlock(&imx290->lock); - return 0; + return ret; } static int imx290_entity_init_cfg(struct v4l2_subdev *subdev, @@ -569,44 +642,6 @@ static int imx290_entity_init_cfg(struct v4l2_subdev *subdev, return 0; } -static int imx290_write_current_format(struct imx290 *imx290, - struct v4l2_mbus_framefmt *format) -{ - int ret; - - switch (format->code) { - case MEDIA_BUS_FMT_SRGGB10_1X10: - ret = imx290_set_register_array(imx290, imx290_10bit_settings, - ARRAY_SIZE( - imx290_10bit_settings)); - if (ret < 0) { - dev_err(imx290->dev, "Could not set format registers\n"); - return ret; - } - - imx290->bpp = 10; - - break; - case MEDIA_BUS_FMT_SRGGB12_1X12: - ret = imx290_set_register_array(imx290, imx290_12bit_settings, - ARRAY_SIZE( - imx290_12bit_settings)); - if (ret < 0) { - dev_err(imx290->dev, "Could not set format registers\n"); - return ret; - } - - imx290->bpp = 12; - - break; - default: - dev_err(imx290->dev, "Unknown pixel format\n"); - return -EINVAL; - } - - return 0; -} - static int imx290_set_hmax(struct imx290 *imx290, u32 val) { int ret; @@ -640,13 +675,6 @@ static int imx290_start_streaming(struct imx290 *imx290) return ret; } - /* Set current frame format */ - ret = imx290_write_current_format(imx290, &imx290->current_format); - if (ret < 0) { - dev_err(imx290->dev, "Could not set frame format\n"); - return ret; - } - /* Apply default values of current mode */ ret = imx290_set_register_array(imx290, imx290->current_mode->data, imx290->current_mode->data_size); @@ -901,12 +929,6 @@ static int imx290_probe(struct i2c_client *client) goto free_err; } - if (imx290->ep.link_frequencies[0] != IMX290_DEFAULT_LINK_FREQ) { - dev_err(dev, "Unsupported link frequency\n"); - ret = -EINVAL; - goto free_err; - } - /* Only CSI2 is supported for now */ if (imx290->ep.bus_type != V4L2_MBUS_CSI2_DPHY) { dev_err(dev, "Unsupported bus type, should be CSI2\n"); @@ -973,14 +995,15 @@ static int imx290_probe(struct i2c_client *client) &imx290_ctrl_ops, V4L2_CID_LINK_FREQ, ARRAY_SIZE(imx290_link_freq) - 1, - 0, imx290_link_freq); + (imx290->nlanes / 4), + imx290_link_freq); if (imx290->link_freq) imx290->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; imx290->pixel_rate = v4l2_ctrl_new_std(&imx290->ctrls, &imx290_ctrl_ops, V4L2_CID_PIXEL_RATE, 1, INT_MAX, 1, - imx290_modes[0].pixel_rate); + imx290_calc_pixel_rate(imx290)); v4l2_ctrl_new_std_menu_items(&imx290->ctrls, &imx290_ctrl_ops, V4L2_CID_TEST_PATTERN,