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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000FCC4.mail.protection.outlook.com (10.167.242.106) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8069.17 via Frontend Transport; Wed, 16 Oct 2024 14:51:08 +0000 Received: from shatadru.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Wed, 16 Oct 2024 09:51:04 -0500 From: Dhananjay Ugwekar To: , , , , CC: , , "Dhananjay Ugwekar" Subject: [PATCH v2 2/2] cpufreq/amd-pstate: Set the initial min_freq to lowest_nonlinear_freq Date: Wed, 16 Oct 2024 14:46:42 +0000 Message-ID: <20241016144639.135610-3-Dhananjay.Ugwekar@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241016144639.135610-1-Dhananjay.Ugwekar@amd.com> References: <20241016144639.135610-1-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC4:EE_|DM4PR12MB8524:EE_ X-MS-Office365-Filtering-Correlation-Id: e213acb0-1f21-409f-071e-08dcedf1f82c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|36860700013|376014; X-Microsoft-Antispam-Message-Info: xn1krNmA8EOdEEGsDOAIPL0JBKyHuNdqcCdnHfV06Sf0UxUCTW/dOl6DhcdHvMYgrLr2zhnvMVW6UszgFcMo6vDreMgi39qBdrNiwwwCdJYIL4TOrKLT8n0jKyULNmvpkfT8XX1eWVpg5ybn+lUz8omBlRqt3J16XIh626+gbtef2FFMnC0JOo3TtE9bKXy8ftiIMO0d3W7SafuNSzdsqMyuGMl6md/9tVo73R3OdYnGPZ5gSFIsLiNj7EqmR2fpUQuwxpIAC0P9j83gQm++M3F5iUS/e1z4THG37j6GTfZxLkvoo4Zm1MwICeN5MhDLXTw1WJpEUyaYNeiWQ9IDLBQxjtaPv5UQN3KzRGeJUOFsBrsEFhIXeKo3BTutxHFtKGnfc8iU8JdfF70Q4NocpjPtwYrONwrUoT0GJqwx42Jtlob67aU8GBiFYA+9crRFUzHQFbEyFLHx6wq/DIcWb4S8P3GHXsilNimHIRKthjdArL6eEkF8DVVES9qX9zMQHcIKKNHxpuhcX3a2Dgekr0g20bZYgynclQm4ER0dFVFiSyyYIhbUmBYoo1csRLymHzpyNLcWsmSdjTsSs5LxlP1dS93b7BwiTlXM9D8zZPpYYLOC+9GuPQbVyUFgL2WKZn+62KvPzwUQFcN7CDl2ofgQ3s8T/q+O1K1keXaD0m6odrt2/nuivgyzeuwFWIgP3MBSPeXPOj5UuQm1ypfz6VFJq3+Q0Ze/GXNR695Je2t7E446TKBWIrqG9LFFt/oz3D6usg0KSrMba7GCmaZ8B+Gg5nC382/t9qo+EMClowRCg21W0pJF3X2DrDP5mgLuRkZduW8sIhLjbl5d8bAfFUVCRO1sOuWBaXKYIek4Rk618jP3i7SXMJJBS5lCulSAOhxqTvReTlFGdLy5CH6QUY1r2rn5bfR11D/gxapcVjHWPaWsdcixRLxRjz2PMdVp26h1JOYiNIPZs1UcBPnzPRsgQ0ZHBMDFdLMqWpae4+WHkQfsWmAXNAzsb6b1WqowZWC3gE/K+P7romX6j85wN6CNBgz6pOM3bJJwZnNIF7eZx+MRx4mggdqyFCSWhNNl4TFVbI1z8jGTld8JslXzLX5YSK6ThviMhZ358apKfNxC6SxQ+6BnWSS301pTlg5O94fwfA33XoIs713PjfjdTvxnc/upEYaqID+viPRFEQnXNMxUnSF/tYIzbdOP5yP1PCxRoMEyr9fvQ+wddcubBpfZx1t0opvYt2N69cnQe5jlsAEpjFsDT2W6+e8AJaE4Q1mI2MfxKeAj8U+mHaVjbXU0si+KWrMwgpdKECNkCmki/LHyVqPqGrswgzzGWsWYZZFy6aY/C2HYc09/Q7yEbgGz+SW1dOoNBSXRSH9/ztpVdwkBGU6phelk7nQwJL+v X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Oct 2024 14:51:08.4429 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e213acb0-1f21-409f-071e-08dcedf1f82c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC4.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB8524 According to the AMD architectural programmer's manual volume 2 [1], in section "17.6.4.1 CPPC_CAPABILITY_1" lowest_nonlinear_perf is described as "Reports the most energy efficient performance level (in terms of performance per watt). Above this threshold, lower performance levels generally result in increased energy efficiency. Reducing performance below this threshold does not result in total energy savings for a given computation, although it reduces instantaneous power consumption". So lowest_nonlinear_perf is the most power efficient performance level, and going below that would lead to a worse performance/watt. Also, setting the minimum frequency to lowest_nonlinear_freq (instead of lowest_freq) allows the CPU to idle at a higher frequency which leads to more time being spent in a deeper idle state (as trivial idle tasks are completed sooner). This has shown a power benefit in some systems, in other systems, power consumption has increased but so has the throughput/watt. Modify the initial policy_data->min passed by cpufreq core to lowest_nonlinear_freq, in the ->verify() callback. Also set the qos_request cpudata->req[0] to FREQ_QOS_MIN_DEFAULT_VALUE (i.e. 0), so that it also gets overridden by the check in verify function. Link: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24593.pdf [1] Signed-off-by: Dhananjay Ugwekar --- drivers/cpufreq/amd-pstate.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index fa16d72d6058..117ad5988e8e 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -529,8 +529,20 @@ static void amd_pstate_update(struct amd_cpudata *cpudata, u32 min_perf, static int amd_pstate_verify(struct cpufreq_policy_data *policy_data) { + struct cpufreq_policy *policy = cpufreq_cpu_get(policy_data->cpu); + struct amd_cpudata *cpudata = policy->driver_data; + + if (!policy) + return -EINVAL; + + if (policy_data->min == FREQ_QOS_MIN_DEFAULT_VALUE) + policy_data->min = cpudata->lowest_nonlinear_freq; + cpufreq_verify_within_cpu_limits(policy_data); pr_debug("policy_max =%d, policy_min=%d\n", policy_data->max, policy_data->min); + + cpufreq_cpu_put(policy); + return 0; } @@ -996,7 +1008,7 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) policy->fast_switch_possible = true; ret = freq_qos_add_request(&policy->constraints, &cpudata->req[0], - FREQ_QOS_MIN, policy->cpuinfo.min_freq); + FREQ_QOS_MIN, FREQ_QOS_MIN_DEFAULT_VALUE); if (ret < 0) { dev_err(dev, "Failed to add min-freq constraint (%d)\n", ret); goto free_cpudata1;