From patchwork Thu Oct 17 00:16:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 837005 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC4E6B665 for ; Thu, 17 Oct 2024 00:17:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.36.163.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729124228; cv=none; b=GbpyQWjdT2/oPTZjd3ljt2IevQJOvV8AFOXW26GMS2+PCBpZGN8Dv1MILyLsOIK7+8bIs8ujErFZ8HP6WZ/YddhXJdGuo8wwpLNoFE83yfHIIMKp3bLycm9Wxy9WT3XxrBg3cLYzPx4zTWrq/Bu2vT5dlxEwih0wDYLzJZh2BxI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729124228; c=relaxed/simple; bh=FzbLQXy4rtHhw3iczDHJWDrHPqWFijbi00lnPhFqfjI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=salNYtL6g5opcxr1t6scuOe9iycNao9XGwDh+x5+uDnG/qJGM8B+n0ykEBKniyoq8y+OfidcOj2x5oFX94DFNzTnDQqhBshcHJVqf+BNVzvO4jC2IqqeNKZMMypikNvLcvoKTw3T/n792qpJfidCKKEFf42A2QJJsLZH1UTFjvc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz; spf=pass smtp.mailfrom=alliedtelesis.co.nz; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b=ZSIKBM12; arc=none smtp.client-ip=202.36.163.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="ZSIKBM12" Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 7C9342C0372; Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1729124217; bh=pXivVa3uMTlSLow2XPCpywJmuaSDrGL7ajThDd/6yjY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZSIKBM126jEyMy0KenO306SpF9bEgT61Dqxaw56x0rxT/PSWBenl2AO5Y0jNI5CnK o7/LQQ1mL/STfbqX7yC+T+deMrGGqvVDZWHoJAs/3vbnMZiHQPwrANFXH4ElqJIEMQ pYaBrD4G4HolGLIrOMbjvIOvow59WehMF8l+T+ChhziQMgqIj5vZB3LQHNp9ryA2Zo rmD4igoVjt3TZyGjyFVe59vWekc6O1XY0+U5VO+JrOFqZVgZY9Lw5LMrEA4VFXYZfW YEYoDPYMLEagXCqlXwlbUk9/OWeaQXzGamuSFQmyQJHLJ3sLe809K82tU7PR4bM+jF lNBLPIIdbQSNA== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Thu, 17 Oct 2024 13:16:57 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 301E813EE85; Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 2BC762802E6; Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) From: Chris Packham To: andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lee@kernel.org, sre@kernel.org, tsbogend@alpha.franken.de, markus.stockhausen@gmx.de Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [PATCH v7 1/6] dt-bindings: reset: syscon-reboot: Add reg property Date: Thu, 17 Oct 2024 13:16:48 +1300 Message-ID: <20241017001653.178399-2-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241017001653.178399-1-chris.packham@alliedtelesis.co.nz> References: <20241017001653.178399-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=ca1xrWDM c=1 sm=1 tr=0 ts=67105779 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=DAUX931o1VcA:10 a=KKAkSRfTAAAA:8 a=8QneSPuuVenq9H3OMoEA:9 a=3ZKOabzyN94A:10 a=cvBusfyB2V15izCimMoJ:22 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat The syscon-reboot binding used 'offset' for historical reasons. Having a reg property is appropriate when these nodes are children of a MMIO bus. Add a reg property and modify the constraints so that one of 'reg' or 'offset' is expected. Signed-off-by: Chris Packham Reviewed-by: Krzysztof Kozlowski --- Notes: Changes in v7: - None. This has been applied to by Sebastian, I've just kept it in the series so that others can see the complete picutre Changes in v6: - Add r-by from Krzysztof Changes in v5: - New, suggested by Krzysztof .../bindings/power/reset/syscon-reboot.yaml | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml index 75061124d9a8..19d3093e6cd2 100644 --- a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml +++ b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml @@ -31,6 +31,10 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: Offset in the register map for the reboot register (in bytes). + reg: + maxItems: 1 + description: Base address and size for the reboot register. + regmap: $ref: /schemas/types.yaml#/definitions/phandle deprecated: true @@ -45,9 +49,14 @@ properties: priority: default: 192 +oneOf: + - required: + - offset + - required: + - reg + required: - compatible - - offset additionalProperties: false From patchwork Thu Oct 17 00:16:49 2024 Content-Type: text/plain; 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Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1729124217; bh=LwZNNLRSYlK1w8PCDUfxP7T5rkcGnA5kwvHTuTbGR0I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=zYv8P9gwntDddshynwX8idRgNNfrKo2DaugkCvveNQ3/mEOAxW5ebMCCik4I/JCWx 1lqktNuAM6tHtfcL31JJMmxZzr1z2p8KgE6x+SlkMBgp+gP/odui37hoI+n3wfKl0M muLbyDFjpLG3rBRoTC4c+6uzXR6vGfF0bDUrYXG92b1fqCe1N7hhTbOQKqR3v1GBmE 98PSkbuhYqRJeu4KgGiK7qbyiU31UrloRVsvKEezxIW27MhfjshLDGc87CUnr7DOcE gavVkGdGUsCo0C44gdGMopCi0z+3+dOlVBWcHSIbLNSUvQRdx6pQV6kRuv4OeOePwa tClx1F8o84A5g== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Thu, 17 Oct 2024 13:16:57 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 31E7F13EE9B; Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 2DA2828080C; Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) From: Chris Packham To: andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lee@kernel.org, sre@kernel.org, tsbogend@alpha.franken.de, markus.stockhausen@gmx.de Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [PATCH v7 2/6] power: reset: syscon-reboot: Accept reg property Date: Thu, 17 Oct 2024 13:16:49 +1300 Message-ID: <20241017001653.178399-3-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241017001653.178399-1-chris.packham@alliedtelesis.co.nz> References: <20241017001653.178399-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=ca1xrWDM c=1 sm=1 tr=0 ts=67105779 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=DAUX931o1VcA:10 a=KKAkSRfTAAAA:8 a=GF1LeCK7rlvhbTvQy6cA:9 a=3ZKOabzyN94A:10 a=cvBusfyB2V15izCimMoJ:22 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat For historical reasons syscon-reboot has used an 'offset' property. As a child on a MMIO bus having a 'reg' property is more appropriate. Accept 'reg' as an alternative to 'offset'. Signed-off-by: Chris Packham Reviewed-by: Krzysztof Kozlowski --- Notes: Changes in v7: - None. This has been applied to by Sebastian, I've just kept it in the series so that others can see the complete picture Changes in v6: - Add r-by from Krzysztof Changes in v5: - New, making the driver accept the updated binding drivers/power/reset/syscon-reboot.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/power/reset/syscon-reboot.c b/drivers/power/reset/syscon-reboot.c index 4d622c19bc48..d623d77e657e 100644 --- a/drivers/power/reset/syscon-reboot.c +++ b/drivers/power/reset/syscon-reboot.c @@ -61,7 +61,8 @@ static int syscon_reboot_probe(struct platform_device *pdev) priority = 192; if (of_property_read_u32(pdev->dev.of_node, "offset", &ctx->offset)) - return -EINVAL; + if (of_property_read_u32(pdev->dev.of_node, "reg", &ctx->offset)) + return -EINVAL; value_err = of_property_read_u32(pdev->dev.of_node, "value", &ctx->value); mask_err = of_property_read_u32(pdev->dev.of_node, "mask", &ctx->mask); From patchwork Thu Oct 17 00:16:50 2024 Content-Type: text/plain; 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Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1729124217; bh=RuxZVsTkb5fb6zPXU9eWSOGWqZMZ3cYKJORhqZxf5ZQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uBT0TVCiQkpq5MprOv5DnlqUi4zjQ+c3ppH6QSblqXeCBCTZ7MNeIIw3sFzV8eh72 gVM6vFTzgR8pIP4V4IJyURajuBNe/u3ZcCCE/ihFza6KWURXgknlrHVpkhI9jui2vm Xbq6slacLu5QjC+sGZB3X4b9u4zf2zN+uvAvzgZArpL5YNhv176pJuz71dz0kImfjG k4nnlehIEKPh56IsHJqirFZvLDLpO+PYgsdFFHqJHFlaio1Ltv1XNriDyH7vug4oBa aqOuIO9HB2Str2zJ8qoIB33wJw0h1JySVpJmDrYXzmDMYwvTwqDChlgyJV4kM2tnLM VSa3oH5kys5QA== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Thu, 17 Oct 2024 13:16:57 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 357CC13EE9C; Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 338542802E6; Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) From: Chris Packham To: andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lee@kernel.org, sre@kernel.org, tsbogend@alpha.franken.de, markus.stockhausen@gmx.de Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [PATCH v7 3/6] dt-bindings: mfd: Add Realtek RTL9300 switch peripherals Date: Thu, 17 Oct 2024 13:16:50 +1300 Message-ID: <20241017001653.178399-4-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241017001653.178399-1-chris.packham@alliedtelesis.co.nz> References: <20241017001653.178399-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=ca1xrWDM c=1 sm=1 tr=0 ts=67105779 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=DAUX931o1VcA:10 a=gEfo2CItAAAA:8 a=Qe96mEiGhgO3E569TkkA:9 a=3ZKOabzyN94A:10 a=sptkURWiP4Gy88Gu7hUp:22 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat Add device tree schema for the Realtek RTL9300 switches. The RTL9300 family is made up of the RTL9301, RTL9302B, RTL9302C and RTL9303. These have the same SoC differ in the Ethernet switch/SERDES arrangement. Currently the only supported features are the syscon-reboot and i2c controllers. The syscon-reboot is needed to be able to reboot the board. The I2C controllers are slightly unusual because they each own an SCL pin (GPIO8 for the first controller, GPIO 17 for the second) but have 8 common SDA pins which can be assigned to either controller (but not both). Signed-off-by: Chris Packham --- Notes: Changes in v7: - Set additionalProperties: false - Remove extraneous examples from i2c binding Changes in v6: - Drop wildcard compatible - Add specific compatibles for the 4 known SoC variants - For the i2c part of the binding accept realtek,rtl9301 as a fallback for the other compatibles - The overall switches will eventually differ because these will have different SERDES/port arrangements so they aren't getting the same fallback treatment Changes in v5: I've combined the two series I had in flight so this is the combination of adding the switch syscon, the reboot and i2c. It makes the changelog a bit meaningless so I've dropped the earlier commentary. As requested I've put a more complete example in the main rtl9300-switch.yaml. I've kept rtl9300-i2c.yaml separate for now but link to it with a $ref from rtl9300-switch.yaml to reduce clutter. The example in rtl9300-i2c.yaml is technically duplicating part of the example from rtl9300-switch.yaml but I feel it's nice to be able to see the example next to where the properties are defined. .../bindings/i2c/realtek,rtl9301-i2c.yaml | 69 +++++++++++ .../bindings/mfd/realtek,rtl9301-switch.yaml | 114 ++++++++++++++++++ 2 files changed, 183 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml create mode 100644 Documentation/devicetree/bindings/mfd/realtek,rtl9301-switch.yaml diff --git a/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml b/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml new file mode 100644 index 000000000000..eddfd329c67b --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/realtek,rtl9301-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek RTL I2C Controller + +maintainers: + - Chris Packham + +description: + The RTL9300 SoC has two I2C controllers. Each of these has an SCL line (which + if not-used for SCL can be a GPIO). There are 8 common SDA lines that can be + assigned to either I2C controller. + +properties: + compatible: + oneOf: + - items: + - enum: + - realtek,rtl9302b-i2c + - realtek,rtl9302c-i2c + - realtek,rtl9303-i2c + - const: realtek,rtl9301-i2c + - const: realtek,rtl9301-i2c + + reg: + description: Register offset and size this I2C controller. + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + '^i2c@[0-7]$': + $ref: /schemas/i2c/i2c-controller.yaml + unevaluatedProperties: false + + properties: + reg: + description: The SDA pin associated with the I2C bus. + maxItems: 1 + + required: + - reg + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c@36c { + compatible = "realtek,rtl9301-i2c"; + reg = <0x36c 0x14>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/realtek,rtl9301-switch.yaml b/Documentation/devicetree/bindings/mfd/realtek,rtl9301-switch.yaml new file mode 100644 index 000000000000..f053303ab1e6 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/realtek,rtl9301-switch.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/realtek,rtl9301-switch.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek Switch with Internal CPU + +maintainers: + - Chris Packham + +description: + The RTL9300 is a series of is an Ethernet switches with an integrated CPU. A + number of different peripherals are accessed through a common register block, + represented here as a syscon node. + +properties: + compatible: + items: + - enum: + - realtek,rtl9301-switch + - realtek,rtl9302b-switch + - realtek,rtl9302c-switch + - realtek,rtl9303-switch + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + +patternProperties: + 'reboot@[0-9a-f]+$': + $ref: /schemas/power/reset/syscon-reboot.yaml# + + 'i2c@[0-9a-f]+$': + $ref: /schemas/i2c/realtek,rtl9301-i2c.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + ethernet-switch@1b000000 { + compatible = "realtek,rtl9301-switch", "syscon", "simple-mfd"; + reg = <0x1b000000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + + reboot@c { + compatible = "syscon-reboot"; + reg = <0x0c 0x4>; + value = <0x01>; + }; + + i2c@36c { + compatible = "realtek,rtl9301-i2c"; + reg = <0x36c 0x14>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + gpio@20 { + compatible = "nxp,pca9555"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + gpio@20 { + compatible = "nxp,pca9555"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; + }; + }; + + i2c@388 { + compatible = "realtek,rtl9301-i2c"; + reg = <0x388 0x14>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + gpio@20 { + compatible = "nxp,pca9555"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x20>; + }; + }; + }; + }; + From patchwork Thu Oct 17 00:16:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 837004 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A61FEBA34 for ; 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Thu, 17 Oct 2024 13:16:57 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 3A00513EEA1; Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 37CF528080C; Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) From: Chris Packham To: andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lee@kernel.org, sre@kernel.org, tsbogend@alpha.franken.de, markus.stockhausen@gmx.de Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [PATCH v7 4/6] mips: dts: realtek: Add syscon-reboot node Date: Thu, 17 Oct 2024 13:16:51 +1300 Message-ID: <20241017001653.178399-5-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241017001653.178399-1-chris.packham@alliedtelesis.co.nz> References: <20241017001653.178399-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=ca1xrWDM c=1 sm=1 tr=0 ts=67105779 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=DAUX931o1VcA:10 a=wvvtYBgb9FI6sUgW-XsA:9 a=3ZKOabzyN94A:10 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat The board level reset on systems using the RTL9302 can be driven via the switch. Use a syscon-reboot node to represent this. Signed-off-by: Chris Packham --- Notes: Changes in v7: - None Changes in v6: - Drop wildcard compatible Changes in v5: - Krzysztof did technically give a r-by on v4 but given the changes to the rest of the series I haven't included it. - Use reg instead of offset - Add a rtl9302c.dtsi for the specific chip which pulls in the generic rtl930x.dtsi and updates a few of the compatibles on the way through. - Update Cameo board to use rtl9302c.dtsi Changes in v4: - None Changes in v3: - None Changes in v2: - drop redundant status = "okay" .../dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts | 2 +- arch/mips/boot/dts/realtek/rtl9302c.dtsi | 7 +++++++ arch/mips/boot/dts/realtek/rtl930x.dtsi | 13 +++++++++++++ 3 files changed, 21 insertions(+), 1 deletion(-) create mode 100644 arch/mips/boot/dts/realtek/rtl9302c.dtsi diff --git a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts index 77d2566545f2..6789bf374044 100644 --- a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts +++ b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later /dts-v1/; -#include "rtl930x.dtsi" +#include "rtl9302c.dtsi" #include #include diff --git a/arch/mips/boot/dts/realtek/rtl9302c.dtsi b/arch/mips/boot/dts/realtek/rtl9302c.dtsi new file mode 100644 index 000000000000..ca4d347af8d3 --- /dev/null +++ b/arch/mips/boot/dts/realtek/rtl9302c.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause + +#include "rtl930x.dtsi" + +&switch0 { + compatible = "realtek,rtl9302c-switch", "syscon", "simple-mfd"; +}; diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi index f271940f82be..7477fae34987 100644 --- a/arch/mips/boot/dts/realtek/rtl930x.dtsi +++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi @@ -29,6 +29,19 @@ lx_clk: clock-175mhz { #clock-cells = <0>; clock-frequency = <175000000>; }; + + switch0: switch@1b000000 { + compatible = "realtek,rtl9301-switch", "syscon", "simple-mfd"; + reg = <0x1b000000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + + reboot@c { + compatible = "syscon-reboot"; + reg = <0x0c 0x4>; + value = <0x01>; + }; + }; }; &soc { From patchwork Thu Oct 17 00:16:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 836526 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E4895282FA for ; Thu, 17 Oct 2024 00:17:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.36.163.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729124231; cv=none; b=punchB37YVtDu6P4pf/96oO5cqJrtH2LQfNyetcZXeOd4o3LQxuC9rbxbP7ktbGln/h0LQF8+UgtFYW4IiYvREQf8gL0MBNxrvipDiRencDDRLGkXW+EeGtXyutHZ6+7NUkJnM8yCxqWcPy87C8DSRuLtlki3mb+aKS/N5w11lc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729124231; c=relaxed/simple; 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Signed-off-by: Chris Packham --- Notes: Changes in v7: - None Changes in v6: - Drop wildcard compatible - Put status = "disabled" at the end Changes in v5: - Update compatibles Changes in v4: - Skipped due to combining patch series Changes in v3: - None Changes in v2: - Use reg property arch/mips/boot/dts/realtek/rtl9302c.dtsi | 8 ++++++++ arch/mips/boot/dts/realtek/rtl930x.dtsi | 16 ++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/arch/mips/boot/dts/realtek/rtl9302c.dtsi b/arch/mips/boot/dts/realtek/rtl9302c.dtsi index ca4d347af8d3..8690433af498 100644 --- a/arch/mips/boot/dts/realtek/rtl9302c.dtsi +++ b/arch/mips/boot/dts/realtek/rtl9302c.dtsi @@ -5,3 +5,11 @@ &switch0 { compatible = "realtek,rtl9302c-switch", "syscon", "simple-mfd"; }; + +&i2c0 { + compatible = "realtek,rtl9302c-i2c", "realtek,rtl9301-i2c"; +}; + +&i2c1 { + compatible = "realtek,rtl9302c-i2c", "realtek,rtl9301-i2c"; +}; diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi index 7477fae34987..6a6f3f3fe389 100644 --- a/arch/mips/boot/dts/realtek/rtl930x.dtsi +++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi @@ -41,6 +41,22 @@ reboot@c { reg = <0x0c 0x4>; value = <0x01>; }; + + i2c0: i2c@36c { + compatible = "realtek,rtl9301-i2c"; + reg = <0x36c 0x14>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@388 { + compatible = "realtek,rtl9301-i2c"; + reg = <0x388 0x14>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; }; From patchwork Thu Oct 17 00:16:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 837002 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E491D28E0F for ; Thu, 17 Oct 2024 00:17:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.36.163.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729124232; cv=none; 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Thu, 17 Oct 2024 13:16:57 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 4207413EEA2; Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 40AF52807F7; Thu, 17 Oct 2024 13:16:57 +1300 (NZDT) From: Chris Packham To: andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lee@kernel.org, sre@kernel.org, tsbogend@alpha.franken.de, markus.stockhausen@gmx.de Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [PATCH v7 6/6] i2c: Add driver for the RTL9300 I2C controller Date: Thu, 17 Oct 2024 13:16:53 +1300 Message-ID: <20241017001653.178399-7-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241017001653.178399-1-chris.packham@alliedtelesis.co.nz> References: <20241017001653.178399-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=ca1xrWDM c=1 sm=1 tr=0 ts=67105779 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=DAUX931o1VcA:10 a=jdP34snFAAAA:8 a=NEAV23lmAAAA:8 a=VwQbUJbxAAAA:8 a=UgJECxHJAAAA:8 a=aaOI7ajaZ5fHE1syFM0A:9 a=3ZKOabzyN94A:10 a=jlphF6vWLdwq7oh3TaWq:22 a=-El7cUbtino8hM1DCn8D:22 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat Add support for the I2C controller on the RTL9300 SoC. There are two I2C controllers in the RTL9300 that are part of the Ethernet switch register block. Each of these controllers owns a SCL pin (GPIO8 for the fiorst I2C controller, GPIO17 for the second). There are 8 possible SDA pins (GPIO9-16) that can be assigned to either I2C controller. This relationship is represented in the device tree with a child node for each SDA line in use. This is based on the openwrt implementation[1] but has been significantly modified [1] - https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/realtek/files-5.15/drivers/i2c/busses/i2c-rtl9300.c Signed-off-by: Chris Packham --- Notes: Changes in v7: - None Changes in v6: - Make rtl9300_i2c_quirks static - Drop wildcard compatible - Add SoC specific compatibles Changes in v5: - Make lock part of struct rtl9300_i2c - Fix alignment in rtl9300_i2c_smbus_xfer Changes in v4: - skipped due to combining patch series Changes in v3: - None Changes in v2: - Replace a number of return 0; with tail calls - Add enum rtl9300_bus_freq - Use RTL9300_ prefix on new defines - Use reg property for register offset - Hard code RTL9300_I2C_MST_GLB_CTRL address as this does not need to come from DT binding - Use GENMASK() where appropriate - Propagate read/write errors through to rtl9300_i2c_smbus_xfer() - Don't error out on bad clock-frequency - Use devm_i2c_add_adapter() - Put more information in the commit message - Integrated multiplexing function, an adapter is created per SDA line MAINTAINERS | 7 + drivers/i2c/busses/Kconfig | 10 + drivers/i2c/busses/Makefile | 1 + drivers/i2c/busses/i2c-rtl9300.c | 425 +++++++++++++++++++++++++++++++ 4 files changed, 443 insertions(+) create mode 100644 drivers/i2c/busses/i2c-rtl9300.c diff --git a/MAINTAINERS b/MAINTAINERS index f328373463b0..79c67e95a682 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19887,6 +19887,13 @@ S: Maintained T: git https://github.com/pkshih/rtw.git F: drivers/net/wireless/realtek/rtl8xxxu/ +RTL9300 I2C DRIVER (rtl9300-i2c) +M: Chris Packham +L: linux-i2c@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/i2c/realtek,rtl9301-i2c.yaml +F: drivers/i2c/busses/i2c-rtl9300.c + RTRS TRANSPORT DRIVERS M: Md. Haris Iqbal M: Jack Wang diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index a22f9125322a..927b583002c7 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -1041,6 +1041,16 @@ config I2C_RK3X This driver can also be built as a module. If so, the module will be called i2c-rk3x. +config I2C_RTL9300 + tristate "Realtek RTL9300 I2C controller" + depends on MACH_REALTEK_RTL || COMPILE_TEST + help + Say Y here to include support for the I2C controller in Realtek + RTL9300 SoCs. + + This driver can also be built as a module. If so, the module will + be called i2c-rtl9300. + config I2C_RZV2M tristate "Renesas RZ/V2M adapter" depends on ARCH_RENESAS || COMPILE_TEST diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 78d0561339e5..ac2f9f22803c 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -102,6 +102,7 @@ obj-$(CONFIG_I2C_QCOM_GENI) += i2c-qcom-geni.o obj-$(CONFIG_I2C_QUP) += i2c-qup.o obj-$(CONFIG_I2C_RIIC) += i2c-riic.o obj-$(CONFIG_I2C_RK3X) += i2c-rk3x.o +obj-$(CONFIG_I2C_RTL9300) += i2c-rtl9300.o obj-$(CONFIG_I2C_RZV2M) += i2c-rzv2m.o obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o diff --git a/drivers/i2c/busses/i2c-rtl9300.c b/drivers/i2c/busses/i2c-rtl9300.c new file mode 100644 index 000000000000..cf3f322e45bd --- /dev/null +++ b/drivers/i2c/busses/i2c-rtl9300.c @@ -0,0 +1,425 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include +#include + +enum rtl9300_bus_freq { + RTL9300_I2C_STD_FREQ, + RTL9300_I2C_FAST_FREQ, +}; + +struct rtl9300_i2c; + +struct rtl9300_i2c_chan { + struct i2c_adapter adap; + struct rtl9300_i2c *i2c; + enum rtl9300_bus_freq bus_freq; + u8 sda_pin; +}; + +#define RTL9300_I2C_MUX_NCHAN 8 + +struct rtl9300_i2c { + struct regmap *regmap; + struct device *dev; + struct rtl9300_i2c_chan chans[RTL9300_I2C_MUX_NCHAN]; + u32 reg_base; + u8 sda_pin; + struct mutex lock; +}; + +#define RTL9300_I2C_MST_CTRL1 0x0 +#define RTL9300_I2C_MST_CTRL1_MEM_ADDR_OFS 8 +#define RTL9300_I2C_MST_CTRL1_MEM_ADDR_MASK GENMASK(31, 8) +#define RTL9300_I2C_MST_CTRL1_SDA_OUT_SEL_OFS 4 +#define RTL9300_I2C_MST_CTRL1_SDA_OUT_SEL_MASK GENMASK(6, 4) +#define RTL9300_I2C_MST_CTRL1_GPIO_SCL_SEL BIT(3) +#define RTL9300_I2C_MST_CTRL1_RWOP BIT(2) +#define RTL9300_I2C_MST_CTRL1_I2C_FAIL BIT(1) +#define RTL9300_I2C_MST_CTRL1_I2C_TRIG BIT(0) +#define RTL9300_I2C_MST_CTRL2 0x4 +#define RTL9300_I2C_MST_CTRL2_RD_MODE BIT(15) +#define RTL9300_I2C_MST_CTRL2_DEV_ADDR_OFS 8 +#define RTL9300_I2C_MST_CTRL2_DEV_ADDR_MASK GENMASK(14, 8) +#define RTL9300_I2C_MST_CTRL2_DATA_WIDTH_OFS 4 +#define RTL9300_I2C_MST_CTRL2_DATA_WIDTH_MASK GENMASK(7, 4) +#define RTL9300_I2C_MST_CTRL2_MEM_ADDR_WIDTH_OFS 2 +#define RTL9300_I2C_MST_CTRL2_MEM_ADDR_WIDTH_MASK GENMASK(3, 2) +#define RTL9300_I2C_MST_CTRL2_SCL_FREQ_OFS 0 +#define RTL9300_I2C_MST_CTRL2_SCL_FREQ_MASK GENMASK(1, 0) +#define RTL9300_I2C_MST_DATA_WORD0 0x8 +#define RTL9300_I2C_MST_DATA_WORD1 0xc +#define RTL9300_I2C_MST_DATA_WORD2 0x10 +#define RTL9300_I2C_MST_DATA_WORD3 0x14 + +#define RTL9300_I2C_MST_GLB_CTRL 0x384 + +static int rtl9300_i2c_reg_addr_set(struct rtl9300_i2c *i2c, u32 reg, u16 len) +{ + u32 val, mask; + int ret; + + val = len << RTL9300_I2C_MST_CTRL2_MEM_ADDR_WIDTH_OFS; + mask = RTL9300_I2C_MST_CTRL2_MEM_ADDR_WIDTH_MASK; + + ret = regmap_update_bits(i2c->regmap, i2c->reg_base + RTL9300_I2C_MST_CTRL2, mask, val); + if (ret) + return ret; + + val = reg << RTL9300_I2C_MST_CTRL1_MEM_ADDR_OFS; + mask = RTL9300_I2C_MST_CTRL1_MEM_ADDR_MASK; + + return regmap_update_bits(i2c->regmap, i2c->reg_base + RTL9300_I2C_MST_CTRL1, mask, val); +} + +static int rtl9300_i2c_config_io(struct rtl9300_i2c *i2c, u8 sda_pin) +{ + int ret; + u32 val, mask; + + ret = regmap_update_bits(i2c->regmap, RTL9300_I2C_MST_GLB_CTRL, BIT(sda_pin), BIT(sda_pin)); + if (ret) + return ret; + + val = (sda_pin << RTL9300_I2C_MST_CTRL1_SDA_OUT_SEL_OFS) | + RTL9300_I2C_MST_CTRL1_GPIO_SCL_SEL; + mask = RTL9300_I2C_MST_CTRL1_SDA_OUT_SEL_MASK | RTL9300_I2C_MST_CTRL1_GPIO_SCL_SEL; + + return regmap_update_bits(i2c->regmap, i2c->reg_base + RTL9300_I2C_MST_CTRL1, mask, val); +} + +static int rtl9300_i2c_config_xfer(struct rtl9300_i2c *i2c, struct rtl9300_i2c_chan *chan, + u16 addr, u16 len) +{ + u32 val, mask; + + val = chan->bus_freq << RTL9300_I2C_MST_CTRL2_SCL_FREQ_OFS; + mask = RTL9300_I2C_MST_CTRL2_SCL_FREQ_MASK; + + val |= addr << RTL9300_I2C_MST_CTRL2_DEV_ADDR_OFS; + mask |= RTL9300_I2C_MST_CTRL2_DEV_ADDR_MASK; + + val |= ((len - 1) & 0xf) << RTL9300_I2C_MST_CTRL2_DATA_WIDTH_OFS; + mask |= RTL9300_I2C_MST_CTRL2_DATA_WIDTH_MASK; + + mask |= RTL9300_I2C_MST_CTRL2_RD_MODE; + + return regmap_update_bits(i2c->regmap, i2c->reg_base + RTL9300_I2C_MST_CTRL2, mask, val); +} + +static int rtl9300_i2c_read(struct rtl9300_i2c *i2c, u8 *buf, int len) +{ + u32 vals[4] = {}; + int i, ret; + + if (len > 16) + return -EIO; + + ret = regmap_bulk_read(i2c->regmap, i2c->reg_base + RTL9300_I2C_MST_DATA_WORD0, + vals, ARRAY_SIZE(vals)); + if (ret) + return ret; + + for (i = 0; i < len; i++) { + buf[i] = vals[i/4] & 0xff; + vals[i/4] >>= 8; + } + + return 0; +} + +static int rtl9300_i2c_write(struct rtl9300_i2c *i2c, u8 *buf, int len) +{ + u32 vals[4] = {}; + int i; + + if (len > 16) + return -EIO; + + for (i = 0; i < len; i++) { + if (i % 4 == 0) + vals[i/4] = 0; + vals[i/4] <<= 8; + vals[i/4] |= buf[i]; + } + + return regmap_bulk_write(i2c->regmap, i2c->reg_base + RTL9300_I2C_MST_DATA_WORD0, + vals, ARRAY_SIZE(vals)); +} + +static int rtl9300_i2c_writel(struct rtl9300_i2c *i2c, u32 data) +{ + return regmap_write(i2c->regmap, i2c->reg_base + RTL9300_I2C_MST_DATA_WORD0, data); +} + +static int rtl9300_i2c_execute_xfer(struct rtl9300_i2c *i2c, char read_write, + int size, union i2c_smbus_data *data, int len) +{ + u32 val, mask; + int ret; + + val = read_write == I2C_SMBUS_WRITE ? RTL9300_I2C_MST_CTRL1_RWOP : 0; + mask = RTL9300_I2C_MST_CTRL1_RWOP; + + val |= RTL9300_I2C_MST_CTRL1_I2C_TRIG; + mask |= RTL9300_I2C_MST_CTRL1_I2C_TRIG; + + ret = regmap_update_bits(i2c->regmap, i2c->reg_base + RTL9300_I2C_MST_CTRL1, mask, val); + if (ret) + return ret; + + ret = regmap_read_poll_timeout(i2c->regmap, i2c->reg_base + RTL9300_I2C_MST_CTRL1, + val, !(val & RTL9300_I2C_MST_CTRL1_I2C_TRIG), 100, 2000); + if (ret) + return ret; + + if (val & RTL9300_I2C_MST_CTRL1_I2C_FAIL) + return -EIO; + + if (read_write == I2C_SMBUS_READ) { + if (size == I2C_SMBUS_BYTE || size == I2C_SMBUS_BYTE_DATA) { + ret = regmap_read(i2c->regmap, + i2c->reg_base + RTL9300_I2C_MST_DATA_WORD0, &val); + if (ret) + return ret; + data->byte = val & 0xff; + } else if (size == I2C_SMBUS_WORD_DATA) { + ret = regmap_read(i2c->regmap, + i2c->reg_base + RTL9300_I2C_MST_DATA_WORD0, &val); + if (ret) + return ret; + data->word = val & 0xffff; + } else { + ret = rtl9300_i2c_read(i2c, &data->block[0], len); + if (ret) + return ret; + } + } + + return 0; +} + +static int rtl9300_i2c_smbus_xfer(struct i2c_adapter *adap, u16 addr, unsigned short flags, + char read_write, u8 command, int size, + union i2c_smbus_data *data) +{ + struct rtl9300_i2c_chan *chan = i2c_get_adapdata(adap); + struct rtl9300_i2c *i2c = chan->i2c; + int len = 0, ret; + + mutex_lock(&i2c->lock); + if (chan->sda_pin != i2c->sda_pin) { + ret = rtl9300_i2c_config_io(i2c, chan->sda_pin); + if (ret) + goto out_unlock; + i2c->sda_pin = chan->sda_pin; + } + + switch (size) { + case I2C_SMBUS_QUICK: + ret = rtl9300_i2c_config_xfer(i2c, chan, addr, 0); + if (ret) + goto out_unlock; + ret = rtl9300_i2c_reg_addr_set(i2c, 0, 0); + if (ret) + goto out_unlock; + break; + + case I2C_SMBUS_BYTE: + if (read_write == I2C_SMBUS_WRITE) { + ret = rtl9300_i2c_config_xfer(i2c, chan, addr, 0); + if (ret) + goto out_unlock; + ret = rtl9300_i2c_reg_addr_set(i2c, command, 1); + if (ret) + goto out_unlock; + } else { + ret = rtl9300_i2c_config_xfer(i2c, chan, addr, 1); + if (ret) + goto out_unlock; + ret = rtl9300_i2c_reg_addr_set(i2c, 0, 0); + if (ret) + goto out_unlock; + } + break; + + case I2C_SMBUS_BYTE_DATA: + ret = rtl9300_i2c_reg_addr_set(i2c, command, 1); + if (ret) + goto out_unlock; + ret = rtl9300_i2c_config_xfer(i2c, chan, addr, 1); + if (ret) + goto out_unlock; + if (read_write == I2C_SMBUS_WRITE) { + ret = rtl9300_i2c_writel(i2c, data->byte); + if (ret) + goto out_unlock; + } + break; + + case I2C_SMBUS_WORD_DATA: + ret = rtl9300_i2c_reg_addr_set(i2c, command, 1); + if (ret) + goto out_unlock; + ret = rtl9300_i2c_config_xfer(i2c, chan, addr, 2); + if (ret) + goto out_unlock; + if (read_write == I2C_SMBUS_WRITE) { + ret = rtl9300_i2c_writel(i2c, data->word); + if (ret) + goto out_unlock; + } + break; + + case I2C_SMBUS_BLOCK_DATA: + ret = rtl9300_i2c_reg_addr_set(i2c, command, 1); + if (ret) + goto out_unlock; + ret = rtl9300_i2c_config_xfer(i2c, chan, addr, data->block[0]); + if (ret) + goto out_unlock; + if (read_write == I2C_SMBUS_WRITE) { + ret = rtl9300_i2c_write(i2c, &data->block[1], data->block[0]); + if (ret) + goto out_unlock; + } + len = data->block[0]; + break; + + default: + dev_err(&adap->dev, "Unsupported transaction %d\n", size); + ret = -EOPNOTSUPP; + goto out_unlock; + } + + ret = rtl9300_i2c_execute_xfer(i2c, read_write, size, data, len); + +out_unlock: + mutex_unlock(&i2c->lock); + + return ret; +} + +static u32 rtl9300_i2c_func(struct i2c_adapter *a) +{ + return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_BLOCK_DATA; +} + +static const struct i2c_algorithm rtl9300_i2c_algo = { + .smbus_xfer = rtl9300_i2c_smbus_xfer, + .functionality = rtl9300_i2c_func, +}; + +static struct i2c_adapter_quirks rtl9300_i2c_quirks = { + .flags = I2C_AQ_NO_CLK_STRETCH, + .max_read_len = 16, + .max_write_len = 16, +}; + +static int rtl9300_i2c_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct rtl9300_i2c_chan *chan; + struct rtl9300_i2c *i2c; + struct i2c_adapter *adap; + u32 clock_freq, sda_pin; + int ret, i = 0; + struct fwnode_handle *child; + + i2c = devm_kzalloc(dev, sizeof(*i2c), GFP_KERNEL); + if (!i2c) + return -ENOMEM; + + i2c->regmap = syscon_node_to_regmap(dev->parent->of_node); + if (IS_ERR(i2c->regmap)) + return PTR_ERR(i2c->regmap); + i2c->dev = dev; + + mutex_init(&i2c->lock); + + ret = device_property_read_u32(dev, "reg", &i2c->reg_base); + if (ret) + return ret; + + platform_set_drvdata(pdev, i2c); + + if (device_get_child_node_count(dev) >= RTL9300_I2C_MUX_NCHAN) + return dev_err_probe(dev, -EINVAL, "Too many channels\n"); + + device_for_each_child_node(dev, child) { + chan = &i2c->chans[i]; + adap = &chan->adap; + + ret = fwnode_property_read_u32(child, "reg", &sda_pin); + if (ret) + return ret; + + ret = fwnode_property_read_u32(child, "clock-frequency", &clock_freq); + if (ret) + clock_freq = I2C_MAX_STANDARD_MODE_FREQ; + + switch (clock_freq) { + case I2C_MAX_STANDARD_MODE_FREQ: + chan->bus_freq = RTL9300_I2C_STD_FREQ; + break; + + case I2C_MAX_FAST_MODE_FREQ: + chan->bus_freq = RTL9300_I2C_FAST_FREQ; + break; + default: + dev_warn(i2c->dev, "SDA%d clock-frequency %d not supported using default\n", + sda_pin, clock_freq); + break; + } + + chan->sda_pin = sda_pin; + chan->i2c = i2c; + adap = &i2c->chans[i].adap; + adap->owner = THIS_MODULE; + adap->algo = &rtl9300_i2c_algo; + adap->quirks = &rtl9300_i2c_quirks; + adap->retries = 3; + adap->dev.parent = dev; + i2c_set_adapdata(adap, chan); + adap->dev.of_node = to_of_node(child); + snprintf(adap->name, sizeof(adap->name), "%s SDA%d\n", dev_name(dev), sda_pin); + i++; + + ret = devm_i2c_add_adapter(dev, adap); + if (ret) + return ret; + } + i2c->sda_pin = 0xff; + + return 0; +} + +static const struct of_device_id i2c_rtl9300_dt_ids[] = { + { .compatible = "realtek,rtl9301-i2c" }, + { .compatible = "realtek,rtl9302b-i2c" }, + { .compatible = "realtek,rtl9302c-i2c" }, + { .compatible = "realtek,rtl9303-i2c" }, + {} +}; +MODULE_DEVICE_TABLE(of, i2c_rtl9300_dt_ids); + +static struct platform_driver rtl9300_i2c_driver = { + .probe = rtl9300_i2c_probe, + .driver = { + .name = "i2c-rtl9300", + .of_match_table = i2c_rtl9300_dt_ids, + }, +}; + +module_platform_driver(rtl9300_i2c_driver); + +MODULE_DESCRIPTION("RTL9300 I2C controller driver"); +MODULE_LICENSE("GPL");