From patchwork Mon Oct 28 09:22:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markuss Broks X-Patchwork-Id: 839297 Received: from mail-lf1-f42.google.com (mail-lf1-f42.google.com [209.85.167.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 901F41B6D09; Mon, 28 Oct 2024 09:22:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730107378; cv=none; b=mUrCRkkv0AdMn7hci4mxNxzmzniHVGekA66uADZ/kam0KL8wLvKNQyy8W/u3pwAuBd+nLTFN4X+MsJjXA08YDt/bkc/KJPlGsIPUylrkAn/MUwqTK4WMXRod3JYSdj1WHMa2CFz11I0P19MP5ToH4koiOOmeWFoOXkyO9hvAC+k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730107378; c=relaxed/simple; bh=L3bYZfWAgZW5JNaWDhl/QF4KE7601D4KEfmVId1ELs0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=D5sICwu9vAEonyb6f0lYCWFhJssdL2Y5zTPnUf0S9oCYt2FssVG014tRsDlKbGg2Qt5mfApnw12haUkpwomVR6vuzKfAogjtqbbEcinuUxfMp7ZcZ0WZ0R+QTBL34GuxaPjIxIUACA0OQrPR7afn+7nIHyL3cypMeNZ97fTgwDs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=VukNbakX; arc=none smtp.client-ip=209.85.167.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="VukNbakX" Received: by mail-lf1-f42.google.com with SMTP id 2adb3069b0e04-539e13375d3so4516167e87.3; Mon, 28 Oct 2024 02:22:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730107375; x=1730712175; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=5RxyOtzTNaPKWcI+VUBDYXPbW1xC12WwCJqtMGjine0=; b=VukNbakXIgmSheJYC/u7SMMBdfDV+1xoW9dcQrCgFpVHz14ZtBnDY9E7t/mLCYTqyr mWKMTHlImp/h14FaTJhq10Khp5NQ4R5vzo2gV8OuEJgrJN/vpkV9bsqoHcc7lCEK7/Xn za7L1ddCX2WN5QiFFmjRSKse2Qb4GoFsDYH+CGthsmbdKfRphqwN40Bu/ndpA7Z5UWH3 sHjPfGc78hcNpcKeVTAKtPPDRwvn1Ru5mrJFFogMaGau7k/CG7ku8ek7zCFCpPEwddiO R4rE6oe5Phx0t2mV7uJuFNFRYYcJBWdwqMp3AGVKv6toisoqN+wYG4UPZEyllMKVGuKf 27qg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730107375; x=1730712175; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5RxyOtzTNaPKWcI+VUBDYXPbW1xC12WwCJqtMGjine0=; b=bu7t3v6mjnoL2Bj5QmWmu9MUdgGFkCHfJHrH7YjJ4sqBeHXW7IpNZ3a6616lRfDIxX Amx598QY+XAG/s0i6y1L6yoPgP9BWXbHmDAh1uyeCjc6J6pTmO7HQ7vaLEAZlGpf1OAV b8+y+Ov6qSQrjZbHuqQKn01S9UBCuOe++on/HJyI/aTU0ChNSrrTcDO1biLMuu1miCkn S94bJO8QccOMBqD/BjGJAgnhemIrD5zVzPOeeEK04dzQ8AvHwQZXWubZgd3t8RYoAkYj fSr2l2tNkP/fk9Znppi949htWG03yzU1fXLBkiIg0vlc7LliRY7QFLKMOThNoD+VknFJ ur0g== X-Forwarded-Encrypted: i=1; AJvYcCVfHOz1nlcJ0vuH9q+4sQmb4E8FJs/5M+M7aFITMHHNcOnF8FCChK/KH9jX0qwzVCE+lRuMU2FqYko9wHq7@vger.kernel.org, AJvYcCVvY/SHDnO8CdzBUWqFtRPWm254IkJlala66XV1py1dw7o/fslz4VpZSaMJ5q+yZQ/Ss55QqAqxXPIF@vger.kernel.org, AJvYcCVypELGMJdbNjaHCF5TsEi8OaoCYfCq1XaT9rV4J4BKDxNKUIzADgYNAewoMonzV3QTmeMc9HxCDOHtrDcKzQLonhs=@vger.kernel.org X-Gm-Message-State: AOJu0YyEUJMwXVcKjUJ0P/ieNoxTb50YHAAJsWiQbD/KRQip1+2D2n5J wRld8U09AbPQbLOF1oPv+u4lkEs2aoq45v9K7Ib7v8KfFbBCiBTF X-Google-Smtp-Source: AGHT+IFRcgf3ECiwU8IQI519Q27K78Uui6OJ25rmRPH87iV2KN7tLz/GFEpPWHJBQHxdCfMSYb6I4w== X-Received: by 2002:a05:6512:3c8f:b0:539:8fcd:524 with SMTP id 2adb3069b0e04-53b348e576amr2787084e87.30.1730107374349; Mon, 28 Oct 2024 02:22:54 -0700 (PDT) Received: from [192.168.1.105] ([178.136.36.129]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53b2e1af331sm1043785e87.152.2024.10.28.02.22.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 02:22:54 -0700 (PDT) From: Markuss Broks Date: Mon, 28 Oct 2024 11:22:30 +0200 Subject: [PATCH v4 02/10] dt-bindings: hwinfo: samsung,exynos-chipid: Add Samsung exynos9810 compatible Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241028-exynos9810-v4-2-6191f9d0c0f1@gmail.com> References: <20241028-exynos9810-v4-0-6191f9d0c0f1@gmail.com> In-Reply-To: <20241028-exynos9810-v4-0-6191f9d0c0f1@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Tomasz Figa , Will Deacon , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Ivaylo Ivanov , Markuss Broks , Maksym Holovach X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1730107370; l=1257; i=markuss.broks@gmail.com; s=20241024; h=from:subject:message-id; bh=L3bYZfWAgZW5JNaWDhl/QF4KE7601D4KEfmVId1ELs0=; b=fdmZQ/KmML9TiWtD/gFokOgPOpMn4xqVFodJLt1oAD+ah1Y6wFDp03p5Zj/xmIK58ZWzqjqU4 iERMTvlu9bGDJ4JT02BbXMbWuCLTcYaowmbeanPM0TnmD7VmQmlOqZL X-Developer-Key: i=markuss.broks@gmail.com; a=ed25519; pk=p3Bh4oPpeCrTpffJvGch5WsWNikteWHJ+4LBICPbZg0= Add the compatible for Samsung Exynos9810 chipid to schema. Exynos9810 is a flagship mobile SoC released in 2018 and used in various Samsung devices, including Samsung Galaxy S9 (SM-G960F), S9 Plus (SM-G965F), and Note 9 (SM-N960F). Co-developed-by: Maksym Holovach Signed-off-by: Maksym Holovach Signed-off-by: Markuss Broks --- Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml index 47a8d98346ebb83a7ea4d11e2fc7fc87df6bc5ad..385aac7161a0db9334a92d78a57a125f23ca1920 100644 --- a/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml +++ b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml @@ -24,6 +24,7 @@ properties: - enum: - samsung,exynos7885-chipid - samsung,exynos8895-chipid + - samsung,exynos9810-chipid - samsung,exynos990-chipid - samsung,exynosautov9-chipid - samsung,exynosautov920-chipid From patchwork Mon Oct 28 09:22:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markuss Broks X-Patchwork-Id: 839296 Received: from mail-lf1-f53.google.com (mail-lf1-f53.google.com [209.85.167.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 067331D2709; Mon, 28 Oct 2024 09:22:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730107381; cv=none; b=k+Hg0wRJTNKH8YjPaWlKAelIeSqNhWpMbvqVl/bEyCzuLOr7Kl1SVxgl19QP4MJtfZ3sqo+DKVKSKXauEHvQwGvS9d3PN0RFaMi/D1xrRIyyaEO8RlzvvaHkKKIEdCIKJ+9fY1d/NfsnurgabrBaLnF/Fb9q19hYiq+7L+KY8jU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730107381; c=relaxed/simple; bh=nX/aujPmPzzwxGs4OFiOnvYO/MsiQA4p8l4iwrKD/GI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=u9NrXGpS7iog8kPRGt8qswDbz90ILS+bjOKzzZXnMTLycJSA10VfB8RJ8GXOhl4kxPG/wa3GAsCCgcvX7/qlAc1JuMDIJtYKr4yFtgp+ijNaDxsAO30x7cYFDc6ite4n/KWQw/pP88h5XL6VHTGzdilO0DureZO/DFKrcMnoRzg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=BWpNNADa; arc=none smtp.client-ip=209.85.167.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="BWpNNADa" Received: by mail-lf1-f53.google.com with SMTP id 2adb3069b0e04-539f72c8fc1so4825738e87.1; Mon, 28 Oct 2024 02:22:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730107377; x=1730712177; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=pfbT6MDiefFz3BliYWZ+loVFrZSj8n+9s/0V0etkG70=; b=BWpNNADaj008pU++DjBRKrUX8W05NyB/DdGpgldHOTcCqh+mKy1LHvRpc2wHJb1AiN Ldwokpd5phuhBqyItttRc3CZWEXwfyMEdDkaIlfaWZjrB1UukX8QKzB5H3/UPsbp3zbz kGbWz9WKYnW2a1JzO9mjVjvxqMexarXzmnnYWzY014j4E26gJCRTN9suAG6dqogdn/Ub zgGYtnrATkNTNBzyQeRLRyP/9g77nDAbOG+1tLXpqftxcMHihQxgVsT30MrcKYCPbVFN 3mVY0tzALELe1f7ECkatXFXLQgE/OL5cLiBMN5bnhYNnbZbJbT5HIqV2WdOkcc0Wtyji 0alA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730107377; x=1730712177; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pfbT6MDiefFz3BliYWZ+loVFrZSj8n+9s/0V0etkG70=; b=gle7GmATAei9JfKtpjV3/x+4+ktk9Rv0bRM17TvhUWiNX+beFrdplgIWxqv9LzVjZd CNHSJ4B6W98Hf+chZi33jMi4zOlKWBeD0YPYqjG4mZtDFmSH5X/2Ts+n31XkaCzj1g1f Tc2lPDaHuEX69KF3RRGQC1v6/sjtBfqw9XsvmjXz7Ouv1xJlcxhVfoCR/KUgU+bPX0NZ cX1mnBshHFPMSEvIqaA91imBqD+iiv/5yPBg1bQAmBWMW9TNZaM7a7A8eQ2QWboq8o1L hDYvohx947EknxSQyUvN5lk9O4AqDT807zzvxcdhf7Nk0nNqJtYaei5dIJW14ehBqbVP HApg== X-Forwarded-Encrypted: i=1; AJvYcCUA1MEXzKObCV7lGHdU4VBgtKXDkfZKRmv/+ZjH3gdtSC0kBFORcrQ01AwIBs52eztRStbMuNcFrrunqAJx@vger.kernel.org, AJvYcCVO083b3vF3o3RRrLyASNg/OLow1L5aqewmsB1RwYF8VsPlR0fRrvDaS7c0d1aqaMy06kW7OewaYP8+Y271536AhSE=@vger.kernel.org, AJvYcCXEYl4xNLtvI+hco8c8ltxmluvugx4nbwcpu9no2SCfbboxcFTbuylaoWZzntNGBp5V4hSFI5mbzKj3@vger.kernel.org X-Gm-Message-State: AOJu0YxB9+3myOSM/P6pCXUo1GL9YHCdySJ/Ycx4e0xB9qvoeYNrW0LP 6EuUB+RvOl7PlQ7nZHxxQDdHQdrJe0HeAOnxnXVgEFN0waXB7uvDUmerPw== X-Google-Smtp-Source: AGHT+IH0r7NhuE4e3aS5DFYvV11dcgTWYihLpCXJFndQTB+bM4ir6kkVsAOB7fNFSclJ4Bc1GcbMCw== X-Received: by 2002:a05:6512:138b:b0:539:eb82:d453 with SMTP id 2adb3069b0e04-53b3491cb31mr2950188e87.39.1730107377080; Mon, 28 Oct 2024 02:22:57 -0700 (PDT) Received: from [192.168.1.105] ([178.136.36.129]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53b2e1af331sm1043785e87.152.2024.10.28.02.22.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 02:22:56 -0700 (PDT) From: Markuss Broks Date: Mon, 28 Oct 2024 11:22:32 +0200 Subject: [PATCH v4 04/10] dt-bindings: pinctrl: samsung: Add compatible for exynos9810-wakeup-eint Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241028-exynos9810-v4-4-6191f9d0c0f1@gmail.com> References: <20241028-exynos9810-v4-0-6191f9d0c0f1@gmail.com> In-Reply-To: <20241028-exynos9810-v4-0-6191f9d0c0f1@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Tomasz Figa , Will Deacon , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Ivaylo Ivanov , Markuss Broks , Maksym Holovach X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1730107370; l=1230; i=markuss.broks@gmail.com; s=20241024; h=from:subject:message-id; bh=nX/aujPmPzzwxGs4OFiOnvYO/MsiQA4p8l4iwrKD/GI=; b=Sq9kFPvTP9YcHAGpXXU9jGFS9IuV7ycqPn3PuCUuF91KwF8lJYHbzjJsZ1CKRsmse5ZyVGwcI 3/73NGYtnQfDIa63R+wT1vGaT4m2M01R0YDaurWfxn2T24Pxj7cdD2j X-Developer-Key: i=markuss.broks@gmail.com; a=ed25519; pk=p3Bh4oPpeCrTpffJvGch5WsWNikteWHJ+4LBICPbZg0= Add the compatible for Samsung Exynos9810 pinctrl eint block to the schema. It is compatible with Exynos850 EINT controller, and doesn't have a dedicated IRQ line. Co-developed-by: Maksym Holovach Signed-off-by: Maksym Holovach Signed-off-by: Markuss Broks --- .../devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml index 565cacadb6be77b1be1a7423f88564dd950c44db..68ed714eb0a178c46228bac142d69bbd6baa6277 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml +++ b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml @@ -47,6 +47,7 @@ properties: - items: - enum: - google,gs101-wakeup-eint + - samsung,exynos9810-wakeup-eint - samsung,exynos990-wakeup-eint - samsung,exynosautov9-wakeup-eint - const: samsung,exynos850-wakeup-eint From patchwork Mon Oct 28 09:22:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markuss Broks X-Patchwork-Id: 839295 Received: from mail-lf1-f42.google.com (mail-lf1-f42.google.com [209.85.167.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DC881D5AB4; Mon, 28 Oct 2024 09:23:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730107384; cv=none; b=uMmVebsoyMiCNGmTIAE4OSqje8Q3Qe3Al3rAj15BUZK/e6TDhsj7MvwqcEuj4ZT4SLTh6a3Jg9U8PseFVJHxo+o9KZ/b/anGYuCfI7PeTz7PzySeK73/kAmqM0XrEMuqaq7MqCDjGNnOYnV+UvgMY+8ej0wPMeTTZOZ3dq0gyow= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730107384; c=relaxed/simple; bh=BYkuQEvmBOjDeOJiyY2S6irVYNGpBs7FyenLcNADI/8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DmBrjLx10fKsmdkV1XrUHRzXLzYAZsYxOEeGMJATSpHmPgrWMyUod3Q8hphpXEdmeEGBZOiEbkXRrXV2N353nrYnYV7RKA7dKCEcR0Mv6HR/ipMCZZgB4h8ghvZrBErrkDoB+3nX2YUNBQqMCZMkeKnIZGBbJ/3KaimQRlYRi7Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=WUX5CN6E; arc=none smtp.client-ip=209.85.167.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="WUX5CN6E" Received: by mail-lf1-f42.google.com with SMTP id 2adb3069b0e04-539f72c913aso5080401e87.1; Mon, 28 Oct 2024 02:23:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730107378; x=1730712178; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=yt0YV3G/Lz+aotZMK2Qv9/6LIC8i2CceAvIskO4P2nY=; b=WUX5CN6EGbCfacOPv7NyHIWn59YIS3P8GlJ+NGENp4zj8hu2wrVYhw55y9T72COk8G 0hRUW40esJXFBWAHW6Ol2QZyISuSVpInK/IQPLKHADZ8IhDp5hRw8dBSVws4FtemVxfT qJNLqK2XDndFFrjqteLEkpL//yQhHDxDaKzzxv8hclZIcPAgd4WTN3UxkfIIk8nOn76e UtZWkPYRXn86n/7jv52QxJF/lQUA9VXAAWvoO21BL75k3iXqqm1F/fJ9a4YhluHIfdgQ QM9tAu79LIZBTalt4pvLOrSXdP+rihrf6UgH5xqMiOwTLRodGUxzKg518CWoS2vfvCyt jE2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730107378; x=1730712178; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yt0YV3G/Lz+aotZMK2Qv9/6LIC8i2CceAvIskO4P2nY=; b=wYf76H9whEoFx1K/OmCDCI2h8Cg5KxKEU1Q0TEaPJNEKPPtvnWFQREcBWKbIMn0v6T 9KgEcBtN4sacmu1vHaBu1JjdEwVsazxkVi3UbdUDtPfOW68vN8NTgewIV9gSqSZtwhx+ IcXGh5Rno8ZDKCWShcIdZok6x4HAxGURiSFqETcdx+JBsCGo3CIj9qVAVlIT11gU1VBZ 5jQ19fFn1rlhop9AThv5aUwR8VAjsZwrFIS/PxepauQknTwiV18qvzpA1Pg4Q99fZ4n1 JX/tyVps3WTiDJagXYwForMpCnrdwHfjkpMtOt5BVdoK5SGOL/tSrSBu3+ANh0YLafyV jxRw== X-Forwarded-Encrypted: i=1; AJvYcCV3Z58BRtgEDAHQPNhoVkPCxJ9bRk/n6svyc1ql4fZL/NBkCGYkXKYvXnB1CCWEWhvWW7K+NJiORY2H@vger.kernel.org, AJvYcCV56rC/T9RoRMVtvmJfYukUExcmAaX/PYv//R699pO5AsI8tXx9o5iHAuzGLNVTjFcbDj9iz9p4TZfNlNXC@vger.kernel.org, AJvYcCX5BoXGK/bq7KQCxewg20oNrOW/pkCv2IRoaa2vj7/5WqRTW+TkuPJxAG4RlRrmbZ8c0m53fqb4VLFexb/+QQYT3gA=@vger.kernel.org X-Gm-Message-State: AOJu0Yx/pATFCGdAOjOTcFCdkrmEEOe/dNvqi+arbjOy6H17MFmqRI91 53etp7nP3Wb6b85wWHscEh8+WY2M4tka1t0eBMKohC4e79UDj+EAQ42mkw== X-Google-Smtp-Source: AGHT+IGkef3HGo+qiSbkHHbqdccXE80ho2uJc7KuN9SzEldCCfuT107SCvwkHYC8p+RFSJWq/VtkVQ== X-Received: by 2002:a05:6512:3e1f:b0:539:eb82:d45b with SMTP id 2adb3069b0e04-53b34c41d5amr2098232e87.56.1730107378267; Mon, 28 Oct 2024 02:22:58 -0700 (PDT) Received: from [192.168.1.105] ([178.136.36.129]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53b2e1af331sm1043785e87.152.2024.10.28.02.22.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 02:22:58 -0700 (PDT) From: Markuss Broks Date: Mon, 28 Oct 2024 11:22:33 +0200 Subject: [PATCH v4 05/10] dt-bindings: soc: samsung: exynos-pmu: Add exynos9810 compatible Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241028-exynos9810-v4-5-6191f9d0c0f1@gmail.com> References: <20241028-exynos9810-v4-0-6191f9d0c0f1@gmail.com> In-Reply-To: <20241028-exynos9810-v4-0-6191f9d0c0f1@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Tomasz Figa , Will Deacon , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Ivaylo Ivanov , Markuss Broks , Maksym Holovach X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1730107370; l=1139; i=markuss.broks@gmail.com; s=20241024; h=from:subject:message-id; bh=BYkuQEvmBOjDeOJiyY2S6irVYNGpBs7FyenLcNADI/8=; b=BzqBkS/JjTAQgeZrbGmsIeoWOvNem3Z6/fZqBLEP25na3UUEyLPEvnDKuUEqkKr1n+Bvifgb8 uet3RjHNxHTAFND4h/HaUpKSd0Dot7FUZ9cXaHzD2PFQcTUTcvlBb77 X-Developer-Key: i=markuss.broks@gmail.com; a=ed25519; pk=p3Bh4oPpeCrTpffJvGch5WsWNikteWHJ+4LBICPbZg0= Add compatible for Samsung Exynos9810 PMU to the schema. Like on other devices, it contains various registers related to power management and other vital to SoC functions. Co-developed-by: Maksym Holovach Signed-off-by: Maksym Holovach Signed-off-by: Markuss Broks --- Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml index 5c4ba6c65e6926467ff0e90142ad62fbd0b9e1e8..6cdfe7e059a3556dfb872818f1b2649ab6b0e8af 100644 --- a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml @@ -54,6 +54,7 @@ properties: - enum: - samsung,exynos7885-pmu - samsung,exynos8895-pmu + - samsung,exynos9810-pmu - samsung,exynosautov9-pmu - samsung,exynosautov920-pmu - tesla,fsd-pmu From patchwork Mon Oct 28 09:22:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markuss Broks X-Patchwork-Id: 839294 Received: from mail-lf1-f48.google.com (mail-lf1-f48.google.com [209.85.167.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B95C91D7999; Mon, 28 Oct 2024 09:23:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730107387; cv=none; b=tBR8jcTet4MJPvKdYxA148wyinHXrKCI3dfo40IuN0psYN4YVkPAGEr2lJ/eJu0kxxWD7VLs3QvlW1bOZ6r669djvLEGlm4gYIlhV62hFdCc0mzpIv1BBB9KYtamf/02kHQmkw6UJSjk/H9WSKG+qoJupemL+HLyRIEzrvbjOlo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730107387; c=relaxed/simple; bh=/Wc4BlemWmeccz/B4/h7WpFQZV+ll/cqwv5qNCPJALQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kxPb5DwPbR8/szJ30a1BKgIMn9EGCr1ocRK+EAWM6BLkH0AmHoOs28A7lkYO6XtTX1k9rBABzm4G0kQj/ZXktSxlGs+e6WpLG0dQ4nFnLdILj0zJR2+BWVU/Y8U0wOsDXNSytJgf4Nq0Aps8EN3o4ymqXgqiJJRvvCBLWPEIDJQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=hukbUJOe; arc=none smtp.client-ip=209.85.167.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hukbUJOe" Received: by mail-lf1-f48.google.com with SMTP id 2adb3069b0e04-53a0c160b94so4431383e87.2; Mon, 28 Oct 2024 02:23:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730107383; x=1730712183; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=lULs5ECe2v/eFZFaOgsynlSrffO8W5NVPtm3h9ZcjLk=; b=hukbUJOe77TZ5MLvceAAY7VBJ6dCR8rC0QDVzyosE8mcRDR1LNGWbhzLqk2NU3iyHU wnqVsc7APT+6s2ZgfJQYCIcM5BVWwey7XeKhe3mGPnS/siCkW0RUEuWUh711ccShk7HR spDjlmNNimGubhxcPe+dX7uRQFXHsFzXCoRN9eMGyOvjSvPACtzr2GJWKCXMbCm2sE/Z VaFyFrjJl1rByXj3IMCR5J0OkdpxiV5461Ctb8i7b5sLyhhkD6vo1KG8D0wJAO9KZcx6 dEjpchemykHDuRJLwGZ2F51m1QG6MXLYMrGqwzeqsty35jaxEUFT+4QD0rk1agNUX4ff EtbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730107383; x=1730712183; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lULs5ECe2v/eFZFaOgsynlSrffO8W5NVPtm3h9ZcjLk=; b=pMbaM5UgkSTLyF4t87HTApIF/tYY/ZF2UjUH4+2o2BmbI5xG9pFVam8Gsy8DYcirj5 B6nPjUsgtndD4HRZFoKTVTnMhQTne8L6j9YWO+YRA09x+/uHtwL8kRaiYFRJGSBGTSeZ XSrvr5F0lkx3UBw73oRr5zqxxDMsdIrGTfweSTyn0bNIROlSt/LUyYu399LkgMaOJ9Sk Ufv/B+sx4ki1CX/rbNhFnXlgHEhm3zYzGZ9icmPxnAQjmSRvzsnZ6e1iwc0RoQkFdfMb bXnglPPFM0MfrQ/W8i9FM6y/dt9diAdP89kUYcMDWsgXGH+xIt2BIDmKvN8Km7Fw+zKr V00g== X-Forwarded-Encrypted: i=1; AJvYcCUzEknNlNwu1c8tQJiHqaO1dLTDeTyhBOzaqiBVqo7N2+Cu4YqdQ5s75xjjCUW40bb6MQFPHnEpHuoxl1KP39Tj4wk=@vger.kernel.org, AJvYcCXa4DsqOWtXo1Un9O6qXAss6HEP5osGUTqmsFYD35UQ1wb6CfjgXc0GylAwHfI2fFej8zew23+NWD5G0KN1@vger.kernel.org, AJvYcCXslE1T0u+wIbin2sTQJw2pvsI/cmHigoekdzoi2VOzdMyNNaMI17NiviQdUnFb7y8Z+WAFr9U973kp@vger.kernel.org X-Gm-Message-State: AOJu0Yy0Pw//NgEpLD6f1XCtZZc2PYk3ZtLVc37Eys5u+F+ohNmffWgM YCIMDAB9ngDAT+Fyl8gnYZIvi0RydMygYcdeFMlFK77hQZl1JBVRPfvYBQ== X-Google-Smtp-Source: AGHT+IEqtnjZtXnnjinm/JZUfiqvF+qabb/BGc98HrsLidXhMPAXZuzXSfOZUI+CMpO8R1g9w5lKaA== X-Received: by 2002:a05:6512:39c7:b0:52e:9e70:d068 with SMTP id 2adb3069b0e04-53b348c0c88mr3478898e87.4.1730107382508; Mon, 28 Oct 2024 02:23:02 -0700 (PDT) Received: from [192.168.1.105] ([178.136.36.129]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53b2e1af331sm1043785e87.152.2024.10.28.02.23.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 02:23:02 -0700 (PDT) From: Markuss Broks Date: Mon, 28 Oct 2024 11:22:36 +0200 Subject: [PATCH v4 08/10] pinctrl: samsung: Add Exynos9810 SoC specific data Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241028-exynos9810-v4-8-6191f9d0c0f1@gmail.com> References: <20241028-exynos9810-v4-0-6191f9d0c0f1@gmail.com> In-Reply-To: <20241028-exynos9810-v4-0-6191f9d0c0f1@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Tomasz Figa , Will Deacon , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Ivaylo Ivanov , Markuss Broks , Maksym Holovach X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1730107370; l=9499; i=markuss.broks@gmail.com; s=20241024; h=from:subject:message-id; bh=/Wc4BlemWmeccz/B4/h7WpFQZV+ll/cqwv5qNCPJALQ=; b=GL5LQZfPY6F0E/mYr3jZGqc9ErIKnedJlvZDed/l/DFoqBUooFxFTmIU4R19ItdaHDxCqcnyD ++eyQUs+dqlAdojXwfdhAipcv2Ldqw/DEhz4y0NS24QSoB5OH3KR7n2 X-Developer-Key: i=markuss.broks@gmail.com; a=ed25519; pk=p3Bh4oPpeCrTpffJvGch5WsWNikteWHJ+4LBICPbZg0= Add Samsung Exynos9810 SoC specific data to enable pinctrl support for platforms based on Exynos9810. Co-developed-by: Maksym Holovach Signed-off-by: Maksym Holovach Signed-off-by: Markuss Broks --- drivers/pinctrl/samsung/pinctrl-exynos-arm64.c | 154 +++++++++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-samsung.c | 2 + drivers/pinctrl/samsung/pinctrl-samsung.h | 1 + 3 files changed, 157 insertions(+) diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c index f07c26d374425505019447161150929f7677f91d..c833cb8fb4854e69c92213ef1f53d7b524e56306 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c @@ -767,6 +767,160 @@ const struct samsung_pinctrl_of_match_data exynos990_of_data __initconst = { .num_ctrl = ARRAY_SIZE(exynos990_pin_ctrl), }; +/* pin banks of exynos9810 pin-controller 0 (ALIVE) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks0[] __initconst = { + EXYNOS850_PIN_BANK_EINTN(6, 0x000, "etc1"), + EXYNOS850_PIN_BANK_EINTW(8, 0x020, "gpa0", 0x00), + EXYNOS850_PIN_BANK_EINTW(8, 0x040, "gpa1", 0x04), + EXYNOS850_PIN_BANK_EINTW(8, 0x060, "gpa2", 0x08), + EXYNOS850_PIN_BANK_EINTW(8, 0x080, "gpa3", 0x0c), + EXYNOS850_PIN_BANK_EINTN(6, 0x0a0, "gpq0"), + EXYNOS850_PIN_BANK_EINTW(2, 0x0c0, "gpa4", 0x10), +}; + +/* pin banks of exynos9810 pin-controller 1 (AUD) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks1[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpb1", 0x04), + EXYNOS850_PIN_BANK_EINTG(4, 0x040, "gpb2", 0x08), +}; + +/* pin banks of exynos9810 pin-controller 2 (CHUB) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks2[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gph0", 0x00), + EXYNOS850_PIN_BANK_EINTG(5, 0x020, "gph1", 0x04), +}; + +/* pin banks of exynos9810 pin-controller 3 (CMGP) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks3[] __initconst = { + EXYNOS850_PIN_BANK_EINTW(1, 0x000, "gpm0", 0x00), + EXYNOS850_PIN_BANK_EINTW(1, 0x020, "gpm1", 0x04), + EXYNOS850_PIN_BANK_EINTW(1, 0x040, "gpm2", 0x08), + EXYNOS850_PIN_BANK_EINTW(1, 0x060, "gpm3", 0x0c), + EXYNOS850_PIN_BANK_EINTW(1, 0x080, "gpm4", 0x10), + EXYNOS850_PIN_BANK_EINTW(1, 0x0a0, "gpm5", 0x14), + EXYNOS850_PIN_BANK_EINTW(1, 0x0c0, "gpm6", 0x18), + EXYNOS850_PIN_BANK_EINTW(1, 0x0e0, "gpm7", 0x1c), + EXYNOS850_PIN_BANK_EINTW(1, 0x100, "gpm10", 0x20), + EXYNOS850_PIN_BANK_EINTW(1, 0x120, "gpm11", 0x24), + EXYNOS850_PIN_BANK_EINTW(1, 0x140, "gpm12", 0x28), + EXYNOS850_PIN_BANK_EINTW(1, 0x160, "gpm13", 0x2c), + EXYNOS850_PIN_BANK_EINTW(1, 0x180, "gpm14", 0x30), + EXYNOS850_PIN_BANK_EINTW(1, 0x1a0, "gpm15", 0x34), + EXYNOS850_PIN_BANK_EINTW(1, 0x1c0, "gpm16", 0x38), + EXYNOS850_PIN_BANK_EINTW(1, 0x1e0, "gpm17", 0x3c), + EXYNOS850_PIN_BANK_EINTW(1, 0x200, "gpm40", 0x40), + EXYNOS850_PIN_BANK_EINTW(1, 0x220, "gpm41", 0x44), + EXYNOS850_PIN_BANK_EINTW(1, 0x240, "gpm42", 0x48), + EXYNOS850_PIN_BANK_EINTW(1, 0x260, "gpm43", 0x4c), +}; + +/* pin banks of exynos9810 pin-controller 4 (FSYS0) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks4[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(2, 0x000, "gpf0", 0x00), +}; + +/* pin banks of exynos9810 pin-controller 5 (FSYS1) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks5[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(7, 0x000, "gpf1", 0x00), + EXYNOS850_PIN_BANK_EINTG(6, 0x020, "gpf2", 0x04), +}; + +/* pin banks of exynos9810 pin-controller 6 (PERIC0) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks6[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp0", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp1", 0x04), + EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpp2", 0x08), + EXYNOS850_PIN_BANK_EINTG(4, 0x060, "gpp3", 0x0c), + EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpg0", 0x10), + EXYNOS850_PIN_BANK_EINTG(8, 0x0a0, "gpg1", 0x14), + EXYNOS850_PIN_BANK_EINTG(8, 0x0c0, "gpg2", 0x18), +}; + +/* pin banks of exynos9810 pin-controller 7 (PERIC1) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks7[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp4", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp5", 0x04), + EXYNOS850_PIN_BANK_EINTG(4, 0x040, "gpp6", 0x08), + EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpc0", 0x0c), + EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpc1", 0x10), + EXYNOS850_PIN_BANK_EINTG(4, 0x0a0, "gpd0", 0x14), + EXYNOS850_PIN_BANK_EINTG(7, 0x0c0, "gpg3", 0x18), +}; + +/* pin banks of exynos9810 pin-controller 8 (VTS) */ +static const struct samsung_pin_bank_data exynos9810_pin_banks8[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(3, 0x000, "gpt0", 0x00), +}; + +static const struct samsung_pin_ctrl exynos9810_pin_ctrl[] __initconst = { + { + /* pin-controller instance 0 ALIVE data */ + .pin_banks = exynos9810_pin_banks0, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks0), + .eint_wkup_init = exynos_eint_wkup_init, + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 1 AUD data */ + .pin_banks = exynos9810_pin_banks1, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks1), + }, { + /* pin-controller instance 2 CHUB data */ + .pin_banks = exynos9810_pin_banks2, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks2), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 3 CMGP data */ + .pin_banks = exynos9810_pin_banks3, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks3), + .eint_wkup_init = exynos_eint_wkup_init, + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 4 FSYS0 data */ + .pin_banks = exynos9810_pin_banks4, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks4), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 5 FSYS1 data */ + .pin_banks = exynos9810_pin_banks5, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks5), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 6 PERIC0 data */ + .pin_banks = exynos9810_pin_banks6, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks6), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 7 PERIC1 data */ + .pin_banks = exynos9810_pin_banks7, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks7), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 8 VTS data */ + .pin_banks = exynos9810_pin_banks8, + .nr_banks = ARRAY_SIZE(exynos9810_pin_banks8), + }, +}; + +const struct samsung_pinctrl_of_match_data exynos9810_of_data __initconst = { + .ctrl = exynos9810_pin_ctrl, + .num_ctrl = ARRAY_SIZE(exynos9810_pin_ctrl), +}; + /* pin banks of exynosautov9 pin-controller 0 (ALIVE) */ static const struct samsung_pin_bank_data exynosautov9_pin_banks0[] __initconst = { EXYNOS850_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00), diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index 42e40860841bcc94e3c11bf313df792da10ab00b..bbedd980ec67234aad847b757f40af5002b11ebb 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1479,6 +1479,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { .data = &exynos850_of_data }, { .compatible = "samsung,exynos8895-pinctrl", .data = &exynos8895_of_data }, + { .compatible = "samsung,exynos9810-pinctrl", + .data = &exynos9810_of_data }, { .compatible = "samsung,exynos990-pinctrl", .data = &exynos990_of_data }, { .compatible = "samsung,exynosautov9-pinctrl", diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h index 615048f945243d4173d40142f1e62c8aeefe5b7e..bb0689d52ea0b4392714fa9bcdcbae8d253c73a1 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -385,6 +385,7 @@ extern const struct samsung_pinctrl_of_match_data exynos7_of_data; extern const struct samsung_pinctrl_of_match_data exynos7885_of_data; extern const struct samsung_pinctrl_of_match_data exynos850_of_data; extern const struct samsung_pinctrl_of_match_data exynos8895_of_data; +extern const struct samsung_pinctrl_of_match_data exynos9810_of_data; extern const struct samsung_pinctrl_of_match_data exynos990_of_data; extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data; extern const struct samsung_pinctrl_of_match_data exynosautov920_of_data; From patchwork Mon Oct 28 09:22:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markuss Broks X-Patchwork-Id: 839293 Received: from mail-lf1-f46.google.com (mail-lf1-f46.google.com [209.85.167.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 875FE1D88BF; Mon, 28 Oct 2024 09:23:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730107390; cv=none; b=GSmd4yqc2iuIkDFB4lH3GcHULd3SN+RwTZBUt+ZxrgdXFDfWXtzWPLj0zaGvnokKWnfofeVFKNLv86GhN7WTNb1NzUm5kOZw/QNG8oOEI+uZyrsGgTV5VOe200s2lZ3ohRTDUTl5Gucwn8DpfMZY7wCKq/DHWAs3g5+KKWr4TkU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730107390; c=relaxed/simple; bh=aNgDMHp8chOHRipjYna59OZmYcyh6ZnmD2z7vDTAOHo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sN6lbjqMYCezILau6Y+CBlF6FALCfOXgg4zxQ4Hv4RHuWsr+3CTlfM29cA2eI6eDnE3baRBMoVlumH2LRNe8Bzz5cq8nTywgC0NplDVDuI5ftFPb9SKAdgapdBgt2wklxBKFGhJTULIAMgYK8uUznSKMBEiS1g4amS8ViQiqILE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=TYZ+tB88; arc=none smtp.client-ip=209.85.167.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="TYZ+tB88" Received: by mail-lf1-f46.google.com with SMTP id 2adb3069b0e04-539eb97f26aso3952237e87.2; Mon, 28 Oct 2024 02:23:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730107384; x=1730712184; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=D8ryoCnQa3x+2wA7PkI8xn3q6VJAS1LIktjHe3r9L6c=; b=TYZ+tB88q9m7ySewNc8PG3UTT0Ln7nX3Qnz5M/7x/hM1qgKj9cnzJtgP8oIfQ8AzyK 5A4IKolyaZe16olceLh/uYVayx7lRsk5CL0doEEQ4O4IaGeBmMh+BgMPxtY7zKyqvuq+ Baf/2U2XqtUlpvYTH3OCFCVLCW6tDwOZ+/veWN2t2CsBM9COLaA+DTAFLKLhLxJ9Y1tv sOW+HtgRoFxlNmEJCCq8VVoIRNErx4KySUQS36K0nJGwiXSbz3h1EWYa2LidfLAhWGbN Xaoe/msLlh/l+6pKcivy06PDc9Ok/pLu+L1X6vtF5xAX0+JU5w01jg/k6OCFqIKD75VC HYIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730107384; x=1730712184; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=D8ryoCnQa3x+2wA7PkI8xn3q6VJAS1LIktjHe3r9L6c=; b=eBcNZRFaaSmeSvnlfCH49VCqo8lMZZ3mxJxmz5UcgAmTDbrITgcrjYa08KfzNGoww5 iGuATpwtKesclmEgYEtx4av3jTntXr8ZTuag2UKzl9qOKOiOgbNZ0KemJkkAb/mQwNeL WKpxfWjgioF1/dCuDnY5fcoQVlKHmYtzkcnD80PFnB0bdEYaBvyz8sGImR/cxNhtKpWl qMGqzK3alVqw22tlyJ29ULkoaX7NHr6iO8J+YtuGQOfihB/zK2zKiyvf0WO9loV7MeSa 1TJjrjfHHO3mENu9nfBHzA0jf3zuKqNy9UG/ISXTKsLzW+QELOC4aILnPbPEYYaQuZIF 2Tkw== X-Forwarded-Encrypted: i=1; AJvYcCVYvGlFOytb8+3oUUVlRLWJsNulieW4aL/LY5qU8rvLsMGCFGp+albNbPR+ZG3pvsVc6IlSfrdFuEK30QnOk/L0r+Y=@vger.kernel.org, AJvYcCVn9DdCDEUPBzClPdvqscYMo2LbdY2rCQBKXqb3sgB4Zy09oSwYOwdPSwH2vfXASZfGBnxB1Y3LogyS@vger.kernel.org, AJvYcCVwRT1r0ojdCUlkwYKet4qSZelDjs4UfcXZiqrAbgHlkndqhbeUN8kRVY07tjzwYkUw4u6OcgsD04jOBC+5@vger.kernel.org X-Gm-Message-State: AOJu0Yyh3oa8knsM0KlY18Ufjq63FmYXd85sQ6ec2LYokr04LSjQuWMQ d1HpaokuManFkDZH5XzCDkmcWLg/jy9fK65GUiXLxtJkpn1VOCX8 X-Google-Smtp-Source: AGHT+IEDL6ZRgkHlAbKQp2w1HR+u3P0Wn+uHEwS9aCrRaA5rJjnDkoBj6cDsDek5X9EDU1vcSzg16Q== X-Received: by 2002:a05:6512:10d6:b0:539:f7de:df6a with SMTP id 2adb3069b0e04-53b34a3208dmr2945860e87.52.1730107384246; Mon, 28 Oct 2024 02:23:04 -0700 (PDT) Received: from [192.168.1.105] ([178.136.36.129]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-53b2e1af331sm1043785e87.152.2024.10.28.02.23.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 02:23:03 -0700 (PDT) From: Markuss Broks Date: Mon, 28 Oct 2024 11:22:37 +0200 Subject: [PATCH v4 09/10] arm64: dts: exynos: Add Exynos9810 SoC support Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241028-exynos9810-v4-9-6191f9d0c0f1@gmail.com> References: <20241028-exynos9810-v4-0-6191f9d0c0f1@gmail.com> In-Reply-To: <20241028-exynos9810-v4-0-6191f9d0c0f1@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Alim Akhtar , Sylwester Nawrocki , Linus Walleij , Tomasz Figa , Will Deacon , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Ivaylo Ivanov , Markuss Broks , Maksym Holovach X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1730107370; l=18139; i=markuss.broks@gmail.com; s=20241024; h=from:subject:message-id; bh=aNgDMHp8chOHRipjYna59OZmYcyh6ZnmD2z7vDTAOHo=; b=8quh1HDEe6zsSsoIJx9P7yflgO8XtRhS8dchukWqUX3v1bRif0NHQc0cc19BeKyDmtR7N6gCj ZSgslgT3jIaDNAHuP1hz8lNyJkzVxBq+KtiNn1fXvAlc2RQGKkJoNSr X-Developer-Key: i=markuss.broks@gmail.com; a=ed25519; pk=p3Bh4oPpeCrTpffJvGch5WsWNikteWHJ+4LBICPbZg0= Exynos 9810 is an ARMv8 mobile SoC found in various Samsung devices, such as Samsung Galaxy S9 (starlte), S9 Plus (star2lte), Note 9 (crownlte) and perhaps others. Add minimal support for this SoC, including basic stuff like: - PSCI for bringing up secondary cores - ARMv8 generic timer - GPIO and pinctrl. The firmware coming with the devices based on this SoC is buggy and doesn't configure CNTFRQ_EL0, as required by spec, so it's needed to hardcode the frequency in the timer node. Co-developed-by: Maksym Holovach Signed-off-by: Maksym Holovach Signed-off-by: Markuss Broks --- arch/arm64/boot/dts/exynos/exynos9810-pinctrl.dtsi | 503 +++++++++++++++++++++ arch/arm64/boot/dts/exynos/exynos9810.dtsi | 273 +++++++++++ 2 files changed, 776 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos9810-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos9810-pinctrl.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..88091bf09e4e91b05801cafe956283984d564449 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos9810-pinctrl.dtsi @@ -0,0 +1,503 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung's Exynos 9810 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2024 Markuss Broks + * Copyright (c) 2024 Maksym Holovach + */ + +#include "exynos-pinctrl.h" + +&pinctrl_alive { + etc1: etc1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa0: gpa0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + #interrupt-cells = <2>; + }; + + gpa1: gpa1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + #interrupt-cells = <2>; + }; + + gpa2: gpa2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + #interrupt-cells = <2>; + }; + + gpa3: gpa3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + #interrupt-cells = <2>; + }; + + gpa4: gpa4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpq0: gpq0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_aud { + gpb0: gpb0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb2: gpb2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_chub { + gph0: gph0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph1: gph1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_cmgp { + gpm0: gpm0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm1: gpm1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm2: gpm2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm3: gpm3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm4: gpm4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm5: gpm5-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm6: gpm6-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm7: gpm7-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm10: gpm10-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm11: gpm11-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm12: gpm12-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm13: gpm13-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm14: gpm14-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm15: gpm15-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm16: gpm16-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm17: gpm17-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm40: gpm40-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm41: gpm41-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm42: gpm42-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; + + gpm43: gpm43-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupts = ; + }; +}; + +&pinctrl_fsys0 { + gpf0: gpf0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_fsys1 { + gpf1: gpf1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf2: gpf2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_peric0 { + gpg0: gpg0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp0: gpp0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp1: gpp1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp2: gpp2-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp3: gpp3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_peric1 { + gpc0: gpc0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc1: gpc1-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd0: gpd0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg3: gpg3-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp4: gpp4-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp5: gpp5-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp6: gpp6-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_vts { + gpt0: gpt0-gpio-bank { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos9810.dtsi b/arch/arm64/boot/dts/exynos/exynos9810.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..70b67b2574d5b66eb5fa421a87dd6f4e49f8f54e --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos9810.dtsi @@ -0,0 +1,273 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* + * Samsung Exynos 9810 SoC device tree source + * + * Copyright (c) 2024 Markuss Broks + * Copyright (c) 2024 Maksym Holovach + */ + +#include + +/ { + compatible = "samsung,exynos9810"; + #address-cells = <2>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + aliases { + pinctrl0 = &pinctrl_alive; + pinctrl1 = &pinctrl_aud; + pinctrl2 = &pinctrl_chub; + pinctrl3 = &pinctrl_cmgp; + pinctrl4 = &pinctrl_fsys0; + pinctrl5 = &pinctrl_fsys1; + pinctrl6 = &pinctrl_peric0; + pinctrl7 = &pinctrl_peric1; + pinctrl8 = &pinctrl_vts; + }; + + arm-a55-pmu { + compatible = "arm,cortex-a55-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, + <&cpu1>, + <&cpu2>, + <&cpu3>; + }; + + mongoose-m3-pmu { + compatible = "samsung,mongoose-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu4>, + <&cpu5>, + <&cpu6>, + <&cpu7>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x1>; + enable-method = "psci"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x2>; + enable-method = "psci"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x3>; + enable-method = "psci"; + }; + + cpu4: cpu@100 { + device_type = "cpu"; + compatible = "samsung,mongoose-m3"; + reg = <0x100>; + enable-method = "psci"; + }; + + cpu5: cpu@101 { + device_type = "cpu"; + compatible = "samsung,mongoose-m3"; + reg = <0x101>; + enable-method = "psci"; + }; + + cpu6: cpu@102 { + device_type = "cpu"; + compatible = "samsung,mongoose-m3"; + reg = <0x102>; + enable-method = "psci"; + }; + + cpu7: cpu@103 { + device_type = "cpu"; + compatible = "samsung,mongoose-m3"; + reg = <0x103>; + enable-method = "psci"; + }; + }; + + oscclk: osc-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "oscclk"; + }; + + psci { + compatible = "arm,psci"; + method = "smc"; + cpu_off = <0x84000002>; + cpu_on = <0xc4000003>; + cpu_suspend = <0xc4000001>; + }; + + soc: soc@0 { + compatible = "simple-bus"; + ranges = <0x0 0x0 0x0 0x20000000>; + + #address-cells = <1>; + #size-cells = <1>; + + chipid@10000000 { + compatible = "samsung,exynos9810-chipid", + "samsung,exynos850-chipid"; + reg = <0x10000000 0x100>; + }; + + gic: interrupt-controller@10101000 { + compatible = "arm,gic-400"; + reg = <0x10101000 0x1000>, + <0x10102000 0x1000>, + <0x10104000 0x2000>, + <0x10106000 0x2000>; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = ; + #address-cells = <0>; + #size-cells = <1>; + }; + + pinctrl_peric0: pinctrl@10430000 { + compatible = "samsung,exynos9810-pinctrl"; + reg = <0x10430000 0x1000>; + interrupts = ; + }; + + pinctrl_peric1: pinctrl@10830000 { + compatible = "samsung,exynos9810-pinctrl"; + reg = <0x10830000 0x1000>; + interrupts = ; + }; + + pinctrl_fsys0: pinctrl@11050000 { + compatible = "samsung,exynos9810-pinctrl"; + reg = <0x11050000 0x1000>; + interrupts = ; + }; + + pinctrl_fsys1: pinctrl@11430000 { + compatible = "samsung,exynos9810-pinctrl"; + reg = <0x11430000 0x1000>; + interrupts = ; + }; + + pinctrl_vts: pinctrl@13880000 { + compatible = "samsung,exynos9810-pinctrl"; + reg = <0x13880000 0x1000>; + }; + + pinctrl_chub: pinctrl@13a80000 { + compatible = "samsung,exynos9810-pinctrl"; + reg = <0x13a80000 0x1000>; + interrupts = ; + }; + + pinctrl_alive: pinctrl@14050000 { + compatible = "samsung,exynos9810-pinctrl"; + reg = <0x14050000 0x1000>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos9810-wakeup-eint", + "samsung,exynos850-wakeup-eint", + "samsung,exynos7-wakeup-eint"; + }; + }; + + pmu_system_controller: system-controller@14060000 { + compatible = "samsung,exynos9810-pmu", + "samsung,exynos7-pmu", "syscon"; + reg = <0x14060000 0x10000>; + }; + + pinctrl_cmgp: pinctrl@14220000 { + compatible = "samsung,exynos9810-pinctrl"; + reg = <0x14220000 0x1000>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos9810-wakeup-eint", + "samsung,exynos850-wakeup-eint", + "samsung,exynos7-wakeup-eint"; + }; + }; + + pinctrl_aud: pinctrl@17c60000 { + compatible = "samsung,exynos9810-pinctrl"; + reg = <0x17c60000 0x1000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + /* Hypervisor Virtual Timer interrupt is not wired to GIC */ + interrupts = , + , + , + ; + /* + * Non-updatable, broken stock Samsung bootloader does not + * configure CNTFRQ_EL0 + */ + clock-frequency = <26000000>; + }; +}; + +#include "exynos9810-pinctrl.dtsi" +#include "arm/samsung/exynos-syscon-restart.dtsi"