From patchwork Thu Nov 7 11:43:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Facklam via B4 Relay X-Patchwork-Id: 841689 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E53B120B1FC; Thu, 7 Nov 2024 11:44:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730979841; cv=none; b=uNtnZzMGxOJg+FTQfVDR8mvXGU0JuYSVf29rtLG/3bcg7uaXpzNMmApcfcpn7x43IveLmW7hV/07iZQ6Sbus6hxhWogeBdx1/GvYvJTjt+yWvUFDDEgswsCbNgzk5scc+GnuwzDcYep4w6FzFBIJvx7jEcmA7bMzm3vyfQidOR8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730979841; c=relaxed/simple; bh=8OjwgE+KJS8rZ/T96z9AvyE20GFcpVpfz7Q+t0LI/bk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lTirEFGkVaP+M34F0oYRHusjj98FRUDpI1HZ9ue1+EGtuNp1Ll8V7mWE82oPplAbopWjG0deTCs2po93M/l/IhZe7LgonMRNIR1B3xJ0PiHl7dAZGcjHI+a3471RlgG8RSMcY0Tuk8h2eB2SaELTF2ykUWHp/kDWsFaItlYujgc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=uZnfT7yp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="uZnfT7yp" Received: by smtp.kernel.org (Postfix) with ESMTPS id 98F65C4CED2; Thu, 7 Nov 2024 11:44:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730979840; bh=8OjwgE+KJS8rZ/T96z9AvyE20GFcpVpfz7Q+t0LI/bk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=uZnfT7ypWbAXJ46bO6t/0s1Z44fed4nutzXjOGZvwIvLzpo59iTfXgT3qsjTJSmYb AQOgde3fEDi1jUAQUq6zf2MhohI4RDzNH5h37KCZ2IEBNMdEEfQKZFP6FY8/Io5UmE 4HAeBTzqFKAzMCn2dtDKGqciUoE20bOEWT5dnE/DTQY6k5nXD1yRJNSMXMTsRfDiWJ I0X3oeAUvaH64hMkew80+I0XKGmk1/VPZ3hmlq1y/Cm1vUwrchmmSjG8c+ZwCsDp3r TDDjEl0nkgmQ/v6HPKQpoXOV8P38Y6vXKsQnkvvYQmxzxxsk2SqAXH/oz8zUXEhPMN QHcy5JqIuLSDg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85FB6D4334F; Thu, 7 Nov 2024 11:44:00 +0000 (UTC) From: Oliver Facklam via B4 Relay Date: Thu, 07 Nov 2024 12:43:27 +0100 Subject: [PATCH 1/4] usb: typec: hd3ss3220: configure advertised power opmode based on fwnode property Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241107-usb-typec-controller-enhancements-v1-1-3886c1acced2@zuehlke.com> References: <20241107-usb-typec-controller-enhancements-v1-0-3886c1acced2@zuehlke.com> In-Reply-To: <20241107-usb-typec-controller-enhancements-v1-0-3886c1acced2@zuehlke.com> To: Heikki Krogerus , Greg Kroah-Hartman Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Oliver Facklam , Benedict von Heyl , Mathis Foerst , Michael Glettig X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1730979838; l=3492; i=oliver.facklam@zuehlke.com; s=20241107; h=from:subject:message-id; bh=xQEWItvO4K2hmgsVC5C+clRiGDX0sc04fruShxWbObY=; b=Tqye3+C+vb15i1SGLnSaSimixcm0SjmZ31zzyMIapThQJyi051aNEe82OlBkwdUKDm5CpER0k LhT95ki85z0A24A8UK8uE6zVtvqQYATagSVIufnge5fWpJJVeLWN4UQ X-Developer-Key: i=oliver.facklam@zuehlke.com; a=ed25519; pk=bMlB+nko+ewJHQJLwq2t26VDbmRmNDPr/1woleqp7Lw= X-Endpoint-Received: by B4 Relay for oliver.facklam@zuehlke.com/20241107 with auth_id=271 X-Original-From: Oliver Facklam Reply-To: oliver.facklam@zuehlke.com From: Oliver Facklam The TI HD3SS3220 Type-C controller supports configuring its advertised power operation mode over I2C using the CURRENT_MODE_ADVERTISE field of the Connection Status Register. Configure this power mode based on the existing (optional) property "typec-power-opmode" of /schemas/connector/usb-connector.yaml Signed-off-by: Oliver Facklam --- drivers/usb/typec/hd3ss3220.c | 53 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/drivers/usb/typec/hd3ss3220.c b/drivers/usb/typec/hd3ss3220.c index fb1242e82ffdc64a9a3330f50155bb8f0fe45685..56f74bf70895ca701083bde44a5bbe0b691551e1 100644 --- a/drivers/usb/typec/hd3ss3220.c +++ b/drivers/usb/typec/hd3ss3220.c @@ -16,10 +16,17 @@ #include #include +#define HD3SS3220_REG_CN_STAT 0x08 #define HD3SS3220_REG_CN_STAT_CTRL 0x09 #define HD3SS3220_REG_GEN_CTRL 0x0A #define HD3SS3220_REG_DEV_REV 0xA0 +/* Register HD3SS3220_REG_CN_STAT */ +#define HD3SS3220_REG_CN_STAT_CURRENT_MODE_MASK (BIT(7) | BIT(6)) +#define HD3SS3220_REG_CN_STAT_CURRENT_MODE_DEFAULT 0x00 +#define HD3SS3220_REG_CN_STAT_CURRENT_MODE_MID BIT(6) +#define HD3SS3220_REG_CN_STAT_CURRENT_MODE_HIGH BIT(7) + /* Register HD3SS3220_REG_CN_STAT_CTRL*/ #define HD3SS3220_REG_CN_STAT_CTRL_ATTACHED_STATE_MASK (BIT(7) | BIT(6)) #define HD3SS3220_REG_CN_STAT_CTRL_AS_DFP BIT(6) @@ -43,6 +50,31 @@ struct hd3ss3220 { bool poll; }; +static int hd3ss3220_set_power_opmode(struct hd3ss3220 *hd3ss3220, int power_opmode) +{ + int current_mode; + + switch (power_opmode) { + case TYPEC_PWR_MODE_USB: + current_mode = HD3SS3220_REG_CN_STAT_CURRENT_MODE_DEFAULT; + break; + case TYPEC_PWR_MODE_1_5A: + current_mode = HD3SS3220_REG_CN_STAT_CURRENT_MODE_MID; + break; + case TYPEC_PWR_MODE_3_0A: + current_mode = HD3SS3220_REG_CN_STAT_CURRENT_MODE_HIGH; + break; + case TYPEC_PWR_MODE_PD: /* Power delivery not supported */ + default: + dev_err(hd3ss3220->dev, "bad power operation mode: %d\n", power_opmode); + return -EINVAL; + } + + return regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_CN_STAT, + HD3SS3220_REG_CN_STAT_CURRENT_MODE_MASK, + current_mode); +} + static int hd3ss3220_set_source_pref(struct hd3ss3220 *hd3ss3220, int src_pref) { return regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, @@ -162,6 +194,23 @@ static irqreturn_t hd3ss3220_irq_handler(int irq, void *data) return hd3ss3220_irq(hd3ss3220); } +static int hd3ss3220_configure_power_opmode(struct hd3ss3220 *hd3ss3220, + struct fwnode_handle *connector) +{ + /* + * Supported power operation mode can be configured through device tree + */ + const char *cap_str; + int ret, power_opmode; + + ret = fwnode_property_read_string(connector, "typec-power-opmode", &cap_str); + if (ret) + return 0; + + power_opmode = typec_find_pwr_opmode(cap_str); + return hd3ss3220_set_power_opmode(hd3ss3220, power_opmode); +} + static const struct regmap_config config = { .reg_bits = 8, .val_bits = 8, @@ -223,6 +272,10 @@ static int hd3ss3220_probe(struct i2c_client *client) goto err_put_role; } + ret = hd3ss3220_configure_power_opmode(hd3ss3220, connector); + if (ret < 0) + goto err_unreg_port; + hd3ss3220_set_role(hd3ss3220); ret = regmap_read(hd3ss3220->regmap, HD3SS3220_REG_CN_STAT_CTRL, &data); if (ret < 0) From patchwork Thu Nov 7 11:43:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Facklam via B4 Relay X-Patchwork-Id: 842311 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1125020B1FF; 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a=ed25519-sha256; t=1730979838; l=1169; i=oliver.facklam@zuehlke.com; s=20241107; h=from:subject:message-id; bh=V/ZRmfdf8rYgiBJZgxIzqV0Qzt6dP65mnitUcwhfB4w=; b=CAlkuKbhXj0tvqdtVk2f1Ln9aB48sV4so98MjJKKfxfKG8Za5hyKKq/0s/E/2ZApPZo2Jhb2q oz3Iqv2qZo/AQ5EkCw4BGfjybZpQYk7qt0d3DLA2eea4TtbDU63qn+b X-Developer-Key: i=oliver.facklam@zuehlke.com; a=ed25519; pk=bMlB+nko+ewJHQJLwq2t26VDbmRmNDPr/1woleqp7Lw= X-Endpoint-Received: by B4 Relay for oliver.facklam@zuehlke.com/20241107 with auth_id=271 X-Original-From: Oliver Facklam Reply-To: oliver.facklam@zuehlke.com From: Oliver Facklam The type, data, and prefer_role properties were previously hard-coded when creating the struct typec_capability. Use typec_get_fw_cap() to populate these fields based on the respective fwnode properties. Signed-off-by: Oliver Facklam --- drivers/usb/typec/hd3ss3220.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/usb/typec/hd3ss3220.c b/drivers/usb/typec/hd3ss3220.c index 56f74bf70895ca701083bde44a5bbe0b691551e1..e6e4b1871b5d805f8c367131509f4e6ec0d2b5f0 100644 --- a/drivers/usb/typec/hd3ss3220.c +++ b/drivers/usb/typec/hd3ss3220.c @@ -259,12 +259,12 @@ static int hd3ss3220_probe(struct i2c_client *client) goto err_put_fwnode; } - typec_cap.prefer_role = TYPEC_NO_PREFERRED_ROLE; + ret = typec_get_fw_cap(&typec_cap, connector); + if (ret) + goto err_put_role; + typec_cap.driver_data = hd3ss3220; - typec_cap.type = TYPEC_PORT_DRP; - typec_cap.data = TYPEC_PORT_DRD; typec_cap.ops = &hd3ss3220_ops; - typec_cap.fwnode = connector; hd3ss3220->port = typec_register_port(&client->dev, &typec_cap); if (IS_ERR(hd3ss3220->port)) { From patchwork Thu Nov 7 11:43:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Facklam via B4 Relay X-Patchwork-Id: 842310 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2BC6A20C483; Thu, 7 Nov 2024 11:44:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730979841; cv=none; b=IgK6VlC0awT6P4bU/Zq6sVEE/kZ7IjpGUL09dREW1QtuxMuYR15pigKAjA8wxebma7BxrA+1AYhr652GgcKjpH8IF/VVwKiqMsj91teOnqZGqOHODezrBbmmPbWBMVzkQSWlDRAHAdpUxM7HabcvMMe3OKxmQ0qIR7qDB6Zs7HU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730979841; c=relaxed/simple; bh=fTI5NBtzq4sCe/T7b4tutmnNVDOvNEZ2tE3VYZgBZFY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=En/qTOLASIuP4x+P65u6id4TjN72AUyK+ZHc8+IMfKAAhiQiV806pfZ/R2KJAhncKEENH+IRJrallusw5XFC4OlvUdKVIw96PdFYYMwYJcQfL2UGvRHa71Zk+PtFLp92IrpRTu/cJzl6xkknOQCAnJ+Ku4wKh2iXn4P3mIOhXD0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=P5ynFb66; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="P5ynFb66" Received: by smtp.kernel.org (Postfix) with ESMTPS id AB8E2C4CED4; Thu, 7 Nov 2024 11:44:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730979840; bh=fTI5NBtzq4sCe/T7b4tutmnNVDOvNEZ2tE3VYZgBZFY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=P5ynFb66EQuAWFoim3WlXgtAsvCw8HVStoze3lsy5OZnhVu7IXeD+7/lheztZwE97 Qns2xVcZxFjG7kkc+REjgLE4BofNMOpMomZqj0WqbapVHoDLrAiuhYfLctyN5F69mX V3uUB0+P++AT+2hJy5Yqn/3G43AyhwJbTypOfITdWd2A6C9YJA3nd/aGk5nLiz8xfi 9WOTY39XaiqPjIof3oUg524Iu6dgDCzaB1wYC8MFrGuHPlsxo3u0RLEl1KouvEqnT5 fzetJ6mrYn0uNMbXaj9DdyPTRE5WMjivQOWbuPja/xg2N+U0sI/VcveDfXQupv6hGS BJEIh9PUqsrhw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id A03FAD43354; Thu, 7 Nov 2024 11:44:00 +0000 (UTC) From: Oliver Facklam via B4 Relay Date: Thu, 07 Nov 2024 12:43:29 +0100 Subject: [PATCH 3/4] usb: typec: hd3ss3220: support configuring port type Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241107-usb-typec-controller-enhancements-v1-3-3886c1acced2@zuehlke.com> References: <20241107-usb-typec-controller-enhancements-v1-0-3886c1acced2@zuehlke.com> In-Reply-To: <20241107-usb-typec-controller-enhancements-v1-0-3886c1acced2@zuehlke.com> To: Heikki Krogerus , Greg Kroah-Hartman Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Oliver Facklam , Benedict von Heyl , Mathis Foerst , Michael Glettig X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1730979838; l=4521; i=oliver.facklam@zuehlke.com; s=20241107; h=from:subject:message-id; bh=RoJ3L9O4AN+n7NPifu/hwf1btjsUL9d+mOMPJO0VD04=; b=ROIfT6svIEQiIdOfNTksvubjgWdQrobqW8MYz+gm2mXTODPw8LFK8qmdrsJ8mjcv9XX3bbggo HcusLZntEMlDVlBIo2t16wQDaJUzN87QucIyWbvTpwedAMtSzG7t/qH X-Developer-Key: i=oliver.facklam@zuehlke.com; a=ed25519; pk=bMlB+nko+ewJHQJLwq2t26VDbmRmNDPr/1woleqp7Lw= X-Endpoint-Received: by B4 Relay for oliver.facklam@zuehlke.com/20241107 with auth_id=271 X-Original-From: Oliver Facklam Reply-To: oliver.facklam@zuehlke.com From: Oliver Facklam The TI HD3SS3220 Type-C controller supports configuring the port type it will operate as through the MODE_SELECT field of the General Control Register. Configure the port type based on the fwnode property "power-role" during probe, and through the port_type_set typec_operation. The MODE_SELECT field can only be changed when the controller is in unattached state, so follow the sequence recommended by the datasheet to: 1. disable termination on CC pins to disable the controller 2. change the mode 3. re-enable termination This will effectively cause a connected device to disconnect for the duration of the mode change. Signed-off-by: Oliver Facklam --- drivers/usb/typec/hd3ss3220.c | 66 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 65 insertions(+), 1 deletion(-) diff --git a/drivers/usb/typec/hd3ss3220.c b/drivers/usb/typec/hd3ss3220.c index e6e4b1871b5d805f8c367131509f4e6ec0d2b5f0..357c4e9491a2e3047046db91858ac98ab484ef62 100644 --- a/drivers/usb/typec/hd3ss3220.c +++ b/drivers/usb/typec/hd3ss3220.c @@ -35,10 +35,16 @@ #define HD3SS3220_REG_CN_STAT_CTRL_INT_STATUS BIT(4) /* Register HD3SS3220_REG_GEN_CTRL*/ +#define HD3SS3220_REG_GEN_CTRL_DISABLE_TERM BIT(0) #define HD3SS3220_REG_GEN_CTRL_SRC_PREF_MASK (BIT(2) | BIT(1)) #define HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_DEFAULT 0x00 #define HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SNK BIT(1) #define HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SRC (BIT(2) | BIT(1)) +#define HD3SS3220_REG_GEN_CTRL_MODE_SELECT_MASK (BIT(5) | BIT(4)) +#define HD3SS3220_REG_GEN_CTRL_MODE_SELECT_DEFAULT 0x00 +#define HD3SS3220_REG_GEN_CTRL_MODE_SELECT_DFP BIT(5) +#define HD3SS3220_REG_GEN_CTRL_MODE_SELECT_UFP BIT(4) +#define HD3SS3220_REG_GEN_CTRL_MODE_SELECT_DRP (BIT(5) | BIT(4)) struct hd3ss3220 { struct device *dev; @@ -75,6 +81,52 @@ static int hd3ss3220_set_power_opmode(struct hd3ss3220 *hd3ss3220, int power_opm current_mode); } +static int hd3ss3220_set_port_type(struct hd3ss3220 *hd3ss3220, int type) +{ + int mode_select, err; + + switch (type) { + case TYPEC_PORT_SRC: + mode_select = HD3SS3220_REG_GEN_CTRL_MODE_SELECT_DFP; + break; + case TYPEC_PORT_SNK: + mode_select = HD3SS3220_REG_GEN_CTRL_MODE_SELECT_UFP; + break; + case TYPEC_PORT_DRP: + mode_select = HD3SS3220_REG_GEN_CTRL_MODE_SELECT_DRP; + break; + default: + dev_err(hd3ss3220->dev, "bad port type: %d\n", type); + return -EINVAL; + } + + /* Disable termination before changing MODE_SELECT as required by datasheet */ + err = regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, + HD3SS3220_REG_GEN_CTRL_DISABLE_TERM, + HD3SS3220_REG_GEN_CTRL_DISABLE_TERM); + if (err < 0) { + dev_err(hd3ss3220->dev, "Failed to disable port for mode change: %d\n", err); + return err; + } + + err = regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, + HD3SS3220_REG_GEN_CTRL_MODE_SELECT_MASK, + mode_select); + if (err < 0) { + dev_err(hd3ss3220->dev, "Failed to change mode: %d\n", err); + regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, + HD3SS3220_REG_GEN_CTRL_DISABLE_TERM, 0); + return err; + } + + err = regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, + HD3SS3220_REG_GEN_CTRL_DISABLE_TERM, 0); + if (err < 0) + dev_err(hd3ss3220->dev, "Failed to re-enable port after mode change: %d\n", err); + + return err; +} + static int hd3ss3220_set_source_pref(struct hd3ss3220 *hd3ss3220, int src_pref) { return regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, @@ -131,8 +183,16 @@ static int hd3ss3220_dr_set(struct typec_port *port, enum typec_data_role role) return ret; } +static int hd3ss3220_port_type_set(struct typec_port *port, enum typec_port_type type) +{ + struct hd3ss3220 *hd3ss3220 = typec_get_drvdata(port); + + return hd3ss3220_set_port_type(hd3ss3220, type); +} + static const struct typec_operations hd3ss3220_ops = { - .dr_set = hd3ss3220_dr_set + .dr_set = hd3ss3220_dr_set, + .port_type_set = hd3ss3220_port_type_set, }; static void hd3ss3220_set_role(struct hd3ss3220 *hd3ss3220) @@ -263,6 +323,10 @@ static int hd3ss3220_probe(struct i2c_client *client) if (ret) goto err_put_role; + ret = hd3ss3220_set_port_type(hd3ss3220, typec_cap.type); + if (ret < 0) + goto err_put_role; + typec_cap.driver_data = hd3ss3220; typec_cap.ops = &hd3ss3220_ops; From patchwork Thu Nov 7 11:43:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Facklam via B4 Relay X-Patchwork-Id: 841688 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 293DB20C47C; Thu, 7 Nov 2024 11:44:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730979841; 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a=ed25519-sha256; t=1730979838; l=4311; i=oliver.facklam@zuehlke.com; s=20241107; h=from:subject:message-id; bh=XHflV9vRXXwBeMjU3taqyyigWiet9h+BzR1A+QQQN2o=; b=MFk/3IkAL+g3y3G9e9CD/xiHKOIjDVMyQXkvcAryZBJ1PRXy33ovhS2wklRVWrl80ziI1E09f baLbkB5WtO6AnNm3yhMnw9BrdVLQ+NP2KXzbzly+3rr1u/WZZEIMm9v X-Developer-Key: i=oliver.facklam@zuehlke.com; a=ed25519; pk=bMlB+nko+ewJHQJLwq2t26VDbmRmNDPr/1woleqp7Lw= X-Endpoint-Received: by B4 Relay for oliver.facklam@zuehlke.com/20241107 with auth_id=271 X-Original-From: Oliver Facklam Reply-To: oliver.facklam@zuehlke.com From: Oliver Facklam The TI HD3SS3220 Type-C controller supports configuring its role preference when operating as a dual-role port through the SOURCE_PREF field of the General Control Register. The previous driver behavior was to set the role preference based on the dr_set typec_operation. However, the controller does not support swapping the data role on an active connection due to its lack of Power Delivery support. Remove previous dr_set typec_operation, and support setting the role preference based on the corresponding fwnode property, as well as the try_role typec_operation. Signed-off-by: Oliver Facklam --- drivers/usb/typec/hd3ss3220.c | 50 +++++++++++++++++++++---------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/drivers/usb/typec/hd3ss3220.c b/drivers/usb/typec/hd3ss3220.c index 357c4e9491a2e3047046db91858ac98ab484ef62..c6922989a3cd04fd878e37888856ac1b9c5135ec 100644 --- a/drivers/usb/typec/hd3ss3220.c +++ b/drivers/usb/typec/hd3ss3220.c @@ -127,8 +127,25 @@ static int hd3ss3220_set_port_type(struct hd3ss3220 *hd3ss3220, int type) return err; } -static int hd3ss3220_set_source_pref(struct hd3ss3220 *hd3ss3220, int src_pref) +static int hd3ss3220_set_source_pref(struct hd3ss3220 *hd3ss3220, int prefer_role) { + int src_pref; + + switch (prefer_role) { + case TYPEC_NO_PREFERRED_ROLE: + src_pref = HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_DEFAULT; + break; + case TYPEC_SINK: + src_pref = HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SNK; + break; + case TYPEC_SOURCE: + src_pref = HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SRC; + break; + default: + dev_err(hd3ss3220->dev, "bad role preference: %d\n", prefer_role); + return -EINVAL; + } + return regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_GEN_CTRL, HD3SS3220_REG_GEN_CTRL_SRC_PREF_MASK, src_pref); @@ -160,27 +177,11 @@ static enum usb_role hd3ss3220_get_attached_state(struct hd3ss3220 *hd3ss3220) return attached_state; } -static int hd3ss3220_dr_set(struct typec_port *port, enum typec_data_role role) +static int hd3ss3220_try_role(struct typec_port *port, int role) { struct hd3ss3220 *hd3ss3220 = typec_get_drvdata(port); - enum usb_role role_val; - int pref, ret = 0; - if (role == TYPEC_HOST) { - role_val = USB_ROLE_HOST; - pref = HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SRC; - } else { - role_val = USB_ROLE_DEVICE; - pref = HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_TRY_SNK; - } - - ret = hd3ss3220_set_source_pref(hd3ss3220, pref); - usleep_range(10, 100); - - usb_role_switch_set_role(hd3ss3220->role_sw, role_val); - typec_set_data_role(hd3ss3220->port, role); - - return ret; + return hd3ss3220_set_source_pref(hd3ss3220, role); } static int hd3ss3220_port_type_set(struct typec_port *port, enum typec_port_type type) @@ -191,7 +192,7 @@ static int hd3ss3220_port_type_set(struct typec_port *port, enum typec_port_type } static const struct typec_operations hd3ss3220_ops = { - .dr_set = hd3ss3220_dr_set, + .try_role = hd3ss3220_try_role, .port_type_set = hd3ss3220_port_type_set, }; @@ -200,9 +201,6 @@ static void hd3ss3220_set_role(struct hd3ss3220 *hd3ss3220) enum usb_role role_state = hd3ss3220_get_attached_state(hd3ss3220); usb_role_switch_set_role(hd3ss3220->role_sw, role_state); - if (role_state == USB_ROLE_NONE) - hd3ss3220_set_source_pref(hd3ss3220, - HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_DEFAULT); switch (role_state) { case USB_ROLE_HOST: @@ -297,8 +295,6 @@ static int hd3ss3220_probe(struct i2c_client *client) if (IS_ERR(hd3ss3220->regmap)) return PTR_ERR(hd3ss3220->regmap); - hd3ss3220_set_source_pref(hd3ss3220, - HD3SS3220_REG_GEN_CTRL_SRC_PREF_DRP_DEFAULT); /* For backward compatibility check the connector child node first */ connector = device_get_named_child_node(hd3ss3220->dev, "connector"); if (connector) { @@ -323,6 +319,10 @@ static int hd3ss3220_probe(struct i2c_client *client) if (ret) goto err_put_role; + ret = hd3ss3220_set_source_pref(hd3ss3220, typec_cap.prefer_role); + if (ret < 0) + goto err_put_role; + ret = hd3ss3220_set_port_type(hd3ss3220, typec_cap.type); if (ret < 0) goto err_put_role;