From patchwork Fri Nov 8 03:40:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunfei Dong X-Patchwork-Id: 842255 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 112E715C0; Fri, 8 Nov 2024 03:40:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731037232; cv=none; b=q7J+1r3SzOP1KD0t8M8sscCz7UH2wkEu7ndPPK40NneOwnrmS4VgSFeRQZi8TN7zn7VTH2MZFuP6pzxfK9F6cQn6LHqieiFRHU+Etzh5bLsyQQwzsXto9p7afVcDqiBst3b8QpvGrvhD2v10budcbwkH2Evr+QdQ5AoVdlwnMXE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731037232; c=relaxed/simple; bh=c4OHLQSfZ+/YVuVUzD3mrA+OXTnFEw4UvaDgxOBCClk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=obJuPYLfG+SAVLRsXgsmEmscPKX2vfumZuaZatqdeQZ2g0/NHRNKsfmbu5BvqSbLWjONMrAN+4t0uvC28FDymjUNdStjq/h5ZxV3S5YyEenRHXwAxFVGmYo8X+vqDZgWtd/GrXVjux6fITM7+58xVjgCRxEdyiEukdeV9a5WNI4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=awzVTA9W; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="awzVTA9W" X-UUID: 2f996bbe9d8311efb88477ffae1fc7a5-20241108 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=P6nhnWHkTe0aK3cteSOkx0hGeeXinyaWKFsIxztRYHY=; b=awzVTA9WLYIEmAluEnZKixEuJMaeNsZuXf3E+vIiRAWxQUZ1vCYpZgyuM9P9v1y/1dJAQ9fBmsi9vZg50qiUpdodNOvc5UbDlUF3UQqLOVIPF96WvyPRG220xj9zOj/j68NGtSss2gcMsSKQALip6Igy0g7MMh2sY5lcrnbIeNU=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.42, REQID:9d65bd1e-b686-45d7-82b7-2a2c07effe10, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:b0fcdc3, CLOUDID:00c1be06-6ce0-4172-9755-bd2287e50583, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 2f996bbe9d8311efb88477ffae1fc7a5-20241108 Received: from mtkmbs09n2.mediatek.inc [(172.21.101.94)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 69308862; Fri, 08 Nov 2024 11:40:23 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 8 Nov 2024 11:40:22 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 8 Nov 2024 11:40:21 +0800 From: Yunfei Dong To: =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= , Sebastian Fricke , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert CC: Hsin-Yi Wang , Chen-Yu Tsai , Fritz Koenig , Daniel Vetter , Steve Cho , Yunfei Dong , , , , , , Subject: [PATCH v4 1/3] media: mediatek: vcodec: remove vsi operation in common interface Date: Fri, 8 Nov 2024 11:40:10 +0800 Message-ID: <20241108034019.20064-2-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241108034019.20064-1-yunfei.dong@mediatek.com> References: <20241108034019.20064-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Extend struct video shared information (vsi) to send different parameters to scp for mt8188 architecture is changed. Remove vsi related operation in common interface to make sure the interface can be called by extended and non extended architecture at the same time. The new extended interfaces with new vsi will be introduced in later patches. Signed-off-by: Yunfei Dong Reviewed-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- .../vcodec/decoder/vdec/vdec_h264_req_multi_if.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c index 732d78f63e5a..851a8490b828 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c @@ -171,9 +171,9 @@ struct vdec_h264_slice_inst { }; static int vdec_h264_slice_fill_decode_parameters(struct vdec_h264_slice_inst *inst, - struct vdec_h264_slice_share_info *share_info) + struct vdec_h264_slice_share_info *share_info, + struct vdec_h264_slice_lat_dec_param *slice_param) { - struct vdec_h264_slice_lat_dec_param *slice_param = &inst->vsi->h264_slice_params; const struct v4l2_ctrl_h264_decode_params *dec_params; const struct v4l2_ctrl_h264_scaling_matrix *src_matrix; const struct v4l2_ctrl_h264_sps *sps; @@ -266,9 +266,6 @@ static int get_vdec_sig_decode_parameters(struct vdec_h264_slice_inst *inst) mtk_vdec_h264_get_ref_list(b0_reflist, v4l2_b0_reflist, reflist_builder.num_valid); mtk_vdec_h264_get_ref_list(b1_reflist, v4l2_b1_reflist, reflist_builder.num_valid); - memcpy(&inst->vsi_ctx.h264_slice_params, slice_param, - sizeof(inst->vsi_ctx.h264_slice_params)); - return 0; } @@ -608,7 +605,8 @@ static int vdec_h264_slice_lat_decode(void *h_vdec, struct mtk_vcodec_mem *bs, lat_buf->vb2_v4l2_src = &src_buf_info->m2m_buf.vb; v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, &lat_buf->ts_info, true); - err = vdec_h264_slice_fill_decode_parameters(inst, share_info); + err = vdec_h264_slice_fill_decode_parameters(inst, share_info, + &inst->vsi->h264_slice_params); if (err) goto err_free_fb_out; @@ -749,6 +747,9 @@ static int vdec_h264_slice_single_decode(void *h_vdec, struct mtk_vcodec_mem *bs if (err) goto err_free_fb_out; + memcpy(&inst->vsi_ctx.h264_slice_params, &inst->h264_slice_param, + sizeof(inst->vsi_ctx.h264_slice_params)); + buf = (unsigned char *)bs->va; nal_start_idx = mtk_vdec_h264_find_start_code(buf, bs->size); if (nal_start_idx < 0) { From patchwork Fri Nov 8 03:40:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yunfei Dong X-Patchwork-Id: 841961 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A88281494DB; Fri, 8 Nov 2024 03:40:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731037236; cv=none; b=Q0UwPCmf7T+7Y07OhhtUYzLUgRoxAuc7S/W7aD3sLGcEhXmmA4FHBB4ECRM3CdP3MqEC/LSpe6N4XESFM9kqKIPmgnDq2d9x3+FK4M9b9qPA4WF2jxb2Lc2BMTHdrcZKPxuVdkohYEZjfqSOOA3UdoIvalC9ntbkYklhTJwUjh4= ARC-Message-Signature: i=1; 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Fri, 08 Nov 2024 11:40:25 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 8 Nov 2024 11:40:23 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 8 Nov 2024 11:40:22 +0800 From: Yunfei Dong To: =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= , Sebastian Fricke , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert CC: Hsin-Yi Wang , Chen-Yu Tsai , Fritz Koenig , Daniel Vetter , "Steve Cho" , Yunfei Dong , , , , , , Subject: [PATCH v4 2/3] media: mediatek: vcodec: support extended h264 decode Date: Fri, 8 Nov 2024 11:40:11 +0800 Message-ID: <20241108034019.20064-3-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241108034019.20064-1-yunfei.dong@mediatek.com> References: <20241108034019.20064-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--16.454600-8.000000 X-TMASE-MatchedRID: 6sWEJWfpl7QEshQLfIZryjPDkSOzeDWWIR1rLBJm/M5nnK6mXN72m9Fc 6xqZVtGPYhFXINmuIQxJiK3ymB2wQSY0eULsNBXli/b+LxU2p44K3iJpXUOQQ/zaSz3Z/4aaIub j9bOa7MuBr9OQz5sWyWB15W8F6q39efx/U8o+EjrCz1ymGcrCUWLZk4IDUXXH33Nl3elSfsphJF Sx544IoLqZhYf6F5ZEPEsGvyNSKbCoft0ZW3r/iRafLXbshfoguacNrbMY+LT7n73d09vr98Isp 48ajVPkIGPTbtUJegCHc7WCfeefFmVnjx+sD6KyAoNa2r+Edw0gQCwWYAjSWlfXgfL55inviS5N e4zDWl3TUKNtseTmUOj46M0Cp7U+pU8ma7RqiadNVr4vdmCpzqX1XMd/SqvuQ5HaKy8Wgd6jxYy RBa/qJft6/2HgfIgDVymkLM+r7VTKayT/BQTiGgP90fJP9eHt X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--16.454600-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: DB7D05D71B441A7B29B5D4AF450CC6EC75F1D1D17A8AC10BB0C19AFDC4EC25F82000:8 X-MTK: N The address end of working buffer can't be calculated directly with buffer size in kernel for some special architecture. Adding new extend vsi_ex to calculate the address end in firmware. Adding capability to separate extend and non extend driver for different platform. At last, hardware can parse the syntax to get nal information in firmware for extend architecture, needn't to parse it again in kernel. Signed-off-by: Yunfei Dong Reviewed-by: AngeloGioacchino Del Regno --- .../vcodec/decoder/mtk_vcodec_dec_drv.h | 2 + .../decoder/vdec/vdec_h264_req_multi_if.c | 571 ++++++++++++++++-- 2 files changed, 514 insertions(+), 59 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h index 886fa385e2e6..1e697bc810b0 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h @@ -17,6 +17,7 @@ #define IS_VDEC_LAT_ARCH(hw_arch) ((hw_arch) >= MTK_VDEC_LAT_SINGLE_CORE) #define IS_VDEC_INNER_RACING(capability) ((capability) & MTK_VCODEC_INNER_RACING) +#define IS_VDEC_SUPPORT_EX(capability) ((capability) & MTK_VDEC_IS_SUPPORT_EX) enum mtk_vcodec_dec_chip_name { MTK_VDEC_INVAL = 0, @@ -42,6 +43,7 @@ enum mtk_vdec_format_types { MTK_VDEC_FORMAT_HEVC_FRAME = 0x1000, MTK_VCODEC_INNER_RACING = 0x20000, MTK_VDEC_IS_SUPPORT_10BIT = 0x40000, + MTK_VDEC_IS_SUPPORT_EX = 0x80000, }; /* diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c index 851a8490b828..238639a07703 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c @@ -128,6 +128,83 @@ struct vdec_h264_slice_share_info { u16 nal_info; }; +/* + * struct vdec_h264_slice_mem - memory address and size (shared interface with firmware) + */ +struct vdec_h264_slice_mem { + union { + u64 buf; + u64 dma_addr; + }; + union { + size_t size; + u64 dma_addr_end; + }; +}; + +/** + * struct vdec_h264_slice_fb - frame buffer for decoding (shared interface with firmware) + * + * @y: current y buffer address info + * @c: current c buffer address info + */ +struct vdec_h264_slice_fb { + struct vdec_h264_slice_mem y; + struct vdec_h264_slice_mem c; +}; + +/** + * struct vdec_h264_slice_info_ex - extend decode information (shared interface with firmware) + * + * @wdma_end_addr_offset: offset from buffer start + * @nal_info: nal info of current picture + * @timeout: Decode timeout: 1 timeout, 0 no timeout + * @reserved: reserved + * @vdec_fb_va: VDEC frame buffer struct virtual address + * @crc: Used to check whether hardware's status is right + */ +struct vdec_h264_slice_info_ex { + u64 wdma_end_addr_offset; + u16 nal_info; + u16 timeout; + u32 reserved; + u64 vdec_fb_va; + u32 crc[8]; +}; + +/** + * struct vdec_h264_slice_vsi_ex - extend shared memory for decode information exchange + * between SCP and Host (shared interface with firmware). + * + * @bs: input buffer info + * @fb: current y/c buffer + * + * @ube: ube buffer + * @trans: transcoded buffer + * @row_info: row info buffer + * @err_map: err map buffer + * @slice_bc: slice buffer + * + * @mv_buf_dma: HW working motion vector buffer + * @dec: decode information (AP-R, VPU-W) + * @h264_slice_params: decode parameters for hw used + */ +struct vdec_h264_slice_vsi_ex { + /* LAT dec addr */ + struct vdec_h264_slice_mem bs; + struct vdec_h264_slice_fb fb; + + struct vdec_h264_slice_mem ube; + struct vdec_h264_slice_mem trans; + struct vdec_h264_slice_mem row_info; + struct vdec_h264_slice_mem err_map; + struct vdec_h264_slice_mem slice_bc; + + struct vdec_h264_slice_mem mv_buf_dma[H264_MAX_MV_NUM]; + struct vdec_h264_slice_info_ex dec; + struct vdec_h264_slice_lat_dec_param h264_slice_params; +}; + /** * struct vdec_h264_slice_inst - h264 decoder instance * @@ -136,10 +213,10 @@ struct vdec_h264_slice_share_info { * @pred_buf: HW working prediction buffer * @mv_buf: HW working motion vector buffer * @vpu: VPU instance - * @vsi: vsi used for lat - * @vsi_core: vsi used for core + * @vsi_ex: extend vsi used for lat + * @vsi_core_ex: extend vsi used for core * - * @vsi_ctx: Local VSI data for this decoding context + * @vsi_ctx_ex: Local extend vsi data for this decoding context * @h264_slice_param: the parameters that hardware use to decode * * @resolution_changed:resolution changed @@ -156,10 +233,18 @@ struct vdec_h264_slice_inst { struct mtk_vcodec_mem pred_buf; struct mtk_vcodec_mem mv_buf[H264_MAX_MV_NUM]; struct vdec_vpu_inst vpu; - struct vdec_h264_slice_vsi *vsi; - struct vdec_h264_slice_vsi *vsi_core; - - struct vdec_h264_slice_vsi vsi_ctx; + union { + struct { + struct vdec_h264_slice_vsi *vsi; + struct vdec_h264_slice_vsi *vsi_core; + struct vdec_h264_slice_vsi vsi_ctx; + }; + struct { + struct vdec_h264_slice_vsi_ex *vsi_ex; + struct vdec_h264_slice_vsi_ex *vsi_core_ex; + struct vdec_h264_slice_vsi_ex vsi_ctx_ex; + }; + }; struct vdec_h264_slice_lat_dec_param h264_slice_param; unsigned int resolution_changed; @@ -168,6 +253,9 @@ struct vdec_h264_slice_inst { struct v4l2_h264_dpb_entry dpb[16]; bool is_field_bitstream; + + int (*decode)(void *h_vdec, struct mtk_vcodec_mem *bs, + struct vdec_fb *unused, bool *res_chg); }; static int vdec_h264_slice_fill_decode_parameters(struct vdec_h264_slice_inst *inst, @@ -389,62 +477,143 @@ static void vdec_h264_slice_get_crop_info(struct vdec_h264_slice_inst *inst, cr->left, cr->top, cr->width, cr->height); } -static int vdec_h264_slice_init(struct mtk_vcodec_dec_ctx *ctx) +static void vdec_h264_slice_setup_lat_buffer_ex(struct vdec_h264_slice_inst *inst, + struct mtk_vcodec_mem *bs, + struct vdec_lat_buf *lat_buf) { - struct vdec_h264_slice_inst *inst; - int err, vsi_size; + struct mtk_vcodec_mem *mem; + int i; - inst = kzalloc(sizeof(*inst), GFP_KERNEL); - if (!inst) - return -ENOMEM; + inst->vsi_ex->bs.dma_addr = (u64)bs->dma_addr; + inst->vsi_ex->bs.size = bs->size; - inst->ctx = ctx; + for (i = 0; i < H264_MAX_MV_NUM; i++) { + mem = &inst->mv_buf[i]; + inst->vsi_ex->mv_buf_dma[i].dma_addr = mem->dma_addr; + inst->vsi_ex->mv_buf_dma[i].size = mem->size; + } + inst->vsi_ex->ube.dma_addr = lat_buf->ctx->msg_queue.wdma_addr.dma_addr; + inst->vsi_ex->ube.size = lat_buf->ctx->msg_queue.wdma_addr.size; - inst->vpu.id = SCP_IPI_VDEC_LAT; - inst->vpu.core_id = SCP_IPI_VDEC_CORE; - inst->vpu.ctx = ctx; - inst->vpu.codec_type = ctx->current_codec; - inst->vpu.capture_type = ctx->capture_fourcc; + inst->vsi_ex->row_info.dma_addr = 0; + inst->vsi_ex->row_info.size = 0; - err = vpu_dec_init(&inst->vpu); - if (err) { - mtk_vdec_err(ctx, "vdec_h264 init err=%d", err); - goto error_free_inst; + inst->vsi_ex->err_map.dma_addr = lat_buf->wdma_err_addr.dma_addr; + inst->vsi_ex->err_map.size = lat_buf->wdma_err_addr.size; + + inst->vsi_ex->slice_bc.dma_addr = lat_buf->slice_bc_addr.dma_addr; + inst->vsi_ex->slice_bc.size = lat_buf->slice_bc_addr.size; + + inst->vsi_ex->trans.dma_addr_end = inst->ctx->msg_queue.wdma_rptr_addr; + inst->vsi_ex->trans.dma_addr = inst->ctx->msg_queue.wdma_wptr_addr; +} + +static int vdec_h264_slice_setup_core_buffer_ex(struct vdec_h264_slice_inst *inst, + struct vdec_h264_slice_share_info *share_info, + struct vdec_lat_buf *lat_buf) +{ + struct mtk_vcodec_mem *mem; + struct mtk_vcodec_dec_ctx *ctx = inst->ctx; + struct vb2_v4l2_buffer *vb2_v4l2; + struct vdec_fb *fb; + u64 y_fb_dma, c_fb_dma = 0; + int i; + + fb = ctx->dev->vdec_pdata->get_cap_buffer(ctx); + if (!fb) { + mtk_vdec_err(ctx, "fb buffer is NULL"); + return -EBUSY; } - vsi_size = round_up(sizeof(struct vdec_h264_slice_vsi), VCODEC_DEC_ALIGNED_64); - inst->vsi = inst->vpu.vsi; - inst->vsi_core = - (struct vdec_h264_slice_vsi *)(((char *)inst->vpu.vsi) + vsi_size); - inst->resolution_changed = true; - inst->realloc_mv_buf = true; + y_fb_dma = (u64)fb->base_y.dma_addr; + if (ctx->q_data[MTK_Q_DATA_DST].fmt->num_planes == 1) + c_fb_dma = + y_fb_dma + inst->ctx->picinfo.buf_w * inst->ctx->picinfo.buf_h; + else + c_fb_dma = (u64)fb->base_c.dma_addr; - mtk_vdec_debug(ctx, "lat struct size = %d,%d,%d,%d vsi: %d\n", - (int)sizeof(struct mtk_h264_sps_param), - (int)sizeof(struct mtk_h264_pps_param), - (int)sizeof(struct vdec_h264_slice_lat_dec_param), - (int)sizeof(struct mtk_h264_dpb_info), - vsi_size); - mtk_vdec_debug(ctx, "lat H264 instance >> %p, codec_type = 0x%x", - inst, inst->vpu.codec_type); + mtk_vdec_debug(ctx, "[h264-core] y/c addr = 0x%llx 0x%llx", y_fb_dma, c_fb_dma); - ctx->drv_handle = inst; - return 0; + inst->vsi_core_ex->fb.y.dma_addr = y_fb_dma; + inst->vsi_core_ex->fb.y.size = ctx->picinfo.fb_sz[0]; + inst->vsi_core_ex->fb.c.dma_addr = c_fb_dma; + inst->vsi_core_ex->fb.c.size = ctx->picinfo.fb_sz[1]; -error_free_inst: - kfree(inst); - return err; + inst->vsi_core_ex->dec.vdec_fb_va = (unsigned long)fb; + inst->vsi_core_ex->dec.nal_info = share_info->nal_info; + + inst->vsi_core_ex->ube.dma_addr = lat_buf->ctx->msg_queue.wdma_addr.dma_addr; + inst->vsi_core_ex->ube.size = lat_buf->ctx->msg_queue.wdma_addr.size; + + inst->vsi_core_ex->err_map.dma_addr = lat_buf->wdma_err_addr.dma_addr; + inst->vsi_core_ex->err_map.size = lat_buf->wdma_err_addr.size; + + inst->vsi_core_ex->slice_bc.dma_addr = lat_buf->slice_bc_addr.dma_addr; + inst->vsi_core_ex->slice_bc.size = lat_buf->slice_bc_addr.size; + + inst->vsi_core_ex->row_info.dma_addr = 0; + inst->vsi_core_ex->row_info.size = 0; + + inst->vsi_core_ex->trans.dma_addr = share_info->trans_start; + inst->vsi_core_ex->trans.dma_addr_end = share_info->trans_end; + + for (i = 0; i < H264_MAX_MV_NUM; i++) { + mem = &inst->mv_buf[i]; + inst->vsi_core_ex->mv_buf_dma[i].dma_addr = mem->dma_addr; + inst->vsi_core_ex->mv_buf_dma[i].size = mem->size; + } + + vb2_v4l2 = v4l2_m2m_next_dst_buf(ctx->m2m_ctx); + v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, vb2_v4l2, true); + + return 0; } -static void vdec_h264_slice_deinit(void *h_vdec) +static int vdec_h264_slice_core_decode_ex(struct vdec_lat_buf *lat_buf) { - struct vdec_h264_slice_inst *inst = h_vdec; + int err, timeout; + struct mtk_vcodec_dec_ctx *ctx = lat_buf->ctx; + struct vdec_h264_slice_inst *inst = ctx->drv_handle; + struct vdec_h264_slice_share_info *share_info = lat_buf->private_data; + struct vdec_vpu_inst *vpu = &inst->vpu; - vpu_dec_deinit(&inst->vpu); - vdec_h264_slice_free_mv_buf(inst); - vdec_msg_queue_deinit(&inst->ctx->msg_queue, inst->ctx); + mtk_vdec_debug(ctx, "[h264-core] vdec_h264 core decode"); + memcpy(&inst->vsi_core_ex->h264_slice_params, &share_info->h264_slice_params, + sizeof(share_info->h264_slice_params)); - kfree(inst); + err = vdec_h264_slice_setup_core_buffer_ex(inst, share_info, lat_buf); + if (err) + goto vdec_dec_end; + + vdec_h264_slice_fill_decode_reflist(inst, &inst->vsi_core_ex->h264_slice_params, + share_info); + err = vpu_dec_core(vpu); + if (err) { + mtk_vdec_err(ctx, "core decode err=%d", err); + goto vdec_dec_end; + } + + /* wait decoder done interrupt */ + timeout = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, + WAIT_INTR_TIMEOUT_MS, MTK_VDEC_CORE); + if (timeout) + mtk_vdec_err(ctx, "core decode timeout: pic_%d", ctx->decoded_frame_cnt); + inst->vsi_core_ex->dec.timeout = !!timeout; + + vpu_dec_core_end(vpu); + mtk_vdec_debug(ctx, "pic[%d] crc: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x", + ctx->decoded_frame_cnt, + inst->vsi_core_ex->dec.crc[0], inst->vsi_core_ex->dec.crc[1], + inst->vsi_core_ex->dec.crc[2], inst->vsi_core_ex->dec.crc[3], + inst->vsi_core_ex->dec.crc[4], inst->vsi_core_ex->dec.crc[5], + inst->vsi_core_ex->dec.crc[6], inst->vsi_core_ex->dec.crc[7]); + +vdec_dec_end: + vdec_msg_queue_update_ube_rptr(&lat_buf->ctx->msg_queue, share_info->trans_end); + ctx->dev->vdec_pdata->cap_to_disp(ctx, !!err, lat_buf->vb2_v4l2_src); + mtk_vdec_debug(ctx, "core decode done err=%d", err); + ctx->decoded_frame_cnt++; + return 0; } static int vdec_h264_slice_core_decode(struct vdec_lat_buf *lat_buf) @@ -559,6 +728,127 @@ static void vdec_h264_insert_startcode(struct mtk_vcodec_dec_dev *vcodec_dev, un (*bs_size) += 4; } +static int vdec_h264_slice_lat_decode_ex(void *h_vdec, struct mtk_vcodec_mem *bs, + struct vdec_fb *fb, bool *res_chg) +{ + struct vdec_h264_slice_inst *inst = h_vdec; + struct vdec_vpu_inst *vpu = &inst->vpu; + struct mtk_video_dec_buf *src_buf_info; + int err, timeout = 0; + unsigned int data[2]; + struct vdec_lat_buf *lat_buf; + struct vdec_h264_slice_share_info *share_info; + + if (vdec_msg_queue_init(&inst->ctx->msg_queue, inst->ctx, + vdec_h264_slice_core_decode_ex, + sizeof(*share_info))) + return -ENOMEM; + + /* bs NULL means flush decoder */ + if (!bs) { + vdec_msg_queue_wait_lat_buf_full(&inst->ctx->msg_queue); + return vpu_dec_reset(vpu); + } + + if (inst->is_field_bitstream) + return -EINVAL; + + lat_buf = vdec_msg_queue_dqbuf(&inst->ctx->msg_queue.lat_ctx); + if (!lat_buf) { + mtk_vdec_debug(inst->ctx, "failed to get lat buffer"); + return -EAGAIN; + } + share_info = lat_buf->private_data; + src_buf_info = container_of(bs, struct mtk_video_dec_buf, bs_buffer); + + lat_buf->vb2_v4l2_src = &src_buf_info->m2m_buf.vb; + v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, &lat_buf->ts_info, true); + + err = vdec_h264_slice_fill_decode_parameters(inst, share_info, + &inst->vsi_ex->h264_slice_params); + if (err) + goto err_free_fb_out; + + vdec_h264_insert_startcode(inst->ctx->dev, bs->va, &bs->size, + &share_info->h264_slice_params.pps); + + *res_chg = inst->resolution_changed; + if (inst->resolution_changed) { + mtk_vdec_debug(inst->ctx, "- resolution changed -"); + if (inst->realloc_mv_buf) { + err = vdec_h264_slice_alloc_mv_buf(inst, &inst->ctx->picinfo); + inst->realloc_mv_buf = false; + if (err) + goto err_free_fb_out; + } + inst->resolution_changed = false; + } + + vdec_h264_slice_setup_lat_buffer_ex(inst, bs, lat_buf); + mtk_vdec_debug(inst->ctx, "lat:trans(0x%llx 0x%lx) err:0x%llx", + inst->vsi_ex->ube.dma_addr, (unsigned long)inst->vsi_ex->ube.size, + inst->vsi_ex->err_map.dma_addr); + + mtk_vdec_debug(inst->ctx, "slice(0x%llx 0x%lx) rprt((0x%llx 0x%llx))", + inst->vsi_ex->slice_bc.dma_addr, (unsigned long)inst->vsi_ex->slice_bc.size, + inst->vsi_ex->trans.dma_addr, inst->vsi_ex->trans.dma_addr_end); + + err = vpu_dec_start(vpu, data, 2); + if (err) { + mtk_vdec_debug(inst->ctx, "lat decode err: %d", err); + goto err_free_fb_out; + } + + share_info->trans_end = inst->ctx->msg_queue.wdma_addr.dma_addr + + inst->vsi_ex->dec.wdma_end_addr_offset; + + share_info->trans_start = inst->ctx->msg_queue.wdma_wptr_addr; + share_info->nal_info = inst->vsi_ex->dec.nal_info; + + if (IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) { + memcpy(&share_info->h264_slice_params, &inst->vsi_ex->h264_slice_params, + sizeof(share_info->h264_slice_params)); + vdec_msg_queue_qbuf(&inst->ctx->msg_queue.core_ctx, lat_buf); + } + + /* wait decoder done interrupt */ + timeout = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, + WAIT_INTR_TIMEOUT_MS, MTK_VDEC_LAT0); + if (timeout) + mtk_vdec_err(inst->ctx, "lat decode timeout: pic_%d", inst->slice_dec_num); + inst->vsi_ex->dec.timeout = !!timeout; + + err = vpu_dec_end(vpu); + if (err == SLICE_HEADER_FULL || err == TRANS_BUFFER_FULL) { + if (!IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) + vdec_msg_queue_qbuf(&inst->ctx->msg_queue.lat_ctx, lat_buf); + inst->slice_dec_num++; + mtk_vdec_err(inst->ctx, "lat dec fail: pic_%d err:%d", inst->slice_dec_num, err); + return -EINVAL; + } + + share_info->trans_end = inst->ctx->msg_queue.wdma_addr.dma_addr + + inst->vsi_ex->dec.wdma_end_addr_offset; + + vdec_msg_queue_update_ube_wptr(&lat_buf->ctx->msg_queue, share_info->trans_end); + + if (!IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) { + memcpy(&share_info->h264_slice_params, &inst->vsi_ex->h264_slice_params, + sizeof(share_info->h264_slice_params)); + vdec_msg_queue_qbuf(&inst->ctx->msg_queue.core_ctx, lat_buf); + } + mtk_vdec_debug(inst->ctx, "dec num: %d lat crc: 0x%x 0x%x 0x%x", inst->slice_dec_num, + inst->vsi_ex->dec.crc[0], inst->vsi_ex->dec.crc[1], + inst->vsi_ex->dec.crc[2]); + + inst->slice_dec_num++; + return 0; +err_free_fb_out: + vdec_msg_queue_qbuf(&inst->ctx->msg_queue.lat_ctx, lat_buf); + mtk_vdec_err(inst->ctx, "slice dec number: %d err: %d", inst->slice_dec_num, err); + return err; +} + static int vdec_h264_slice_lat_decode(void *h_vdec, struct mtk_vcodec_mem *bs, struct vdec_fb *fb, bool *res_chg) { @@ -704,18 +994,17 @@ static int vdec_h264_slice_lat_decode(void *h_vdec, struct mtk_vcodec_mem *bs, return err; } -static int vdec_h264_slice_single_decode(void *h_vdec, struct mtk_vcodec_mem *bs, - struct vdec_fb *unused, bool *res_chg) +static int vdec_h264_slice_single_decode_ex(void *h_vdec, struct mtk_vcodec_mem *bs, + struct vdec_fb *unused, bool *res_chg) { struct vdec_h264_slice_inst *inst = h_vdec; struct vdec_vpu_inst *vpu = &inst->vpu; struct mtk_video_dec_buf *src_buf_info, *dst_buf_info; struct vdec_fb *fb; - unsigned char *buf; unsigned int data[2], i; u64 y_fb_dma, c_fb_dma; struct mtk_vcodec_mem *mem; - int err, nal_start_idx; + int err; /* bs NULL means flush decoder */ if (!bs) @@ -735,6 +1024,96 @@ static int vdec_h264_slice_single_decode(void *h_vdec, struct mtk_vcodec_mem *bs mtk_vdec_debug(inst->ctx, "[h264-dec] [%d] y_dma=%llx c_dma=%llx", inst->ctx->decoded_frame_cnt, y_fb_dma, c_fb_dma); + inst->vsi_ctx_ex.bs.dma_addr = (u64)bs->dma_addr; + inst->vsi_ctx_ex.bs.size = bs->size; + inst->vsi_ctx_ex.fb.y.dma_addr = y_fb_dma; + inst->vsi_ctx_ex.fb.c.dma_addr = c_fb_dma; + inst->vsi_ctx_ex.dec.vdec_fb_va = (u64)(uintptr_t)fb; + + v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, + &dst_buf_info->m2m_buf.vb, true); + err = get_vdec_sig_decode_parameters(inst); + if (err) + goto err_free_fb_out; + + memcpy(&inst->vsi_ctx_ex.h264_slice_params, &inst->h264_slice_param, + sizeof(inst->vsi_ctx_ex.h264_slice_params)); + + *res_chg = inst->resolution_changed; + if (inst->resolution_changed) { + mtk_vdec_debug(inst->ctx, "- resolution changed -"); + if (inst->realloc_mv_buf) { + err = vdec_h264_slice_alloc_mv_buf(inst, &inst->ctx->picinfo); + inst->realloc_mv_buf = false; + if (err) + goto err_free_fb_out; + } + inst->resolution_changed = false; + + for (i = 0; i < H264_MAX_MV_NUM; i++) { + mem = &inst->mv_buf[i]; + inst->vsi_ctx_ex.mv_buf_dma[i].dma_addr = mem->dma_addr; + } + } + + memcpy(inst->vpu.vsi, &inst->vsi_ctx_ex, sizeof(inst->vsi_ctx_ex)); + err = vpu_dec_start(vpu, data, 2); + if (err) + goto err_free_fb_out; + + /* wait decoder done interrupt */ + err = mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, + WAIT_INTR_TIMEOUT_MS, MTK_VDEC_CORE); + if (err) + mtk_vdec_err(inst->ctx, "decode timeout: pic_%d", inst->ctx->decoded_frame_cnt); + + inst->vsi_ex->dec.timeout = !!err; + err = vpu_dec_end(vpu); + if (err) + goto err_free_fb_out; + + memcpy(&inst->vsi_ctx_ex, inst->vpu.vsi, sizeof(inst->vsi_ctx_ex)); + mtk_vdec_debug(inst->ctx, "pic[%d] crc: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x", + inst->ctx->decoded_frame_cnt, + inst->vsi_ctx_ex.dec.crc[0], inst->vsi_ctx_ex.dec.crc[1], + inst->vsi_ctx_ex.dec.crc[2], inst->vsi_ctx_ex.dec.crc[3], + inst->vsi_ctx_ex.dec.crc[4], inst->vsi_ctx_ex.dec.crc[5], + inst->vsi_ctx_ex.dec.crc[6], inst->vsi_ctx_ex.dec.crc[7]); + + inst->ctx->decoded_frame_cnt++; + return 0; + +err_free_fb_out: + mtk_vdec_err(inst->ctx, "dec frame number: %d err: %d", inst->ctx->decoded_frame_cnt, err); + return err; +} + +static int vdec_h264_slice_single_decode(void *h_vdec, struct mtk_vcodec_mem *bs, + struct vdec_fb *unused, bool *res_chg) +{ + struct vdec_h264_slice_inst *inst = h_vdec; + struct vdec_vpu_inst *vpu = &inst->vpu; + struct mtk_video_dec_buf *src_buf_info, *dst_buf_info; + struct vdec_fb *fb; + unsigned char *buf; + unsigned int data[2], i; + u64 y_fb_dma, c_fb_dma; + struct mtk_vcodec_mem *mem; + int err, nal_start_idx; + + /* bs NULL means flush decoder */ + if (!bs) + return vpu_dec_reset(vpu); + + fb = inst->ctx->dev->vdec_pdata->get_cap_buffer(inst->ctx); + src_buf_info = container_of(bs, struct mtk_video_dec_buf, bs_buffer); + dst_buf_info = container_of(fb, struct mtk_video_dec_buf, frame_buffer); + + y_fb_dma = fb ? (u64)fb->base_y.dma_addr : 0; + c_fb_dma = fb ? (u64)fb->base_c.dma_addr : 0; + mtk_vdec_debug(inst->ctx, "[h264-dec] [%d] y_dma=%llx c_dma=%llx", + inst->ctx->decoded_frame_cnt, y_fb_dma, c_fb_dma); + inst->vsi_ctx.dec.bs_buf_addr = (u64)bs->dma_addr; inst->vsi_ctx.dec.bs_buf_size = bs->size; inst->vsi_ctx.dec.y_fb_dma = y_fb_dma; @@ -807,21 +1186,95 @@ static int vdec_h264_slice_single_decode(void *h_vdec, struct mtk_vcodec_mem *bs return err; } +static int vdec_h264_slice_init(struct mtk_vcodec_dec_ctx *ctx) +{ + struct vdec_h264_slice_inst *inst; + int err, vsi_size; + unsigned char *temp; + + inst = kzalloc(sizeof(*inst), GFP_KERNEL); + if (!inst) + return -ENOMEM; + + inst->ctx = ctx; + + inst->vpu.id = SCP_IPI_VDEC_LAT; + inst->vpu.core_id = SCP_IPI_VDEC_CORE; + inst->vpu.ctx = ctx; + inst->vpu.codec_type = ctx->current_codec; + inst->vpu.capture_type = ctx->capture_fourcc; + + err = vpu_dec_init(&inst->vpu); + if (err) { + mtk_vdec_err(ctx, "vdec_h264 init err=%d", err); + goto error_free_inst; + } + + if (IS_VDEC_SUPPORT_EX(ctx->dev->dec_capability)) { + vsi_size = sizeof(struct vdec_h264_slice_vsi_ex); + + vsi_size = round_up(vsi_size, VCODEC_DEC_ALIGNED_64); + inst->vsi_ex = inst->vpu.vsi; + temp = (unsigned char *)inst->vsi_ex; + inst->vsi_core_ex = (struct vdec_h264_slice_vsi_ex *)(temp + vsi_size); + + if (inst->ctx->dev->vdec_pdata->hw_arch == MTK_VDEC_PURE_SINGLE_CORE) + inst->decode = vdec_h264_slice_single_decode_ex; + else + inst->decode = vdec_h264_slice_lat_decode_ex; + } else { + vsi_size = sizeof(struct vdec_h264_slice_vsi); + + vsi_size = round_up(vsi_size, VCODEC_DEC_ALIGNED_64); + inst->vsi = inst->vpu.vsi; + temp = (unsigned char *)inst->vsi; + inst->vsi_core = (struct vdec_h264_slice_vsi *)(temp + vsi_size); + + if (inst->ctx->dev->vdec_pdata->hw_arch == MTK_VDEC_PURE_SINGLE_CORE) + inst->decode = vdec_h264_slice_single_decode; + else + inst->decode = vdec_h264_slice_lat_decode; + } + inst->resolution_changed = true; + inst->realloc_mv_buf = true; + + mtk_vdec_debug(ctx, "lat struct size = %d,%d,%d,%d vsi: %d\n", + (int)sizeof(struct mtk_h264_sps_param), + (int)sizeof(struct mtk_h264_pps_param), + (int)sizeof(struct vdec_h264_slice_lat_dec_param), + (int)sizeof(struct mtk_h264_dpb_info), + vsi_size); + mtk_vdec_debug(ctx, "lat H264 instance >> %p, codec_type = 0x%x", + inst, inst->vpu.codec_type); + + ctx->drv_handle = inst; + return 0; + +error_free_inst: + kfree(inst); + return err; +} + +static void vdec_h264_slice_deinit(void *h_vdec) +{ + struct vdec_h264_slice_inst *inst = h_vdec; + + vpu_dec_deinit(&inst->vpu); + vdec_h264_slice_free_mv_buf(inst); + vdec_msg_queue_deinit(&inst->ctx->msg_queue, inst->ctx); + + kfree(inst); +} + static int vdec_h264_slice_decode(void *h_vdec, struct mtk_vcodec_mem *bs, struct vdec_fb *unused, bool *res_chg) { struct vdec_h264_slice_inst *inst = h_vdec; - int ret; if (!h_vdec) return -EINVAL; - if (inst->ctx->dev->vdec_pdata->hw_arch == MTK_VDEC_PURE_SINGLE_CORE) - ret = vdec_h264_slice_single_decode(h_vdec, bs, unused, res_chg); - else - ret = vdec_h264_slice_lat_decode(h_vdec, bs, unused, res_chg); - - return ret; + return inst->decode(h_vdec, bs, unused, res_chg); } static int vdec_h264_slice_get_param(void *h_vdec, enum vdec_get_param_type type, From patchwork Fri Nov 8 03:40:12 2024 Content-Type: text/plain; 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Fri, 08 Nov 2024 11:40:27 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 8 Nov 2024 11:40:24 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 8 Nov 2024 11:40:23 +0800 From: Yunfei Dong To: =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= , Sebastian Fricke , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Nathan Hebert CC: Hsin-Yi Wang , Chen-Yu Tsai , Fritz Koenig , Daniel Vetter , "Steve Cho" , Yunfei Dong , , , , , , Subject: [PATCH v4 3/3] media: mediatek: vcodec: add description for vsi struct Date: Fri, 8 Nov 2024 11:40:12 +0800 Message-ID: <20241108034019.20064-4-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241108034019.20064-1-yunfei.dong@mediatek.com> References: <20241108034019.20064-1-yunfei.dong@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--5.519500-8.000000 X-TMASE-MatchedRID: +ngMWxkROpD4Q348LKfXODTV/B1Uu+XCIfZjRfGTydh30F1387KCPeFC 6BP4FUP+tPz1mNVqu0woX6fjWPUAloJiDh6eUBMR4RtSDjG+z7ACnYfpEgyUOJsoi2XrUn/Jn6K dMrRsL14qtq5d3cxkNZd/mwLf2BVUtX6FTdeBEpDL97e0jrsKJNgI91Ytj1EagfpknKz4xIGUTG VAhB5EbQ== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--5.519500-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: F4778ECA64CBFF029DEE0544CE99F8F850A81C507F4D2D16539D5C45192053932000:8 X-MTK: N If the video shared information (vsi) is changed accidentally, will leading to play h264 bitstream fail if the firmware won't be changed at the same time. Marking the shared struct with "shared interface with firmware". Signed-off-by: Yunfei Dong Reviewed-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- .../mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c index 238639a07703..eef6dd548625 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c @@ -30,6 +30,7 @@ enum vdec_h264_core_dec_err_type { /** * struct vdec_h264_slice_lat_dec_param - parameters for decode current frame + * (shared interface with firmware) * * @sps: h264 sps syntax parameters * @pps: h264 pps syntax parameters @@ -48,7 +49,7 @@ struct vdec_h264_slice_lat_dec_param { }; /** - * struct vdec_h264_slice_info - decode information + * struct vdec_h264_slice_info - decode information (shared interface with firmware) * * @nal_info: nal info of current picture * @timeout: Decode timeout: 1 timeout, 0 no timeout @@ -72,7 +73,7 @@ struct vdec_h264_slice_info { /** * struct vdec_h264_slice_vsi - shared memory for decode information exchange - * between SCP and Host. + * between SCP and Host (shared interface with firmware). * * @wdma_err_addr: wdma error dma address * @wdma_start_addr: wdma start dma address