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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.35.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:35:46 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 01/25] clk: renesas: r9a08g045-cpg: Add clocks, resets and power domains support for SSI Date: Wed, 13 Nov 2024 15:35:16 +0200 Message-Id: <20241113133540.2005850-2-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add SSI clocks, resets and power domains support for the SSI blocks available on the Renesas RZ/G3S SoC. Reviewed-by: Biju Das Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- Changes in v3: - collected tags Changes in v2: - none drivers/clk/renesas/r9a08g045-cpg.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/clk/renesas/r9a08g045-cpg.c b/drivers/clk/renesas/r9a08g045-cpg.c index b2ae8cdc4723..d71e77624fac 100644 --- a/drivers/clk/renesas/r9a08g045-cpg.c +++ b/drivers/clk/renesas/r9a08g045-cpg.c @@ -209,6 +209,14 @@ static const struct rzg2l_mod_clk r9a08g045_mod_clks[] = { DEF_MOD("sdhi2_imclk2", R9A08G045_SDHI2_IMCLK2, CLK_SD2_DIV4, 0x554, 9), DEF_MOD("sdhi2_clk_hs", R9A08G045_SDHI2_CLK_HS, R9A08G045_CLK_SD2, 0x554, 10), DEF_MOD("sdhi2_aclk", R9A08G045_SDHI2_ACLK, R9A08G045_CLK_P1, 0x554, 11), + DEF_MOD("ssi0_pclk", R9A08G045_SSI0_PCLK2, R9A08G045_CLK_P0, 0x570, 0), + DEF_MOD("ssi0_sfr", R9A08G045_SSI0_PCLK_SFR, R9A08G045_CLK_P0, 0x570, 1), + DEF_MOD("ssi1_pclk", R9A08G045_SSI1_PCLK2, R9A08G045_CLK_P0, 0x570, 2), + DEF_MOD("ssi1_sfr", R9A08G045_SSI1_PCLK_SFR, R9A08G045_CLK_P0, 0x570, 3), + DEF_MOD("ssi2_pclk", R9A08G045_SSI2_PCLK2, R9A08G045_CLK_P0, 0x570, 4), + DEF_MOD("ssi2_sfr", R9A08G045_SSI2_PCLK_SFR, R9A08G045_CLK_P0, 0x570, 5), + DEF_MOD("ssi3_pclk", R9A08G045_SSI3_PCLK2, R9A08G045_CLK_P0, 0x570, 6), + DEF_MOD("ssi3_sfr", R9A08G045_SSI3_PCLK_SFR, R9A08G045_CLK_P0, 0x570, 7), DEF_MOD("usb0_host", R9A08G045_USB_U2H0_HCLK, R9A08G045_CLK_P1, 0x578, 0), DEF_MOD("usb1_host", R9A08G045_USB_U2H1_HCLK, R9A08G045_CLK_P1, 0x578, 1), DEF_MOD("usb0_func", R9A08G045_USB_U2P_EXR_CPUCLK, R9A08G045_CLK_P1, 0x578, 2), @@ -238,6 +246,10 @@ static const struct rzg2l_reset r9a08g045_resets[] = { DEF_RST(R9A08G045_SDHI0_IXRST, 0x854, 0), DEF_RST(R9A08G045_SDHI1_IXRST, 0x854, 1), DEF_RST(R9A08G045_SDHI2_IXRST, 0x854, 2), + DEF_RST(R9A08G045_SSI0_RST_M2_REG, 0x870, 0), + DEF_RST(R9A08G045_SSI1_RST_M2_REG, 0x870, 1), + DEF_RST(R9A08G045_SSI2_RST_M2_REG, 0x870, 2), + DEF_RST(R9A08G045_SSI3_RST_M2_REG, 0x870, 3), DEF_RST(R9A08G045_USB_U2H0_HRESETN, 0x878, 0), DEF_RST(R9A08G045_USB_U2H1_HRESETN, 0x878, 1), DEF_RST(R9A08G045_USB_U2P_EXL_SYSRST, 0x878, 2), @@ -286,6 +298,14 @@ static const struct rzg2l_cpg_pm_domain_init_data r9a08g045_pm_domains[] = { DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, BIT(1)), 0), DEF_PD("sdhi2", R9A08G045_PD_SDHI2, DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, BIT(11)), 0), + DEF_PD("ssi0", R9A08G045_PD_SSI0, + DEF_REG_CONF(CPG_BUS_MCPU1_MSTOP, BIT(10)), 0), + DEF_PD("ssi1", R9A08G045_PD_SSI1, + DEF_REG_CONF(CPG_BUS_MCPU1_MSTOP, BIT(11)), 0), + DEF_PD("ssi2", R9A08G045_PD_SSI2, + DEF_REG_CONF(CPG_BUS_MCPU1_MSTOP, BIT(12)), 0), + DEF_PD("ssi3", R9A08G045_PD_SSI3, + DEF_REG_CONF(CPG_BUS_MCPU1_MSTOP, BIT(13)), 0), DEF_PD("usb0", R9A08G045_PD_USB0, DEF_REG_CONF(CPG_BUS_PERI_COM_MSTOP, GENMASK(6, 5)), 0), DEF_PD("usb1", R9A08G045_PD_USB1, From patchwork Wed Nov 13 13:35:18 2024 Content-Type: text/plain; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.35.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:35:51 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea , Krzysztof Kozlowski Subject: [PATCH v3 03/25] dt-bindings: clock: versaclock3: Document 5L35023 Versa3 clock generator Date: Wed, 13 Nov 2024 15:35:18 +0200 Message-Id: <20241113133540.2005850-4-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea There are some differences b/w 5L35023 and 5P35023 Versa3 clock generator variants but the same driver could be used with minimal adjustments. The identified differences are PLL2 Fvco, the clock sel bit for SE2 clock and different default values for some registers. Acked-by: Krzysztof Kozlowski Reviewed-by: Biju Das Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- Changes in v3: - collected tags Changes in v2: - collected tags Documentation/devicetree/bindings/clock/renesas,5p35023.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml b/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml index 42b6f80613f3..162d38035188 100644 --- a/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml @@ -31,6 +31,7 @@ description: | properties: compatible: enum: + - renesas,5l35023 - renesas,5p35023 reg: From patchwork Wed Nov 13 13:35:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 842984 Received: from mail-lf1-f53.google.com (mail-lf1-f53.google.com [209.85.167.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 574BD201267 for ; Wed, 13 Nov 2024 13:35:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504960; cv=none; b=cV9EhJpsXPVTMKnZUE6F2CzyK55mNE6aMlISx9G9XETFqJnwYvsJcTMHOprR/JuAvJKZX10idAvhZLml9oSkQngMGT4gtqiEX7YBVeRwtw81AplOCFNnPyGH1Zc5fcOdWu9NLoEG9ZZ/ys6kuKVtoTSe8WdeBSG5ZTqCdbhn60M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504960; c=relaxed/simple; bh=hsInE9S4S/vwenjeM66DD4/pCHktkvyL4wYR/f21JYc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=uRqqnjdRYKBNKMfPrE6twA62S+sRujcVadEIN6cCv7jQsfLX+GvJ8JJQwJTUMqbzAWwi1RwYkNnLt+F9A5UWFE+MIsX8uNAre4VMs1gu1B64g/hnfNP0425HbIGM90/goAe1SC+hyFpYyi5r85eYLKa43/rcNBHQxZllgGkF68U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=YcYu1xGk; arc=none smtp.client-ip=209.85.167.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="YcYu1xGk" Received: by mail-lf1-f53.google.com with SMTP id 2adb3069b0e04-53da3b911b9so166404e87.2 for ; Wed, 13 Nov 2024 05:35:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504955; x=1732109755; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zMlZeixiliINj2sB8B/Hsjodp45t1qy+/EotEbzHeIE=; b=YcYu1xGkwpljYym8LpPMHKuiZvIvXup09ZYCunlEKTd8XO+zpH5qEgnw/ApWezX6Bo JgTEz2elBcZXHxf0hRuZmEamkdek1ymaRorKkyZvN/dDhRasl9C+c3lRDjLhFt/jMgvG 4g72FdMdxMT3ba9Oa/i7XqUqd7M93JxQOJih9MaUGVqDPZm68G95cOcABY2J0wNt0BE5 DgXrLqdamji13Dzrn8joilMR6Xs8gsyqcEwvsK+d5D1qU/8okfAuscHf1UAibMTloRX7 OhB8XT397jgrLdQhOjwcm/PblL/GnbtoUU0+sBSVdz2QABuGFI+5YGS238xZgyAJY96t bBmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504955; x=1732109755; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zMlZeixiliINj2sB8B/Hsjodp45t1qy+/EotEbzHeIE=; b=SQ5xQzatLksKzRnAeFt+ASideDFKIbF3qj6uFvOOTBmS3k81QT04UEH1XBuVY0Xgtm IMRnQJHlglYBhqW3bgfMrSQ1QfflwO3kE83IF7E91JnEGaRwnaWrxr/mnq6J30ILXcN5 TWb13KBM/ej6OQYegF/x+Y7cHa6DWb3m1oUfupIkYaFRY7Q072DaZe+eYR9XwRTJ0oH6 TYgPUCecaiWWuq66ZrpBvhtDSMv+Gw4IRUiYXRVttF/Xj7mYQT1Eny9DT5xd0yl9odOp S6aEjOPVSQbMPH7pz6WOa/Z79nZ2llvemSAzOqXyHgvSBKnH1cmfZsiXj2sfWTa3mp8m ZQ+g== X-Forwarded-Encrypted: i=1; AJvYcCWswwr5x1I1YjNVyAP0Bt/+Xzp8w/7ZHQKYDdkuDTdRFEtnY2Lh45pulXz8U53Tdr4Ksggv/FinLZxI@vger.kernel.org X-Gm-Message-State: AOJu0YzJXvy36zTu0aKJPiU61FVy5vU8LY8Sg6ixW5HIev5KmUWFC8dx WzbZkWhDEsJ/W9gEg7AtqgbmsciK1Cp8F2RkbKxcmHp1wFmWoftMDY4d3HCBhP+eyPd6HcmWk8M U X-Google-Smtp-Source: AGHT+IFDoqWlc+LYE1IHHSkdT7sRQOeKuofe1Yq22n5/D6CUznab7ngU7zpCUFlNPYH6frvj2r8HUw== X-Received: by 2002:a05:6512:3da0:b0:539:8fcd:524 with SMTP id 2adb3069b0e04-53d9fe8ad7cmr1333681e87.30.1731504955530; Wed, 13 Nov 2024 05:35:55 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.35.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:35:55 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 05/25] pinctrl: renesas: rzg2l: Add audio clock pins Date: Wed, 13 Nov 2024 15:35:20 +0200 Message-Id: <20241113133540.2005850-6-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add audio clock pins. These are used by audio IPs as input pins to feed them with audio clocks. Reviewed-by: Biju Das Signed-off-by: Claudiu Beznea Acked-by: Linus Walleij Reviewed-by: Geert Uytterhoeven --- Changes in v3: - collected tags Changes in v2: - none drivers/pinctrl/renesas/pinctrl-rzg2l.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 8ffb9430a134..1190ca4b1808 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -2086,6 +2086,8 @@ static const struct rzg2l_dedicated_configs rzg3s_dedicated_pins[] = { PIN_CFG_SOFT_PS)) }, { "TDO", RZG2L_SINGLE_PIN_PACK(0x1, 1, (PIN_CFG_IOLH_A | PIN_CFG_SOFT_PS)) }, { "WDTOVF_PERROUT#", RZG2L_SINGLE_PIN_PACK(0x6, 0, PIN_CFG_IOLH_A | PIN_CFG_SOFT_PS) }, + { "AUDIO_CLK1", RZG2L_SINGLE_PIN_PACK(0x2, 0, PIN_CFG_IEN) }, + { "AUDIO_CLK2", RZG2L_SINGLE_PIN_PACK(0x2, 1, PIN_CFG_IEN) }, { "SD0_CLK", RZG2L_SINGLE_PIN_PACK(0x10, 0, (PIN_CFG_IOLH_B | PIN_CFG_IO_VMC_SD0)) }, { "SD0_CMD", RZG2L_SINGLE_PIN_PACK(0x10, 1, (PIN_CFG_IOLH_B | PIN_CFG_IEN | PIN_CFG_IO_VMC_SD0)) }, From patchwork Wed Nov 13 13:35:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 842983 Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 82C27202F80 for ; Wed, 13 Nov 2024 13:36:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504963; cv=none; b=svzlM56swDcxfCcCFvlDqkL89DeJivWi3IEzHEila9Rv8D3WDZ4whxbbZ67UJ0xUJEOX3y3VHDFnzV20WOljn9EDqaqpMejFvCOaz627kE404PkaY5B5oePfrmTyGUiPEQ8qqfqIUtNeIPL0g9iObo4wuhYoV63/9AGI3RsXOEg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504963; c=relaxed/simple; bh=Sz1PAChDcM9B6CCJvpuwCd6OJsVNXMcyHPYNhDbm9c8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=NYhUrmGeVEobgq4aKEMadwC6UYQqSMlBonxiNeLpcOjFLMShcXsSFYt3O282eAOYVQGuy8QcYN6V0nqChYKuEyULq2WIEirCLN6mGMcGY1eU+5EO6xx/ThAKIyYQeOtY512POhIftTC0ZneY9CzZYNx8NbVdywMNYTG0ne5ie7E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=fK3gTN7j; arc=none smtp.client-ip=209.85.128.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="fK3gTN7j" Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-431548bd1b4so59256935e9.3 for ; Wed, 13 Nov 2024 05:36:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504960; x=1732109760; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AaN72J9oCjuJRB7FXPQLRWlL5CXlKXSOkEeKQxWmO0E=; b=fK3gTN7jiIIAtO3rkYMWViQ7kwSobDSblhvVDlndpe8/9iBB8nAKVldreAUVzg+SvA jKcupWdRqJOsqZo0jrgpnYR3AxsWnylOhulll5e/7AgSkuEaoE2S23U1Qa5LdZcNufjB H06/HXplKzimOfo3qluFqCrbOFUzTwYl3MIpVBKCkghTZS35KjrTRK9vjBSy6RxKMrWZ zjxmHCHQMy/8SBP/jjgGJpz6NRvWFbisVKSILQxHj3V6Bvd6vgXsJSlQuIsgxyXcCrNf aCYLHETVCdvlZa42tE32LP2ieOw97zYs4XNnQWm48SvoeVSjQBCQYEoE2lQd2YTbH59l zQdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504960; x=1732109760; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AaN72J9oCjuJRB7FXPQLRWlL5CXlKXSOkEeKQxWmO0E=; b=G8nGlyrapFpJqEacT0Fb8ufQezm9PprXZuGgVIhzs8Ahj7uEThtgeNESIA5JSsHLUY KINGKT8onopZAqpdySeY3BtD8Pf5sb3e3IxAtos11ZUWnJCNXQopMe/nKhSp/ZgtRh7p 6qgAb3Fa4g4CxWFiK/hr3G3uVTRZ5zrTK/dnSbja2YK+Yn6EShDhGRb/n2iEThVdko5N Qr3q95dPqRrkmNfYcAKt7zgvGN52gTbld2IXfNF2hfv8CEsJ5rj4gEOZxyNZNbgSiUnm gmHfLCgF1Gz2KwLxYkJGq7h3I3Q/Mv8zOIniEaj1Q4s7k+gvJFtaxTp/TKg8g3g2km0P AnJw== X-Forwarded-Encrypted: i=1; AJvYcCWcqnMpc3KbkxCbX1ip4P20fsm/hxlJptmtcqfUYH6ykuAF4ZqW371r0CvdSpd+CPjdF9LIKPmGG3mc@vger.kernel.org X-Gm-Message-State: AOJu0Yyw1kCwnOLANoAbDEY0KmlwoalCta/rliQE5fri+utbqT31mou0 FK/gyClcPWCplIKpyi9QugiHYHdbCI0RITJ+HHy1Ijmg6m63Zcc+eQhokKa3/s8= X-Google-Smtp-Source: AGHT+IEMrNnWePZLL6c2pl45w1yaF9tt+h731CuGi4h+iBycfvBUpWEwqJT5WVYgqo485BsTWQsP3g== X-Received: by 2002:a05:600c:4f43:b0:432:d82d:6a6c with SMTP id 5b1f17b1804b1-432d82d6b43mr9287205e9.30.1731504959807; Wed, 13 Nov 2024 05:35:59 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.35.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:35:59 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 07/25] ASoC: renesas: rz-ssi: Use only the proper amount of dividers Date: Wed, 13 Nov 2024 15:35:22 +0200 Message-Id: <20241113133540.2005850-8-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea There is no need to populate the ckdv[] with invalid dividers as that part will not be indexed anyway. The ssi->audio_mck/bclk_rate should always be >= 0. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 2d8721156099..b4439505929f 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -258,8 +258,7 @@ static void rz_ssi_stream_quit(struct rz_ssi_priv *ssi, static int rz_ssi_clk_setup(struct rz_ssi_priv *ssi, unsigned int rate, unsigned int channels) { - static s8 ckdv[16] = { 1, 2, 4, 8, 16, 32, 64, 128, - 6, 12, 24, 48, 96, -1, -1, -1 }; + static s8 ckdv[] = { 1, 2, 4, 8, 16, 32, 64, 128, 6, 12, 24, 48, 96 }; unsigned int channel_bits = 32; /* System Word Length */ unsigned long bclk_rate = rate * channels * channel_bits; unsigned int div; From patchwork Wed Nov 13 13:35:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 842982 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A793204024 for ; Wed, 13 Nov 2024 13:36:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504967; cv=none; b=OCGFukZ4CWAPhPKu0c4i/4q2OaBGkJ+1CHzOahNDTB8f79gjk10Sh3AfQcxoAetOitoK8Si6Sc66D3/oAsOHiCY7BdfI9zUsQUppyMGM3RNjlJsOuf6fUYe3AuhWCuMcQFCuqn23BNCi8n4nQsk4E8cXhnxd5StZq3cGHbEwvvU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504967; c=relaxed/simple; bh=VAScEqC+gOYlOCD5fSBTF28pUjgsQMZqDGi/b9qUFQU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ulYUd64l6bi/HBXGgFuOhLxA11olCMd2yEf0itXR/1YShKKttk4Xt6CPYXegGOsChUVHt2oR7BFcccZgCzrZIo9BxnI5w+DJaTgUVYAtrDtmpFuxPB30QHwbKGQPI4ObH28hUF9b1+U9kmm/77yyp+6GvNCHa+r5+VewG/IBdQo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=gXFZ/dcw; arc=none smtp.client-ip=209.85.128.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="gXFZ/dcw" Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-43158625112so61389465e9.3 for ; Wed, 13 Nov 2024 05:36:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504964; x=1732109764; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yLrnY5p4F2ysEeuxEX1oEYB70cmBA8D62/QBYZDMk5c=; b=gXFZ/dcwZlK3nqxfyBwoKQ8r+NXg2cUybkd7Ptb65xgpF/+kJNiXPo0DvN8JZgOwSf pFuVUQptv6e2jBltSei/CGo9hEl1qRB0nJi+6180v2ATtAR1HOM32jm0RlM/CAfy8sCz /zOutt5fHtpZGdEE/fDvQ69UvCofZFggpxPZh3xX8L2Ee3tSaGoFB93T0dxS+Yc3mmah vrEg3leih7h4jRJmC50ho7UXnfdtovyAHHxwe/ZfmlGj73bmeTOwX8bEKPjZ4Ki4X4nn C1T4XvESgfLxfu9knSEuT/zI0rpVOpfYkGXpIVV4Ii8Jlfml0oj889ySWrF/ZpFsBzxa eBzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504964; x=1732109764; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yLrnY5p4F2ysEeuxEX1oEYB70cmBA8D62/QBYZDMk5c=; b=NgU75O00g+Se33U2Dw4eBnBBv6zW5Hn2ETxLpPfhw+nwzWLKYo2bSzpfkEJpo7chll giEKm23ZIlktZkV1NWUEi1GFHqq7lJhwqlLGoGReyx0xVnv5zDhh5nlDJVunXF4S0xuJ yoNyg7qwJXuPf2dZsy6N9ef4tEO6bxPNdvdTMlHE77ul095Omr6VXhHyPVCyH84qIHjW HrDKxUE3f2fEwxtpWF4dbBzAy3g0Emckv4NLHo4ByWjMzXNrtuxJc/K6k3E0Mev7iqyj MdrkvMBnKJkRZqWs0L6OwNojvP5fE71vb2vnzXqWMi8LkHAJpDyl8Bdt5XG2gn9Pj8hK B6FA== X-Forwarded-Encrypted: i=1; AJvYcCU0msSjC0V8Xuy1/vzZGe5G0gkH4X4w7CkE+r61J27x71PSj7+tLE+m6VkRQEXLiEUaZeJ1vYkMFxlW@vger.kernel.org X-Gm-Message-State: AOJu0Yy570Ds253HoUeK+OYNwyZacDZLiBTlzSCoHzZ3q/CwxYoFVMgv dBvaN0J81JbKUYRoXYT56R4+3gGzSaqevqxVWnW8eZaqThgFV5Ii50jLURznzdM= X-Google-Smtp-Source: AGHT+IFhAKQyD7wWJYrPMxlQRcN6qIExSg3WsiPuAigIJwy4l5iZHLGTurt4LfoRew5/k7IONHIaLA== X-Received: by 2002:a05:600c:1c15:b0:431:4b88:d408 with SMTP id 5b1f17b1804b1-432b74fda4bmr168007215e9.5.1731504963709; Wed, 13 Nov 2024 05:36:03 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:03 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 09/25] ASoC: renesas: rz-ssi: Remove pdev member of struct rz_ssi_priv Date: Wed, 13 Nov 2024 15:35:24 +0200 Message-Id: <20241113133540.2005850-10-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Remove the pdev member of struct rz_ssi_priv as it is not used. Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index a4d65be17eb1..a359235b55af 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -99,7 +99,6 @@ struct rz_ssi_stream { struct rz_ssi_priv { void __iomem *base; - struct platform_device *pdev; struct reset_control *rstc; struct device *dev; struct clk *sfr_clk; @@ -1043,7 +1042,6 @@ static int rz_ssi_probe(struct platform_device *pdev) if (!ssi) return -ENOMEM; - ssi->pdev = pdev; ssi->dev = &pdev->dev; ssi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(ssi->base)) From patchwork Wed Nov 13 13:35:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 842981 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F02DF205127 for ; Wed, 13 Nov 2024 13:36:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504971; cv=none; b=celpk74G8gdEZYqag9M5Th5w/c7YrPLinDlVnxGSm6j6xOyMxoKGfD5N27YHGDiHtSU0b31FJgkGQ8kZ+T/pTbbLmvTL6pILV4F7xBbbvNptPwKe71DBcH71A6UcWOyifLBcZTd3CDMZZn+pKWO0ux703ZF9kODS3qrhyZ0YrEI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504971; c=relaxed/simple; bh=bcuv/Z+JYnKCJCaQbVftUSfcWAvwQCjEjjPAWiaXpwA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=U8W0qJMHr6QSA1YM2tp5HY52SdegPtnmr2k8TICJTjiXuJzs2wVgQQALgei6OdtJVWp5Nn5jLfS9V/vDyVOvZYJTsyV8WEP3XNEd+CW3B6HPnEb25tUhMjIlwVINhsZq+PVo+BNBW06+nC9gVu9SrQpr6JZLhsCFIiE46bvJe6g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=NRQTING4; arc=none smtp.client-ip=209.85.128.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="NRQTING4" Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-43158625112so61390095e9.3 for ; Wed, 13 Nov 2024 05:36:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504967; x=1732109767; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+RYfRSDygLocWxmAowbtXVeeQBfySAofB4F1anuoVtA=; b=NRQTING4W/75DvhMpp867F4hwhqcnEG+/kaqxww1g3ucYbWeOXN54oxj/UCFfYc2Sd DfVirare+ecGUpaaZmJ6cooFCqBr3Ul/GU2Iw4Rd16byVoROcgd+lMKFUX1Xmr+QtHIH rbJwzOVWIPUDfdVPPpe+aJ+9TY6/4/9WmBI9+q3DorSEvOkz3azGOChI3RRIgSbyCtI8 JNGVDPDnNDitCnBfV8ULrvw4XUruYVLw90Y69OH2FYqO4/W8bqGJCPRtRVS4x0T9rSUw PvqfV2FcjRl0aNX86q0yzCDF5LHbhxtgGutJLC7QG2XHY4+stbBmNxOm5GjsRnvkpPaB f/zA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504967; x=1732109767; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+RYfRSDygLocWxmAowbtXVeeQBfySAofB4F1anuoVtA=; b=BHLKTWlybuT/OWCvRC/gPVfcrkbzK5Qr+uk0H9IsCm4ha2NehgDF7KmCBfJjXQD8gy 3wr68upmfgJ/xvAs1o0igG4817ExXp/nSFtotfHJv47TMJ8DudJDJ2tr1uR0V8KAnGwX JH4ofl6H+pmkLxim10fH1tjPz6qFPWkVnwGL8IPOmKIqEEXGLQr5dZ9dBPAi31/f/okE uGqAHZg0QXGySDM9Lv0aNZU0d4wx4+thehb1LsK2vP+Y5ib1NmTSwDW11Zyin/W6s3S7 8arBAME6B9U2shIx535VnZTvvl1Xmp4In5O2p2C7oCx1QknnEICZjGEMT5FPYoV9l1K/ GHHw== X-Forwarded-Encrypted: i=1; AJvYcCXQsgAlV3MLJUUYkd/pcIUKxGQ/iBpUq6RICdGlGJqWCRJMEiy/l91Jaalaf+s7ru/Y+HsfNS8PTXBr@vger.kernel.org X-Gm-Message-State: AOJu0Yw+lPmQTh8Dv0VVoqFssOjGifE0ObqS2KFBXWFhQECiIoF78CmH Y2OXHylDzPdoTaDNJXAF9uOEDBto+fabmSKLL7P8/Br3JZRn5Wm7EQtZ0jMtYKo= X-Google-Smtp-Source: AGHT+IGol4gxAbjDqjhagtSmjyPLmh4siEpgtwJ8dLnWMTnbAXoyvBEjm0wzQ1FNLexGNh9ce+2v5Q== X-Received: by 2002:a05:600c:3b9a:b0:431:52f5:f497 with SMTP id 5b1f17b1804b1-432b7502771mr179603495e9.9.1731504967397; Wed, 13 Nov 2024 05:36:07 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:06 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 11/25] ASoC: renesas: rz-ssi: Remove the first argument of rz_ssi_stream_is_play() Date: Wed, 13 Nov 2024 15:35:26 +0200 Message-Id: <20241113133540.2005850-12-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea The first argument of the rz_ssi_stream_is_play() is not used. Remove it. Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - fixed typos in patch title and description - collected tags sound/soc/renesas/rz-ssi.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 4c33663a0ae4..f230d63339e8 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -162,8 +162,7 @@ static void rz_ssi_reg_mask_setl(struct rz_ssi_priv *priv, uint reg, writel(val, (priv->base + reg)); } -static inline bool rz_ssi_stream_is_play(struct rz_ssi_priv *ssi, - struct snd_pcm_substream *substream) +static inline bool rz_ssi_stream_is_play(struct snd_pcm_substream *substream) { return substream->stream == SNDRV_PCM_STREAM_PLAYBACK; } @@ -337,7 +336,7 @@ static void rz_ssi_set_idle(struct rz_ssi_priv *ssi) static int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm) { - bool is_play = rz_ssi_stream_is_play(ssi, strm->substream); + bool is_play = rz_ssi_stream_is_play(strm->substream); bool is_full_duplex; u32 ssicr, ssifcr; @@ -674,7 +673,7 @@ static int rz_ssi_dma_transfer(struct rz_ssi_priv *ssi, */ return 0; - dir = rz_ssi_stream_is_play(ssi, substream) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; + dir = rz_ssi_stream_is_play(substream) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; /* Always transfer 1 period */ amount = runtime->period_size; @@ -800,7 +799,7 @@ static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd, if (ssi->dma_rt) { bool is_playback; - is_playback = rz_ssi_stream_is_play(ssi, substream); + is_playback = rz_ssi_stream_is_play(substream); ret = rz_ssi_dma_slave_config(ssi, ssi->playback.dma_ch, is_playback); /* Fallback to pio */ From patchwork Wed Nov 13 13:35:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 842980 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4CE3C20606D for ; Wed, 13 Nov 2024 13:36:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504976; cv=none; b=ZO+4g2J8cgqUqNXceKoxSk/HY60rYz3H8G8CboKZW2WPMo01Kl3QvdwTl4N+Vs+3ODln+4WtDspnjkdieMfgf+4+keW3Erwmt4AcIBwd6L53LjV4TFOl/dG7drkE6Jg20217iDqGm3ror+VvD4JTd1yRE9ubwos7XYS7E+9+VoM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731504976; c=relaxed/simple; bh=/yl6Ky3GKCEooa3bqTFN49speLXBrmEBgx5UBYWX0No=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=J9KZIDY+1tCxqqpgXnv7gmOydWO9lfAhTRnkyVIHlU9UGcGQBkJRqbw1MkyLmu0Fb6N/T+myz1V170jsEfwiokYpZTItO4j4u45S07TusEWqCKKy0ZRWRLHm3VbSUOprOZKH9z+4ULW9JOrFyTD3U+b2BE97Tl9ECq+YXSrONDY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=pqKhVUem; arc=none smtp.client-ip=209.85.221.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="pqKhVUem" Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-37d495d217bso6185198f8f.0 for ; Wed, 13 Nov 2024 05:36:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1731504972; x=1732109772; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wb0U4IMX5QeMmiQnpvPc9yFTcNb0PSO2qWqCuGVP2K4=; b=pqKhVUemWz0cQGZ1Q2tKuE4d3DomOQXqMYYEcw1jXCn/YtW7gqiQRnb33mqeUKimUP ecZVlx8IgS0Bw7dJEDVxLhn3OLb9hZn1hY89F521blRo8SM7/R64YNxHmOfnWuJzqTAl CdfMpo6u1ZwxSkT8gxGIjcMJMZcrx4IPGarIVSwgmy0hGJRjqD4339gBLYM/4ZS+AG6n 73GwQ319JP8qhfmZxKNv8pqJujUys19HlMEeayogWCls8PG0tJVIeweWRy/FVTEdFxpv pF6gEjsbpYtuLeSJw/LgPXOahbwnbBWH6aQsLrA3X4rxrh1vyByf98Bi9ZeD73sPRJGC tQcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731504972; x=1732109772; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wb0U4IMX5QeMmiQnpvPc9yFTcNb0PSO2qWqCuGVP2K4=; b=t3QewOya+Lku1Vg3l3gAm5g3Ir7R4oFoomdZKw4R+CY0oBgrNGqYJfStqtcvQAMIBu Inq2bjwyhAadPVIbss0Rf8miBbMkH/zVOsYJ/amRv/jPflXq55+yGiWtuESzPcfOFwpA e7USsU+JfAevlWpSf9ZKy24WAXh1z8DtrnOs19ujoWF4CjuFZcC1wFSfpn32qSyO4xPC w/enBbfX2RM4RJqKI5sSDlFAbU5BL2api2wFTQ4oESHvhB79Ig2KS6ijUiT3K/WYMX5n 1/BNuLEuHPU4pddkYmplcKyvf6ZjIPDekDcuzhdY7VlFy5mZ2wiYYkYlD28aTpaAxi2b +lkw== X-Forwarded-Encrypted: i=1; AJvYcCUM3jg6VlMPDV34ApsT85hjHPWWOzNkzy7Sg3fAvJBSj1B6NFqxPLq2sRirZ1ZmWzQloB+lATcMKed2@vger.kernel.org X-Gm-Message-State: AOJu0Yw7R7XSd1O+7AX+6KqrZpshEagOjJPdpkpfwRQ3lqdT/v3ON4S5 8nsOsPSriGE5dK+AA2pWJHRSDzfxPksKQ5fthuI4kjvQvuML0dLsXaVQyvwShSY= X-Google-Smtp-Source: AGHT+IHCFuS3ogyqD1I0N9sH3hCQYYvVYBqOTY0QWTB2SbEJ2zeR0UpGhbVwIvv/w/ygieVPABgY5Q== X-Received: by 2002:a05:6000:4022:b0:37d:4f69:c9b with SMTP id ffacd0b85a97d-381f18726a8mr22024182f8f.35.1731504971629; Wed, 13 Nov 2024 05:36:11 -0800 (PST) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:11 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 13/25] ASoC: renesas: rz-ssi: Use temporary variable for struct device Date: Wed, 13 Nov 2024 15:35:28 +0200 Message-Id: <20241113133540.2005850-14-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Use a temporary variable for the struct device pointers to avoid dereferencing. Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 62 +++++++++++++++++++------------------- 1 file changed, 31 insertions(+), 31 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index aa175803867f..2f56c63582e7 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -1021,36 +1021,37 @@ static const struct snd_soc_component_driver rz_ssi_soc_component = { static int rz_ssi_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; struct rz_ssi_priv *ssi; struct clk *audio_clk; struct resource *res; int ret; - ssi = devm_kzalloc(&pdev->dev, sizeof(*ssi), GFP_KERNEL); + ssi = devm_kzalloc(dev, sizeof(*ssi), GFP_KERNEL); if (!ssi) return -ENOMEM; - ssi->dev = &pdev->dev; + ssi->dev = dev; ssi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(ssi->base)) return PTR_ERR(ssi->base); ssi->phys = res->start; - ssi->clk = devm_clk_get(&pdev->dev, "ssi"); + ssi->clk = devm_clk_get(dev, "ssi"); if (IS_ERR(ssi->clk)) return PTR_ERR(ssi->clk); - ssi->sfr_clk = devm_clk_get(&pdev->dev, "ssi_sfr"); + ssi->sfr_clk = devm_clk_get(dev, "ssi_sfr"); if (IS_ERR(ssi->sfr_clk)) return PTR_ERR(ssi->sfr_clk); - audio_clk = devm_clk_get(&pdev->dev, "audio_clk1"); + audio_clk = devm_clk_get(dev, "audio_clk1"); if (IS_ERR(audio_clk)) return dev_err_probe(&pdev->dev, PTR_ERR(audio_clk), "no audio clk1"); ssi->audio_clk_1 = clk_get_rate(audio_clk); - audio_clk = devm_clk_get(&pdev->dev, "audio_clk2"); + audio_clk = devm_clk_get(dev, "audio_clk2"); if (IS_ERR(audio_clk)) return dev_err_probe(&pdev->dev, PTR_ERR(audio_clk), "no audio clk2"); @@ -1063,13 +1064,13 @@ static int rz_ssi_probe(struct platform_device *pdev) ssi->audio_mck = ssi->audio_clk_1 ? ssi->audio_clk_1 : ssi->audio_clk_2; /* Detect DMA support */ - ret = rz_ssi_dma_request(ssi, &pdev->dev); + ret = rz_ssi_dma_request(ssi, dev); if (ret < 0) { - dev_warn(&pdev->dev, "DMA not available, using PIO\n"); + dev_warn(dev, "DMA not available, using PIO\n"); ssi->playback.transfer = rz_ssi_pio_send; ssi->capture.transfer = rz_ssi_pio_recv; } else { - dev_info(&pdev->dev, "DMA enabled"); + dev_info(dev, "DMA enabled"); ssi->playback.transfer = rz_ssi_dma_transfer; ssi->capture.transfer = rz_ssi_dma_transfer; } @@ -1078,7 +1079,7 @@ static int rz_ssi_probe(struct platform_device *pdev) ssi->capture.priv = ssi; spin_lock_init(&ssi->lock); - dev_set_drvdata(&pdev->dev, ssi); + dev_set_drvdata(dev, ssi); /* Error Interrupt */ ssi->irq_int = platform_get_irq_byname(pdev, "int_req"); @@ -1087,12 +1088,11 @@ static int rz_ssi_probe(struct platform_device *pdev) return ssi->irq_int; } - ret = devm_request_irq(&pdev->dev, ssi->irq_int, &rz_ssi_interrupt, - 0, dev_name(&pdev->dev), ssi); + ret = devm_request_irq(dev, ssi->irq_int, &rz_ssi_interrupt, + 0, dev_name(dev), ssi); if (ret < 0) { rz_ssi_release_dma_channels(ssi); - return dev_err_probe(&pdev->dev, ret, - "irq request error (int_req)\n"); + return dev_err_probe(dev, ret, "irq request error (int_req)\n"); } if (!rz_ssi_is_dma_enabled(ssi)) { @@ -1104,11 +1104,11 @@ static int rz_ssi_probe(struct platform_device *pdev) if (ssi->irq_rt < 0) return ssi->irq_rt; - ret = devm_request_irq(&pdev->dev, ssi->irq_rt, + ret = devm_request_irq(dev, ssi->irq_rt, &rz_ssi_interrupt, 0, - dev_name(&pdev->dev), ssi); + dev_name(dev), ssi); if (ret < 0) - return dev_err_probe(&pdev->dev, ret, + return dev_err_probe(dev, ret, "irq request error (dma_rt)\n"); } else { if (ssi->irq_tx < 0) @@ -1117,50 +1117,50 @@ static int rz_ssi_probe(struct platform_device *pdev) if (ssi->irq_rx < 0) return ssi->irq_rx; - ret = devm_request_irq(&pdev->dev, ssi->irq_tx, + ret = devm_request_irq(dev, ssi->irq_tx, &rz_ssi_interrupt, 0, - dev_name(&pdev->dev), ssi); + dev_name(dev), ssi); if (ret < 0) - return dev_err_probe(&pdev->dev, ret, + return dev_err_probe(dev, ret, "irq request error (dma_tx)\n"); - ret = devm_request_irq(&pdev->dev, ssi->irq_rx, + ret = devm_request_irq(dev, ssi->irq_rx, &rz_ssi_interrupt, 0, - dev_name(&pdev->dev), ssi); + dev_name(dev), ssi); if (ret < 0) - return dev_err_probe(&pdev->dev, ret, + return dev_err_probe(dev, ret, "irq request error (dma_rx)\n"); } } - ssi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); + ssi->rstc = devm_reset_control_get_exclusive(dev, NULL); if (IS_ERR(ssi->rstc)) { ret = PTR_ERR(ssi->rstc); goto err_reset; } reset_control_deassert(ssi->rstc); - pm_runtime_enable(&pdev->dev); - ret = pm_runtime_resume_and_get(&pdev->dev); + pm_runtime_enable(dev); + ret = pm_runtime_resume_and_get(dev); if (ret < 0) { - dev_err(&pdev->dev, "pm_runtime_resume_and_get failed\n"); + dev_err(dev, "pm_runtime_resume_and_get failed\n"); goto err_pm; } - ret = devm_snd_soc_register_component(&pdev->dev, &rz_ssi_soc_component, + ret = devm_snd_soc_register_component(dev, &rz_ssi_soc_component, rz_ssi_soc_dai, ARRAY_SIZE(rz_ssi_soc_dai)); if (ret < 0) { - dev_err(&pdev->dev, "failed to register snd component\n"); + dev_err(dev, "failed to register snd component\n"); goto err_snd_soc; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:15 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 15/25] ASoC: renesas: rz-ssi: Rely on the ASoC subsystem to runtime resume/suspend the SSI Date: Wed, 13 Nov 2024 15:35:30 +0200 Message-Id: <20241113133540.2005850-16-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea The ASoC subsystem takes care of runtime resume/suspend the audio devices when needed. Just enable the runtime PM on the SSI driver and let the subsystem runtime resume/suspend it. While at it use directly the devm_pm_runtime_enable(). Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 4af381f6d470..35172630be8b 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -1140,11 +1140,10 @@ static int rz_ssi_probe(struct platform_device *pdev) } reset_control_deassert(ssi->rstc); - pm_runtime_enable(dev); - ret = pm_runtime_resume_and_get(dev); + ret = devm_pm_runtime_enable(dev); if (ret < 0) { - dev_err(dev, "pm_runtime_resume_and_get failed\n"); - goto err_pm; + dev_err(dev, "Failed to enable runtime PM!\n"); + goto err_reset; } ret = devm_snd_soc_register_component(dev, &rz_ssi_soc_component, @@ -1152,15 +1151,12 @@ static int rz_ssi_probe(struct platform_device *pdev) ARRAY_SIZE(rz_ssi_soc_dai)); if (ret < 0) { dev_err(dev, "failed to register snd component\n"); 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:19 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 17/25] ASoC: renesas: rz-ssi: Add runtime PM support Date: Wed, 13 Nov 2024 15:35:32 +0200 Message-Id: <20241113133540.2005850-18-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add runtime PM support to the ssi driver. This assert/de-assert the reset lines on runtime suspend/resume. Along with it the de-assertion of the reset line from probe function was removed as it is not necessary anymore. Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 01e8b6a4e8a8..d0e2665ec830 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -1139,14 +1139,13 @@ static int rz_ssi_probe(struct platform_device *pdev) goto err_release_dma_chs; } - reset_control_deassert(ssi->rstc); /* Default 0 for power saving. Can be overridden via sysfs. */ pm_runtime_set_autosuspend_delay(dev, 0); pm_runtime_use_autosuspend(dev); ret = devm_pm_runtime_enable(dev); if (ret < 0) { dev_err(dev, "Failed to enable runtime PM!\n"); - goto err_reset; + goto err_release_dma_chs; } ret = devm_snd_soc_register_component(dev, &rz_ssi_soc_component, @@ -1154,13 +1153,11 @@ static int rz_ssi_probe(struct platform_device *pdev) ARRAY_SIZE(rz_ssi_soc_dai)); if (ret < 0) { dev_err(dev, "failed to register snd component\n"); - goto err_reset; + goto err_release_dma_chs; } return 0; -err_reset: - reset_control_assert(ssi->rstc); err_release_dma_chs: rz_ssi_release_dma_channels(ssi); @@ -1182,10 +1179,29 @@ static const struct of_device_id rz_ssi_of_match[] = { }; MODULE_DEVICE_TABLE(of, rz_ssi_of_match); +static int rz_ssi_runtime_suspend(struct device *dev) +{ + struct rz_ssi_priv *ssi = dev_get_drvdata(dev); + + return reset_control_assert(ssi->rstc); +} + +static int rz_ssi_runtime_resume(struct device *dev) +{ + struct rz_ssi_priv *ssi = dev_get_drvdata(dev); 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:22 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 19/25] ASoC: renesas: rz-ssi: Add suspend to RAM support Date: Wed, 13 Nov 2024 15:35:34 +0200 Message-Id: <20241113133540.2005850-20-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea The SSIF-2 IP is available on the Renesas RZ/G3S SoC. The Renesas RZ/G3S SoC supports a power-saving mode where power to most of the SoC components is turned off. Add suspend/resume support to the SSIF-2 driver to support this power-saving mode. On SNDRV_PCM_TRIGGER_SUSPEND trigger the SSI is stopped (the stream user pointer is left untouched to avoid breaking user space and the dma buffer pointer is set to zero), on SNDRV_PCM_TRIGGER_RESUME software reset is issued for the SSIF-2 IP and the clocks are re-configured. Signed-off-by: Claudiu Beznea --- Changes in v3: - s/sh/renesas in patch title Changes in v2: - none sound/soc/renesas/rz-ssi.c | 46 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 44 insertions(+), 2 deletions(-) diff --git a/sound/soc/renesas/rz-ssi.c b/sound/soc/renesas/rz-ssi.c index 10dd973a1c85..c6bedb58d3ae 100644 --- a/sound/soc/renesas/rz-ssi.c +++ b/sound/soc/renesas/rz-ssi.c @@ -782,6 +782,32 @@ static int rz_ssi_dma_request(struct rz_ssi_priv *ssi, struct device *dev) return -ENODEV; } +static int rz_ssi_trigger_resume(struct rz_ssi_priv *ssi) +{ + int ret; + + if (rz_ssi_is_stream_running(&ssi->playback) || + rz_ssi_is_stream_running(&ssi->capture)) + return 0; + + ret = rz_ssi_swreset(ssi); + if (ret) + return ret; + + return rz_ssi_clk_setup(ssi, ssi->hw_params_cache.rate, + ssi->hw_params_cache.channels); +} + +static void rz_ssi_streams_suspend(struct rz_ssi_priv *ssi) +{ + if (rz_ssi_is_stream_running(&ssi->playback) || + rz_ssi_is_stream_running(&ssi->capture)) + return; + + ssi->playback.dma_buffer_pos = 0; + ssi->capture.dma_buffer_pos = 0; +} + static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) { @@ -790,8 +816,16 @@ static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd, int ret = 0, i, num_transfer = 1; switch (cmd) { + case SNDRV_PCM_TRIGGER_RESUME: + ret = rz_ssi_trigger_resume(ssi); + if (ret) + return ret; + + fallthrough; + case SNDRV_PCM_TRIGGER_START: - rz_ssi_stream_init(strm, substream); + if (cmd == SNDRV_PCM_TRIGGER_START) + rz_ssi_stream_init(strm, substream); if (ssi->dma_rt) { bool is_playback; @@ -819,6 +853,12 @@ static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd, ret = rz_ssi_start(ssi, strm); break; + + case SNDRV_PCM_TRIGGER_SUSPEND: + rz_ssi_stop(ssi, strm); + rz_ssi_streams_suspend(ssi); + break; + case SNDRV_PCM_TRIGGER_STOP: rz_ssi_stop(ssi, strm); rz_ssi_stream_quit(ssi, strm); @@ -958,7 +998,8 @@ static const struct snd_soc_dai_ops rz_ssi_dai_ops = { static const struct snd_pcm_hardware rz_ssi_pcm_hardware = { .info = SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_MMAP | - SNDRV_PCM_INFO_MMAP_VALID, + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_RESUME, .buffer_bytes_max = PREALLOC_BUFFER, .period_bytes_min = 32, .period_bytes_max = 8192, @@ -1201,6 +1242,7 @@ static int rz_ssi_runtime_resume(struct device *dev) static const struct dev_pm_ops rz_ssi_pm_ops = { RUNTIME_PM_OPS(rz_ssi_runtime_suspend, rz_ssi_runtime_resume, NULL) + SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume) }; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:26 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 21/25] arm64: dts: renesas: r9a08g045: Add SSI nodes Date: Wed, 13 Nov 2024 15:35:36 +0200 Message-Id: <20241113133540.2005850-22-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add DT nodes for the SSI IPs available on the Renesas RZ/G3S SoC. Along with it external audio clocks were added. Board device tree could use it and update the frequencies. Signed-off-by: Claudiu Beznea --- Changes in v3: - none Changes in v2: - none arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 96 ++++++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi index be8a0a768c65..24c6388cd0d5 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi @@ -14,6 +14,22 @@ / { #address-cells = <2>; #size-cells = <2>; + audio_clk1: audio-clk1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by boards that provide it. */ + clock-frequency = <0>; + status = "disabled"; + }; + + audio_clk2: audio-clk2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by boards that provide it. */ + clock-frequency = <0>; + status = "disabled"; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -187,6 +203,86 @@ i2c3: i2c@10090c00 { status = "disabled"; }; + ssi0: ssi@100a8000 { + compatible = "renesas,r9a08g045-ssi", + "renesas,rz-ssi"; + reg = <0 0x100a8000 0 0x400>; + interrupts = , + , + ; + interrupt-names = "int_req", "dma_rx", "dma_tx"; + clocks = <&cpg CPG_MOD R9A08G045_SSI0_PCLK2>, + <&cpg CPG_MOD R9A08G045_SSI0_PCLK_SFR>, + <&audio_clk1>, <&audio_clk2>; + clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2"; + resets = <&cpg R9A08G045_SSI0_RST_M2_REG>; + dmas = <&dmac 0x2665>, <&dmac 0x2666>; + dma-names = "tx", "rx"; + power-domains = <&cpg>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + ssi1: ssi@100a8400 { + compatible = "renesas,r9a08g045-ssi", + "renesas,rz-ssi"; + reg = <0 0x100a8400 0 0x400>; + interrupts = , + , + ; + interrupt-names = "int_req", "dma_rx", "dma_tx"; + clocks = <&cpg CPG_MOD R9A08G045_SSI1_PCLK2>, + <&cpg CPG_MOD R9A08G045_SSI1_PCLK_SFR>, + <&audio_clk1>, <&audio_clk2>; + clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2"; + resets = <&cpg R9A08G045_SSI1_RST_M2_REG>; + dmas = <&dmac 0x2669>, <&dmac 0x266a>; + dma-names = "tx", "rx"; + power-domains = <&cpg>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + ssi2: ssi@100a8800 { + compatible = "renesas,r9a08g045-ssi", + "renesas,rz-ssi"; + reg = <0 0x100a8800 0 0x400>; + interrupts = , + , + ; + interrupt-names = "int_req", "dma_rx", "dma_tx"; + clocks = <&cpg CPG_MOD R9A08G045_SSI2_PCLK2>, + <&cpg CPG_MOD R9A08G045_SSI2_PCLK_SFR>, + <&audio_clk1>, <&audio_clk2>; + clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2"; + resets = <&cpg R9A08G045_SSI2_RST_M2_REG>; + dmas = <&dmac 0x266d>, <&dmac 0x266e>; + dma-names = "tx", "rx"; + power-domains = <&cpg>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + ssi3: ssi@100a8c00 { + compatible = "renesas,r9a08g045-ssi", + "renesas,rz-ssi"; + reg = <0 0x100a8c00 0 0x400>; + interrupts = , + , + ; + interrupt-names = "int_req", "dma_rx", "dma_tx"; + clocks = <&cpg CPG_MOD R9A08G045_SSI3_PCLK2>, + <&cpg CPG_MOD R9A08G045_SSI3_PCLK_SFR>, + <&audio_clk1>, <&audio_clk2>; + clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2"; + resets = <&cpg R9A08G045_SSI3_RST_M2_REG>; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:30 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 23/25] arm64: dts: renesas: Add da7212 audio codec node Date: Wed, 13 Nov 2024 15:35:38 +0200 Message-Id: <20241113133540.2005850-24-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add the da7212 audio codec node. Along with it regulators nodes were reworked to be able to re-use them on da7212. Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- Changes in v3: - none Changes in v2: - none .../boot/dts/renesas/rzg3s-smarc-som.dtsi | 17 ++++++++++---- arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 23 +++++++++++++++++++ 2 files changed, 35 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi index 6e58d47d85b0..5ee9dac4aebb 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -63,7 +63,6 @@ vcc_sdhi0: regulator0 { enable-active-high; }; -#if SW_CONFIG2 == SW_ON vccq_sdhi0: regulator1 { compatible = "regulator-gpio"; regulator-name = "SDHI0 VccQ"; @@ -73,8 +72,8 @@ vccq_sdhi0: regulator1 { gpios-states = <1>; states = <3300000 1>, <1800000 0>; }; -#else - reg_1p8v: regulator1 { + + reg_1p8v: regulator2 { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; regulator-min-microvolt = <1800000>; @@ -82,9 +81,17 @@ reg_1p8v: regulator1 { regulator-boot-on; regulator-always-on; }; -#endif - vcc_sdhi2: regulator2 { + reg_3p3v: regulator3 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc_sdhi2: regulator4 { compatible = "regulator-fixed"; regulator-name = "SDHI2 Vcc"; regulator-min-microvolt = <3300000>; diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi index 4509151344c4..4aa99814b808 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi @@ -68,6 +68,29 @@ &i2c0 { status = "okay"; clock-frequency = <1000000>; + + da7212: codec@1a { + compatible = "dlg,da7212"; + reg = <0x1a>; + + #sound-dai-cells = <0>; + #address-cells = <1>; + #size-cells = <0>; + + clocks = <&versa3 1>; + clock-names = "mclk"; + + dlg,micbias1-lvl = <2500>; + dlg,micbias2-lvl = <2500>; + dlg,dmic-data-sel = "lrise_rfall"; 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([82.78.167.28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432d54e2f2esm25664165e9.1.2024.11.13.05.36.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Nov 2024 05:36:34 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v3 25/25] arm64: dts: renesas: rzg3s-smarc: Add sound card Date: Wed, 13 Nov 2024 15:35:40 +0200 Message-Id: <20241113133540.2005850-26-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add sound card with SSI3 as CPU DAI and DA7212 as codec DAI. Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- Changes in v3: - none Changes in v2: - none arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi index 6dd439e68bd4..89673bbaee6d 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi @@ -44,6 +44,23 @@ key-3 { }; }; + snd_rzg3s: sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&cpu_dai>; + simple-audio-card,frame-master = <&cpu_dai>; + simple-audio-card,mclk-fs = <256>; + + cpu_dai: simple-audio-card,cpu { + sound-dai = <&ssi3>; + }; + + codec_dai: simple-audio-card,codec { + sound-dai = <&da7212>; + clocks = <&versa3 1>; + }; + }; + vcc_sdhi1: regulator-vcc-sdhi1 { compatible = "regulator-fixed"; regulator-name = "SDHI1 Vcc";