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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434a36c7a9fsm43017865e9.44.2024.11.26.09.02.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 09:02:28 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 1/9] target/arm/tcg/cpu32.c: swap ATCM and BTCM register names Date: Tue, 26 Nov 2024 17:02:16 +0000 Message-Id: <20241126170224.2926917-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241126170224.2926917-1-peter.maydell@linaro.org> References: <20241126170224.2926917-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Michael Tokarev According to Cortex-R5 r1p2 manual, register with opcode2=0 is BTCM and with opcode2=1 is ATCM, - exactly the opposite from how qemu labels them. Just swap the labels to avoid confusion, - both registers are implemented as always-zero. Signed-off-by: Michael Tokarev Reviewed-by: Richard Henderson Message-id: 20241121171602.3273252-1-mjt@tls.msk.ru Signed-off-by: Peter Maydell --- target/arm/tcg/cpu32.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c index 20c2737f17b..2a77701f8dc 100644 --- a/target/arm/tcg/cpu32.c +++ b/target/arm/tcg/cpu32.c @@ -574,9 +574,9 @@ static void cortex_a15_initfn(Object *obj) static const ARMCPRegInfo cortexr5_cp_reginfo[] = { /* Dummy the TCM region regs for the moment */ - { .name = "ATCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 0, + { .name = "BTCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 0, .access = PL1_RW, .type = ARM_CP_CONST }, - { .name = "BTCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 1, + { .name = "ATCM", .cp = 15, .opc1 = 0, .crn = 9, .crm = 1, .opc2 = 1, .access = PL1_RW, .type = ARM_CP_CONST }, { .name = "DCACHE_INVAL", .cp = 15, .opc1 = 0, .crn = 15, .crm = 5, .opc2 = 0, .access = PL1_W, .type = ARM_CP_NOP }, From patchwork Tue Nov 26 17:02:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 845606 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp339719wru; Tue, 26 Nov 2024 09:03:19 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVwmrL4IqQ1cRiujz29Yt3HANcATmC4jB+qHWbxjUlrILk8VYFZ2R2viSL+s2tx2dUmRogVsg==@linaro.org X-Google-Smtp-Source: AGHT+IELOVK6bGnsnnClj4M6UrjXdCgkFDEVSLPSEGPzkm+cb+kKh1zE2iy2CzmfVRMiNOxeqQoC X-Received: by 2002:a05:651c:510:b0:2fb:45cf:5eef with SMTP id 38308e7fff4ca-2ffa71e0886mr90237331fa.30.1732640599175; Tue, 26 Nov 2024 09:03:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732640599; cv=none; d=google.com; s=arc-20240605; b=Ecrp5f1EA3yRrKoBKvC9DlhjTD2jRg/bgCoeXS9StUbL4z08QYVC0jPPMEyZDZbKlg NWTeMDHtKl1M6scKE8M5SRFWKvEcr1h3tiWrYCQISeAuO97lKUxR4x6EF2qktpgNyTnp UFTLIcy5XntGITwr7LBnNuOXAU2yWCiqniL7EQMfykd576WZYpSDwKn3yZU8TYdnWjzv j1tyoMxzyMAV6apNNoOR6SU/iSSB0eHrzigHZvcLNySvb1vXZFyiGL+5ESJzPO9Zgrkf 857tARCYBTxNWw90qKDy/7ryNAgvjY2asL3B/6PBEdM930FRLXB/eFGn0/amb9ZIVCBg mJUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=7IwpV5E0XRDCMVWuelKluQa8UT2nyGMUY4zNcoWVPWc=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=cn4AUvEuwpGNbmViJvz6huwOAOsgZbyXEbsWuSAP5omf+A6D2kLa7FfVHd8F9sdnBj ziCHgE+KcpAcK/b9bjsU3Zj9t2bdmC17FrEA+5x1CkrBnlrpNWVrvAlP21/m4IDBCb0k tI4DnkowSkJnZ2cl1hwWmcxH5cHKG1zrQ7MStvGiQWI7cntxF2pb68H76huS8o7uJ4AS hrbKoUFcv3y+4PjkGBOdULTlVpUdt6x7iFvw/AURQ6hjvGdZSkWrB/ajQ2TvJ57PoPIz 0BU+YnzsrT3PkQc7ubf6HdFkD3rYaMCeipbL6eby9rP7pU9E5Cvg+88sCv4iZ0IUjTag WpOg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gKWSEkSL; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434a36c7a9fsm43017865e9.44.2024.11.26.09.02.29 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 09:02:29 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 2/9] docs/system/arm/emulation: mention armv9 Date: Tue, 26 Nov 2024 17:02:17 +0000 Message-Id: <20241126170224.2926917-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241126170224.2926917-1-peter.maydell@linaro.org> References: <20241126170224.2926917-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson Message-id: 20241122225049.1617774-2-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell --- docs/system/arm/emulation.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index a2a388f0919..2956c22a1b7 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -3,8 +3,8 @@ A-profile CPU architecture support ================================== -QEMU's TCG emulation includes support for the Armv5, Armv6, Armv7 and -Armv8 versions of the A-profile architecture. It also has support for +QEMU's TCG emulation includes support for the Armv5, Armv6, Armv7, +Armv8 and Armv9 versions of the A-profile architecture. It also has support for the following architecture extensions: - FEAT_AA32BF16 (AArch32 BFloat16 instructions) @@ -153,7 +153,7 @@ the following architecture extensions: - FEAT_XNX (Translation table stage 2 Unprivileged Execute-never) For information on the specifics of these extensions, please refer -to the `Armv8-A Arm Architecture Reference Manual +to the `Arm Architecture Reference Manual for A-profile architecture `_. When a specific named CPU is being emulated, only those features which From patchwork Tue Nov 26 17:02:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 845614 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp340752wru; Tue, 26 Nov 2024 09:04:29 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXpH+731du0EtpNwaG4AedvsPPVl+Sm85a9CIOAyZLBLyHzUZqqzS9ZjqJU1IIj+j4vuGXGfA==@linaro.org X-Google-Smtp-Source: AGHT+IHoIaq8F2R+ZuEEpLIfjmHfcbVTBZAOfgtaoDVk0GL7bRyW1Cn5XD3a+S+AqLlIGubc5VNd X-Received: by 2002:a05:600c:3b88:b0:434:a765:7f9c with SMTP id 5b1f17b1804b1-434a9db839emr410175e9.6.1732640669203; Tue, 26 Nov 2024 09:04:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732640669; cv=none; d=google.com; s=arc-20240605; b=VjDkmJQYkHerwF2A4ulWDQ9lipWMggBV6YpX+lLi9Os4ymJV4PODfM9rUXo92uphnq xP/3XZljI5XcZ95QDN+CGoaxn43SsCo0Jbv8WTfgPolGn5onPVSHsM+FQ0EopEL3WBve ncM8JbUnsRA8JxKczm3YJGJnc0uvAj2z+BLVaiKaP7C7FooMRyuCFOmIs5cmzGj3jjN+ w/E4ZSUAyOSmBQ1jgeCbtyksrPGoo9qOQ478/siaCqib+tiUQ3v5gVfGU7AVS7vD4yWV 4JYWizzpU9TtwvpNpUTZ1kZAYk2A79K4zbx+CRFDTrMAB06KiogP59hWEOoshRuJDmFl PzvQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=xFzPeRmZcYFg+diNYuLvRmiok0TT9be1yhuo0Ta4GIs=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=gSzP5KwfFLZahJ6iye8mKRReZY1zqDNu6xLD1inKFwktgtOmCnDkS0nCn/qculQrSl U+rFolD06TkShobMXRCSzUKi/Vq+QbBWbDajxrx1N4lBsRTL1eKgF7LwNU4MLoXj979C tVuyglzS698kR9uekK9Vj1be8Z0LmJAVKCVE+ElBJDvG9ufyLg/6PxBh1ILOcZJfsDYk B6bROBBDc6/1uCEIbv6/SD7gnK0zEwVZZ4fqbtfRSIJUM/kW5Ohvr25wE7z0jU/OrWUv i6C9CkrXmuvFT4msVhvpMwOlu64gwcEQ/9WvSWcTCTwUYWBbzauheGTQjcE/J1GJ9Rs3 AZBQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AdJZlPn1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434a36c7a9fsm43017865e9.44.2024.11.26.09.02.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 09:02:30 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 3/9] docs/system/arm/emulation: fix typo in feature name Date: Tue, 26 Nov 2024 17:02:18 +0000 Message-Id: <20241126170224.2926917-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241126170224.2926917-1-peter.maydell@linaro.org> References: <20241126170224.2926917-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson Message-id: 20241122225049.1617774-3-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell --- docs/system/arm/emulation.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 2956c22a1b7..af613b9c8b8 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -88,7 +88,7 @@ the following architecture extensions: - FEAT_LSE2 (Large System Extensions v2) - FEAT_LVA (Large Virtual Address space) - FEAT_MixedEnd (Mixed-endian support) -- FEAT_MixdEndEL0 (Mixed-endian support at EL0) +- FEAT_MixedEndEL0 (Mixed-endian support at EL0) - FEAT_MOPS (Standardization of memory operations) - FEAT_MTE (Memory Tagging Extension) - FEAT_MTE2 (Memory Tagging Extension) From patchwork Tue Nov 26 17:02:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 845615 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp340783wru; Tue, 26 Nov 2024 09:04:32 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUim/0HTiNPfdTbgwElJG3stDsF3ZpDZuUk2xQouV4rbdWvkGmd83Ob7YkxQdiCbhO+RwG7xA==@linaro.org X-Google-Smtp-Source: AGHT+IHM8AUwEkIRL1kDvZhyUoqRRRikq/Dv5yBeNugvtzZB1NvuDTJXyHt+NVGwmXkGUhGkon6z X-Received: by 2002:a2e:b8cf:0:b0:2fb:62ad:89fe with SMTP id 38308e7fff4ca-2ffa711aa28mr76518311fa.16.1732640672297; Tue, 26 Nov 2024 09:04:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732640672; cv=none; d=google.com; s=arc-20240605; b=cvCjHOdcLAKGKZJL5kYjYdsuBZGe2t6Mka7imy+ajcokps8lBy2dNkuuY8tAQ1XVR1 5g1Gl0Cfy/ywVOwg/MgnV+7ULFRUNlR3dPaA6RAqH8Iv35ak0ei6IrwdXZjHj1ZnqljP +pVfSlDd0TLrtf55mpGGWtDZAStrnAH9fXmuNNY6RSMRnwD3KYbxkMQOHZSw/JwkrbNa K0IXgpDmZFlnZ7UBtgZ691Q59/bqEmQN8+KX3do1Fep74DHvRU4HtSuDoJr0vRF7jRa+ rhO34tsvb6ANGLH7txIxrTfp1C/VeZhZIIV3xhyyk+XO/7zv3PFKfFShw5qLHKq1EbML nxBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=L2iIthzQ3Mqn0qPR+9i7K6uncY9n1uibxmIy4im4uGk=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=dLhb++3HcFpuzABlXBJQTGNZHmeVWynNIYHEewPzl3Iguyot/8iQc7AlRQSOlR8Mlm WPQu9D9DWFSIezNiubiHunhgl3CIZysX0t3PKbJ5s+6GIuCLbV1UdknDjoWaNCB4nrOm wnd02pADX+HR+o9zQFJCAb0PSGckRkrmYYJ/QtKAcBQDektb5I5GmJjKGmibeeIU2TB8 YNiDo/tW06qC/aGfG8F6Dot7IEdP6Q2A52EnH+1zSjvI7zWQrrfJxgHFXiGg8KiAdAdi L51hs1vujY0RKHXOna1n6JpVGc2NS0AUoFwqW3U9EUTBxjTmyaE8Gmu3bQ+GFxKyjc6w x6bg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eymfbaZx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434a36c7a9fsm43017865e9.44.2024.11.26.09.02.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 09:02:30 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 4/9] docs/system/arm/emulation: add FEAT_SSBS2 Date: Tue, 26 Nov 2024 17:02:19 +0000 Message-Id: <20241126170224.2926917-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241126170224.2926917-1-peter.maydell@linaro.org> References: <20241126170224.2926917-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier We implemented this at the same times as FEAT_SSBS, but forgot to list it in the documentation. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson Message-id: 20241122225049.1617774-4-pierrick.bouvier@linaro.org Reviewed-by: Peter Maydell [PMM: improve commit message] Signed-off-by: Peter Maydell --- docs/system/arm/emulation.rst | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index af613b9c8b8..50d0250b1eb 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -137,6 +137,7 @@ the following architecture extensions: - FEAT_SVE2 (Scalable Vector Extension version 2) - FEAT_SPECRES (Speculation restriction instructions) - FEAT_SSBS (Speculative Store Bypass Safe) +- FEAT_SSBS2 (MRS and MSR instructions for SSBS version 2) - FEAT_TGran16K (Support for 16KB memory translation granule size at stage 1) - FEAT_TGran4K (Support for 4KB memory translation granule size at stage 1) - FEAT_TGran64K (Support for 64KB memory translation granule size at stage 1) From patchwork Tue Nov 26 17:02:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 845609 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp339728wru; Tue, 26 Nov 2024 09:03:19 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCV5QIefkSuT/DktFEaYPLgEdY6heygmEU8rRCH+zcOSLTFt676vEF5Ss3mIWEw+9Wrs8xD9tg==@linaro.org X-Google-Smtp-Source: AGHT+IFgb5LuCZUXi2xF2UV9QUVDcZH01Uy6OKySH8VDSBraIAds35Y8EnTkKtjjNH31T7CBAtJc X-Received: by 2002:a05:6512:33c9:b0:53d:e5c0:b9bf with SMTP id 2adb3069b0e04-53de5c0bda1mr6596800e87.52.1732640599399; Tue, 26 Nov 2024 09:03:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732640599; cv=none; d=google.com; s=arc-20240605; b=gxIthhZPM991ouxxz97HLtIP6rP7vqVqh4kwAcq2VZVMzobBjlGtccW4YgP5nH0Lmv 3kyGS0u5xnGaR3EqlsykzpP8iB9idNJm6JvvU2J/uGIIIpEzJbmO2RXFIbqQ0dKD8MLh BAHAYBrNOui1w0VB1QcUTJbr1/pncUsmdos+n6lUZcQRWVptupyDwuPhNX89FVwjmUPS yS8yfUShqs4Dt/V55sItrU3yH7aW/owRDD7ywJfqEDMlMsHmX+l0VSkph5cw93O6LGPD JYMIYS7vLDH0eX2njeXPUS5b5aiBI0LpT64+8XGRnkCTWFeUcvv0BSrMZoN2k6EUaWCV JvEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=0oz9i3H0TButpl28/4xQ6x9LFZbz5aAAKUdubGU30ls=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=Wusc5mo6QF/BBRU2YbDi81Za18QFWLQYqTf8vlxdz+7iQZvH9aZuCESwPECNoBVqsO KhDvtWdP6othwANM3zTJPtquD6IMgZRCZQZjgt+yyf4Kj7WbArKf4QMguOWTI/Yj70if tNDmxF5IlQWoybzkkrksiBOLGGM2DPzlzyoaioiXxOHw7UZLZysWZ9Pn6KbJ2l13jYas Wg1Y7pyNzloNekanSyK06InJTriwoIgvE2EaXBtjHcRIrhwTeCb/oOBQMcugDN0M8gU1 PMIj9uIvoD/eE39HGGm7vce3vOCqshQO5inAxFeUodLlCnrsHaRoKsNwb+l409ST97T6 T4OQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=u2BI6OOo; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434a36c7a9fsm43017865e9.44.2024.11.26.09.02.31 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 09:02:31 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 5/9] target/arm/tcg/: fix typo in FEAT name Date: Tue, 26 Nov 2024 17:02:20 +0000 Message-Id: <20241126170224.2926917-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241126170224.2926917-1-peter.maydell@linaro.org> References: <20241126170224.2926917-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Signed-off-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-id: 20241122225049.1617774-5-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell --- target/arm/tcg/cpu32.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c index 2a77701f8dc..2ad21825255 100644 --- a/target/arm/tcg/cpu32.c +++ b/target/arm/tcg/cpu32.c @@ -71,7 +71,7 @@ void aa32_max_features(ARMCPU *cpu) cpu->isar.id_mmfr5 = t; t = cpu->isar.id_pfr0; - t = FIELD_DP32(t, ID_PFR0, CSV2, 2); /* FEAT_CVS2 */ + t = FIELD_DP32(t, ID_PFR0, CSV2, 2); /* FEAT_CSV2 */ t = FIELD_DP32(t, ID_PFR0, DIT, 1); /* FEAT_DIT */ t = FIELD_DP32(t, ID_PFR0, RAS, 1); /* FEAT_RAS */ cpu->isar.id_pfr0 = t; From patchwork Tue Nov 26 17:02:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 845613 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp340741wru; Tue, 26 Nov 2024 09:04:29 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVzGbk+sYv3PSfjoznOlqM5x7jtFKVVsAC1Y/r73d98DR6w8ULK/QFsJyWMVCnrh9ePrtD+mw==@linaro.org X-Google-Smtp-Source: AGHT+IGvr6ZPf2STZxuxfycpczWZSV95tmK5JOVhs1W7ov0910tdnM5jRvPVuXrTOiB8tJXK6yyQ X-Received: by 2002:a05:620a:2915:b0:7b6:6642:b5f0 with SMTP id af79cd13be357-7b67c2929bfmr3564285a.11.1732640668869; Tue, 26 Nov 2024 09:04:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732640668; cv=none; d=google.com; s=arc-20240605; b=cu9xcOdwSzhnD3jAvKgMIkDEopdYr6qtEEwEq8lOwf92LMPY3Qsw2vlB2HMyT9zgKp RjJVRMZofmXzl1ThiKRy4y4uk8SBfWIyP1PK2P3XGTCPHroI/7dsWOr1hP0YOwEeKu+9 hVTm3T6PIhFmAW0FR9WSPTyPaUAe1VegVyFOcQswNWLx+WSWrEbKHTTDBwTsq6xLYeV3 +GyPxDc9iMlGCNPvJL+9D6pC6EQ4HXeQOFnqXp+ocWmX92pmxtS5C5gw4N/SQE5krPUN 7eUtdp1Po8JI5+vx7jMhXiGSW5Zt5EKBdSOgNPiTrLAeGBq5eP3n2QacIKkgDf8CY+aY bbmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=0cbrcWqiZcZEEu28Dctl5YQCYg/B0KzZI5DzhtcRSiQ=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=gwSTrBNdgsbwMMoPx6hGVz1eQL81gbZSux/NBU1MQq2MuJ2J+vMbN+rhTPCkGy39m5 eTbV0vuTwAolbZc21mCiPfajqdhVD71/NSlPVxj6zP1mMhk/gH2ariicpCj5HxXXFozF hOiJ9M/7KF/ijHLMz+rl5f0XDr7hXDZXgCY/W72VvesL9xLNQ0UiXemd1tcotiP23lgj P+KZAF8Nl4jaT9ugP7Kn9mi2Urpr6H3mXKBBoBaJTKlPv8b/r+j4rRrRN7twKmjxlppQ 4LpBBOOX3VhisBfuo2Iaf6NzMC762w6ECimsRFEUslI0YyqfnOZ7xEYyyCCztZEjnUx8 oKhQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JPDIOoAG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434a36c7a9fsm43017865e9.44.2024.11.26.09.02.31 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 09:02:31 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 6/9] docs/system/arm/: add FEAT_MTE_ASYNC Date: Tue, 26 Nov 2024 17:02:21 +0000 Message-Id: <20241126170224.2926917-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241126170224.2926917-1-peter.maydell@linaro.org> References: <20241126170224.2926917-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier We already implement FEAT_MTE_ASYNC; we just forgot to list it in the documentation. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson Message-id: 20241122225049.1617774-6-pierrick.bouvier@linaro.org [PMM: expand commit message] Signed-off-by: Peter Maydell --- docs/system/arm/emulation.rst | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 50d0250b1eb..47f5123a31d 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -94,6 +94,7 @@ the following architecture extensions: - FEAT_MTE2 (Memory Tagging Extension) - FEAT_MTE3 (MTE Asymmetric Fault Handling) - FEAT_MTE_ASYM_FAULT (Memory tagging asymmetric faults) +- FEAT_MTE_ASYNC (Asynchronous reporting of Tag Check Fault) - FEAT_NMI (Non-maskable Interrupt) - FEAT_NV (Nested Virtualization) - FEAT_NV2 (Enhanced nested virtualization support) From patchwork Tue Nov 26 17:02:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 845608 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp339749wru; Tue, 26 Nov 2024 09:03:21 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUzf2NuRtiO8WpN/pBtUOR0dLEaGALG9nx6j/sSzZdliPbKmY8/OTPPxJ2eghkkblj6IPBmug==@linaro.org X-Google-Smtp-Source: AGHT+IGMGodfbkEsOZtGbeWn6H9nlp3T4Qxba2ViKzPU3muc3eBq7aHNHlKFSsosbz9gvjTvyM5x X-Received: by 2002:a17:907:7711:b0:a9a:eeb:b26a with SMTP id a640c23a62f3a-aa57fa9996dmr1627766b.1.1732640599183; Tue, 26 Nov 2024 09:03:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732640599; cv=none; d=google.com; s=arc-20240605; b=ilagoZ1oHIe3LwD2PVi76dT8jmBWQZGMqunVnw1EWuGzZx0HfFnq/DAIZhDsNSq6tX hjraXcnOowELnL9eeTlSVjNv+miyoaEfZftVzAJ8mt5o/6sOYCN8oC2066bWDeXTkYJ0 9h6CgmypWkSDj9tERDGVEsZoPhid8VOpTZL0DbrZvimBrKYNsw6VJRxv2R+6nrHY6FlA jhLZvYA9qm4mAgGEWHYlr8mkMH4gUbhLVuchmn6S6JlCums4TWcFU0zjKF8/x3hARbY/ fhAwgdfijK5+HkHw8vZBME9Bjb1fhQcNTQ+5oMlYbWHykWEuiOqnebvIpD5FqpyX9PRH 9tcA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=KhNpoYBpBgMtrTtvaiAKYKeBjehZXk/NeYq/vlyz2aU=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=j9xo0FJJxkr1b4r+T85tQ63J6vQcgpgCKZXBpE79BmRfC4jkD27zo5JE/OTKHdOKxs 3y3O+f1+am83Wz1K7vsG3Y7cK0H3XKiM8+JALZL8wsGbkKqEbiGoNm5Sxi/cZ0hMsGv4 GJekYDeILMbr83AKvenIF9diqls5dm4y/KFQFl4uf2oCLpd/Bt+pzIWaNSWPEJ98OW2v y4rXdR+lvz1W7lwdFYJxKrF4KgRPtPT8+leR6I4Ed9wM0ciR41QVTe58ITQW6KLWwxK8 WaOyab3z0fKaFSkilqV9DMkWlWpcjJk3n0JsHaSmSnu5YcDwZdEnhZnRoz1T/2yhtmEA 8KIQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DFlE3bZ4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434a36c7a9fsm43017865e9.44.2024.11.26.09.02.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 09:02:32 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 7/9] docs/system/arm/: add FEAT_DoubleLock Date: Tue, 26 Nov 2024 17:02:22 +0000 Message-Id: <20241126170224.2926917-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241126170224.2926917-1-peter.maydell@linaro.org> References: <20241126170224.2926917-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier We already implement FEAT_DoubleLock (see commit f94a6df5dd6a7) when the ID registers call for it. This feature is actually one that must *not* be implemented in v9.0, but since our documentation lists everything we can emulate, we should include FEAT_DoubleLock in the list. Signed-off-by: Pierrick Bouvier Message-id: 20241122225049.1617774-7-pierrick.bouvier@linaro.org Reviewed-by: Peter Maydell [PMM: expand commit message] Signed-off-by: Peter Maydell --- docs/system/arm/emulation.rst | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 47f5123a31d..38534dcdd32 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -37,6 +37,7 @@ the following architecture extensions: - FEAT_CSV3 (Cache speculation variant 3) - FEAT_DGH (Data gathering hint) - FEAT_DIT (Data Independent Timing instructions) +- FEAT_DoubleLock (Double Lock) - FEAT_DPB (DC CVAP instruction) - FEAT_DPB2 (DC CVADP instruction) - FEAT_Debugv8p1 (Debug with VHE) From patchwork Tue Nov 26 17:02:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 845611 Delivered-To: patch@linaro.org Received: by 2002:a5d:6989:0:b0:382:43a8:7b94 with SMTP id g9csp340307wru; Tue, 26 Nov 2024 09:03:59 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCX3EUBUFm9oa31KwdnYxu2jEXQt59Yuk16vE7rcvXnLZID+UDMXH/qAGqeCLRRrhimtDkwQ0w==@linaro.org X-Google-Smtp-Source: AGHT+IEmtnE4poKzKJ6LOOh8ilUQm2ckOAeGWmDZJpkTzKISPe4MpyyzRmKlB/z7/TeYmJEF5k2K X-Received: by 2002:a05:6214:629:b0:6d4:1d18:3365 with SMTP id 6a1803df08f44-6d4513446d3mr274391526d6.38.1732640638962; Tue, 26 Nov 2024 09:03:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1732640638; cv=none; d=google.com; s=arc-20240605; b=gRcS/1b21OH7PIY+Oz6JKY6A0aY2HV7lrirab2uYxubHrNbLwW11MX3/zL0Yfv1PM4 dFtfG62xFFHO06vPgpX+R7/n9Tw4o8vgtexQ7YOcjba6wbj8y4T9IDWTB1BAnHMf3zXI Rixb4yxmTuHckIrv6SsL02/ogvuJycupPAzLKuOMZUTTTjUQcTUlalSSwd4DP1sqYZ5n 6T1mrUCqovbAyy28JGnTztWuDD8eUNv1otZl4clMadG3I3Wjl9KmhrGxsfNjQMtuFYMa IOREEbua8xtg+EMM/yp2EpT6OI0Iiw8RGrDkQVogww+wjPZQuZRGzPCE54AIY62TwBXr OeBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=Bia3Nu7mTs0/BpblAmMLwXurER5c+Mz/qR+4adC7kjU=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=Z2F97J1WzGmaMof9GJdHfEmZ+h7r1zUK1kbsQEdrwYnXm80V9GciuLuv+TbEJz2Zrc rI/GwAc/Y7+Mwyckwr02yvkhoMpJoEHiuEfVbo49wdbIrRx10Ze0UBdDR9F8NmL5b9qJ U2+iaahtjUNvjIfLn7dIFQ2+rXBtma1DgGaPcMM9VFt9Tsq0DYr+5mEbhrxc8vnYTce5 1HfM0jw/L8yg4TPlWxeEKau9wGC/2YnP87WY0v2Dzk1uYJRWErz1ODe4+PrtDKsX2BRA 4KITgbDSn5XgVpzxS+jsJ2cVk06JSbMYZgNtKlNLF3yr9WJoAJVDKJtzW2yfCUYT+2u6 8fyw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IU2mHCcQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434a36c7a9fsm43017865e9.44.2024.11.26.09.02.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 09:02:46 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 8/9] docs/system/arm/fby35: update link to product page Date: Tue, 26 Nov 2024 17:02:23 +0000 Message-Id: <20241126170224.2926917-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241126170224.2926917-1-peter.maydell@linaro.org> References: <20241126170224.2926917-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Signed-off-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Tested-by: Philippe Mathieu-Daudé Message-id: 20241122225049.1617774-8-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell --- docs/system/arm/fby35.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/system/arm/fby35.rst b/docs/system/arm/fby35.rst index 742b887d44c..bf6da6baa2a 100644 --- a/docs/system/arm/fby35.rst +++ b/docs/system/arm/fby35.rst @@ -12,7 +12,7 @@ include various compute accelerators (video, inferencing, etc). At the moment, only the first server slot's BIC is included. Yosemite v3.5 is itself a sled which fits into a 40U chassis, and 3 sleds -can be fit into a chassis. See `here `__ +can be fit into a chassis. See `here `__ for an example. In this generation, the BMC is an AST2600 and each BIC is an AST1030. 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434a36c7a9fsm43017865e9.44.2024.11.26.09.02.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 09:02:46 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 9/9] docs/system/arm/aspeed: add missing model supermicrox11spi-bmc Date: Tue, 26 Nov 2024 17:02:24 +0000 Message-Id: <20241126170224.2926917-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241126170224.2926917-1-peter.maydell@linaro.org> References: <20241126170224.2926917-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Signed-off-by: Pierrick Bouvier Reviewed-by: Andrew Jeffery Message-id: 20241122225049.1617774-13-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell --- docs/system/arm/aspeed.rst | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst index 2e9ba12f7ae..d17fe7a4fc8 100644 --- a/docs/system/arm/aspeed.rst +++ b/docs/system/arm/aspeed.rst @@ -1,5 +1,5 @@ -Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``sonorapass-bmc``, ``supermicrox11-bmc``, ``tiogapass-bmc``, ``tacoma-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``) -======================================================================================================================================================================================================================================================================================================================================================================================================== +Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``sonorapass-bmc``, ``supermicrox11-bmc``, ``supermicrox11spi-bmc``, ``tiogapass-bmc``, ``tacoma-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``) +================================================================================================================================================================================================================================================================================================================================================================================================================================== The QEMU Aspeed machines model BMCs of various OpenPOWER systems and Aspeed evaluation boards. They are based on different releases of the @@ -15,7 +15,8 @@ AST2400 SoC based machines : - ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC - ``quanta-q71l-bmc`` OpenBMC Quanta BMC -- ``supermicrox11-bmc`` Supermicro X11 BMC +- ``supermicrox11-bmc`` Supermicro X11 BMC (ARM926EJ-S) +- ``supermicrox11spi-bmc`` Supermicro X11 SPI BMC (ARM1176) AST2500 SoC based machines :