From patchwork Mon Dec 9 16:56:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raj Kumar Bhagat X-Patchwork-Id: 848718 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E767155327; Mon, 9 Dec 2024 16:57:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733763450; cv=none; b=KzrpOMm7o+fZH2QtDeqUYeJRyyqwO8eT6ojoCw12aNH93aYxSOXH9CHGUSWbM6OWny47lKXOzEXmBnEJbp1q/mnpmqi7qqJCwRC8YpmOi1B2salspt7xHANrFQPh+WiBrrTIIvh9QF7SPrrL/zSh+JIFXL8XQmApUADqk2Jko4U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733763450; c=relaxed/simple; bh=TiuT49jfB2Mxc2Ub9BLB0bcj0MphOdRFDXDLedHJQ9U=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=OXvGJ4SsXgg5KbFcc55KOblrEfKapTsBniugr7t6MD81mnudk/XSG4G/0fDGUOGIz7Bfx+SLWTS/9ek3bc45Y4Yg8jLB58cGG+6lMB51PEh17Eb7JQpvuE8ojhjTyZwANTUqDpWjpGuoOEMnpjqz1HDykC3uXvDPDmAXgOJpcMk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=fXHxId9g; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="fXHxId9g" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4B9Aw0UV014664; Mon, 9 Dec 2024 16:57:25 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= GcXk4MozWcgpt2wOzcHjeG5IN/KsMcmZYEFOXIESlW4=; b=fXHxId9gKADSmA8/ 1dI6JJcmFDntQlkL6PxtwTz305zkr0gjEBzLHRABl09zOergd6eTe1KYrTQYQ83f LJyYJTfOftpl3NxBLh/VLn8edEZpa3JCpXKME6XQJErRh5J94qNPaHxVjIVzSFlj 49W8/Thvfi7V6KomcBuU7AQClnUXLRT2dlS2qZRu2OJ5uasqHvfHhTaMyy5qZua0 T9X+v9HOGRn6VP7sWL0y6GD2KfSk1fJo0/FcC4mvxjHXbv8ss40Tjh4CiyOlRnp9 00Er9aavt/BT6yVWR8ko35OpEe+1SwMV+an6CouwXMYACefrspQQtQSHqihu8tO9 oG3JKg== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 43dy8ts6wa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 09 Dec 2024 16:57:24 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4B9GvO4H018493 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 9 Dec 2024 16:57:24 GMT Received: from hu-rajkbhag-blr.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 9 Dec 2024 08:57:20 -0800 From: Raj Kumar Bhagat To: CC: , Kalle Valo , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Jeff Johnson , , Balamurugan S , "P Praneesh" , Raj Kumar Bhagat Subject: [PATCH v3 05/13] wifi: ath12k: avoid m3 firmware download in AHB device IPQ5332 Date: Mon, 9 Dec 2024 22:26:36 +0530 Message-ID: <20241209165644.1680167-6-quic_rajkbhag@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241209165644.1680167-1-quic_rajkbhag@quicinc.com> References: <20241209165644.1680167-1-quic_rajkbhag@quicinc.com> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: yfenSY__1GTpABwsGop1YooKl8sCq7OJ X-Proofpoint-GUID: yfenSY__1GTpABwsGop1YooKl8sCq7OJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 priorityscore=1501 mlxlogscore=999 clxscore=1015 mlxscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 phishscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412090132 From: Balamurugan S Current ath12k devices, QCN9274 and WCN7850, supports m3.bin firmware download through ath12k driver. The new ath12k AHB based device IPQ5332 supports m3 firmware download through remoteproc driver. Hence, add new parameter (needs_m3_fw) in ath12k_hw_params to avoid m3 firmware download in IPQ5332. Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1 Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1 Signed-off-by: Balamurugan S Co-developed-by: P Praneesh Signed-off-by: P Praneesh Signed-off-by: Raj Kumar Bhagat --- drivers/net/wireless/ath/ath12k/hw.c | 8 ++++++++ drivers/net/wireless/ath/ath12k/hw.h | 2 ++ drivers/net/wireless/ath/ath12k/qmi.c | 28 ++++++++++++++++----------- 3 files changed, 27 insertions(+), 11 deletions(-) diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c index c9cddb1417df..f7035669bc6f 100644 --- a/drivers/net/wireless/ath/ath12k/hw.c +++ b/drivers/net/wireless/ath/ath12k/hw.c @@ -1299,6 +1299,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = { .iova_mask = 0, .supports_aspm = false, + + .needs_m3_fw = true, }, { .name = "wcn7850 hw2.0", @@ -1379,6 +1381,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = { .iova_mask = ATH12K_PCIE_MAX_PAYLOAD_SIZE - 1, .supports_aspm = true, + + .needs_m3_fw = true, }, { .name = "qcn9274 hw2.0", @@ -1455,6 +1459,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = { .iova_mask = 0, .supports_aspm = false, + + .needs_m3_fw = true, }, { .name = "ipq5332 hw1.0", @@ -1526,6 +1532,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = { .supports_dynamic_smps_6ghz = false, .iova_mask = 0, .supports_aspm = false, + + .needs_m3_fw = false, }, }; diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h index 36bec99e9e4d..241aa83ddbdd 100644 --- a/drivers/net/wireless/ath/ath12k/hw.h +++ b/drivers/net/wireless/ath/ath12k/hw.h @@ -220,6 +220,8 @@ struct ath12k_hw_params { bool supports_dynamic_smps_6ghz; u32 iova_mask; + + bool needs_m3_fw; }; struct ath12k_hw_ops { diff --git a/drivers/net/wireless/ath/ath12k/qmi.c b/drivers/net/wireless/ath/ath12k/qmi.c index ba3cd2342465..7a29a24b9268 100644 --- a/drivers/net/wireless/ath/ath12k/qmi.c +++ b/drivers/net/wireless/ath/ath12k/qmi.c @@ -2082,10 +2082,12 @@ int ath12k_qmi_host_cap_send(struct ath12k_base *ab) req.bdf_support_valid = 1; req.bdf_support = 1; - req.m3_support_valid = 1; - req.m3_support = 1; - req.m3_cache_support_valid = 1; - req.m3_cache_support = 1; + if (ab->hw_params->needs_m3_fw) { + req.m3_support_valid = 1; + req.m3_support = 1; + req.m3_cache_support_valid = 1; + req.m3_cache_support = 1; + } req.cal_done_valid = 1; req.cal_done = ab->qmi.cal_done; @@ -2726,6 +2728,9 @@ static void ath12k_qmi_m3_free(struct ath12k_base *ab) { struct m3_mem_region *m3_mem = &ab->qmi.m3_mem; + if (!ab->hw_params->needs_m3_fw) + return; + if (!m3_mem->vaddr) return; @@ -2806,15 +2811,16 @@ int ath12k_qmi_wlanfw_m3_info_send(struct ath12k_base *ab) struct qmi_txn txn; int ret = 0; - ret = ath12k_qmi_m3_load(ab); - if (ret) { - ath12k_err(ab, "failed to load m3 firmware: %d", ret); - return ret; + if (ab->hw_params->needs_m3_fw) { + ret = ath12k_qmi_m3_load(ab); + if (ret) { + ath12k_err(ab, "failed to load m3 firmware: %d", ret); + return ret; + } + req.addr = m3_mem->paddr; + req.size = m3_mem->size; } - req.addr = m3_mem->paddr; - req.size = m3_mem->size; - ret = qmi_txn_init(&ab->qmi.handle, &txn, qmi_wlanfw_m3_info_resp_msg_v01_ei, &resp); if (ret < 0) From patchwork Mon Dec 9 16:56:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raj Kumar Bhagat X-Patchwork-Id: 848717 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C718E1BEF63; Mon, 9 Dec 2024 16:57:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733763454; cv=none; b=SwlXEH0FbYhopchW+ZFzSX7UnfjVTKDa56EtKIYDrR6I468m/xrFNIvAjXbVagMtWxswbGJFcMCGBaXmRK1XyOmm7lfju/0kt+s3Yhzgr8wBHmHXySxLsF5JkPQKhE3/yOrn/WZCSj9HV+7s1rsQjnaxVto7kcFgrSbW7+RD7PY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733763454; c=relaxed/simple; bh=WafydAqlUWvOFeXFz0RRx0mlsK6QIWkCE74JudVnGjg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=vAuyqfqwsqdY3mcmD8mYQJ31EpeSFWedo3tLVI+j1DhISzqrWjjm2dKwLY9a1ObIuFZfrDU51t0tL3eo/J6GlQF+AdL0YqbsEtF8kGUL9w8aRlpojuZ6FKbqaWCyyjMZW3Zw8CSzGIF553n3SpNKB2nuhVA9FL8IjJEZVRytg9Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=cXckFDJa; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="cXckFDJa" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4B9Aw5c5015555; Mon, 9 Dec 2024 16:57:29 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= dlgCgoFthfRrmavHzLstpwx+DhkGmsgc0ONflCN9zaE=; b=cXckFDJaBgwfdFhm I7K197RWteLBgqi5eqjmcD17g9djeiE8g4+VKlg6Vpz4tCTbz3zBWLlQ/4hw1Pw5 akoNv8blK2syhMs2qt9/yvwtg07p8dFyAeyVe4He2LQGmNG4NEMk6tS/Ncdj9X2h Nxh6yro6XED9Mei74kzKGF/nYKHZ0cGfk2L0aZyB972jZaP2IC8tAc4bKFBnBAMF Dy7Gfr03LjEcYcjN10fE7ALTNlUJ4z46nPxlqqfiyYMzkaRf5UNgzy2syDdiHyK3 KFTovo2A5fXJFVnPdZE4Vzv1LemY1DXlwy1/fxRs/eRb1gtPzTNp4pdOhOE5cmwF fAKl9g== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 43dy8ts6wm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 09 Dec 2024 16:57:28 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4B9GvS1U004491 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 9 Dec 2024 16:57:28 GMT Received: from hu-rajkbhag-blr.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 9 Dec 2024 08:57:24 -0800 From: Raj Kumar Bhagat To: CC: , Kalle Valo , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Jeff Johnson , , Balamurugan S , "P Praneesh" , Raj Kumar Bhagat Subject: [PATCH v3 06/13] wifi: ath12k: Add hw_params to remap CE register space for IPQ5332 Date: Mon, 9 Dec 2024 22:26:37 +0530 Message-ID: <20241209165644.1680167-7-quic_rajkbhag@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241209165644.1680167-1-quic_rajkbhag@quicinc.com> References: <20241209165644.1680167-1-quic_rajkbhag@quicinc.com> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 87m7HWnfIpB0B_LeoqYE0k98fF51ZWTn X-Proofpoint-GUID: 87m7HWnfIpB0B_LeoqYE0k98fF51ZWTn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 priorityscore=1501 mlxlogscore=999 clxscore=1015 mlxscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 phishscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412090132 From: Balamurugan S For IPQ5332 CE register space is moved out of WCSS region and the space is not contiguous. Hence, add hardware params (ce_ie_addr & ce_remap) for IPQ5332. These parameters would be used by Ath12k AHB driver (in subsequent patches) to remap the CE registers to a new space for accessing them. Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1 Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1 Signed-off-by: Balamurugan S Co-developed-by: P Praneesh Signed-off-by: P Praneesh Signed-off-by: Raj Kumar Bhagat --- drivers/net/wireless/ath/ath12k/ce.h | 11 +++++++++ drivers/net/wireless/ath/ath12k/core.h | 4 ++++ drivers/net/wireless/ath/ath12k/hal.h | 4 ++++ drivers/net/wireless/ath/ath12k/hw.c | 31 ++++++++++++++++++++++---- drivers/net/wireless/ath/ath12k/hw.h | 2 ++ 5 files changed, 48 insertions(+), 4 deletions(-) diff --git a/drivers/net/wireless/ath/ath12k/ce.h b/drivers/net/wireless/ath/ath12k/ce.h index 6b1a356f43be..75c9f8f1f7c6 100644 --- a/drivers/net/wireless/ath/ath12k/ce.h +++ b/drivers/net/wireless/ath/ath12k/ce.h @@ -76,6 +76,17 @@ struct ce_pipe_config { __le32 reserved; }; +struct ce_ie_addr { + u32 ie1_reg_addr; + u32 ie2_reg_addr; + u32 ie3_reg_addr; +}; + +struct ce_remap { + u32 base; + u32 size; +}; + struct ce_attr { /* CE_ATTR_* values */ unsigned int flags; diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h index 1737fb8f765d..e45ff85b675d 100644 --- a/drivers/net/wireless/ath/ath12k/core.h +++ b/drivers/net/wireless/ath/ath12k/core.h @@ -872,6 +872,10 @@ struct ath12k_base { void __iomem *mem; unsigned long mem_len; + void __iomem *mem_ce; + u32 ce_remap_base_addr; + bool ce_remap; + struct { enum ath12k_bus bus; const struct ath12k_hif_ops *ops; diff --git a/drivers/net/wireless/ath/ath12k/hal.h b/drivers/net/wireless/ath/ath12k/hal.h index 69579f118b81..70dbd460dae3 100644 --- a/drivers/net/wireless/ath/ath12k/hal.h +++ b/drivers/net/wireless/ath/ath12k/hal.h @@ -11,6 +11,7 @@ #include "rx_desc.h" struct ath12k_base; +#define HAL_CE_REMAP_REG_BASE (ab->ce_remap_base_addr) #define HAL_LINK_DESC_SIZE (32 << 2) #define HAL_LINK_DESC_ALIGN 128 @@ -372,6 +373,9 @@ struct ath12k_base; * ath12k_hal_rx_desc_get_err(). */ +#define HAL_IPQ5332_CE_WFSS_REG_BASE 0x740000 +#define HAL_IPQ5332_CE_SIZE 0x100000 + enum hal_srng_ring_id { HAL_SRNG_RING_ID_REO2SW0 = 0, HAL_SRNG_RING_ID_REO2SW1, diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c index f7035669bc6f..494963b19fe9 100644 --- a/drivers/net/wireless/ath/ath12k/hw.c +++ b/drivers/net/wireless/ath/ath12k/hw.c @@ -1106,10 +1106,14 @@ static const struct ath12k_hw_regs ipq5332_regs = { .hal_ppe_rel_ring_base = 0x0000046c, /* CE address */ - .hal_umac_ce0_src_reg_base = 0x00740000, - .hal_umac_ce0_dest_reg_base = 0x00741000, - .hal_umac_ce1_src_reg_base = 0x00742000, - .hal_umac_ce1_dest_reg_base = 0x00743000, + .hal_umac_ce0_src_reg_base = 0x00740000 - + HAL_IPQ5332_CE_WFSS_REG_BASE, + .hal_umac_ce0_dest_reg_base = 0x00741000 - + HAL_IPQ5332_CE_WFSS_REG_BASE, + .hal_umac_ce1_src_reg_base = 0x00742000 - + HAL_IPQ5332_CE_WFSS_REG_BASE, + .hal_umac_ce1_dest_reg_base = 0x00743000 - + HAL_IPQ5332_CE_WFSS_REG_BASE, }; static const struct ath12k_hw_regs wcn7850_regs = { @@ -1223,6 +1227,17 @@ static const struct ath12k_hw_hal_params ath12k_hw_hal_params_ipq5332 = { HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW4_EN, }; +static const struct ce_ie_addr ath12k_ce_ie_addr_ipq5332 = { + .ie1_reg_addr = CE_HOST_IE_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE, + .ie2_reg_addr = CE_HOST_IE_2_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE, + .ie3_reg_addr = CE_HOST_IE_3_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE, +}; + +static const struct ce_remap ath12k_ce_remap_ipq5332 = { + .base = HAL_IPQ5332_CE_WFSS_REG_BASE, + .size = HAL_IPQ5332_CE_SIZE, +}; + static const struct ath12k_hw_params ath12k_hw_params[] = { { .name = "qcn9274 hw1.0", @@ -1301,6 +1316,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = { .supports_aspm = false, .needs_m3_fw = true, + .ce_ie_addr = NULL, + .ce_remap = NULL, }, { .name = "wcn7850 hw2.0", @@ -1383,6 +1400,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = { .supports_aspm = true, .needs_m3_fw = true, + .ce_ie_addr = NULL, + .ce_remap = NULL, }, { .name = "qcn9274 hw2.0", @@ -1461,6 +1480,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = { .supports_aspm = false, .needs_m3_fw = true, + .ce_ie_addr = NULL, + .ce_remap = NULL, }, { .name = "ipq5332 hw1.0", @@ -1534,6 +1555,8 @@ static const struct ath12k_hw_params ath12k_hw_params[] = { .supports_aspm = false, .needs_m3_fw = false, + .ce_ie_addr = &ath12k_ce_ie_addr_ipq5332, + .ce_remap = &ath12k_ce_remap_ipq5332, }, }; diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h index 241aa83ddbdd..ee37e50476a4 100644 --- a/drivers/net/wireless/ath/ath12k/hw.h +++ b/drivers/net/wireless/ath/ath12k/hw.h @@ -222,6 +222,8 @@ struct ath12k_hw_params { u32 iova_mask; bool needs_m3_fw; + const struct ce_ie_addr *ce_ie_addr; + const struct ce_remap *ce_remap; }; struct ath12k_hw_ops { From patchwork Mon Dec 9 16:56:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raj Kumar Bhagat X-Patchwork-Id: 848716 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 784FC1D63FD; Mon, 9 Dec 2024 16:57:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733763458; cv=none; b=cqrk65FEIjaP/dIudGdwdSkyZh6vPxxi4EEmKkoRw2eIinMxX28YwihahdMPne6DO+rUwMeNNlutxGVF40d7yUYzvqOqB6hQgKkosI8E2DK1IPS9Zfw1NBnCExHflpjaginA6BS+lSX1q+Ojc8I1702MZengnKaj8d86Aq3Xwlc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733763458; c=relaxed/simple; bh=9Wu1RfPOKIaNWaYh3FvRR7ER2UcpAV6qZy2KHkVDvN8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ERuXfARkBWkYHcVxHfflfQspzGCgokxVM715ZRRCUyMWV4v/keitRj3akoUG1AMykI9is3nyEYcd3SNi0RGecUWCZKgOr9mko4fT7G8sbJji5QCuIDOkmdrYLnnrB2jem+ikImLEAePmfwSd5Jcfe2YITAL4LbLKZklKuuWjTC8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=d+w7DfaA; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="d+w7DfaA" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4B9E6u5O007101; Mon, 9 Dec 2024 16:57:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= yl2jGQGupozAv4/ovMWYLVpQY3b41Kbl3JoAMxpN4Fg=; b=d+w7DfaAR6Hc38Q+ 54lPlHBY+ZHtdlha03Ww2gfJYKOUHwOp+FBSkyAdxcOG5EX545uF236EwCJXwNiU Bp9EHuWGC84kg28JRzmz5DDoYd7h6qI1tGgmAUsLbRKzH+I7enj2HBoByauxcQo+ B3SYJ++Rk6rNzaV8DA6IRJqg72yaaIQEjQVKhYJWimf2MZgOhdx6PxhEMws428T8 WL/OYxK8iTstQ5PIytyTSkg/TAcXFw0PQWi9E+QBm+8BE93XiKVji6YA62cX21Me iPbMfrQB1keU+I+uutg66Bhpw4pfheNtaGEBl+nDA5xpdeOAQt0j6Q/SF4l1Praj lK2t2A== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 43e21bgj4v-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 09 Dec 2024 16:57:31 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4B9GvVOd018524 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 9 Dec 2024 16:57:31 GMT Received: from hu-rajkbhag-blr.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 9 Dec 2024 08:57:28 -0800 From: Raj Kumar Bhagat To: CC: , Kalle Valo , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Jeff Johnson , , Raj Kumar Bhagat Subject: [PATCH v3 07/13] wifi: ath12k: add support for fixed QMI firmware memory Date: Mon, 9 Dec 2024 22:26:38 +0530 Message-ID: <20241209165644.1680167-8-quic_rajkbhag@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241209165644.1680167-1-quic_rajkbhag@quicinc.com> References: <20241209165644.1680167-1-quic_rajkbhag@quicinc.com> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: g5P5HBtNvHqcEhneZHF-_RDra0SO6uNN X-Proofpoint-ORIG-GUID: g5P5HBtNvHqcEhneZHF-_RDra0SO6uNN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 malwarescore=0 lowpriorityscore=0 mlxlogscore=999 priorityscore=1501 spamscore=0 impostorscore=0 adultscore=0 bulkscore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412090132 IPQ5332 firmware supports only fixed QMI firmware memory. Hence, add support to read reserved fixed memory region from device-tree and provide the reserved memory segments for firmware to use during QMI firmware memory request. Note that the ability to set the fixed memory will be introduced in a subsequent patch. Currently, the flag remains unset by default, ensuring that existing chipsets are unaffected. Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1 Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1 Signed-off-by: Raj Kumar Bhagat --- drivers/net/wireless/ath/ath12k/core.h | 1 + drivers/net/wireless/ath/ath12k/hw.c | 4 + drivers/net/wireless/ath/ath12k/hw.h | 1 + drivers/net/wireless/ath/ath12k/qmi.c | 141 +++++++++++++++++++++++-- 4 files changed, 141 insertions(+), 6 deletions(-) diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h index e45ff85b675d..5e49fd6c8bc9 100644 --- a/drivers/net/wireless/ath/ath12k/core.h +++ b/drivers/net/wireless/ath/ath12k/core.h @@ -235,6 +235,7 @@ enum ath12k_dev_flags { ATH12K_FLAG_CE_IRQ_ENABLED, ATH12K_FLAG_EXT_IRQ_ENABLED, ATH12K_FLAG_QMI_FW_READY_COMPLETE, + ATH12K_FLAG_FIXED_MEM_REGION, }; struct ath12k_tx_conf { diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c index 494963b19fe9..4db4bb1bea95 100644 --- a/drivers/net/wireless/ath/ath12k/hw.c +++ b/drivers/net/wireless/ath/ath12k/hw.c @@ -1318,6 +1318,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = { .needs_m3_fw = true, .ce_ie_addr = NULL, .ce_remap = NULL, + .bdf_addr = 0, }, { .name = "wcn7850 hw2.0", @@ -1402,6 +1403,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = { .needs_m3_fw = true, .ce_ie_addr = NULL, .ce_remap = NULL, + .bdf_addr = 0, }, { .name = "qcn9274 hw2.0", @@ -1482,6 +1484,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = { .needs_m3_fw = true, .ce_ie_addr = NULL, .ce_remap = NULL, + .bdf_addr = 0, }, { .name = "ipq5332 hw1.0", @@ -1557,6 +1560,7 @@ static const struct ath12k_hw_params ath12k_hw_params[] = { .needs_m3_fw = false, .ce_ie_addr = &ath12k_ce_ie_addr_ipq5332, .ce_remap = &ath12k_ce_remap_ipq5332, + .bdf_addr = 0x4B500000, }, }; diff --git a/drivers/net/wireless/ath/ath12k/hw.h b/drivers/net/wireless/ath/ath12k/hw.h index ee37e50476a4..524fab05768f 100644 --- a/drivers/net/wireless/ath/ath12k/hw.h +++ b/drivers/net/wireless/ath/ath12k/hw.h @@ -224,6 +224,7 @@ struct ath12k_hw_params { bool needs_m3_fw; const struct ce_ie_addr *ce_ie_addr; const struct ce_remap *ce_remap; + u32 bdf_addr; }; struct ath12k_hw_ops { diff --git a/drivers/net/wireless/ath/ath12k/qmi.c b/drivers/net/wireless/ath/ath12k/qmi.c index 7a29a24b9268..337347035605 100644 --- a/drivers/net/wireless/ath/ath12k/qmi.c +++ b/drivers/net/wireless/ath/ath12k/qmi.c @@ -11,6 +11,8 @@ #include "debug.h" #include #include +#include +#include #define SLEEP_CLOCK_SELECT_INTERNAL_BIT 0x02 #define HOST_CSTATE_BIT 0x04 @@ -2295,7 +2297,8 @@ int ath12k_qmi_respond_fw_mem_request(struct ath12k_base *ab) * failure to firmware and firmware then request multiple blocks of * small chunk size memory. */ - if (ab->qmi.target_mem_delayed) { + if (!test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags) && + ab->qmi.target_mem_delayed) { delayed = true; ath12k_dbg(ab, ATH12K_DBG_QMI, "qmi delays mem_request %d\n", ab->qmi.mem_seg_count); @@ -2358,6 +2361,11 @@ static void ath12k_qmi_free_target_mem_chunk(struct ath12k_base *ab) int i; for (i = 0; i < ab->qmi.mem_seg_count; i++) { + if (test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags) && + ab->qmi.target_mem[i].v.ioaddr) { + iounmap(ab->qmi.target_mem[i].v.ioaddr); + ab->qmi.target_mem[i].v.ioaddr = NULL; + } if (!ab->qmi.target_mem[i].v.addr) continue; @@ -2436,6 +2444,118 @@ static int ath12k_qmi_alloc_target_mem_chunk(struct ath12k_base *ab) return 0; } +static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab) +{ + struct device *dev = ab->dev; + struct device_node *mem_node, *dev_node; + struct resource res, m3_res; + int i, idx, ret; + + for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) { + switch (ab->qmi.target_mem[i].type) { + case HOST_DDR_REGION_TYPE: + mem_node = of_parse_phandle(dev->of_node, "memory-region", 0); + if (!mem_node) { + ath12k_dbg(ab, ATH12K_DBG_QMI, + "memory-region not defined in device-tree\n"); + ret = -ENODEV; + goto out; + } + + ret = of_address_to_resource(mem_node, 0, &res); + of_node_put(mem_node); + if (ret) { + ath12k_dbg(ab, ATH12K_DBG_QMI, + "fail to get reg from memory-region\n"); + goto out; + } + + if (res.end - res.start + 1 < ab->qmi.target_mem[i].size) { + ath12k_dbg(ab, ATH12K_DBG_QMI, + "failed to assign mem type %d req size %d avail size %lld\n", + ab->qmi.target_mem[i].type, + ab->qmi.target_mem[i].size, + (res.end - res.start + 1)); + ret = -EINVAL; + goto out; + } + + ab->qmi.target_mem[idx].paddr = res.start; + ab->qmi.target_mem[idx].v.ioaddr = + ioremap(ab->qmi.target_mem[idx].paddr, + ab->qmi.target_mem[i].size); + if (!ab->qmi.target_mem[idx].v.ioaddr) { + ret = -EIO; + goto out; + } + ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size; + ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type; + idx++; + break; + case BDF_MEM_REGION_TYPE: + ab->qmi.target_mem[idx].paddr = ab->hw_params->bdf_addr; + ab->qmi.target_mem[idx].v.ioaddr = NULL; + ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size; + ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type; + idx++; + break; + + case CALDB_MEM_REGION_TYPE: + /* Cold boot calibration is not enabled in Ath12k. Hence, + * assign paddr = 0. + * Once cold boot calibration is enabled add support to + * assign reserved memory from DT. + */ + ab->qmi.target_mem[idx].paddr = 0; + ab->qmi.target_mem[idx].v.ioaddr = NULL; + ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size; + ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type; + idx++; + break; + case M3_DUMP_REGION_TYPE: + dev_node = of_find_node_by_name(NULL, "m3_dump"); + if (!dev_node || of_address_to_resource(dev_node, 0, &m3_res)) { + ath12k_err(ab, "m3_dump not defined in device-tree\n"); + ret = -EINVAL; + goto out; + } + + if (m3_res.end - m3_res.start + 1 < ab->qmi.target_mem[i].size) { + ath12k_dbg(ab, ATH12K_DBG_QMI, + "failed to assign mem type %d req size %d avail size %lld\n", + ab->qmi.target_mem[i].type, + ab->qmi.target_mem[i].size, + (m3_res.end - m3_res.start + 1)); + ret = -EINVAL; + goto out; + } + + ab->qmi.target_mem[idx].paddr = m3_res.start; + ab->qmi.target_mem[idx].v.ioaddr = + ioremap(ab->qmi.target_mem[idx].paddr, + ab->qmi.target_mem[i].size); + if (!ab->qmi.target_mem[idx].v.ioaddr) { + ret = -EIO; + goto out; + } + ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size; + ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type; + idx++; + break; + default: + ath12k_warn(ab, "qmi ignore invalid mem req type %d\n", + ab->qmi.target_mem[i].type); + break; + } + } + ab->qmi.mem_seg_count = idx; + + return 0; +out: + ath12k_qmi_free_target_mem_chunk(ab); + return ret; +} + /* clang stack usage explodes if this is inlined */ static noinline_for_stack int ath12k_qmi_request_target_cap(struct ath12k_base *ab) @@ -3270,11 +3390,20 @@ static void ath12k_qmi_msg_mem_request_cb(struct qmi_handle *qmi_hdl, msg->mem_seg[i].type, msg->mem_seg[i].size); } - ret = ath12k_qmi_alloc_target_mem_chunk(ab); - if (ret) { - ath12k_warn(ab, "qmi failed to alloc target memory: %d\n", - ret); - return; + if (test_bit(ATH12K_FLAG_FIXED_MEM_REGION, &ab->dev_flags)) { + ret = ath12k_qmi_assign_target_mem_chunk(ab); + if (ret) { + ath12k_warn(ab, "failed to assign qmi target memory: %d\n", + ret); + return; + } + } else { + ret = ath12k_qmi_alloc_target_mem_chunk(ab); + if (ret) { + ath12k_warn(ab, "qmi failed to alloc target memory: %d\n", + ret); + return; + } } ath12k_qmi_driver_event_post(qmi, ATH12K_QMI_EVENT_REQUEST_MEM, NULL); From patchwork Mon Dec 9 16:56:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raj Kumar Bhagat X-Patchwork-Id: 848715 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 685F71F0E3A; Mon, 9 Dec 2024 16:57:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733763467; cv=none; b=sfFWXQUNzWKbI3OLQhnlMMqaP3a4K/WF1ZBObJhMfBOtJaoqU83PMpStSOVi68eWVtCYcrbOEV9CeEl/XEFua7Uu31MOdtIRBmnS+2BlZ4McASpvkMgUgOxApL4JUM/BF6+68bi4G6FIFqFRCdrZ/Z0fzQ5OZ9R9ixFzYUWYjxo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733763467; c=relaxed/simple; bh=b93b1+9n+qW9JpLH9+SyOufxitYAA1xRFD9RTlimLYw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=BaBSTV53T7QrBYcLzsuLqw5WSy84bESOOq4HlzDYEmdh0zkBhK5H6AiUNSI+BTBkCezjhIWGNzaHvT6ME2N7vHWI2KxtQH1/yS3XQNHIN/QzX0mwgObqE9Z3YJtiXV0GM59u4jXLzKHoaTcJzRQ7zNLA4hX+JnLGqR4Utsz6Cq4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=ekRCjloH; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="ekRCjloH" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4B99vp3d022354; Mon, 9 Dec 2024 16:57:40 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= MixiaH7HSrwFEr5eFzmvu+sB3mCpX/mvtsR2aBtTiuA=; b=ekRCjloHTU/fTHI5 cExO+MgrEpCD/9GggW7RDhGv7T6rFKiNSzOQiWT7cPu7a8dH2cQKqyQQD8DQm7Q2 te5HvHV6sIiwIBrG6JFBovAtOU3W/FqzBrD4voAOKGnR0vCvI7JYQKT2RLDYnF9+ iRZK4TDv1YpDtGF/I0DJh83esFD5sUqCr5c+3wpFdADNF7C0K7RPa2FDrG1p0gPg OOL5b8xVKkrjDwQxt8+PNbxc2kS0CYw/Ho62nNjKQZ8Aa9VK5pkQseRmYZGOLVjA m2yUV9tqXQI6LrbhctkBfF2bRZliKTMTQ2DBxJX2qJLMsmIWMtyWj/N8PPBKNIIm G0o+0w== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 43cdpgnp2a-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 09 Dec 2024 16:57:39 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4B9GvcxP025302 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 9 Dec 2024 16:57:38 GMT Received: from hu-rajkbhag-blr.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 9 Dec 2024 08:57:35 -0800 From: Raj Kumar Bhagat To: CC: , Kalle Valo , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Jeff Johnson , , Sowmiya Sree Elavalagan , Raj Kumar Bhagat Subject: [PATCH v3 09/13] wifi: ath12k: Power up root PD Date: Mon, 9 Dec 2024 22:26:40 +0530 Message-ID: <20241209165644.1680167-10-quic_rajkbhag@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241209165644.1680167-1-quic_rajkbhag@quicinc.com> References: <20241209165644.1680167-1-quic_rajkbhag@quicinc.com> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 4KrF3TDdYRb64U5Yj1urlUPiBFyxfg2w X-Proofpoint-ORIG-GUID: 4KrF3TDdYRb64U5Yj1urlUPiBFyxfg2w X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 clxscore=1015 suspectscore=0 mlxscore=0 priorityscore=1501 phishscore=0 mlxlogscore=999 spamscore=0 malwarescore=0 bulkscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412090131 From: Sowmiya Sree Elavalagan Q6 processor acts as rootPD, other hardware like IPQ5332 which are attached to Q6 act as userPDs. WCSS driver handles loading and booting of rootPD, while the ath12k driver boots the userPD. Get the rproc handle from the DTS entry and boot the rootPD if it is not already powered on. Register to the rproc notifier to monitor the rproc state, this allows ath12k driver to know power up/down sequence of the rootPD. Power up the rootPD and wait for a power-up notification from the notifier callback before powering up the userPDs. Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1 Signed-off-by: Sowmiya Sree Elavalagan Signed-off-by: Raj Kumar Bhagat --- drivers/net/wireless/ath/ath12k/ahb.c | 128 ++++++++++++++++++++++++++ drivers/net/wireless/ath/ath12k/ahb.h | 7 ++ 2 files changed, 135 insertions(+) diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c index fcd949faea9f..82bfd675b45b 100644 --- a/drivers/net/wireless/ath/ath12k/ahb.c +++ b/drivers/net/wireless/ath/ath12k/ahb.c @@ -554,6 +554,124 @@ static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = { .map_service_to_pipe = ath12k_ahb_map_service_to_pipe, }; +static int ath12k_ahb_root_pd_state_notifier(struct notifier_block *nb, + const unsigned long event, void *data) +{ + struct ath12k_ahb *ab_ahb = container_of(nb, struct ath12k_ahb, root_pd_nb); + struct ath12k_base *ab = ab_ahb->ab; + + if (event == ATH12K_RPROC_AFTER_POWERUP) { + ath12k_dbg(ab, ATH12K_DBG_AHB, "Root PD is UP\n"); + complete(&ab_ahb->rootpd_ready); + } + + return 0; +} + +static int ath12k_ahb_register_rproc_notifier(struct ath12k_base *ab) +{ + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); + + ab_ahb->root_pd_nb.notifier_call = ath12k_ahb_root_pd_state_notifier; + init_completion(&ab_ahb->rootpd_ready); + + ab_ahb->root_pd_notifier = qcom_register_ssr_notifier(ab_ahb->tgt_rproc->name, + &ab_ahb->root_pd_nb); + + if (!ab_ahb->root_pd_notifier) + return -EINVAL; + + return 0; +} + +static void ath12k_ahb_unregister_rproc_notifier(struct ath12k_base *ab) +{ + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); + + if (!ab_ahb->root_pd_notifier) { + ath12k_err(ab, "Rproc notifier not registered\n"); + return; + } + + qcom_unregister_ssr_notifier(ab_ahb->root_pd_notifier, + &ab_ahb->root_pd_nb); +} + +static int ath12k_ahb_get_rproc(struct ath12k_base *ab) +{ + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); + struct device *dev = ab->dev; + struct rproc *prproc; + phandle rproc_phandle; + + if (of_property_read_u32(dev->of_node, "qcom,rproc", &rproc_phandle)) { + ath12k_err(ab, "failed to get q6_rproc handle\n"); + return -ENOENT; + } + + prproc = rproc_get_by_phandle(rproc_phandle); + if (!prproc) { + ath12k_err(ab, "failed to get rproc\n"); + return -EINVAL; + } + ab_ahb->tgt_rproc = prproc; + + return 0; +} + +static int ath12k_ahb_boot_root_pd(struct ath12k_base *ab) +{ + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); + unsigned long time_left; + int ret; + + ret = rproc_boot(ab_ahb->tgt_rproc); + if (ret < 0) { + ath12k_err(ab, "RootPD boot failed\n"); + return ret; + } + + time_left = wait_for_completion_timeout(&ab_ahb->rootpd_ready, + ATH12K_ROOTPD_READY_TIMEOUT); + if (!time_left) { + ath12k_err(ab, "RootPD ready wait timed out\n"); + return -ETIMEDOUT; + } + + return 0; +} + +static int ath12k_ahb_configure_rproc(struct ath12k_base *ab) +{ + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); + int ret; + + ret = ath12k_ahb_get_rproc(ab); + if (ret < 0) { + ath12k_err(ab, "failed to get rproc: %d\n", ret); + return ret; + } + + ret = ath12k_ahb_register_rproc_notifier(ab); + if (ret < 0) { + ath12k_err(ab, "failed to register rproc notifier\n"); + return ret; + } + + if (ab_ahb->tgt_rproc->state != RPROC_RUNNING) { + ret = ath12k_ahb_boot_root_pd(ab); + if (ret < 0) { + ath12k_err(ab, "failed to boot the remote processor Q6\n"); + goto unreg_notifier; + } + } + return 0; + +unreg_notifier: + ath12k_ahb_unregister_rproc_notifier(ab); + return ret; +} + static int ath12k_ahb_clock_init(struct ath12k_base *ab) { struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); @@ -695,6 +813,7 @@ static int ath12k_ahb_probe(struct platform_device *pdev) struct ath12k_base *ab; const struct ath12k_hif_ops *hif_ops; struct device_node *mem_node; + struct ath12k_ahb *ab_ahb; enum ath12k_hw_rev hw_rev; u32 addr; int ret; @@ -726,6 +845,8 @@ static int ath12k_ahb_probe(struct platform_device *pdev) ab->pdev = pdev; ab->hw_rev = hw_rev; platform_set_drvdata(pdev, ab); + ab_ahb = ath12k_ab_to_ahb(ab); + ab_ahb->ab = ab; /* Set fixed_mem_region to true for platforms that support fixed memory * reservation from DT. If memory is reserved from DT for FW, ath12k driver @@ -765,6 +886,12 @@ static int ath12k_ahb_probe(struct platform_device *pdev) ath12k_ahb_init_qmi_ce_config(ab); + ret = ath12k_ahb_configure_rproc(ab); + if (ret) { + ath12k_err(ab, "failed to configure rproc: %d\n", ret); + goto err_ce_free; + } + ret = ath12k_ahb_config_irq(ab); if (ret) { ath12k_err(ab, "failed to configure irq: %d\n", ret); @@ -809,6 +936,7 @@ static void ath12k_ahb_remove_prepare(struct ath12k_base *ab) set_bit(ATH12K_FLAG_UNREGISTERING, &ab->dev_flags); cancel_work_sync(&ab->restart_work); cancel_work_sync(&ab->qmi.event_work); + ath12k_ahb_unregister_rproc_notifier(ab); } static void ath12k_ahb_free_resources(struct ath12k_base *ab) diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h index bd0366a79587..d1fc63091fb0 100644 --- a/drivers/net/wireless/ath/ath12k/ahb.h +++ b/drivers/net/wireless/ath/ath12k/ahb.h @@ -7,6 +7,7 @@ #define ATH12K_AHB_H #include +#include #include "core.h" #define ATH12K_AHB_RECOVERY_TIMEOUT (3 * HZ) @@ -16,6 +17,8 @@ #define ATH12K_AHB_SMP2P_SMEM_VALUE_MASK 0xFFFFFFFF #define ATH12K_PCI_CE_WAKE_IRQ 2 #define ATH12K_PCI_IRQ_CE0_OFFSET 3 +#define ATH12K_ROOTPD_READY_TIMEOUT (5 * HZ) +#define ATH12K_RPROC_AFTER_POWERUP QCOM_SSR_AFTER_POWERUP enum ath12k_ahb_smp2p_msg_id { ATH12K_AHB_POWER_SAVE_ENTER = 1, @@ -25,8 +28,12 @@ enum ath12k_ahb_smp2p_msg_id { struct ath12k_base; struct ath12k_ahb { + struct ath12k_base *ab; struct rproc *tgt_rproc; struct clk *xo_clk; + struct completion rootpd_ready; + struct notifier_block root_pd_nb; + void *root_pd_notifier; }; static inline struct ath12k_ahb *ath12k_ab_to_ahb(struct ath12k_base *ab) From patchwork Mon Dec 9 16:56:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raj Kumar Bhagat X-Patchwork-Id: 848714 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8ACAA1547E2; Mon, 9 Dec 2024 16:57:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733763472; cv=none; b=qhsCjyaFqYQ+hlGdrfBf1JzPDY5iYmWm+NeuRMe3IyDIRO8AmDYE+QDGKDb3pWbDqgywXO5Gbi8C/Enlt4uU36uPSkjsfsyyOfRJucTp/IuGg6F/tcBc5Gnj0iPYsbyVwzLNOCz8w36ErFn11vYBciXE45ZNmEbjBUPXe8bdlY8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733763472; c=relaxed/simple; bh=2t859uUpb38PNzbCpbnTMfUneTEXmmmTpQTjyPA53pw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=F+4Jz6/O6KrDeWNBLTy0N3fUVhO3aQF4gZ8OjneW4iq0ZWUwErNLQ40ubcR6iDRvEwv2aX3D3KPdG+IFqTE0oVjboIrIswJOlj+UIlO9fnBVXJQPTgJwtmVY497Ky0YHcsobnS8urB1rslZz8xOPxuK1I71tOY/Bm7V2TtWAIvw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=ELBndEmS; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="ELBndEmS" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4B9E6per007025; Mon, 9 Dec 2024 16:57:47 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= J2Hlo0bEMvz5KMgYO6xbp9XVao2abPH6BKg5w15YlWc=; b=ELBndEmSGLBeVAJf CH2GcE5cqOvMftaf4ECvsCeXMi/x1uxL1o2uwlTc26sF5OxncMByKNrDvvRbOrkx gRN9T0jwQ4gG+M09/98sgD9OVl+KD/wt5jpHdXZ9eaZa2g2FhyHKDsG3Ym4uRhGA MC1MOYmceUA5CiQbsdPFgTb0ts7WdVuzZNI0l5L5PyHlT9FdJRWgMtFKVKBXNetP cLJrJUdjvtBgPsnbFbYZt7c0xerazwOY2G7AdInOqR/LBe2BUSBWnkNzz2/Zynqr VvE3W2Aa5I4+hU1JZVR0PEr8dUbKBNGLGUCGBmsiJjGESmQjSWbxEMF49Ic91YK3 srmKQQ== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 43e21bgj79-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 09 Dec 2024 16:57:46 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4B9Gvjex018582 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 9 Dec 2024 16:57:45 GMT Received: from hu-rajkbhag-blr.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 9 Dec 2024 08:57:42 -0800 From: Raj Kumar Bhagat To: CC: , Kalle Valo , "Rob Herring" , Krzysztof Kozlowski , "Conor Dooley" , Jeff Johnson , , Sowmiya Sree Elavalagan , Raj Kumar Bhagat Subject: [PATCH v3 11/13] wifi: ath12k: Power up userPD Date: Mon, 9 Dec 2024 22:26:42 +0530 Message-ID: <20241209165644.1680167-12-quic_rajkbhag@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241209165644.1680167-1-quic_rajkbhag@quicinc.com> References: <20241209165644.1680167-1-quic_rajkbhag@quicinc.com> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Zju3zB81Fspw5uTCRCRFlNrbOsvorFe_ X-Proofpoint-ORIG-GUID: Zju3zB81Fspw5uTCRCRFlNrbOsvorFe_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 clxscore=1015 malwarescore=0 lowpriorityscore=0 mlxlogscore=999 priorityscore=1501 spamscore=0 impostorscore=0 adultscore=0 bulkscore=0 phishscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412090132 From: Sowmiya Sree Elavalagan UserPD firmware image is loaded and booted by ath12k driver. Get the userPD memory region from DTS and load the firmware for userPD from pre-defined path into io-remapped address of this region. Authenticate this image using pasid which is a peripheral ID. Set the spawn bit to instruct Q6 to spawn userPD thread. Wait for userPD to spawn which is indicated by spawn interrupt. Ready interrupt is triggered once the userPD is powered up completely. Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1 Signed-off-by: Sowmiya Sree Elavalagan Signed-off-by: Raj Kumar Bhagat --- drivers/net/wireless/ath/ath12k/ahb.c | 138 ++++++++++++++++++++++++++ drivers/net/wireless/ath/ath12k/ahb.h | 10 +- 2 files changed, 147 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c index c944915ad08a..74d10af6591f 100644 --- a/drivers/net/wireless/ath/ath12k/ahb.c +++ b/drivers/net/wireless/ath/ath12k/ahb.c @@ -5,13 +5,17 @@ */ #include +#include +#include #include #include #include #include #include +#include #include #include +#include #include #include #include "ahb.h" @@ -340,6 +344,139 @@ static void ath12k_ahb_stop(struct ath12k_base *ab) ath12k_ce_cleanup_pipes(ab); } +static int ath12k_ahb_power_up(struct ath12k_base *ab) +{ + struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab); + u32 pasid; + char fw_name[ATH12K_USERPD_FW_NAME_LEN]; + char fw2_name[ATH12K_USERPD_FW_NAME_LEN]; + struct device *dev = ab->dev; + const struct firmware *fw, *fw2; + struct device_node *fw_mem_node; + struct reserved_mem *rmem = NULL; + unsigned long time_left; + phys_addr_t mem_phys; + void *mem_region; + size_t mem_size; + int ret; + + fw_mem_node = of_parse_phandle(dev->of_node, "memory-region", 0); + if (fw_mem_node) + rmem = of_reserved_mem_lookup(fw_mem_node); + + of_node_put(fw_mem_node); + + if (!rmem) { + ath12k_err(ab, "Failed to acquire Q6 memory-region\n"); + return -EINVAL; + } + + mem_phys = rmem->base; + mem_size = rmem->size; + mem_region = (void *)devm_ioremap_wc(dev, mem_phys, mem_size); + if (!mem_region) { + ath12k_err(ab, "unable to map memory region: %pa+%pa\n", + &rmem->base, &rmem->size); + return -ENOMEM; + } + + snprintf(fw_name, sizeof(fw_name), "%s/%s/%s%d%s", ATH12K_FW_DIR, + ab->hw_params->fw.dir, ATH12K_AHB_FW_PREFIX, ab_ahb->userpd_id, + ATH12K_AHB_FW_SUFFIX); + + ret = request_firmware(&fw, fw_name, dev); + if (ret < 0) { + ath12k_err(ab, "request_firmware failed\n"); + return ret; + } + + ath12k_dbg(ab, ATH12K_DBG_AHB, "Booting fw image %s, size %zd\n", fw_name, + fw->size); + + if (!fw->size) { + ath12k_err(ab, "Invalid firmware size\n"); + ret = -EINVAL; + goto err_fw; + } + + pasid = (u32_encode_bits(ab_ahb->userpd_id, ATH12K_USERPD_ID_MASK)) | + ATH12K_AHB_UPD_SWID; + + /* Load FW image to a reserved memory location */ + ret = qcom_mdt_load(dev, fw, fw_name, pasid, mem_region, mem_phys, mem_size, + &mem_phys); + if (ret) { + ath12k_err(ab, "Failed to load MDT segments: %d\n", ret); + goto err_fw; + } + + snprintf(fw2_name, sizeof(fw2_name), "%s/%s/%s", ATH12K_FW_DIR, + ab->hw_params->fw.dir, ATH12K_AHB_FW2); + + ret = request_firmware(&fw2, fw2_name, dev); + if (ret < 0) { + ath12k_err(ab, "request_firmware failed\n"); + goto err_fw; + } + + ath12k_dbg(ab, ATH12K_DBG_AHB, "Booting fw image %s, size %zd\n", fw2_name, + fw2->size); + + if (!fw2->size) { + ath12k_err(ab, "Invalid firmware size\n"); + ret = -EINVAL; + goto err_fw2; + } + + ret = qcom_mdt_load_no_init(dev, fw2, fw2_name, pasid, mem_region, mem_phys, + mem_size, &mem_phys); + if (ret) { + ath12k_err(ab, "Failed to load MDT segments: %d\n", ret); + goto err_fw2; + } + + /* Authenticate FW image using peripheral ID */ + ret = qcom_scm_pas_auth_and_reset(pasid); + if (ret) { + ath12k_err(ab, "failed to boot the remote processor %d\n", ret); + goto err_fw2; + } + + /* Instruct Q6 to spawn userPD thread */ + ret = qcom_smem_state_update_bits(ab_ahb->spawn_state, BIT(ab_ahb->spawn_bit), + BIT(ab_ahb->spawn_bit)); + if (ret) { + ath12k_err(ab, "Failed to update spawn state %d\n", ret); + goto err_fw2; + } + + time_left = wait_for_completion_timeout(&ab_ahb->userpd_spawned, + ATH12K_USERPD_SPAWN_TIMEOUT); + if (!time_left) { + ath12k_err(ab, "UserPD spawn wait timed out\n"); + ret = -ETIMEDOUT; + goto err_fw2; + } + + time_left = wait_for_completion_timeout(&ab_ahb->userpd_ready, + ATH12K_USERPD_READY_TIMEOUT); + if (!time_left) { + ath12k_err(ab, "UserPD ready wait timed out\n"); + ret = -ETIMEDOUT; + goto err_fw2; + } + + qcom_smem_state_update_bits(ab_ahb->spawn_state, BIT(ab_ahb->spawn_bit), 0); + + ath12k_info(ab, "UserPD%d is now UP\n", ab_ahb->userpd_id); + +err_fw2: + release_firmware(fw2); +err_fw: + release_firmware(fw); + return ret; +} + static void ath12k_ahb_init_qmi_ce_config(struct ath12k_base *ab) { struct ath12k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg; @@ -557,6 +694,7 @@ static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = { .irq_enable = ath12k_ahb_ext_irq_enable, .irq_disable = ath12k_ahb_ext_irq_disable, .map_service_to_pipe = ath12k_ahb_map_service_to_pipe, + .power_up = ath12k_ahb_power_up, }; static irqreturn_t ath12k_userpd_irq_handler(int irq, void *data) diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h index 0999e2bbe970..0dbbbfd45eab 100644 --- a/drivers/net/wireless/ath/ath12k/ahb.h +++ b/drivers/net/wireless/ath/ath12k/ahb.h @@ -19,7 +19,15 @@ #define ATH12K_PCI_IRQ_CE0_OFFSET 3 #define ATH12K_ROOTPD_READY_TIMEOUT (5 * HZ) #define ATH12K_RPROC_AFTER_POWERUP QCOM_SSR_AFTER_POWERUP - +#define ATH12K_AHB_FW_PREFIX "q6_fw" +#define ATH12K_AHB_FW_SUFFIX ".mdt" +#define ATH12K_AHB_FW2 "iu_fw.mdt" +#define ATH12K_AHB_UPD_SWID 0x12 +#define ATH12K_USERPD_SPAWN_TIMEOUT (5 * HZ) +#define ATH12K_USERPD_READY_TIMEOUT (10 * HZ) +#define ATH12K_USERPD_STOP_TIMEOUT (5 * HZ) +#define ATH12K_USERPD_ID_MASK GENMASK(9, 8) +#define ATH12K_USERPD_FW_NAME_LEN 35 enum ath12k_ahb_smp2p_msg_id { ATH12K_AHB_POWER_SAVE_ENTER = 1, ATH12K_AHB_POWER_SAVE_EXIT,