From patchwork Thu Dec 12 00:47:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 850466 Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F11A817C68 for ; Thu, 12 Dec 2024 00:47:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964456; cv=none; b=S8N84kA1c8UWGNvy88FSJ9l/kLP5OpI0iLMJ9c/ngZqQ3ANhFggtYJpb5jRE20wMH9dL4PRRXuLnf78U3bjdE27MLpqCV3C1kSMOHx7GqaD7E4jZwGxZ3Qt8zhT4tYhcu/9wZYSQbn840FJ4Ubo4jEm2l1tD8rOb6H17HJWLymE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964456; c=relaxed/simple; bh=3R3OPMfTuyqQexC84gUaI5ofdVj4g5npIdYgx8O4VNY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=B89F9NsqQdH7LLNTP4QaE1V0BaM8h96CDGPb8WQF7JDAWqoLJ8cdp5aH7gJaKg4mPoyw4b150csKrFdXDrnJama8vE0cBDPUC9oyDy6FxwpUsttDp9WtBNdzmOw43Hobe5ICzqfRPQI1EhwWcQkZYA4RWBqD0M3+RDaQMcI4KlI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=TfJV82nx; arc=none smtp.client-ip=209.85.128.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="TfJV82nx" Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-4361a50e337so295945e9.0 for ; Wed, 11 Dec 2024 16:47:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964452; x=1734569252; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bxSzgj3Vq2uPgrMY9L1M3DS9SZdOaUlr7HUWtclhijg=; b=TfJV82nxRpRj+irEv+/PnGsx828tWuNkyn+K+E0kP7hXuegJ26jBNa+Hpe7TeVyOc6 q95d2WKxkdwZQ2s/CfGF+QzHGNO+G6ud/A+jSpPhmiZQcZgs3g/Kxpyc7S/+G/vyP3oV YVinfoiYG12z5vtO5cFrwUfTRR8lAmakfoZDoFqt5+HRWgmGyCa9rKz6XUfYA5PlNxta D46bUCEQ6QPL2NU1CMrgRgfR2E+ze62hkpmZPpJH5HVGWlP8rHshRpI5feE568zRm5+P a2f0KPGUJT0Hcx+scA2GLlr5gM3KvmctaUTRu2tjaRaD34KyboMp87DPFDSPFlxIjQPX 2ocw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964452; x=1734569252; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bxSzgj3Vq2uPgrMY9L1M3DS9SZdOaUlr7HUWtclhijg=; b=mpfU5Jl4RdF7gRjMBTXtuHZJbScRHKJADjHa1a9uquHOfU/xzMnwDi8DdFzf1ZvN1U lHnygyc2Lwqv9stwaGIISaje2ghbLxrMBfwBkDxsSo6BFsWSHgCz2R2FGkoG9iCTPgWs kUX/YPVbLx5k+kS2603nl1Elxb2QLvqV1OEgvnZpmcP5JNBnNtzY/26gtJi9ez3y5DeG Vr6p8sT1rdFdaJx5yD0zmDGTF8dQFKbFj63JnMqnn6k2yNDek5aWAwLclm2NmHqYAeRF ASg4FqqEgyR8PG+lvecQp+IyUs+l+NKkEYbEiVrSU10KJekXNDa7yFMzfw/X4/qTnM8t qNyw== X-Forwarded-Encrypted: i=1; AJvYcCUldKno4bK49ZRTPiOvHw1wTkMDpu9k0ZQOo3BkDYk4Xd1riflyIQoFioQnqYPAxTrZHdu2bZKIqdCLl7BZ@vger.kernel.org X-Gm-Message-State: AOJu0YyXtAYEc1//MxlvCJuAjWPN8P+iY00sxQdXZVSSGSh34IMukQF+ berkdx3BTHvEGe4SQTqLVELLemYMVsuDsgYaH+2N2ubg8RqfhZQpGwGgES4Zeos= X-Gm-Gg: ASbGncvYBFIZV9DgGt8jztL2qYG2PKl8XiCLTrxIfuVPxihftB9oCk/KG+XSBKUMjjL jPvXIPrpw7/oopLmOBfJOuyhd09sa8YoUGrsl4UEDsSA1xpEyaBJVYwEiEBd41NftbdqTc33L8w 5Vj1RKwG3bfEBWtK+1p6YWYKTdsRGMOpXmsAnkR8f5/lnrulbTvTnEYkryH9jzFJZO8r+0CZmSx QucUre/RNQwcLPMtUvZPJAozkOmpt0PfVe+bqfxcQaA3tQ2ltsfFcE8GTiL9E0na5BzD+Xq X-Google-Smtp-Source: AGHT+IE1OUN0yGKV1J8sFJ5lu50pkndsUsBhL3KLv+epv+i5SZeHxNPxl2b8YjdtlAtpqWnNX2i6ig== X-Received: by 2002:a05:6000:1562:b0:385:f220:f798 with SMTP id ffacd0b85a97d-3864ce4af31mr3619903f8f.6.1733964452283; Wed, 11 Dec 2024 16:47:32 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:31 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 01/14] ASoC: dt-bindings: qcom: Add SM6115 LPASS rxmacro and vamacro codecs Date: Thu, 12 Dec 2024 00:47:14 +0000 Message-ID: <20241212004727.2903846-2-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Document compatibles for Qualcomm SM6115 SoC macro digital codecs (RX and VA). Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- .../bindings/sound/qcom,lpass-rx-macro.yaml | 19 +++++++++++++++++++ .../bindings/sound/qcom,lpass-va-macro.yaml | 17 +++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml index 92f95eb74b19..697c5591ae7c 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml @@ -14,6 +14,7 @@ properties: oneOf: - enum: - qcom,sc7280-lpass-rx-macro + - qcom,sm6115-lpass-rx-macro - qcom,sm8250-lpass-rx-macro - qcom,sm8450-lpass-rx-macro - qcom,sm8550-lpass-rx-macro @@ -80,6 +81,24 @@ allOf: - const: npl - const: fsgen + - if: + properties: + compatible: + contains: + enum: + - qcom,sm6115-lpass-rx-macro + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + clock-names: + items: + - const: mclk + - const: npl + - const: dcodec + - const: fsgen + - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml index f41deaa6f4df..30a44b444f39 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml @@ -14,6 +14,7 @@ properties: oneOf: - enum: - qcom,sc7280-lpass-va-macro + - qcom,sm6115-lpass-va-macro - qcom,sm8250-lpass-va-macro - qcom,sm8450-lpass-va-macro - qcom,sm8550-lpass-va-macro @@ -83,6 +84,22 @@ allOf: items: - const: mclk + - if: + properties: + compatible: + contains: + const: qcom,sm8250-lpass-va-macro + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + items: + - const: mclk + - const: dcodec + - const: npl + - if: properties: compatible: From patchwork Thu Dec 12 00:47:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 849823 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B64F222EEF for ; Thu, 12 Dec 2024 00:47:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964457; cv=none; b=okqUglzUw8DGcyCvNnQM8vTmQ+/lq4fFPLjTLBvzWZXLcvvCkDXbbfjjIqX2QFYrai7wlhwT3oJzdw/WTuDkCZ30QDwGKRbeqZGC47BT5FA7DXddTuMSCfB48T7w8JnFmi8cALUh3ANWof7D7sJ5IY7LPndydoleqj63fFmBKAY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964457; c=relaxed/simple; bh=gI7279BFVBU24wfEPp4Je1wvSfa/qbfIzJF36p2a+iQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Re4OFblvhLO6bYI6u5wCJNIq+VlTuBawgwJEfOjM9Z7b4NNa8IBURMQrvq48ZvkogE1yJndmAsvYc6UYrLHEcp75jZzsqizW2kfBRrnPhCumHpqOM7FjiXzW6ufBQw6X4ar/QeYXhr8Sl1Pdhn86Qf71OABgGsbeVHG2QnSKeKE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=JaR+0hBT; arc=none smtp.client-ip=209.85.128.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="JaR+0hBT" Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-436249df846so224275e9.3 for ; Wed, 11 Dec 2024 16:47:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964454; x=1734569254; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0mDzWrPswVqL2jIJMPNBr5jz29qiE8AhUOmE7OcegD8=; b=JaR+0hBTtMGmbIEsp+WxtNuDFrT8Kv9vNaNG9AwbBP6dYXDXZabiu4B5KFqzDTAgED /NnLUnDWHp5+dtbv067qMk9RuA3t3Ft2EljzBO846rJ+xTctrbA2hHOHpLN1vuf/pONX HR64ldA6sm9vI41rKCy44S6Vs31LCU5Gf177isG3XUDKny9b1eJbU8FGu0xIkc2X4Swf x4U69Rmj+J9cxogf/iU9mQ6P6JPpTL/JY5ICHJQcgKp5ZlCCt8SWHJKaUcQoGI9tzcpG 8govD1HvrpuvkQ/biL2e3Qc0wrptgCLzMMZhSrGN+smg+UFXXj3hZX6P2dBNfrVAzWzY M2JQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964454; x=1734569254; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0mDzWrPswVqL2jIJMPNBr5jz29qiE8AhUOmE7OcegD8=; b=FizamSEhOePnLWKGS1IIOW0lEQf/91ooEclq0cErMKykcgZOv/X1o3JzE0EpacGji5 MWn/Sy8NIGjlRLk8czIIWax+oAyIKjT8Cz82XrEQb7wTdWiw8Zdj2KaC91f3USwg3Irt yqwlRCkcBEXCTydwwXjHC698IOquqhGRlj8hLRN6roBcWBSJKZ3tCaDpEFKgSKxnWPpz HtvEj3i8Am2Xcs3tw0ME9gWQb0xl+v/x3/svFqFHiAGnSgAklXkt29jxKSj31YcWt3su 0DqdcFaOji1Rp+YBlQCBpy+u4iPdLvyxpKDCqPGq63mKVYpoxtA3Lt0FS3MgBgj+Diqf GyxQ== X-Forwarded-Encrypted: i=1; AJvYcCX9jtj4W+wMGYbtoiIJzuqJA+d4Nrcwl/1fToPrvlqzoEmJNa6yJ4lXzCvkgRSegHC92TGOyUOPzpPoQcV6@vger.kernel.org X-Gm-Message-State: AOJu0Yx3fIYehUWveH3paU7J9ybofO/CGitNibgXLQDrIA6VPq2NKpZA OuxoRJIqz5zn7KpZl8ic0DkQyljtZKgsHmb5du1y/DDAw/ZJNlZnL3G4aJN+r+Y= X-Gm-Gg: ASbGncvEdn8PPjNOc5xFGxKwCkRLqtujrJsba/h/7+keyaIPTow8jYc7vVrQlvhjMyB KbdjeegCFHEmA/UYpp75jDI0RcHK9SN8s5wrN2dnurQcnY11KY+3YM7x2cEryxCY1Gck4co09nf Hici1ZtdLQ5e6dO7IcqdIlv7mzWIXFgmRCzQb++DgM0OKS8VzL8Q/Fk/4NLsEkzxp4JoF5lWVou +a9OJAQEyVRUP1ocvoZWtIzV/B2Zmsms5KQxwhJnekfiDNGEzLl/zM6e3mdm2A2RC2kMLfT X-Google-Smtp-Source: AGHT+IE7vuVokWsKA+OSg/kSc554NchXd8bbNr3lBMdwH/A0uq3kq3gqrXVPdiGpvQAMDioUQZG3+g== X-Received: by 2002:a5d:584a:0:b0:386:4a0c:fe17 with SMTP id ffacd0b85a97d-3864ce602femr3957618f8f.27.1733964454139; Wed, 11 Dec 2024 16:47:34 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:33 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 02/14] ASoC: codecs: va-macro: add sm6115 compatible Date: Thu, 12 Dec 2024 00:47:15 +0000 Message-ID: <20241212004727.2903846-3-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add vamacro compatible for sm6115. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- sound/soc/codecs/lpass-va-macro.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/lpass-va-macro.c b/sound/soc/codecs/lpass-va-macro.c index c781da476240..443dd4dd9b19 100644 --- a/sound/soc/codecs/lpass-va-macro.c +++ b/sound/soc/codecs/lpass-va-macro.c @@ -1722,6 +1722,7 @@ static const struct dev_pm_ops va_macro_pm_ops = { static const struct of_device_id va_macro_dt_match[] = { { .compatible = "qcom,sc7280-lpass-va-macro", .data = &sm8250_va_data }, + { .compatible = "qcom,sm6115-lpass-va-macro", .data = &sm8450_va_data }, { .compatible = "qcom,sm8250-lpass-va-macro", .data = &sm8250_va_data }, { .compatible = "qcom,sm8450-lpass-va-macro", .data = &sm8450_va_data }, { .compatible = "qcom,sm8550-lpass-va-macro", .data = &sm8550_va_data }, From patchwork Thu Dec 12 00:47:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 850465 Received: from mail-wr1-f46.google.com (mail-wr1-f46.google.com [209.85.221.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D74D645027 for ; Thu, 12 Dec 2024 00:47:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964459; cv=none; b=o/xoOGtkrBEU0/mS0TEkptuEqo2yVRG83Cmh+NUyxWQZiXCG3+cUFU0HxLdw4ZSB1Aqtk/oCRBQupsXVLA223yxjRMD3Xw2OWJMPLDviQFHwbGLO7Ck7sL3Y7m9/lp6FJzT0cHYDfyUyf+MO6ngJLuh32sZG7KS3qyr70kOeC9Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964459; c=relaxed/simple; bh=Jmxl411WFIZqWVvYYq3LtnoW5zZ2OdPhG9ySRHWVXfg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=edJHaBFpMry8flmCPFwryFmIGMeV5CTrSKRUj6XJFT+dPTlLeJMSpVMKiG9WIs8U9BKwGoVo4CwMizhTpvXKISaystaJcbrquIBSqLW031fR21DroZpEx+zyezwYIXZ8QmpOjwIM4KbGoMupL7t4AFb1VIRN8YKsIAM7pL5HNjw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=tjRDvb1F; arc=none smtp.client-ip=209.85.221.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="tjRDvb1F" Received: by mail-wr1-f46.google.com with SMTP id ffacd0b85a97d-3863703258fso726948f8f.1 for ; Wed, 11 Dec 2024 16:47:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964456; x=1734569256; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=n6kZLHzerZib3Tom9bwdP4TG475dJUZl/s7CFHt6iaE=; b=tjRDvb1F88wUHJ/B1IYOwB7PvHy/mJkMgF2zsbeUhIUU3nsIvflb8rzNEJUmc6P5/i 1EIKwIk++vOrkhfXbb6aHgEa7+HKCcLHpKVW4ulVs+KW2z/xbXKi9jvBj2sIC+c8kPQW eXRSoT9zPjZ99r5shf8XVPDl+3KubEYtp7zZwugn+ZA6Zj5mgpyJNJlDBZ1M4cOMy+n4 Xwqq9XoUVrs7jkk25L0FkfOv+lJaGULT1TSsEKBrVEmj8yIFiMOLVNzDqBw16A7ktTI/ OcVYw0P6B79UGAs542zrBaIfoBPiUcjruhOnvcGMDB6AyAqYVIejxJz+/neu7c7i5fUv ugkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964456; x=1734569256; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n6kZLHzerZib3Tom9bwdP4TG475dJUZl/s7CFHt6iaE=; b=qhU5F09S3Zg4mD3dq89PG56MNrHnzsEiP8BSYhUR9+RQOVNUGMpvqowmown6AVq7s0 6U9NssPmPh2mn9vJsupG4cMC2gIZxjC4FbA7UHEfzwodaJTmtNJ1/3067rBZDRheMciz sZiOyUg+U3EFOXhTUswKTZF5Eq2FWsLJNIC2jJlam+1MkEBQZTQ4IM1xoHwYjz3QajmX GIQveM66dSypdUh5asD+QO54N1ugL8dEI+iiYfcEwOEevhzP3xha+ZVXoj7H1s13uBxW pTDo2zlrpyspsDEPXwiZHlWJaSpphMqryABJ4/BoYfY4Lhok4fW+hWMOZLbzhbCpTmvw OKkA== X-Forwarded-Encrypted: i=1; AJvYcCW+CuG1sXNE+xK+EpN2HcbwpkvyPxJ/7STsLDLYpwt89fv1wRX8GLLTLwIXV0lWuZL13tUpNDaekdhKAFxx@vger.kernel.org X-Gm-Message-State: AOJu0YzTJEjEl7hnl9iedmega6xRD8t1AQt+Syd1qn0I5nScLzQiQude Sxaa0zH5zB6s2SJwgO3BhSBg0+I6I1y7LNY9xbZdqnNer38PaSlZs2k24yzbFAo= X-Gm-Gg: ASbGncsAYQ79XjVIRhcPaGOid/+YDLeYuhPOkm5ZyJsr6o8JHT+0ehsnl1eHLBpMJfh qWOPx3QYLvlzquYZadJUKemEM/0ynuIpj+xYHB5UQPaQCQTmEv3hKAW+dhGdOdZQ4DASY2TzHBc zwD89xqRv3u1PR2OcvaHp715s635/k4bsBEiu5IZnTTDPggQiM4GpKKDugzYpo+SeyDBdMhpfHl 8iGQoYMyvgi6IchUFSa6DKvzPPR017hwk9/os2DKslbacADVGzIWBPVx69ODl9IjBhTTcf3 X-Google-Smtp-Source: AGHT+IEi1kamexVrbGthx4QEBUCr69JkP9/Hp4vgbpEuhKuOMH1s/oYcZgmQpyQA1HV0TbxjEV4tZw== X-Received: by 2002:a05:6000:a07:b0:385:e10a:4d97 with SMTP id ffacd0b85a97d-38788825765mr825870f8f.21.1733964456279; Wed, 11 Dec 2024 16:47:36 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:35 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 03/14] ASoC: codecs: lpass-rx-macro: add sm6115 compatible Date: Thu, 12 Dec 2024 00:47:16 +0000 Message-ID: <20241212004727.2903846-4-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add rxmacro compatible for sm6115. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- sound/soc/codecs/lpass-rx-macro.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/lpass-rx-macro.c b/sound/soc/codecs/lpass-rx-macro.c index febbbe073962..61c321e0f753 100644 --- a/sound/soc/codecs/lpass-rx-macro.c +++ b/sound/soc/codecs/lpass-rx-macro.c @@ -3946,7 +3946,9 @@ static const struct of_device_id rx_macro_dt_match[] = { { .compatible = "qcom,sc7280-lpass-rx-macro", .data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK, - + }, { + .compatible = "qcom,sm6115-lpass-rx-macro", + .data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK, }, { .compatible = "qcom,sm8250-lpass-rx-macro", .data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK, From patchwork Thu Dec 12 00:47:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 849822 Received: from mail-wr1-f54.google.com (mail-wr1-f54.google.com [209.85.221.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1DF7A7DA6A for ; Thu, 12 Dec 2024 00:47:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964462; cv=none; b=kIIOP9dKXSd7Swez8SdSvUtihAoTuLC/v3wgQeJ9Vmq+nmKVSt/9cZj5HBgb2sMO6E8Blk9wuHvbjsDXwLFBrsfKeGZ018cQAw9kLtmzhLWG4hktKZA1Y38QLtHycc18TsqF8hTBHpgh5UEdB6YwcUsH2ykU21I1JcP2lZAXwAw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964462; c=relaxed/simple; bh=VcDfr3Lt5hKiAoZ77NfWvgJsCBvmpceDpK8hpp98ByU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Y7anBn/Gdq202Smi8LybXIBQx5dTN/or0fwGPy/XZw2m0kOKyspgZzaLRPJfIrTmhipLA6eF81ulsdKaJBN4qDsMT3EnPlmmYYdVxEHIxa289QbUxs0NhBhiN3Y9zH5JqZhQKzmkaPo4/gN19Fa991HhEBZcWt/5LSitA/hkoaI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=tQwIp+kb; arc=none smtp.client-ip=209.85.221.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="tQwIp+kb" Received: by mail-wr1-f54.google.com with SMTP id ffacd0b85a97d-3863494591bso7727f8f.1 for ; Wed, 11 Dec 2024 16:47:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964458; x=1734569258; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZTnPl8WPue9GkuOReiVApSbo/qq5drlSaoqa3s2cxF8=; b=tQwIp+kbumVPMzylzw/vxzPNAOhBfHQezg8Cqu9SEOVVeGu7LGNnM7PBGo/e/yCyUu EZli5Q0bCgjI3+j55mW+yWQJKlSYEV+MDkPuhpzogwPQ8SMIIAly/QR5jgG5F08uUbdV BGBz8uwWlJKw6RwwIrApLqYAoQGvcx1dxz0g0tGSAj6E1opXZAzIyQ1jrGX92I4vLiOr mNaG8K3nrZwYlpr50WuJe5MvrcSjlAPwV1cIvU9/AE7pHQkxxoxPsSts2bZj6chSKeYr 48WvXT/MFMXK/LM7FHfvCpam0DGRw6WnNv8VWgb93fb1faNQanyr/N/o5j9vRfRrjHgb CEdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964458; x=1734569258; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZTnPl8WPue9GkuOReiVApSbo/qq5drlSaoqa3s2cxF8=; b=GlKH1cyh0Jrcl13BxtRhzdzdZ6kFmPbwT46tSEvNlNFn0o7w1tiSiQH33WR6kopIu/ VuAQ1xPeYe7Pz4FFy/x0RcFASu+oYXEd8gfhNee6cMrvrc3EO0Ba+g3Su4vD+XDqh89o uJKptgxWI+Sy0Ffgg2ueNR+huw3GWBlXa2cVPPeIxlUYm0p4yPmd4bHgDrv1SglBlnOq UrXZcmn9BKEc+wEJOlg3HCIi4TlhioGr+5ZxH0k4ezNcUp+ASheSG9qalHn6eW/A83Xl mhZbORUos6gS3m4kV1B+9XCIojkRsniSqfjxahu2O3HDxWXoKlDbtoUfDOQvzmPQQJEG E32w== X-Forwarded-Encrypted: i=1; AJvYcCWVkNTTvq9r3//aEN+k/TTqA7+mI45atgnz6RNSvjjEs9M5BN/FIPJq8MJdKYeHZ68TNDHDSts7YXF1z2Yg@vger.kernel.org X-Gm-Message-State: AOJu0Yw94Ub9LLFzcaPc2Yhu5Nb40H1c2XGKxYVpPmts8pYmBFOWPM0Q 84jL4r4NIzqajH2NUiXM0KfqmSfv420xWXcuYTkMROVSCpm6qpb6Ycfke5TKsK4= X-Gm-Gg: ASbGnctx31PEPq91VhXsTb9xFxbevPB9QAg9yfXaG6g1zQBHYPNrRWNeeDy20TCcXEG 9MBkGRwk8SweAEMFLd9RF7lCOqLvgiY2lH8CLpricyQVfW0uYtlg3UiVwMD1NtVFMbjtTUmP0Fw g6cAaR9v67GfnVuqTgHfSlODu19r6BFivppxdI50spWW7OP7RKaJZX1Qz5gEIPb4dySofy0wOqW WrWUonDguEhI8YXsK9NVcGwVwsxJIKcoGJ+DyoBg+Eo4bdKCqee+HW1vkh9RnlUS4Fpl7vw X-Google-Smtp-Source: AGHT+IF6am6lPKI4xcRMhy4NNTcsJOmsxM27JO68aKAsm4zvbgjSuu3xAU+7ShZcg3XMlMDenV4jVw== X-Received: by 2002:a5d:584c:0:b0:382:4115:1ccb with SMTP id ffacd0b85a97d-3864ce49607mr4242548f8f.7.1733964458438; Wed, 11 Dec 2024 16:47:38 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:37 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 04/14] arm64: dts: qcom: sm6115: add LPASS devices Date: Thu, 12 Dec 2024 00:47:17 +0000 Message-ID: <20241212004727.2903846-5-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The rxmacro, txmacro, vamacro, soundwire nodes, lpass clock controllers are required to support audio playback and audio capture on sm6115 and its derivatives. Cc: Konrad Dybcio Cc: Konrad Dybcio Cc: Srinivas Kandagatla Co-developed-by: Konrad Dybcio Signed-off-by: Alexey Klimov --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 132 +++++++++++++++++++++++++++ 1 file changed, 132 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index df2241237b26..9412cbe23d88 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -2687,6 +2687,138 @@ funnel_apss1_in: endpoint { }; }; + rxmacro: codec@a600000 { + compatible = "qcom,sm6115-lpass-rx-macro"; + reg = <0x0 0xa600000 0x0 0x1000>; + + clocks = <&q6afecc LPASS_CLK_ID_RX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_CLK_ID_RX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&vamacro>; + clock-names = "mclk", + "npl", + "dcodec", + "fsgen"; + assigned-clocks = <&q6afecc LPASS_CLK_ID_RX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_CLK_ID_RX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + assigned-clock-rates = <22579200>, + <22579200>; + #clock-cells = <0>; + clock-output-names = "mclk"; + #sound-dai-cells = <1>; + }; + + swr1: soundwire@a610000 { + compatible = "qcom,soundwire-v1.6.0"; + reg = <0x0 0x0a610000 0x0 0x2000>; + interrupts = ; + + clocks = <&rxmacro>; + clock-names = "iface"; + + resets = <&lpass_audiocc 0>; + reset-names = "swr_audio_cgcr"; + + label = "RX"; + qcom,din-ports = <0>; + qcom,dout-ports = <5>; + + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>; + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x01 0x00>; + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>; + qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; + + #sound-dai-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; + }; + + txmacro: codec@a620000 { + compatible = "qcom,sm6115-lpass-tx-macro"; + reg = <0x0 0x0a620000 0x0 0x1000>; + + clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&vamacro>; + clock-names = "mclk", + "npl", + "dcodec", + "fsgen"; + assigned-clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + assigned-clock-rates = <19200000>, + <19200000>; + #clock-cells = <0>; + clock-output-names = "mclk"; + #sound-dai-cells = <1>; + }; + + lpass_audiocc: clock-controller@a6a9000 { + compatible = "qcom,sm6115-lpassaudiocc"; + reg = <0x0 0x0a6a9000 0x0 0x1000>; + #reset-cells = <1>; + }; + + vamacro: codec@a730000 { + compatible = "qcom,sm6115-lpass-va-macro"; + reg = <0x0 0x0a730000 0x0 0x1000>; + clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "mclk", + "dcodec", + "npl"; + assigned-clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + assigned-clock-rates = <19200000>, + <19200000>; + #clock-cells = <0>; + clock-output-names = "fsgen"; + #sound-dai-cells = <1>; + }; + + swr0: soundwire@a740000 { + compatible = "qcom,soundwire-v1.6.0"; + reg = <0x0 0x0a740000 0x0 0x2000>; + interrupts = , + ; + clocks = <&txmacro>; + clock-names = "iface"; + + resets = <&lpasscc 0>; + reset-names = "swr_audio_cgcr"; + + label = "VA_TX"; + qcom,din-ports = <3>; + qcom,dout-ports = <0>; + + qcom,ports-sinterval-low = /bits/ 8 <0x03 0x03 0x03>; + qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x01>; + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00>; + qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff>; + qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff>; + qcom,ports-lane-control = /bits/ 8 <0x00 0x00 0x00>; + + #sound-dai-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; + }; + + lpasscc: clock-controller@a7ec000 { + compatible = "qcom,sm6115-lpasscc"; + reg = <0x0 0x0a7ec000 0x0 0x1000>; + #reset-cells = <1>; + }; + remoteproc_adsp: remoteproc@ab00000 { compatible = "qcom,sm6115-adsp-pas"; reg = <0x0 0x0ab00000 0x0 0x100>; From patchwork Thu Dec 12 00:47:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 850464 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2151C127E18 for ; Thu, 12 Dec 2024 00:47:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964463; cv=none; b=R5gsasnwCqp88epswId4pgENjlsJzeeVLwnsQbyxLlBhAPP1zCWY3Ht1+YHSYDJiucBMmwxFUIKS+EbJ/tmH7+aR6GkKbGXU8SkyMSlHUjrjxu5QtHqCz03kQrls+G+xT9DRtBFC0Sv9+pI2NZ88tk27RNB6hErdCg6vKHreQC4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964463; c=relaxed/simple; bh=KYn3uuYZj7NpZtiTkHvPGGaN8yS+R6O8JQi1SN8+UfI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pR9gOD7/60jVbDcP0xoo8wEF6T+HqneewBpdnjrGMzZ+if+OGlVCcaXE4LAwBNeZ6WkxCbynuNstAsLZO2/SuUW/LKudrzeao/S8YpeaHGUPPinM+GxcPMumatjPU8A9W8x2gIde/Ppem5T1s4i+tUZI1Hb5U7nDSODwiy9kEIY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=P8X5pHkK; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="P8X5pHkK" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-4361fe642ddso411645e9.2 for ; Wed, 11 Dec 2024 16:47:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964460; x=1734569260; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jrR6DiKypyiSRNkIPUHsCZVzuVT+9VDdCizIFEiX0fc=; b=P8X5pHkKaapQm5/0VngGGSBDrJtx8b89/suvo5A7H4wZ4/6g9xQ0Yf1EZeXJGgRJDH NcjPo3nZ6Wd60bMuWsfXHVrNslfDAE7SWxL0uQoVuNnhAaDMKo3XgT/y4XtTbYiAaQTY V+xb8fi8+0Qr0cb9ICn+/Nb2kzbtJ7Wkgi4WMyHQtFpCOOf4H3kRvVJqVdVtCe+Kl9dT whLjValdX3GpbxOGEd5aZB3h/L56H9mImFcjzrOsaP85moHCKtk0tPQxaPem/kzEjqsz j5xDRokQY4e1PFq5QsbvSEQaqydMXkK6pjplrL+EK27ZKGh04I2pbZYbTFcuAX1W4F4f IK9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964460; x=1734569260; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jrR6DiKypyiSRNkIPUHsCZVzuVT+9VDdCizIFEiX0fc=; b=LnzHC9i7pR1GZNYtWFCdzjNPfNkSW6Ovkkq6GzR1sL0zu1sMOT+VUXdM449bQfgVMZ igV/2yEyoW9cSW4RkELuWIOwCHhsaAquGQIGs/p3VKeso9EZ5L6mKCDNhYmkF6GGtNwc R75kBg1wesPcLzdUiyxZAwkeEBrFXemB5f4sW35Xk27XlAc30x76m7JEZz7vfeYDLc9W LM3x/lR5cBETAaXd+WA7DTPUy28r7CCCJOQDsTQ7F3tFn+Cth50WipwbCtbtTv09ZAcP Zbj+4mslIHhbhsvP/WOqLeUQt7ZUkH7/kKLlNhL1r9pf5yvQzimYKHStBOKhLgm+08W2 v8+w== X-Forwarded-Encrypted: i=1; AJvYcCWAVdE0eCxXkUVZd/HyWnxbN6y9CxT3Pns5aA7axZX4G/nVAx1izDMwo9Pvd69jjabAVJCj5XZEBCjui445@vger.kernel.org X-Gm-Message-State: AOJu0YwKlvGcMk2RtXnssFP4mvAW04I6gQ666pvCLptWwFmcsruLYXtg Zgw9HFJYEnNXc9/EKA7QXlkafOv/D4+wB3/hyeR4oAN8tQeaRBw7IGuAztE+f3E= X-Gm-Gg: ASbGncvMEqkgz0i9NbtBZ8a8qiDPYashUJ04hxHiyA8AsD+i0ihR2GVrq7I8w87xk0+ Aako9VK/K08x4TTp+h7Vs76jVk9nn5KNgbYM5wqfYlK8A4cck5265t0xXtA1Qm/qzIJ7DeOaLiR yaywzKL3/N0pVCjafcRsyH+FbWArDmda2XUC2dWSI8Uxq6uCvtao47xYrmk0dJH6PBPVY5cb2+d pF6g5nZS2khCTJqjIiraDLCLg8z4wMXavQqFhvY+d0mTzrdfDWJKI7Z5bt/L30u8FPE/RHt X-Google-Smtp-Source: AGHT+IGkBmZlNH90HFm8x5XhlTxKfUTueo4mDUUf5V2mYTwxmdvnSzy08A+89Jn4AKPGnkZs6ppvcA== X-Received: by 2002:a05:600c:4446:b0:434:fa73:a907 with SMTP id 5b1f17b1804b1-4361c3723acmr38051395e9.13.1733964460449; Wed, 11 Dec 2024 16:47:40 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:39 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 05/14] arm64: dts: qcom: sm4250: add description of soundwire and dmic pins Date: Thu, 12 Dec 2024 00:47:18 +0000 Message-ID: <20241212004727.2903846-6-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Adds data and clock pins description (their active state) of soundwire masters and onboard DMIC. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- arch/arm64/boot/dts/qcom/sm4250.dtsi | 62 ++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm4250.dtsi b/arch/arm64/boot/dts/qcom/sm4250.dtsi index cd8c8e59976e..723391ba9aa2 100644 --- a/arch/arm64/boot/dts/qcom/sm4250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4250.dtsi @@ -37,10 +37,36 @@ &cpu7 { compatible = "qcom,kryo240"; }; +&swr0 { + pinctrl-0 = <&lpass_tx_swr_active>; + pinctrl-names = "default"; +}; + +&swr1 { + pinctrl-0 = <&lpass_rx_swr_active>; + pinctrl-names = "default"; +}; + &lpass_tlmm { compatible = "qcom,sm4250-lpass-lpi-pinctrl"; gpio-ranges = <&lpass_tlmm 0 0 27>; + lpass_dmic01_active: lpass-dmic01-active-state { + clk-pins { + pins = "gpio6"; + function = "dmic01_clk"; + drive-strength = <8>; + output-high; + }; + + data-pins { + pins = "gpio7"; + function = "dmic01_data"; + drive-strength = <8>; + input-enable; + }; + }; + lpi_i2s2_active: lpi-i2s2-active-state { sck-pins { pins = "gpio10"; @@ -74,4 +100,40 @@ ext-mclk1-pins { output-high; }; }; + + lpass_tx_swr_active: lpass-tx-swr-active-state { + clk-pins { + pins = "gpio0"; + function = "swr_tx_clk"; + drive-strength = <10>; + slew-rate = <3>; + bias-disable; + }; + + data-pins { + pins = "gpio1", "gpio2"; + function = "swr_tx_data"; + drive-strength = <10>; + slew-rate = <3>; + bias-bus-hold; + }; + }; + + lpass_rx_swr_active: lpass-rx-swr-active-state { + clk-pins { + pins = "gpio3"; + function = "swr_rx_clk"; + drive-strength = <10>; + slew-rate = <3>; + bias-disable; + }; + + data-pins { + pins = "gpio4", "gpio5"; + function = "swr_rx_data"; + drive-strength = <10>; + slew-rate = <3>; + bias-bus-hold; + }; + }; }; From patchwork Thu Dec 12 00:47:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 849821 Received: from mail-wr1-f43.google.com (mail-wr1-f43.google.com [209.85.221.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E62213B284 for ; Thu, 12 Dec 2024 00:47:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964466; cv=none; b=ChqPC0qnCBW1CnkhMyeSnVdcJn9ELWt8J+1OlMbtfyJrK7TnJJGpHPJul4D7TzapKJPqEObXOiobW0lrnL83oUjTwOvq2/lAt3jSyjgWSXuo8QWTvaZrvTPmc7ZSBqpxqYPDhm5GGcRwiRPpXsRKJMsoPGPmyt3Xn45yVus4c6c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964466; c=relaxed/simple; bh=tyapNoEQY3XYO+jmzcvBF2+W19GTvYciSfkZQRjl4gE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=l1Uhuw/N5BjtmqoOsFRaAeSQz/pfPE/1zRRm7sMezUlA6hktWKNbJK8+Yg0HdfbyIyV3HULRCRxm2MAwDNn1SAzVk2jalO92gzBEUmTMH8VCig8pyjbsf+v1grJq7PbH6YfitvVvKVemlOljokELwcC1wyIpdH9HN9MG2RTzhlk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=nCIDFUqZ; arc=none smtp.client-ip=209.85.221.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="nCIDFUqZ" Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-382610c7116so11126f8f.0 for ; Wed, 11 Dec 2024 16:47:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964462; x=1734569262; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MeswejV8LMfcb7qwCslWXku0mWaecv3bAOXmE+9YQHo=; b=nCIDFUqZC1EYfaWP4mXqjCQiKZbE2+3ycLkcLsNwfWHH3GRPtUJUkRl3xniTPgwBu0 er5csjwZPBrS/V00d/86Q6mHu5VB2RQtbQQq1K8WLOs6ppQ0kbgajOgpXcES+KgsIUwJ D15vFpmbB+9BJhG7dhwzvzz0tVst2bZQ/utRtdqUkcrVsGlWgWZeBUmJ6q/Nv19ZOmip bGPSSe+t0KScCcd3vy9fwkXBVvuwoXT69xmbKGxvpUVqEmZW4SymO2CVSxIMbhAYBx/Y kDHy4/v9Hr30QgtxO9KM+34ddg4Tc2Rj+UHFGxbneNW14KNUm0hpEkJQfU94Ar7dQQZJ KNbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964462; x=1734569262; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MeswejV8LMfcb7qwCslWXku0mWaecv3bAOXmE+9YQHo=; b=DDsj3p8hJ5ExfZBJM++plYeJ1/Fj+mhikC6cD2l/cIyzDk59tb/dRZPnTlIiapPmEJ Jm8G33GLMhEIrX5Oqc57b6X9yPrMQOfyIAcGc6OesiLOXgPHT2Ggi0YIO+D+ueZb57NB 7jBMxCzNkHeD53xyw6UkuBqaVplfd8iV7txrHqmMQoGmXa3kIQz1s9602apUo0s3C5lG SGVZ4gl88nIAIHP3ZfyodvJIiA7c3tfCG72D3sVCDdLjGJW70WbeeyKLzj5/P1lYzHLi 2iQd756ETjy702h2Sjr4cCugjQJQSqvquWFqWJFFoFjb697W4AOm4R9TstRYGWVDf3cR 1uNQ== X-Forwarded-Encrypted: i=1; AJvYcCU1WF1ImCVlQgqyI2ssV51HjwkA9PhgBBipauKZ1E8o2w02YVwCA/FWU83ZlDzBZ/LU1NIWXEeHbvLSTJyu@vger.kernel.org X-Gm-Message-State: AOJu0YxxSIpbVvlAYjDVHpwofeQUbfojWTglpoSUYJertiV2I3Aq54UJ qjrbJVtvjp4gbE9GsCmnwMbYUEu60ECslBoICmAsh6PpIfw96EnrP+1VIMCBurc= X-Gm-Gg: ASbGncuc9mc6EkP7kCx+XwT1t6oVzwHQV4jHfshmzUt54GBTH2dkDZEBYIp0Rby8SQ+ 2Kmizml5xx3Lgfq39TejOoZ2/asNPgbku2IR646dmrVRh3zxAJNYJGfyOMTZ3Tv56H383atjbcf GQr8xCZEUabYafs7EQ0muMOOcAZkeUEB/tX8Tn/V+A3SALtE1pNHpzh/8LPI8NY3GUis8BmQbLJ qF2o8Q2qouaLmFRiOqBBcig7VB0Dak/1K6x/FyTApd82jMEsRqI6iKkr7c3wPzz9CGZxm9P X-Google-Smtp-Source: AGHT+IHgKENLpDieQsFB14HFzmuxdYzoOXPmh+CHOUJNHXU2LbSWQXM8lcVrkY+JONlF+DyQH9GcDw== X-Received: by 2002:a05:6000:68e:b0:385:cf9d:2720 with SMTP id ffacd0b85a97d-3864ce55a73mr3615290f8f.23.1733964462584; Wed, 11 Dec 2024 16:47:42 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:41 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 06/14] arm64: dts: qcom: qrb4210-rb2: add wcd937x codec support Date: Thu, 12 Dec 2024 00:47:19 +0000 Message-ID: <20241212004727.2903846-7-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 wcd937x codec contains soundwire RX and TX slave devices and can convert digital audio to analog audio and vice versa. The codec node also requires description of reset pin/gpio. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 47 ++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts index edfb18c85da8..6217bc6e6282 100644 --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include #include #include #include @@ -146,6 +147,25 @@ codec { }; }; + wcd937x: codec { + compatible = "qcom,wcd9370-codec"; + pinctrl-0 = <&wcd_reset_n>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 82 GPIO_ACTIVE_LOW>; + vdd-buck-supply = <&vreg_l9a_1p8>; + vdd-rxtx-supply = <&vreg_l9a_1p8>; + vdd-px-supply = <&vreg_l9a_1p8>; + vdd-mic-bias-supply = <&vdc_vbat_som>; + qcom,micbias1-microvolt = <1800000>; + qcom,micbias2-microvolt = <1800000>; + qcom,micbias3-microvolt = <1800000>; + qcom,micbias4-microvolt = <1800000>; + qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; + qcom,rx-device = <&wcd937x_rx>; + qcom,tx-device = <&wcd937x_tx>; + #sound-dai-cells = <1>; + }; + vreg_hdmi_out_1p2: regulator-hdmi-out-1p2 { compatible = "regulator-fixed"; regulator-name = "VREG_HDMI_OUT_1P2"; @@ -599,6 +619,26 @@ &sleep_clk { clock-frequency = <32000>; }; +&swr1 { + status = "okay"; + + wcd937x_rx: codec@0,4 { + compatible = "sdw20217010a00"; + reg = <0 4>; + qcom,rx-port-mapping = <1 2 3 4 5>; + }; +}; + +&swr0 { + status = "okay"; + + wcd937x_tx: codec@0,3 { + compatible = "sdw20217010a00"; + reg = <0 3>; + qcom,tx-port-mapping = <1 1 2 3>; + }; +}; + &tlmm { gpio-reserved-ranges = <43 2>, <49 1>, <54 1>, <56 3>, <61 2>, <64 1>, @@ -683,6 +723,13 @@ sdc2_card_det_n: sd-card-det-n-state { drive-strength = <2>; bias-pull-up; }; + + wcd_reset_n: wcd-reset-n-state { + pins = "gpio82"; + function = "gpio"; + drive-strength = <16>; + output-high; + }; }; &uart3 { From patchwork Thu Dec 12 00:47:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 849820 Received: from mail-wm1-f42.google.com (mail-wm1-f42.google.com [209.85.128.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96AB613B284 for ; Thu, 12 Dec 2024 00:47:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964470; cv=none; b=JoI74dZhpKvMDeHX/P4SYUhFkBEAzu20/ga0+Bv4MM4sAO+GNfaVDAfP9PSzDct1cPwfGVSRJg1hPCpG65IfLLSfMhNIQAodSzYdVOWEUWmRiLCIOXr9eAb/ILqY082FT2VReeH9IcydFE2XnmKrZCxGge6ADDSMi8c/voDgPeo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964470; c=relaxed/simple; bh=GNiCZMe+RW8jsYjQ3tAiNYLd0FE9HPQ8fTKML2yoad4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=X657hwkBJIlAOVsj43J0cBnKGuVTDjZhC9dz9A+yl0cEGdufbud97HsCgSZ9i4dy1gWROAZlSIDPSaWO+VhWnG7pt3glCDgqrUwfjomk95OEsXmH6X9iwTyQXl7CPW85+3v4QcvR3PcE2rDTCjaA8+oUP1hw2s1JuHTAFkHYazs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=gxdd05U+; arc=none smtp.client-ip=209.85.128.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="gxdd05U+" Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-43622267b2eso513395e9.0 for ; Wed, 11 Dec 2024 16:47:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964465; x=1734569265; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NrjD1C7DWCCSENumePu2t3sjR50wPcC6aXcikSoHxpg=; b=gxdd05U+fcY5PqpYNeeuxIugzOi6xuAyXwKO9UPNF0HPOBlLiOcBS7qLNTLrFQZPkN azGfyGem3KUAGvIqLp1scSOwmnKd2TkKaMNkFhucStqgEwQzezbAeSzj6pMoVo8Sb0CN Xobq3wbyz4Hu/3rQdwqy+bxgvGsJAwgzNL/hUUPRJSDyRJJQoXLY3DO4CxGo/zryTTyl v8kNTaJBqPxp+LaO0hW/kHd5aU2m6ZVGe5QzwOEJqrnZ7jNcQz2ZzO8ROpICH9Xr3Hyj iQdCeCtQqiDcOJ6f7Agd/fxcXn3YnGWHq+mwlkitzCuF+ObHWLDBOBKsmtfAE0b5bjfm GcmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964465; x=1734569265; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NrjD1C7DWCCSENumePu2t3sjR50wPcC6aXcikSoHxpg=; b=IJlh6Dy54/95ATto1ZFGndec2n+ChyEZaovqtEXgf3FDW7iYefebWrgAtBNwg594wq sj7eZmCjaEGj+V8TtjYmQlxI7Ku223gl54Mcwp/NqqdQvW/XE5jRUPXuHy1jj7SNKr2w D/ag20fs+/dhJIW4UZxPKwAPk/PodzevYOw45w4K6ByDGfBVjH/Yvc9Xyldq2HieskSa 1kaqlVF0Jv0yADUbzb1Xg1EGPI45+Uvu/NKkZSqi5cZYaEzLzjxcLpjnBdrLUAjG/P6D 4jzU+3Yzuet07RxwqzTGLsPJrkeTyOdykGo+8tevvJMQaKlL6ROAmq1BM/kRIoRF4l0Q Gzwg== X-Forwarded-Encrypted: i=1; AJvYcCU5a9eC92S1M7ePgTuT9Nyo6RR1tM95LWtDJ24qRjzdhkQWYEwbG4S3uRUW/ch40G5D/clq13+c4QRrwK0j@vger.kernel.org X-Gm-Message-State: AOJu0YxzvsC9pjWZoOz4f6UBself/r0gSba7gjprH9iIf0Golv02jKId WpR21zd3fY0fQwWi9fZbijsEO8FAtmUVsdmOUt0XtD3spEu62AlzDB4BQiuxN18= X-Gm-Gg: ASbGncu7NQpAFE3yzmSYDRMHS3+0bjg4AC0Z5aQ2wA2BlM3p0gtICS0bBS09+kBeQ/C P2pIl0BDdvxv5ArP0OI/Ni1h2cZvfUIItuDhh8hY4Ci8WJgOzd3+yJXTYobhoTVZyjUDAvMbFlb WnjKalh8kRgJ0FzuSxl9i3UGRvB//Ezbgak5c3mWaowB9DdVAiQofJma5MLKYtixCrngSXFo/Y9 NpQMmzZ84qf2qMrzT6lo6QfUTSx5ZA6GEVVkW2rO1cMLrjgrxJX8943Q9pQK6GQYyObk3e9 X-Google-Smtp-Source: AGHT+IHe61DZMG3FgipyXReVwcoY5Aa1Hk5fRDtzl9H1XCItA8J0TpNmN/mbaTnfJoMTBh2/1CTqNQ== X-Received: by 2002:a05:600c:468b:b0:434:fd15:3ac9 with SMTP id 5b1f17b1804b1-4361c3e3aacmr32236095e9.22.1733964464859; Wed, 11 Dec 2024 16:47:44 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:43 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 07/14] ASoC: codecs: wsa881x: split into common and soundwire drivers Date: Thu, 12 Dec 2024 00:47:20 +0000 Message-ID: <20241212004727.2903846-8-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This is required in order to introduce wsa881x driver that works in analog mode and is configurable via i2c only. Functional changes, if any, are kept to be minimal and common parts or parts that can be shared are moved into wsa881x-common helper driver. The regmap config structure now contains 0x3000 offset as required by soundwire spec. While at this, also fix the typo in WSA881X_ADC_EN_SEL_IBIAS register name and rename wsa881x_set_sdw_stream() to wsa881x_set_stream(). Cc: Krzysztof Kozlowski Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- sound/soc/codecs/Kconfig | 4 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/wsa881x-common.c | 123 ++++++++ sound/soc/codecs/wsa881x-common.h | 406 ++++++++++++++++++++++++ sound/soc/codecs/wsa881x.c | 493 +----------------------------- 5 files changed, 547 insertions(+), 481 deletions(-) create mode 100644 sound/soc/codecs/wsa881x-common.c create mode 100644 sound/soc/codecs/wsa881x-common.h diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 0f2df7c91e18..d1607384ea1b 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -2494,10 +2494,14 @@ config SND_SOC_WM9713 select REGMAP_AC97 select AC97_BUS_COMPAT if AC97_BUS_NEW +config SND_SOC_WSA881X_COMMON + tristate + config SND_SOC_WSA881X tristate "WSA881X Codec" depends on SOUNDWIRE select REGMAP_SOUNDWIRE + select SND_SOC_WSA881X_COMMON help This enables support for Qualcomm WSA8810/WSA8815 Class-D Smart Speaker Amplifier. diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index d7ad795603c1..bde132fc9b37 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -400,6 +400,7 @@ snd-soc-wm9712-y := wm9712.o snd-soc-wm9713-y := wm9713.o snd-soc-wm-hubs-y := wm_hubs.o snd-soc-wsa881x-y := wsa881x.o +snd-soc-wsa881x-common-y := wsa881x-common.o snd-soc-wsa883x-y := wsa883x.o snd-soc-wsa884x-y := wsa884x.o snd-soc-zl38060-y := zl38060.o @@ -823,6 +824,7 @@ obj-$(CONFIG_SND_SOC_WM9713) += snd-soc-wm9713.o obj-$(CONFIG_SND_SOC_WM_ADSP) += snd-soc-wm-adsp.o obj-$(CONFIG_SND_SOC_WM_HUBS) += snd-soc-wm-hubs.o obj-$(CONFIG_SND_SOC_WSA881X) += snd-soc-wsa881x.o +obj-$(CONFIG_SND_SOC_WSA881X_COMMON) += snd-soc-wsa881x-common.o obj-$(CONFIG_SND_SOC_WSA883X) += snd-soc-wsa883x.o obj-$(CONFIG_SND_SOC_WSA884X) += snd-soc-wsa884x.o obj-$(CONFIG_SND_SOC_ZL38060) += snd-soc-zl38060.o diff --git a/sound/soc/codecs/wsa881x-common.c b/sound/soc/codecs/wsa881x-common.c new file mode 100644 index 000000000000..9f95830f0e83 --- /dev/null +++ b/sound/soc/codecs/wsa881x-common.c @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2024 Linaro Ltd + */ + +#include +#include +#include +#include + +#include "wsa881x-common.h" + +int wsa881x_set_stream(struct snd_soc_dai *dai, void *stream, int direction) +{ +#if IS_ENABLED(CONFIG_SND_SOC_WSA881X) + struct wsa881x_priv *wsa881x = dev_get_drvdata(dai->dev); + + wsa881x->sruntime = stream; +#endif + return 0; +} +EXPORT_SYMBOL_GPL(wsa881x_set_stream); + +int wsa881x_digital_mute(struct snd_soc_dai *dai, int mute, int stream) +{ + struct snd_soc_component *component = dai->component; + + if (mute) + snd_soc_component_update_bits(component, + WSA881X_SPKR_DRV_EN, 0x80, 0x00); + else + snd_soc_component_update_bits(component, + WSA881X_SPKR_DRV_EN, 0x80, 0x80); + + return 0; +} +EXPORT_SYMBOL_GPL(wsa881x_digital_mute); + +void wsa881x_init_common(struct wsa881x_priv *wsa881x) +{ + struct regmap *rm = wsa881x->regmap; + unsigned int val = 0; + + /* Bring out of analog reset */ + regmap_update_bits(rm, WSA881X_CDC_RST_CTL, 0x02, 0x02); + + /* Bring out of digital reset */ + regmap_update_bits(rm, WSA881X_CDC_RST_CTL, 0x01, 0x01); + regmap_update_bits(rm, WSA881X_CLOCK_CONFIG, 0x10, 0x10); + regmap_update_bits(rm, WSA881X_SPKR_OCP_CTL, 0x02, 0x02); + regmap_update_bits(rm, WSA881X_SPKR_MISC_CTL1, 0xC0, 0x80); + regmap_update_bits(rm, WSA881X_SPKR_MISC_CTL1, 0x06, 0x06); + regmap_update_bits(rm, WSA881X_SPKR_BIAS_INT, 0xFF, 0x00); + regmap_update_bits(rm, WSA881X_SPKR_PA_INT, 0xF0, 0x40); + regmap_update_bits(rm, WSA881X_SPKR_PA_INT, 0x0E, 0x0E); + regmap_update_bits(rm, WSA881X_BOOST_LOOP_STABILITY, 0x03, 0x03); + regmap_update_bits(rm, WSA881X_BOOST_MISC2_CTL, 0xFF, 0x14); + regmap_update_bits(rm, WSA881X_BOOST_START_CTL, 0x80, 0x80); + regmap_update_bits(rm, WSA881X_BOOST_START_CTL, 0x03, 0x00); + regmap_update_bits(rm, WSA881X_BOOST_SLOPE_COMP_ISENSE_FB, 0x0C, 0x04); + regmap_update_bits(rm, WSA881X_BOOST_SLOPE_COMP_ISENSE_FB, 0x03, 0x00); + + regmap_read(rm, WSA881X_OTP_REG_0, &val); + if (val) + regmap_update_bits(rm, WSA881X_BOOST_PRESET_OUT1, 0xF0, 0x70); + + regmap_update_bits(rm, WSA881X_BOOST_PRESET_OUT2, 0xF0, 0x30); + regmap_update_bits(rm, WSA881X_SPKR_DRV_EN, 0x08, 0x08); + regmap_update_bits(rm, WSA881X_BOOST_CURRENT_LIMIT, 0x0F, 0x08); + regmap_update_bits(rm, WSA881X_SPKR_OCP_CTL, 0x30, 0x30); + regmap_update_bits(rm, WSA881X_SPKR_OCP_CTL, 0x0C, 0x00); + regmap_update_bits(rm, WSA881X_OTP_REG_28, 0x3F, 0x3A); + regmap_update_bits(rm, WSA881X_BONGO_RESRV_REG1, 0xFF, 0xB2); + regmap_update_bits(rm, WSA881X_BONGO_RESRV_REG2, 0xFF, 0x05); +} +EXPORT_SYMBOL_GPL(wsa881x_init_common); + +int wsa881x_probe_common(struct wsa881x_priv **wsa881x, struct device *dev) +{ + struct wsa881x_priv *wsa; + + wsa = devm_kzalloc(dev, sizeof(*wsa), GFP_KERNEL); + if (!wsa) + return -ENOMEM; + + wsa->dev = dev; + wsa->sd_n = devm_gpiod_get_optional(dev, "powerdown", + GPIOD_FLAGS_BIT_NONEXCLUSIVE); + if (IS_ERR(wsa->sd_n)) + return dev_err_probe(dev, PTR_ERR(wsa->sd_n), + "Shutdown Control GPIO not found\n"); + /* + * Backwards compatibility work-around. + * + * The SD_N GPIO is active low, however upstream DTS used always active + * high. Changing the flag in driver and DTS will break backwards + * compatibility, so add a simple value inversion to work with both old + * and new DTS. + * + * This won't work properly with DTS using the flags properly in cases: + * 1. Old DTS with proper ACTIVE_LOW, however such case was broken + * before as the driver required the active high. + * 2. New DTS with proper ACTIVE_HIGH (intended), which is rare case + * (not existing upstream) but possible. This is the price of + * backwards compatibility, therefore this hack should be removed at + * some point. + */ + wsa->sd_n_val = gpiod_is_active_low(wsa->sd_n); + if (!wsa->sd_n_val) + dev_warn(dev, + "Using ACTIVE_HIGH for shutdown GPIO. Your DTB might be outdated or you use unsupported configuration for the GPIO."); + + dev_set_drvdata(dev, wsa); + gpiod_direction_output(wsa->sd_n, !wsa->sd_n_val); + + *wsa881x = wsa; + + return 0; +} +EXPORT_SYMBOL_GPL(wsa881x_probe_common); + +MODULE_DESCRIPTION("WSA881x codec helper driver"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/wsa881x-common.h b/sound/soc/codecs/wsa881x-common.h new file mode 100644 index 000000000000..cf8643e1f7f7 --- /dev/null +++ b/sound/soc/codecs/wsa881x-common.h @@ -0,0 +1,406 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __WSA881x_COMMON_H__ +#define __WSA881x_COMMON_H__ + +#include +#include + +#define WSA881X_MAX_SWR_PORTS 4 + +#define WSA881X_DIGITAL_BASE 0x0000 +#define WSA881X_ANALOG_BASE 0x0100 + +/* Digital register address space */ +#define WSA881X_CHIP_ID0 (WSA881X_DIGITAL_BASE + 0x0000) +#define WSA881X_CHIP_ID1 (WSA881X_DIGITAL_BASE + 0x0001) +#define WSA881X_CHIP_ID2 (WSA881X_DIGITAL_BASE + 0x0002) +#define WSA881X_CHIP_ID3 (WSA881X_DIGITAL_BASE + 0x0003) +#define WSA881X_BUS_ID (WSA881X_DIGITAL_BASE + 0x0004) +#define WSA881X_CDC_RST_CTL (WSA881X_DIGITAL_BASE + 0x0005) +#define WSA881X_CDC_TOP_CLK_CTL (WSA881X_DIGITAL_BASE + 0x0006) +#define WSA881X_CDC_ANA_CLK_CTL (WSA881X_DIGITAL_BASE + 0x0007) +#define WSA881X_CDC_DIG_CLK_CTL (WSA881X_DIGITAL_BASE + 0x0008) +#define WSA881X_CLOCK_CONFIG (WSA881X_DIGITAL_BASE + 0x0009) +#define WSA881X_ANA_CTL (WSA881X_DIGITAL_BASE + 0x000A) +#define WSA881X_SWR_RESET_EN (WSA881X_DIGITAL_BASE + 0x000B) +#define WSA881X_RESET_CTL (WSA881X_DIGITAL_BASE + 0x000C) +#define WSA881X_TADC_VALUE_CTL (WSA881X_DIGITAL_BASE + 0x000F) +#define WSA881X_TEMP_DETECT_CTL (WSA881X_DIGITAL_BASE + 0x0010) +#define WSA881X_TEMP_MSB (WSA881X_DIGITAL_BASE + 0x0011) +#define WSA881X_TEMP_LSB (WSA881X_DIGITAL_BASE + 0x0012) +#define WSA881X_TEMP_CONFIG0 (WSA881X_DIGITAL_BASE + 0x0013) +#define WSA881X_TEMP_CONFIG1 (WSA881X_DIGITAL_BASE + 0x0014) +#define WSA881X_CDC_CLIP_CTL (WSA881X_DIGITAL_BASE + 0x0015) +#define WSA881X_SDM_PDM9_LSB (WSA881X_DIGITAL_BASE + 0x0016) +#define WSA881X_SDM_PDM9_MSB (WSA881X_DIGITAL_BASE + 0x0017) +#define WSA881X_CDC_RX_CTL (WSA881X_DIGITAL_BASE + 0x0018) +#define WSA881X_DEM_BYPASS_DATA0 (WSA881X_DIGITAL_BASE + 0x0019) +#define WSA881X_DEM_BYPASS_DATA1 (WSA881X_DIGITAL_BASE + 0x001A) +#define WSA881X_DEM_BYPASS_DATA2 (WSA881X_DIGITAL_BASE + 0x001B) +#define WSA881X_DEM_BYPASS_DATA3 (WSA881X_DIGITAL_BASE + 0x001C) +#define WSA881X_OTP_CTRL0 (WSA881X_DIGITAL_BASE + 0x001D) +#define WSA881X_OTP_CTRL1 (WSA881X_DIGITAL_BASE + 0x001E) +#define WSA881X_HDRIVE_CTL_GROUP1 (WSA881X_DIGITAL_BASE + 0x001F) +#define WSA881X_INTR_MODE (WSA881X_DIGITAL_BASE + 0x0020) +#define WSA881X_INTR_MASK (WSA881X_DIGITAL_BASE + 0x0021) +#define WSA881X_INTR_STATUS (WSA881X_DIGITAL_BASE + 0x0022) +#define WSA881X_INTR_CLEAR (WSA881X_DIGITAL_BASE + 0x0023) +#define WSA881X_INTR_LEVEL (WSA881X_DIGITAL_BASE + 0x0024) +#define WSA881X_INTR_SET (WSA881X_DIGITAL_BASE + 0x0025) +#define WSA881X_INTR_TEST (WSA881X_DIGITAL_BASE + 0x0026) +#define WSA881X_PDM_TEST_MODE (WSA881X_DIGITAL_BASE + 0x0030) +#define WSA881X_ATE_TEST_MODE (WSA881X_DIGITAL_BASE + 0x0031) +#define WSA881X_PIN_CTL_MODE (WSA881X_DIGITAL_BASE + 0x0032) +#define WSA881X_PIN_CTL_OE (WSA881X_DIGITAL_BASE + 0x0033) +#define WSA881X_PIN_WDATA_IOPAD (WSA881X_DIGITAL_BASE + 0x0034) +#define WSA881X_PIN_STATUS (WSA881X_DIGITAL_BASE + 0x0035) +#define WSA881X_DIG_DEBUG_MODE (WSA881X_DIGITAL_BASE + 0x0037) +#define WSA881X_DIG_DEBUG_SEL (WSA881X_DIGITAL_BASE + 0x0038) +#define WSA881X_DIG_DEBUG_EN (WSA881X_DIGITAL_BASE + 0x0039) +#define WSA881X_SWR_HM_TEST1 (WSA881X_DIGITAL_BASE + 0x003B) +#define WSA881X_SWR_HM_TEST2 (WSA881X_DIGITAL_BASE + 0x003C) +#define WSA881X_TEMP_DETECT_DBG_CTL (WSA881X_DIGITAL_BASE + 0x003D) +#define WSA881X_TEMP_DEBUG_MSB (WSA881X_DIGITAL_BASE + 0x003E) +#define WSA881X_TEMP_DEBUG_LSB (WSA881X_DIGITAL_BASE + 0x003F) +#define WSA881X_SAMPLE_EDGE_SEL (WSA881X_DIGITAL_BASE + 0x0044) +#define WSA881X_IOPAD_CTL (WSA881X_DIGITAL_BASE + 0x0045) +#define WSA881X_SPARE_0 (WSA881X_DIGITAL_BASE + 0x0050) +#define WSA881X_SPARE_1 (WSA881X_DIGITAL_BASE + 0x0051) +#define WSA881X_SPARE_2 (WSA881X_DIGITAL_BASE + 0x0052) +#define WSA881X_OTP_REG_0 (WSA881X_DIGITAL_BASE + 0x0080) +#define WSA881X_OTP_REG_1 (WSA881X_DIGITAL_BASE + 0x0081) +#define WSA881X_OTP_REG_2 (WSA881X_DIGITAL_BASE + 0x0082) +#define WSA881X_OTP_REG_3 (WSA881X_DIGITAL_BASE + 0x0083) +#define WSA881X_OTP_REG_4 (WSA881X_DIGITAL_BASE + 0x0084) +#define WSA881X_OTP_REG_5 (WSA881X_DIGITAL_BASE + 0x0085) +#define WSA881X_OTP_REG_6 (WSA881X_DIGITAL_BASE + 0x0086) +#define WSA881X_OTP_REG_7 (WSA881X_DIGITAL_BASE + 0x0087) +#define WSA881X_OTP_REG_8 (WSA881X_DIGITAL_BASE + 0x0088) +#define WSA881X_OTP_REG_9 (WSA881X_DIGITAL_BASE + 0x0089) +#define WSA881X_OTP_REG_10 (WSA881X_DIGITAL_BASE + 0x008A) +#define WSA881X_OTP_REG_11 (WSA881X_DIGITAL_BASE + 0x008B) +#define WSA881X_OTP_REG_12 (WSA881X_DIGITAL_BASE + 0x008C) +#define WSA881X_OTP_REG_13 (WSA881X_DIGITAL_BASE + 0x008D) +#define WSA881X_OTP_REG_14 (WSA881X_DIGITAL_BASE + 0x008E) +#define WSA881X_OTP_REG_15 (WSA881X_DIGITAL_BASE + 0x008F) +#define WSA881X_OTP_REG_16 (WSA881X_DIGITAL_BASE + 0x0090) +#define WSA881X_OTP_REG_17 (WSA881X_DIGITAL_BASE + 0x0091) +#define WSA881X_OTP_REG_18 (WSA881X_DIGITAL_BASE + 0x0092) +#define WSA881X_OTP_REG_19 (WSA881X_DIGITAL_BASE + 0x0093) +#define WSA881X_OTP_REG_20 (WSA881X_DIGITAL_BASE + 0x0094) +#define WSA881X_OTP_REG_21 (WSA881X_DIGITAL_BASE + 0x0095) +#define WSA881X_OTP_REG_22 (WSA881X_DIGITAL_BASE + 0x0096) +#define WSA881X_OTP_REG_23 (WSA881X_DIGITAL_BASE + 0x0097) +#define WSA881X_OTP_REG_24 (WSA881X_DIGITAL_BASE + 0x0098) +#define WSA881X_OTP_REG_25 (WSA881X_DIGITAL_BASE + 0x0099) +#define WSA881X_OTP_REG_26 (WSA881X_DIGITAL_BASE + 0x009A) +#define WSA881X_OTP_REG_27 (WSA881X_DIGITAL_BASE + 0x009B) +#define WSA881X_OTP_REG_28 (WSA881X_DIGITAL_BASE + 0x009C) +#define WSA881X_OTP_REG_29 (WSA881X_DIGITAL_BASE + 0x009D) +#define WSA881X_OTP_REG_30 (WSA881X_DIGITAL_BASE + 0x009E) +#define WSA881X_OTP_REG_31 (WSA881X_DIGITAL_BASE + 0x009F) +#define WSA881X_OTP_REG_63 (WSA881X_DIGITAL_BASE + 0x00BF) + +/* Analog Register address space */ +#define WSA881X_BIAS_REF_CTRL (WSA881X_ANALOG_BASE + 0x0000) +#define WSA881X_BIAS_TEST (WSA881X_ANALOG_BASE + 0x0001) +#define WSA881X_BIAS_BIAS (WSA881X_ANALOG_BASE + 0x0002) +#define WSA881X_TEMP_OP (WSA881X_ANALOG_BASE + 0x0003) +#define WSA881X_TEMP_IREF_CTRL (WSA881X_ANALOG_BASE + 0x0004) +#define WSA881X_TEMP_ISENS_CTRL (WSA881X_ANALOG_BASE + 0x0005) +#define WSA881X_TEMP_CLK_CTRL (WSA881X_ANALOG_BASE + 0x0006) +#define WSA881X_TEMP_TEST (WSA881X_ANALOG_BASE + 0x0007) +#define WSA881X_TEMP_BIAS (WSA881X_ANALOG_BASE + 0x0008) +#define WSA881X_TEMP_ADC_CTRL (WSA881X_ANALOG_BASE + 0x0009) +#define WSA881X_TEMP_DOUT_MSB (WSA881X_ANALOG_BASE + 0x000A) +#define WSA881X_TEMP_DOUT_LSB (WSA881X_ANALOG_BASE + 0x000B) +#define WSA881X_ADC_EN_MODU_V (WSA881X_ANALOG_BASE + 0x0010) +#define WSA881X_ADC_EN_MODU_I (WSA881X_ANALOG_BASE + 0x0011) +#define WSA881X_ADC_EN_DET_TEST_V (WSA881X_ANALOG_BASE + 0x0012) +#define WSA881X_ADC_EN_DET_TEST_I (WSA881X_ANALOG_BASE + 0x0013) +#define WSA881X_ADC_SEL_IBIAS (WSA881X_ANALOG_BASE + 0x0014) +#define WSA881X_ADC_EN_SEL_IBIAS (WSA881X_ANALOG_BASE + 0x0015) +#define WSA881X_SPKR_DRV_EN (WSA881X_ANALOG_BASE + 0x001A) +#define WSA881X_SPKR_DRV_GAIN (WSA881X_ANALOG_BASE + 0x001B) +#define WSA881X_PA_GAIN_SEL_MASK BIT(3) +#define WSA881X_PA_GAIN_SEL_REG BIT(3) +#define WSA881X_PA_GAIN_SEL_DRE 0 +#define WSA881X_SPKR_PAG_GAIN_MASK GENMASK(7, 4) +#define WSA881X_SPKR_DAC_CTL (WSA881X_ANALOG_BASE + 0x001C) +#define WSA881X_SPKR_DRV_DBG (WSA881X_ANALOG_BASE + 0x001D) +#define WSA881X_SPKR_PWRSTG_DBG (WSA881X_ANALOG_BASE + 0x001E) +#define WSA881X_SPKR_OCP_CTL (WSA881X_ANALOG_BASE + 0x001F) +#define WSA881X_SPKR_OCP_MASK GENMASK(7, 6) +#define WSA881X_SPKR_OCP_EN BIT(7) +#define WSA881X_SPKR_OCP_HOLD BIT(6) +#define WSA881X_SPKR_CLIP_CTL (WSA881X_ANALOG_BASE + 0x0020) +#define WSA881X_SPKR_BBM_CTL (WSA881X_ANALOG_BASE + 0x0021) +#define WSA881X_SPKR_MISC_CTL1 (WSA881X_ANALOG_BASE + 0x0022) +#define WSA881X_SPKR_MISC_CTL2 (WSA881X_ANALOG_BASE + 0x0023) +#define WSA881X_SPKR_BIAS_INT (WSA881X_ANALOG_BASE + 0x0024) +#define WSA881X_SPKR_PA_INT (WSA881X_ANALOG_BASE + 0x0025) +#define WSA881X_SPKR_BIAS_CAL (WSA881X_ANALOG_BASE + 0x0026) +#define WSA881X_SPKR_BIAS_PSRR (WSA881X_ANALOG_BASE + 0x0027) +#define WSA881X_SPKR_STATUS1 (WSA881X_ANALOG_BASE + 0x0028) +#define WSA881X_SPKR_STATUS2 (WSA881X_ANALOG_BASE + 0x0029) +#define WSA881X_BOOST_EN_CTL (WSA881X_ANALOG_BASE + 0x002A) +#define WSA881X_BOOST_EN_MASK BIT(7) +#define WSA881X_BOOST_EN BIT(7) +#define WSA881X_BOOST_CURRENT_LIMIT (WSA881X_ANALOG_BASE + 0x002B) +#define WSA881X_BOOST_PS_CTL (WSA881X_ANALOG_BASE + 0x002C) +#define WSA881X_BOOST_PRESET_OUT1 (WSA881X_ANALOG_BASE + 0x002D) +#define WSA881X_BOOST_PRESET_OUT2 (WSA881X_ANALOG_BASE + 0x002E) +#define WSA881X_BOOST_FORCE_OUT (WSA881X_ANALOG_BASE + 0x002F) +#define WSA881X_BOOST_LDO_PROG (WSA881X_ANALOG_BASE + 0x0030) +#define WSA881X_BOOST_SLOPE_COMP_ISENSE_FB (WSA881X_ANALOG_BASE + 0x0031) +#define WSA881X_BOOST_RON_CTL (WSA881X_ANALOG_BASE + 0x0032) +#define WSA881X_BOOST_LOOP_STABILITY (WSA881X_ANALOG_BASE + 0x0033) +#define WSA881X_BOOST_ZX_CTL (WSA881X_ANALOG_BASE + 0x0034) +#define WSA881X_BOOST_START_CTL (WSA881X_ANALOG_BASE + 0x0035) +#define WSA881X_BOOST_MISC1_CTL (WSA881X_ANALOG_BASE + 0x0036) +#define WSA881X_BOOST_MISC2_CTL (WSA881X_ANALOG_BASE + 0x0037) +#define WSA881X_BOOST_MISC3_CTL (WSA881X_ANALOG_BASE + 0x0038) +#define WSA881X_BOOST_ATEST_CTL (WSA881X_ANALOG_BASE + 0x0039) +#define WSA881X_SPKR_PROT_FE_GAIN (WSA881X_ANALOG_BASE + 0x003A) +#define WSA881X_SPKR_PROT_FE_CM_LDO_SET (WSA881X_ANALOG_BASE + 0x003B) +#define WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1 (WSA881X_ANALOG_BASE + 0x003C) +#define WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2 (WSA881X_ANALOG_BASE + 0x003D) +#define WSA881X_SPKR_PROT_ATEST1 (WSA881X_ANALOG_BASE + 0x003E) +#define WSA881X_SPKR_PROT_ATEST2 (WSA881X_ANALOG_BASE + 0x003F) +#define WSA881X_SPKR_PROT_FE_VSENSE_VCM (WSA881X_ANALOG_BASE + 0x0040) +#define WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1 (WSA881X_ANALOG_BASE + 0x0041) +#define WSA881X_BONGO_RESRV_REG1 (WSA881X_ANALOG_BASE + 0x0042) +#define WSA881X_BONGO_RESRV_REG2 (WSA881X_ANALOG_BASE + 0x0043) +#define WSA881X_SPKR_PROT_SAR (WSA881X_ANALOG_BASE + 0x0044) +#define WSA881X_SPKR_STATUS3 (WSA881X_ANALOG_BASE + 0x0045) + +/* + * Private data Structure for wsa881x. All parameters related to + * WSA881X codec needs to be defined here. + */ +struct wsa881x_priv { + struct regmap *regmap; + struct device *dev; + +#if IS_ENABLED(CONFIG_SND_SOC_WSA881X) + /* Soundwire interface */ + struct sdw_slave *slave; + struct sdw_stream_config sconfig; + struct sdw_stream_runtime *sruntime; + struct sdw_port_config port_config[WSA881X_MAX_SWR_PORTS]; + int active_ports; + bool port_prepared[WSA881X_MAX_SWR_PORTS]; + bool port_enable[WSA881X_MAX_SWR_PORTS]; +#endif + + struct gpio_desc *sd_n; + /* + * Logical state for SD_N GPIO: high for shutdown, low for enable. + * For backwards compatibility. + */ + unsigned int sd_n_val; +}; + +void wsa881x_init_common(struct wsa881x_priv *wsa881x); +int wsa881x_probe_common(struct wsa881x_priv **wsa881x, struct device *dev); +int wsa881x_digital_mute(struct snd_soc_dai *dai, int mute, int stream); +int wsa881x_set_stream(struct snd_soc_dai *dai, void *stream, int direction); + +static inline bool wsa881x_readable_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case WSA881X_CHIP_ID0: + case WSA881X_CHIP_ID1: + case WSA881X_CHIP_ID2: + case WSA881X_CHIP_ID3: + case WSA881X_BUS_ID: + case WSA881X_CDC_RST_CTL: + case WSA881X_CDC_TOP_CLK_CTL: + case WSA881X_CDC_ANA_CLK_CTL: + case WSA881X_CDC_DIG_CLK_CTL: + case WSA881X_CLOCK_CONFIG: + case WSA881X_ANA_CTL: + case WSA881X_SWR_RESET_EN: + case WSA881X_RESET_CTL: + case WSA881X_TADC_VALUE_CTL: + case WSA881X_TEMP_DETECT_CTL: + case WSA881X_TEMP_MSB: + case WSA881X_TEMP_LSB: + case WSA881X_TEMP_CONFIG0: + case WSA881X_TEMP_CONFIG1: + case WSA881X_CDC_CLIP_CTL: + case WSA881X_SDM_PDM9_LSB: + case WSA881X_SDM_PDM9_MSB: + case WSA881X_CDC_RX_CTL: + case WSA881X_DEM_BYPASS_DATA0: + case WSA881X_DEM_BYPASS_DATA1: + case WSA881X_DEM_BYPASS_DATA2: + case WSA881X_DEM_BYPASS_DATA3: + case WSA881X_OTP_CTRL0: + case WSA881X_OTP_CTRL1: + case WSA881X_HDRIVE_CTL_GROUP1: + case WSA881X_INTR_MODE: + case WSA881X_INTR_MASK: + case WSA881X_INTR_STATUS: + case WSA881X_INTR_CLEAR: + case WSA881X_INTR_LEVEL: + case WSA881X_INTR_SET: + case WSA881X_INTR_TEST: + case WSA881X_PDM_TEST_MODE: + case WSA881X_ATE_TEST_MODE: + case WSA881X_PIN_CTL_MODE: + case WSA881X_PIN_CTL_OE: + case WSA881X_PIN_WDATA_IOPAD: + case WSA881X_PIN_STATUS: + case WSA881X_DIG_DEBUG_MODE: + case WSA881X_DIG_DEBUG_SEL: + case WSA881X_DIG_DEBUG_EN: + case WSA881X_SWR_HM_TEST1: + case WSA881X_SWR_HM_TEST2: + case WSA881X_TEMP_DETECT_DBG_CTL: + case WSA881X_TEMP_DEBUG_MSB: + case WSA881X_TEMP_DEBUG_LSB: + case WSA881X_SAMPLE_EDGE_SEL: + case WSA881X_IOPAD_CTL: + case WSA881X_SPARE_0: + case WSA881X_SPARE_1: + case WSA881X_SPARE_2: + case WSA881X_OTP_REG_0: + case WSA881X_OTP_REG_1: + case WSA881X_OTP_REG_2: + case WSA881X_OTP_REG_3: + case WSA881X_OTP_REG_4: + case WSA881X_OTP_REG_5: + case WSA881X_OTP_REG_6: + case WSA881X_OTP_REG_7: + case WSA881X_OTP_REG_8: + case WSA881X_OTP_REG_9: + case WSA881X_OTP_REG_10: + case WSA881X_OTP_REG_11: + case WSA881X_OTP_REG_12: + case WSA881X_OTP_REG_13: + case WSA881X_OTP_REG_14: + case WSA881X_OTP_REG_15: + case WSA881X_OTP_REG_16: + case WSA881X_OTP_REG_17: + case WSA881X_OTP_REG_18: + case WSA881X_OTP_REG_19: + case WSA881X_OTP_REG_20: + case WSA881X_OTP_REG_21: + case WSA881X_OTP_REG_22: + case WSA881X_OTP_REG_23: + case WSA881X_OTP_REG_24: + case WSA881X_OTP_REG_25: + case WSA881X_OTP_REG_26: + case WSA881X_OTP_REG_27: + case WSA881X_OTP_REG_28: + case WSA881X_OTP_REG_29: + case WSA881X_OTP_REG_30: + case WSA881X_OTP_REG_31: + case WSA881X_OTP_REG_63: + case WSA881X_BIAS_REF_CTRL: + case WSA881X_BIAS_TEST: + case WSA881X_BIAS_BIAS: + case WSA881X_TEMP_OP: + case WSA881X_TEMP_IREF_CTRL: + case WSA881X_TEMP_ISENS_CTRL: + case WSA881X_TEMP_CLK_CTRL: + case WSA881X_TEMP_TEST: + case WSA881X_TEMP_BIAS: + case WSA881X_TEMP_ADC_CTRL: + case WSA881X_TEMP_DOUT_MSB: + case WSA881X_TEMP_DOUT_LSB: + case WSA881X_ADC_EN_MODU_V: + case WSA881X_ADC_EN_MODU_I: + case WSA881X_ADC_EN_DET_TEST_V: + case WSA881X_ADC_EN_DET_TEST_I: + case WSA881X_ADC_SEL_IBIAS: + case WSA881X_ADC_EN_SEL_IBIAS: + case WSA881X_SPKR_DRV_EN: + case WSA881X_SPKR_DRV_GAIN: + case WSA881X_SPKR_DAC_CTL: + case WSA881X_SPKR_DRV_DBG: + case WSA881X_SPKR_PWRSTG_DBG: + case WSA881X_SPKR_OCP_CTL: + case WSA881X_SPKR_CLIP_CTL: + case WSA881X_SPKR_BBM_CTL: + case WSA881X_SPKR_MISC_CTL1: + case WSA881X_SPKR_MISC_CTL2: + case WSA881X_SPKR_BIAS_INT: + case WSA881X_SPKR_PA_INT: + case WSA881X_SPKR_BIAS_CAL: + case WSA881X_SPKR_BIAS_PSRR: + case WSA881X_SPKR_STATUS1: + case WSA881X_SPKR_STATUS2: + case WSA881X_BOOST_EN_CTL: + case WSA881X_BOOST_CURRENT_LIMIT: + case WSA881X_BOOST_PS_CTL: + case WSA881X_BOOST_PRESET_OUT1: + case WSA881X_BOOST_PRESET_OUT2: + case WSA881X_BOOST_FORCE_OUT: + case WSA881X_BOOST_LDO_PROG: + case WSA881X_BOOST_SLOPE_COMP_ISENSE_FB: + case WSA881X_BOOST_RON_CTL: + case WSA881X_BOOST_LOOP_STABILITY: + case WSA881X_BOOST_ZX_CTL: + case WSA881X_BOOST_START_CTL: + case WSA881X_BOOST_MISC1_CTL: + case WSA881X_BOOST_MISC2_CTL: + case WSA881X_BOOST_MISC3_CTL: + case WSA881X_BOOST_ATEST_CTL: + case WSA881X_SPKR_PROT_FE_GAIN: + case WSA881X_SPKR_PROT_FE_CM_LDO_SET: + case WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1: + case WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2: + case WSA881X_SPKR_PROT_ATEST1: + case WSA881X_SPKR_PROT_ATEST2: + case WSA881X_SPKR_PROT_FE_VSENSE_VCM: + case WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1: + case WSA881X_BONGO_RESRV_REG1: + case WSA881X_BONGO_RESRV_REG2: + case WSA881X_SPKR_PROT_SAR: + case WSA881X_SPKR_STATUS3: + return true; + default: + return false; + } +} + +static inline bool wsa881x_volatile_register(struct device *dev, unsigned int reg) +{ + switch (reg) { + case WSA881X_CHIP_ID0: + case WSA881X_CHIP_ID1: + case WSA881X_CHIP_ID2: + case WSA881X_CHIP_ID3: + case WSA881X_BUS_ID: + case WSA881X_TEMP_MSB: + case WSA881X_TEMP_LSB: + case WSA881X_SDM_PDM9_LSB: + case WSA881X_SDM_PDM9_MSB: + case WSA881X_OTP_CTRL1: + case WSA881X_INTR_STATUS: + case WSA881X_ATE_TEST_MODE: + case WSA881X_PIN_STATUS: + case WSA881X_SWR_HM_TEST2: + case WSA881X_SPKR_STATUS1: + case WSA881X_SPKR_STATUS2: + case WSA881X_SPKR_STATUS3: + case WSA881X_OTP_REG_0: + case WSA881X_OTP_REG_1: + case WSA881X_OTP_REG_2: + case WSA881X_OTP_REG_3: + case WSA881X_OTP_REG_4: + case WSA881X_OTP_REG_5: + case WSA881X_OTP_REG_31: + case WSA881X_TEMP_DOUT_MSB: + case WSA881X_TEMP_DOUT_LSB: + case WSA881X_TEMP_OP: + case WSA881X_SPKR_PROT_SAR: + return true; + default: + return false; + } +} + +#endif /* __WSA881x_COMMON_H__ */ diff --git a/sound/soc/codecs/wsa881x.c b/sound/soc/codecs/wsa881x.c index dd2d6661adc7..febe4d468174 100644 --- a/sound/soc/codecs/wsa881x.c +++ b/sound/soc/codecs/wsa881x.c @@ -15,172 +15,7 @@ #include #include -#define WSA881X_DIGITAL_BASE 0x3000 -#define WSA881X_ANALOG_BASE 0x3100 - -/* Digital register address space */ -#define WSA881X_CHIP_ID0 (WSA881X_DIGITAL_BASE + 0x0000) -#define WSA881X_CHIP_ID1 (WSA881X_DIGITAL_BASE + 0x0001) -#define WSA881X_CHIP_ID2 (WSA881X_DIGITAL_BASE + 0x0002) -#define WSA881X_CHIP_ID3 (WSA881X_DIGITAL_BASE + 0x0003) -#define WSA881X_BUS_ID (WSA881X_DIGITAL_BASE + 0x0004) -#define WSA881X_CDC_RST_CTL (WSA881X_DIGITAL_BASE + 0x0005) -#define WSA881X_CDC_TOP_CLK_CTL (WSA881X_DIGITAL_BASE + 0x0006) -#define WSA881X_CDC_ANA_CLK_CTL (WSA881X_DIGITAL_BASE + 0x0007) -#define WSA881X_CDC_DIG_CLK_CTL (WSA881X_DIGITAL_BASE + 0x0008) -#define WSA881X_CLOCK_CONFIG (WSA881X_DIGITAL_BASE + 0x0009) -#define WSA881X_ANA_CTL (WSA881X_DIGITAL_BASE + 0x000A) -#define WSA881X_SWR_RESET_EN (WSA881X_DIGITAL_BASE + 0x000B) -#define WSA881X_RESET_CTL (WSA881X_DIGITAL_BASE + 0x000C) -#define WSA881X_TADC_VALUE_CTL (WSA881X_DIGITAL_BASE + 0x000F) -#define WSA881X_TEMP_DETECT_CTL (WSA881X_DIGITAL_BASE + 0x0010) -#define WSA881X_TEMP_MSB (WSA881X_DIGITAL_BASE + 0x0011) -#define WSA881X_TEMP_LSB (WSA881X_DIGITAL_BASE + 0x0012) -#define WSA881X_TEMP_CONFIG0 (WSA881X_DIGITAL_BASE + 0x0013) -#define WSA881X_TEMP_CONFIG1 (WSA881X_DIGITAL_BASE + 0x0014) -#define WSA881X_CDC_CLIP_CTL (WSA881X_DIGITAL_BASE + 0x0015) -#define WSA881X_SDM_PDM9_LSB (WSA881X_DIGITAL_BASE + 0x0016) -#define WSA881X_SDM_PDM9_MSB (WSA881X_DIGITAL_BASE + 0x0017) -#define WSA881X_CDC_RX_CTL (WSA881X_DIGITAL_BASE + 0x0018) -#define WSA881X_DEM_BYPASS_DATA0 (WSA881X_DIGITAL_BASE + 0x0019) -#define WSA881X_DEM_BYPASS_DATA1 (WSA881X_DIGITAL_BASE + 0x001A) -#define WSA881X_DEM_BYPASS_DATA2 (WSA881X_DIGITAL_BASE + 0x001B) -#define WSA881X_DEM_BYPASS_DATA3 (WSA881X_DIGITAL_BASE + 0x001C) -#define WSA881X_OTP_CTRL0 (WSA881X_DIGITAL_BASE + 0x001D) -#define WSA881X_OTP_CTRL1 (WSA881X_DIGITAL_BASE + 0x001E) -#define WSA881X_HDRIVE_CTL_GROUP1 (WSA881X_DIGITAL_BASE + 0x001F) -#define WSA881X_INTR_MODE (WSA881X_DIGITAL_BASE + 0x0020) -#define WSA881X_INTR_MASK (WSA881X_DIGITAL_BASE + 0x0021) -#define WSA881X_INTR_STATUS (WSA881X_DIGITAL_BASE + 0x0022) -#define WSA881X_INTR_CLEAR (WSA881X_DIGITAL_BASE + 0x0023) -#define WSA881X_INTR_LEVEL (WSA881X_DIGITAL_BASE + 0x0024) -#define WSA881X_INTR_SET (WSA881X_DIGITAL_BASE + 0x0025) -#define WSA881X_INTR_TEST (WSA881X_DIGITAL_BASE + 0x0026) -#define WSA881X_PDM_TEST_MODE (WSA881X_DIGITAL_BASE + 0x0030) -#define WSA881X_ATE_TEST_MODE (WSA881X_DIGITAL_BASE + 0x0031) -#define WSA881X_PIN_CTL_MODE (WSA881X_DIGITAL_BASE + 0x0032) -#define WSA881X_PIN_CTL_OE (WSA881X_DIGITAL_BASE + 0x0033) -#define WSA881X_PIN_WDATA_IOPAD (WSA881X_DIGITAL_BASE + 0x0034) -#define WSA881X_PIN_STATUS (WSA881X_DIGITAL_BASE + 0x0035) -#define WSA881X_DIG_DEBUG_MODE (WSA881X_DIGITAL_BASE + 0x0037) -#define WSA881X_DIG_DEBUG_SEL (WSA881X_DIGITAL_BASE + 0x0038) -#define WSA881X_DIG_DEBUG_EN (WSA881X_DIGITAL_BASE + 0x0039) -#define WSA881X_SWR_HM_TEST1 (WSA881X_DIGITAL_BASE + 0x003B) -#define WSA881X_SWR_HM_TEST2 (WSA881X_DIGITAL_BASE + 0x003C) -#define WSA881X_TEMP_DETECT_DBG_CTL (WSA881X_DIGITAL_BASE + 0x003D) -#define WSA881X_TEMP_DEBUG_MSB (WSA881X_DIGITAL_BASE + 0x003E) -#define WSA881X_TEMP_DEBUG_LSB (WSA881X_DIGITAL_BASE + 0x003F) -#define WSA881X_SAMPLE_EDGE_SEL (WSA881X_DIGITAL_BASE + 0x0044) -#define WSA881X_IOPAD_CTL (WSA881X_DIGITAL_BASE + 0x0045) -#define WSA881X_SPARE_0 (WSA881X_DIGITAL_BASE + 0x0050) -#define WSA881X_SPARE_1 (WSA881X_DIGITAL_BASE + 0x0051) -#define WSA881X_SPARE_2 (WSA881X_DIGITAL_BASE + 0x0052) -#define WSA881X_OTP_REG_0 (WSA881X_DIGITAL_BASE + 0x0080) -#define WSA881X_OTP_REG_1 (WSA881X_DIGITAL_BASE + 0x0081) -#define WSA881X_OTP_REG_2 (WSA881X_DIGITAL_BASE + 0x0082) -#define WSA881X_OTP_REG_3 (WSA881X_DIGITAL_BASE + 0x0083) -#define WSA881X_OTP_REG_4 (WSA881X_DIGITAL_BASE + 0x0084) -#define WSA881X_OTP_REG_5 (WSA881X_DIGITAL_BASE + 0x0085) -#define WSA881X_OTP_REG_6 (WSA881X_DIGITAL_BASE + 0x0086) -#define WSA881X_OTP_REG_7 (WSA881X_DIGITAL_BASE + 0x0087) -#define WSA881X_OTP_REG_8 (WSA881X_DIGITAL_BASE + 0x0088) -#define WSA881X_OTP_REG_9 (WSA881X_DIGITAL_BASE + 0x0089) -#define WSA881X_OTP_REG_10 (WSA881X_DIGITAL_BASE + 0x008A) -#define WSA881X_OTP_REG_11 (WSA881X_DIGITAL_BASE + 0x008B) -#define WSA881X_OTP_REG_12 (WSA881X_DIGITAL_BASE + 0x008C) -#define WSA881X_OTP_REG_13 (WSA881X_DIGITAL_BASE + 0x008D) -#define WSA881X_OTP_REG_14 (WSA881X_DIGITAL_BASE + 0x008E) -#define WSA881X_OTP_REG_15 (WSA881X_DIGITAL_BASE + 0x008F) -#define WSA881X_OTP_REG_16 (WSA881X_DIGITAL_BASE + 0x0090) -#define WSA881X_OTP_REG_17 (WSA881X_DIGITAL_BASE + 0x0091) -#define WSA881X_OTP_REG_18 (WSA881X_DIGITAL_BASE + 0x0092) -#define WSA881X_OTP_REG_19 (WSA881X_DIGITAL_BASE + 0x0093) -#define WSA881X_OTP_REG_20 (WSA881X_DIGITAL_BASE + 0x0094) -#define WSA881X_OTP_REG_21 (WSA881X_DIGITAL_BASE + 0x0095) -#define WSA881X_OTP_REG_22 (WSA881X_DIGITAL_BASE + 0x0096) -#define WSA881X_OTP_REG_23 (WSA881X_DIGITAL_BASE + 0x0097) -#define WSA881X_OTP_REG_24 (WSA881X_DIGITAL_BASE + 0x0098) -#define WSA881X_OTP_REG_25 (WSA881X_DIGITAL_BASE + 0x0099) -#define WSA881X_OTP_REG_26 (WSA881X_DIGITAL_BASE + 0x009A) -#define WSA881X_OTP_REG_27 (WSA881X_DIGITAL_BASE + 0x009B) -#define WSA881X_OTP_REG_28 (WSA881X_DIGITAL_BASE + 0x009C) -#define WSA881X_OTP_REG_29 (WSA881X_DIGITAL_BASE + 0x009D) -#define WSA881X_OTP_REG_30 (WSA881X_DIGITAL_BASE + 0x009E) -#define WSA881X_OTP_REG_31 (WSA881X_DIGITAL_BASE + 0x009F) -#define WSA881X_OTP_REG_63 (WSA881X_DIGITAL_BASE + 0x00BF) - -/* Analog Register address space */ -#define WSA881X_BIAS_REF_CTRL (WSA881X_ANALOG_BASE + 0x0000) -#define WSA881X_BIAS_TEST (WSA881X_ANALOG_BASE + 0x0001) -#define WSA881X_BIAS_BIAS (WSA881X_ANALOG_BASE + 0x0002) -#define WSA881X_TEMP_OP (WSA881X_ANALOG_BASE + 0x0003) -#define WSA881X_TEMP_IREF_CTRL (WSA881X_ANALOG_BASE + 0x0004) -#define WSA881X_TEMP_ISENS_CTRL (WSA881X_ANALOG_BASE + 0x0005) -#define WSA881X_TEMP_CLK_CTRL (WSA881X_ANALOG_BASE + 0x0006) -#define WSA881X_TEMP_TEST (WSA881X_ANALOG_BASE + 0x0007) -#define WSA881X_TEMP_BIAS (WSA881X_ANALOG_BASE + 0x0008) -#define WSA881X_TEMP_ADC_CTRL (WSA881X_ANALOG_BASE + 0x0009) -#define WSA881X_TEMP_DOUT_MSB (WSA881X_ANALOG_BASE + 0x000A) -#define WSA881X_TEMP_DOUT_LSB (WSA881X_ANALOG_BASE + 0x000B) -#define WSA881X_ADC_EN_MODU_V (WSA881X_ANALOG_BASE + 0x0010) -#define WSA881X_ADC_EN_MODU_I (WSA881X_ANALOG_BASE + 0x0011) -#define WSA881X_ADC_EN_DET_TEST_V (WSA881X_ANALOG_BASE + 0x0012) -#define WSA881X_ADC_EN_DET_TEST_I (WSA881X_ANALOG_BASE + 0x0013) -#define WSA881X_ADC_SEL_IBIAS (WSA881X_ANALOG_BASE + 0x0014) -#define WSA881X_ADC_EN_SEL_IBAIS (WSA881X_ANALOG_BASE + 0x0015) -#define WSA881X_SPKR_DRV_EN (WSA881X_ANALOG_BASE + 0x001A) -#define WSA881X_SPKR_DRV_GAIN (WSA881X_ANALOG_BASE + 0x001B) -#define WSA881X_PA_GAIN_SEL_MASK BIT(3) -#define WSA881X_PA_GAIN_SEL_REG BIT(3) -#define WSA881X_PA_GAIN_SEL_DRE 0 -#define WSA881X_SPKR_PAG_GAIN_MASK GENMASK(7, 4) -#define WSA881X_SPKR_DAC_CTL (WSA881X_ANALOG_BASE + 0x001C) -#define WSA881X_SPKR_DRV_DBG (WSA881X_ANALOG_BASE + 0x001D) -#define WSA881X_SPKR_PWRSTG_DBG (WSA881X_ANALOG_BASE + 0x001E) -#define WSA881X_SPKR_OCP_CTL (WSA881X_ANALOG_BASE + 0x001F) -#define WSA881X_SPKR_OCP_MASK GENMASK(7, 6) -#define WSA881X_SPKR_OCP_EN BIT(7) -#define WSA881X_SPKR_OCP_HOLD BIT(6) -#define WSA881X_SPKR_CLIP_CTL (WSA881X_ANALOG_BASE + 0x0020) -#define WSA881X_SPKR_BBM_CTL (WSA881X_ANALOG_BASE + 0x0021) -#define WSA881X_SPKR_MISC_CTL1 (WSA881X_ANALOG_BASE + 0x0022) -#define WSA881X_SPKR_MISC_CTL2 (WSA881X_ANALOG_BASE + 0x0023) -#define WSA881X_SPKR_BIAS_INT (WSA881X_ANALOG_BASE + 0x0024) -#define WSA881X_SPKR_PA_INT (WSA881X_ANALOG_BASE + 0x0025) -#define WSA881X_SPKR_BIAS_CAL (WSA881X_ANALOG_BASE + 0x0026) -#define WSA881X_SPKR_BIAS_PSRR (WSA881X_ANALOG_BASE + 0x0027) -#define WSA881X_SPKR_STATUS1 (WSA881X_ANALOG_BASE + 0x0028) -#define WSA881X_SPKR_STATUS2 (WSA881X_ANALOG_BASE + 0x0029) -#define WSA881X_BOOST_EN_CTL (WSA881X_ANALOG_BASE + 0x002A) -#define WSA881X_BOOST_EN_MASK BIT(7) -#define WSA881X_BOOST_EN BIT(7) -#define WSA881X_BOOST_CURRENT_LIMIT (WSA881X_ANALOG_BASE + 0x002B) -#define WSA881X_BOOST_PS_CTL (WSA881X_ANALOG_BASE + 0x002C) -#define WSA881X_BOOST_PRESET_OUT1 (WSA881X_ANALOG_BASE + 0x002D) -#define WSA881X_BOOST_PRESET_OUT2 (WSA881X_ANALOG_BASE + 0x002E) -#define WSA881X_BOOST_FORCE_OUT (WSA881X_ANALOG_BASE + 0x002F) -#define WSA881X_BOOST_LDO_PROG (WSA881X_ANALOG_BASE + 0x0030) -#define WSA881X_BOOST_SLOPE_COMP_ISENSE_FB (WSA881X_ANALOG_BASE + 0x0031) -#define WSA881X_BOOST_RON_CTL (WSA881X_ANALOG_BASE + 0x0032) -#define WSA881X_BOOST_LOOP_STABILITY (WSA881X_ANALOG_BASE + 0x0033) -#define WSA881X_BOOST_ZX_CTL (WSA881X_ANALOG_BASE + 0x0034) -#define WSA881X_BOOST_START_CTL (WSA881X_ANALOG_BASE + 0x0035) -#define WSA881X_BOOST_MISC1_CTL (WSA881X_ANALOG_BASE + 0x0036) -#define WSA881X_BOOST_MISC2_CTL (WSA881X_ANALOG_BASE + 0x0037) -#define WSA881X_BOOST_MISC3_CTL (WSA881X_ANALOG_BASE + 0x0038) -#define WSA881X_BOOST_ATEST_CTL (WSA881X_ANALOG_BASE + 0x0039) -#define WSA881X_SPKR_PROT_FE_GAIN (WSA881X_ANALOG_BASE + 0x003A) -#define WSA881X_SPKR_PROT_FE_CM_LDO_SET (WSA881X_ANALOG_BASE + 0x003B) -#define WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1 (WSA881X_ANALOG_BASE + 0x003C) -#define WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2 (WSA881X_ANALOG_BASE + 0x003D) -#define WSA881X_SPKR_PROT_ATEST1 (WSA881X_ANALOG_BASE + 0x003E) -#define WSA881X_SPKR_PROT_ATEST2 (WSA881X_ANALOG_BASE + 0x003F) -#define WSA881X_SPKR_PROT_FE_VSENSE_VCM (WSA881X_ANALOG_BASE + 0x0040) -#define WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1 (WSA881X_ANALOG_BASE + 0x0041) -#define WSA881X_BONGO_RESRV_REG1 (WSA881X_ANALOG_BASE + 0x0042) -#define WSA881X_BONGO_RESRV_REG2 (WSA881X_ANALOG_BASE + 0x0043) -#define WSA881X_SPKR_PROT_SAR (WSA881X_ANALOG_BASE + 0x0044) -#define WSA881X_SPKR_STATUS3 (WSA881X_ANALOG_BASE + 0x0045) +#include "wsa881x-common.h" #define SWRS_SCP_FRAME_CTRL_BANK(m) (0x60 + 0x10 * (m)) #define SWRS_SCP_HOST_CLK_DIV2_CTL_BANK(m) (0xE0 + 0x10 * (m)) @@ -191,7 +26,6 @@ #define SWR_SLV_RD_BUF_LEN 8 #define SWR_SLV_WR_BUF_LEN 32 #define SWR_SLV_MAX_DEVICES 2 -#define WSA881X_MAX_SWR_PORTS 4 #define WSA881X_VERSION_ENTRY_SIZE 27 #define WSA881X_OCP_CTL_TIMER_SEC 2 #define WSA881X_OCP_CTL_TEMP_CELSIUS 25 @@ -305,7 +139,7 @@ static struct reg_default wsa881x_defaults[] = { { WSA881X_ADC_EN_MODU_I, 0x00 }, { WSA881X_ADC_EN_DET_TEST_V, 0x00 }, { WSA881X_ADC_EN_DET_TEST_I, 0x00 }, - { WSA881X_ADC_EN_SEL_IBAIS, 0x10 }, + { WSA881X_ADC_EN_SEL_IBIAS, 0x10 }, { WSA881X_SPKR_DRV_EN, 0x74 }, { WSA881X_SPKR_DRV_DBG, 0x15 }, { WSA881X_SPKR_PWRSTG_DBG, 0x00 }, @@ -439,204 +273,8 @@ static const struct sdw_port_config wsa881x_pconfig[WSA881X_MAX_SWR_PORTS] = { }, }; -static bool wsa881x_readable_register(struct device *dev, unsigned int reg) -{ - switch (reg) { - case WSA881X_CHIP_ID0: - case WSA881X_CHIP_ID1: - case WSA881X_CHIP_ID2: - case WSA881X_CHIP_ID3: - case WSA881X_BUS_ID: - case WSA881X_CDC_RST_CTL: - case WSA881X_CDC_TOP_CLK_CTL: - case WSA881X_CDC_ANA_CLK_CTL: - case WSA881X_CDC_DIG_CLK_CTL: - case WSA881X_CLOCK_CONFIG: - case WSA881X_ANA_CTL: - case WSA881X_SWR_RESET_EN: - case WSA881X_RESET_CTL: - case WSA881X_TADC_VALUE_CTL: - case WSA881X_TEMP_DETECT_CTL: - case WSA881X_TEMP_MSB: - case WSA881X_TEMP_LSB: - case WSA881X_TEMP_CONFIG0: - case WSA881X_TEMP_CONFIG1: - case WSA881X_CDC_CLIP_CTL: - case WSA881X_SDM_PDM9_LSB: - case WSA881X_SDM_PDM9_MSB: - case WSA881X_CDC_RX_CTL: - case WSA881X_DEM_BYPASS_DATA0: - case WSA881X_DEM_BYPASS_DATA1: - case WSA881X_DEM_BYPASS_DATA2: - case WSA881X_DEM_BYPASS_DATA3: - case WSA881X_OTP_CTRL0: - case WSA881X_OTP_CTRL1: - case WSA881X_HDRIVE_CTL_GROUP1: - case WSA881X_INTR_MODE: - case WSA881X_INTR_MASK: - case WSA881X_INTR_STATUS: - case WSA881X_INTR_CLEAR: - case WSA881X_INTR_LEVEL: - case WSA881X_INTR_SET: - case WSA881X_INTR_TEST: - case WSA881X_PDM_TEST_MODE: - case WSA881X_ATE_TEST_MODE: - case WSA881X_PIN_CTL_MODE: - case WSA881X_PIN_CTL_OE: - case WSA881X_PIN_WDATA_IOPAD: - case WSA881X_PIN_STATUS: - case WSA881X_DIG_DEBUG_MODE: - case WSA881X_DIG_DEBUG_SEL: - case WSA881X_DIG_DEBUG_EN: - case WSA881X_SWR_HM_TEST1: - case WSA881X_SWR_HM_TEST2: - case WSA881X_TEMP_DETECT_DBG_CTL: - case WSA881X_TEMP_DEBUG_MSB: - case WSA881X_TEMP_DEBUG_LSB: - case WSA881X_SAMPLE_EDGE_SEL: - case WSA881X_IOPAD_CTL: - case WSA881X_SPARE_0: - case WSA881X_SPARE_1: - case WSA881X_SPARE_2: - case WSA881X_OTP_REG_0: - case WSA881X_OTP_REG_1: - case WSA881X_OTP_REG_2: - case WSA881X_OTP_REG_3: - case WSA881X_OTP_REG_4: - case WSA881X_OTP_REG_5: - case WSA881X_OTP_REG_6: - case WSA881X_OTP_REG_7: - case WSA881X_OTP_REG_8: - case WSA881X_OTP_REG_9: - case WSA881X_OTP_REG_10: - case WSA881X_OTP_REG_11: - case WSA881X_OTP_REG_12: - case WSA881X_OTP_REG_13: - case WSA881X_OTP_REG_14: - case WSA881X_OTP_REG_15: - case WSA881X_OTP_REG_16: - case WSA881X_OTP_REG_17: - case WSA881X_OTP_REG_18: - case WSA881X_OTP_REG_19: - case WSA881X_OTP_REG_20: - case WSA881X_OTP_REG_21: - case WSA881X_OTP_REG_22: - case WSA881X_OTP_REG_23: - case WSA881X_OTP_REG_24: - case WSA881X_OTP_REG_25: - case WSA881X_OTP_REG_26: - case WSA881X_OTP_REG_27: - case WSA881X_OTP_REG_28: - case WSA881X_OTP_REG_29: - case WSA881X_OTP_REG_30: - case WSA881X_OTP_REG_31: - case WSA881X_OTP_REG_63: - case WSA881X_BIAS_REF_CTRL: - case WSA881X_BIAS_TEST: - case WSA881X_BIAS_BIAS: - case WSA881X_TEMP_OP: - case WSA881X_TEMP_IREF_CTRL: - case WSA881X_TEMP_ISENS_CTRL: - case WSA881X_TEMP_CLK_CTRL: - case WSA881X_TEMP_TEST: - case WSA881X_TEMP_BIAS: - case WSA881X_TEMP_ADC_CTRL: - case WSA881X_TEMP_DOUT_MSB: - case WSA881X_TEMP_DOUT_LSB: - case WSA881X_ADC_EN_MODU_V: - case WSA881X_ADC_EN_MODU_I: - case WSA881X_ADC_EN_DET_TEST_V: - case WSA881X_ADC_EN_DET_TEST_I: - case WSA881X_ADC_SEL_IBIAS: - case WSA881X_ADC_EN_SEL_IBAIS: - case WSA881X_SPKR_DRV_EN: - case WSA881X_SPKR_DRV_GAIN: - case WSA881X_SPKR_DAC_CTL: - case WSA881X_SPKR_DRV_DBG: - case WSA881X_SPKR_PWRSTG_DBG: - case WSA881X_SPKR_OCP_CTL: - case WSA881X_SPKR_CLIP_CTL: - case WSA881X_SPKR_BBM_CTL: - case WSA881X_SPKR_MISC_CTL1: - case WSA881X_SPKR_MISC_CTL2: - case WSA881X_SPKR_BIAS_INT: - case WSA881X_SPKR_PA_INT: - case WSA881X_SPKR_BIAS_CAL: - case WSA881X_SPKR_BIAS_PSRR: - case WSA881X_SPKR_STATUS1: - case WSA881X_SPKR_STATUS2: - case WSA881X_BOOST_EN_CTL: - case WSA881X_BOOST_CURRENT_LIMIT: - case WSA881X_BOOST_PS_CTL: - case WSA881X_BOOST_PRESET_OUT1: - case WSA881X_BOOST_PRESET_OUT2: - case WSA881X_BOOST_FORCE_OUT: - case WSA881X_BOOST_LDO_PROG: - case WSA881X_BOOST_SLOPE_COMP_ISENSE_FB: - case WSA881X_BOOST_RON_CTL: - case WSA881X_BOOST_LOOP_STABILITY: - case WSA881X_BOOST_ZX_CTL: - case WSA881X_BOOST_START_CTL: - case WSA881X_BOOST_MISC1_CTL: - case WSA881X_BOOST_MISC2_CTL: - case WSA881X_BOOST_MISC3_CTL: - case WSA881X_BOOST_ATEST_CTL: - case WSA881X_SPKR_PROT_FE_GAIN: - case WSA881X_SPKR_PROT_FE_CM_LDO_SET: - case WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1: - case WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2: - case WSA881X_SPKR_PROT_ATEST1: - case WSA881X_SPKR_PROT_ATEST2: - case WSA881X_SPKR_PROT_FE_VSENSE_VCM: - case WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1: - case WSA881X_BONGO_RESRV_REG1: - case WSA881X_BONGO_RESRV_REG2: - case WSA881X_SPKR_PROT_SAR: - case WSA881X_SPKR_STATUS3: - return true; - default: - return false; - } -} - -static bool wsa881x_volatile_register(struct device *dev, unsigned int reg) -{ - switch (reg) { - case WSA881X_CHIP_ID0: - case WSA881X_CHIP_ID1: - case WSA881X_CHIP_ID2: - case WSA881X_CHIP_ID3: - case WSA881X_BUS_ID: - case WSA881X_TEMP_MSB: - case WSA881X_TEMP_LSB: - case WSA881X_SDM_PDM9_LSB: - case WSA881X_SDM_PDM9_MSB: - case WSA881X_OTP_CTRL1: - case WSA881X_INTR_STATUS: - case WSA881X_ATE_TEST_MODE: - case WSA881X_PIN_STATUS: - case WSA881X_SWR_HM_TEST2: - case WSA881X_SPKR_STATUS1: - case WSA881X_SPKR_STATUS2: - case WSA881X_SPKR_STATUS3: - case WSA881X_OTP_REG_0: - case WSA881X_OTP_REG_1: - case WSA881X_OTP_REG_2: - case WSA881X_OTP_REG_3: - case WSA881X_OTP_REG_4: - case WSA881X_OTP_REG_5: - case WSA881X_OTP_REG_31: - case WSA881X_TEMP_DOUT_MSB: - case WSA881X_TEMP_DOUT_LSB: - case WSA881X_TEMP_OP: - case WSA881X_SPKR_PROT_SAR: - return true; - default: - return false; - } -} - static const struct regmap_config wsa881x_regmap_config = { + .reg_base = 0x3000, .reg_bits = 32, .val_bits = 8, .cache_type = REGCACHE_MAPLE, @@ -665,70 +303,15 @@ enum { G_0DB, }; -/* - * Private data Structure for wsa881x. All parameters related to - * WSA881X codec needs to be defined here. - */ -struct wsa881x_priv { - struct regmap *regmap; - struct device *dev; - struct sdw_slave *slave; - struct sdw_stream_config sconfig; - struct sdw_stream_runtime *sruntime; - struct sdw_port_config port_config[WSA881X_MAX_SWR_PORTS]; - struct gpio_desc *sd_n; - /* - * Logical state for SD_N GPIO: high for shutdown, low for enable. - * For backwards compatibility. - */ - unsigned int sd_n_val; - int active_ports; - bool port_prepared[WSA881X_MAX_SWR_PORTS]; - bool port_enable[WSA881X_MAX_SWR_PORTS]; -}; - static void wsa881x_init(struct wsa881x_priv *wsa881x) { - struct regmap *rm = wsa881x->regmap; - unsigned int val = 0; - regmap_register_patch(wsa881x->regmap, wsa881x_rev_2_0, ARRAY_SIZE(wsa881x_rev_2_0)); /* Enable software reset output from soundwire slave */ - regmap_update_bits(rm, WSA881X_SWR_RESET_EN, 0x07, 0x07); - - /* Bring out of analog reset */ - regmap_update_bits(rm, WSA881X_CDC_RST_CTL, 0x02, 0x02); - - /* Bring out of digital reset */ - regmap_update_bits(rm, WSA881X_CDC_RST_CTL, 0x01, 0x01); - regmap_update_bits(rm, WSA881X_CLOCK_CONFIG, 0x10, 0x10); - regmap_update_bits(rm, WSA881X_SPKR_OCP_CTL, 0x02, 0x02); - regmap_update_bits(rm, WSA881X_SPKR_MISC_CTL1, 0xC0, 0x80); - regmap_update_bits(rm, WSA881X_SPKR_MISC_CTL1, 0x06, 0x06); - regmap_update_bits(rm, WSA881X_SPKR_BIAS_INT, 0xFF, 0x00); - regmap_update_bits(rm, WSA881X_SPKR_PA_INT, 0xF0, 0x40); - regmap_update_bits(rm, WSA881X_SPKR_PA_INT, 0x0E, 0x0E); - regmap_update_bits(rm, WSA881X_BOOST_LOOP_STABILITY, 0x03, 0x03); - regmap_update_bits(rm, WSA881X_BOOST_MISC2_CTL, 0xFF, 0x14); - regmap_update_bits(rm, WSA881X_BOOST_START_CTL, 0x80, 0x80); - regmap_update_bits(rm, WSA881X_BOOST_START_CTL, 0x03, 0x00); - regmap_update_bits(rm, WSA881X_BOOST_SLOPE_COMP_ISENSE_FB, 0x0C, 0x04); - regmap_update_bits(rm, WSA881X_BOOST_SLOPE_COMP_ISENSE_FB, 0x03, 0x00); - - regmap_read(rm, WSA881X_OTP_REG_0, &val); - if (val) - regmap_update_bits(rm, WSA881X_BOOST_PRESET_OUT1, 0xF0, 0x70); - - regmap_update_bits(rm, WSA881X_BOOST_PRESET_OUT2, 0xF0, 0x30); - regmap_update_bits(rm, WSA881X_SPKR_DRV_EN, 0x08, 0x08); - regmap_update_bits(rm, WSA881X_BOOST_CURRENT_LIMIT, 0x0F, 0x08); - regmap_update_bits(rm, WSA881X_SPKR_OCP_CTL, 0x30, 0x30); - regmap_update_bits(rm, WSA881X_SPKR_OCP_CTL, 0x0C, 0x00); - regmap_update_bits(rm, WSA881X_OTP_REG_28, 0x3F, 0x3A); - regmap_update_bits(rm, WSA881X_BONGO_RESRV_REG1, 0xFF, 0xB2); - regmap_update_bits(rm, WSA881X_BONGO_RESRV_REG2, 0xFF, 0x05); + regmap_update_bits(wsa881x->regmap, WSA881X_SWR_RESET_EN, 0x07, 0x07); + + wsa881x_init_common(wsa881x); } static int wsa881x_component_probe(struct snd_soc_component *comp) @@ -937,7 +520,7 @@ static int wsa881x_spkr_pa_event(struct snd_soc_dapm_widget *w, if (wsa881x->port_prepared[WSA881X_PORT_VISENSE]) { wsa881x_visense_txfe_ctrl(comp, true); snd_soc_component_update_bits(comp, - WSA881X_ADC_EN_SEL_IBAIS, + WSA881X_ADC_EN_SEL_IBIAS, 0x07, 0x01); wsa881x_visense_adc_ctrl(comp, true); } @@ -1008,35 +591,11 @@ static int wsa881x_hw_free(struct snd_pcm_substream *substream, return 0; } -static int wsa881x_set_sdw_stream(struct snd_soc_dai *dai, - void *stream, int direction) -{ - struct wsa881x_priv *wsa881x = dev_get_drvdata(dai->dev); - - wsa881x->sruntime = stream; - - return 0; -} - -static int wsa881x_digital_mute(struct snd_soc_dai *dai, int mute, int stream) -{ - struct wsa881x_priv *wsa881x = dev_get_drvdata(dai->dev); - - if (mute) - regmap_update_bits(wsa881x->regmap, WSA881X_SPKR_DRV_EN, 0x80, - 0x00); - else - regmap_update_bits(wsa881x->regmap, WSA881X_SPKR_DRV_EN, 0x80, - 0x80); - - return 0; -} - static const struct snd_soc_dai_ops wsa881x_dai_ops = { .hw_params = wsa881x_hw_params, .hw_free = wsa881x_hw_free, .mute_stream = wsa881x_digital_mute, - .set_stream = wsa881x_set_sdw_stream, + .set_stream = wsa881x_set_stream, }; static struct snd_soc_dai_driver wsa881x_dais[] = { @@ -1113,40 +672,13 @@ static int wsa881x_probe(struct sdw_slave *pdev, { struct wsa881x_priv *wsa881x; struct device *dev = &pdev->dev; + int ret; - wsa881x = devm_kzalloc(dev, sizeof(*wsa881x), GFP_KERNEL); - if (!wsa881x) - return -ENOMEM; - - wsa881x->sd_n = devm_gpiod_get_optional(dev, "powerdown", - GPIOD_FLAGS_BIT_NONEXCLUSIVE); - if (IS_ERR(wsa881x->sd_n)) - return dev_err_probe(dev, PTR_ERR(wsa881x->sd_n), - "Shutdown Control GPIO not found\n"); - - /* - * Backwards compatibility work-around. - * - * The SD_N GPIO is active low, however upstream DTS used always active - * high. Changing the flag in driver and DTS will break backwards - * compatibility, so add a simple value inversion to work with both old - * and new DTS. - * - * This won't work properly with DTS using the flags properly in cases: - * 1. Old DTS with proper ACTIVE_LOW, however such case was broken - * before as the driver required the active high. - * 2. New DTS with proper ACTIVE_HIGH (intended), which is rare case - * (not existing upstream) but possible. This is the price of - * backwards compatibility, therefore this hack should be removed at - * some point. - */ - wsa881x->sd_n_val = gpiod_is_active_low(wsa881x->sd_n); - if (!wsa881x->sd_n_val) - dev_warn(dev, "Using ACTIVE_HIGH for shutdown GPIO. Your DTB might be outdated or you use unsupported configuration for the GPIO."); + ret = wsa881x_probe_common(&wsa881x, dev); + if (ret) + return ret; - dev_set_drvdata(dev, wsa881x); wsa881x->slave = pdev; - wsa881x->dev = dev; wsa881x->sconfig.ch_count = 1; wsa881x->sconfig.bps = 1; wsa881x->sconfig.frame_rate = 48000; @@ -1156,7 +688,6 @@ static int wsa881x_probe(struct sdw_slave *pdev, pdev->prop.sink_dpn_prop = wsa_sink_dpn_prop; pdev->prop.scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY; pdev->prop.clk_stop_mode1 = true; - gpiod_direction_output(wsa881x->sd_n, !wsa881x->sd_n_val); wsa881x->regmap = devm_regmap_init_sdw(pdev, &wsa881x_regmap_config); if (IS_ERR(wsa881x->regmap)) From patchwork Thu Dec 12 00:47:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 850463 Received: from mail-wm1-f46.google.com (mail-wm1-f46.google.com [209.85.128.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB5FE14AD20 for ; Thu, 12 Dec 2024 00:47:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964470; cv=none; b=EezpOGYn3pHgVnzDnLEKfKbik4VrmgLjhsd+xNWkZbrzofge53E4VMMtLnBdjp6IpRps4WAHVdFeFZsADmqbFJE1pSVYrwMdtUGOxgZPfz7e85Bmi44AowBlBHAbjOmOx/ExT/TLKulkhfpzKxsTEP9PXUwm31yU9RB3Agd0ySQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964470; c=relaxed/simple; bh=g17b3O9IJFRR5zRDTOnqHhNU2ufwtjxg8brt+E441NM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oQwrDdzusAsrtZFAfbgKrq2gWbljvks9rugaU6ZXYwy2hgbJ4wvcx70CpUh5kEW2u55G8unq1Xxpf1fUZBsDbbefPbdr9Wv49kei9sJN1tMtnPsacSYfhQF8rCeMWa6+pYNONog/gA8U0bGn2xhT6EW2T5Y8z7OtowDzXDHW8A8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=NkPNBuvd; arc=none smtp.client-ip=209.85.128.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="NkPNBuvd" Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-4361b0ec57aso465535e9.0 for ; Wed, 11 Dec 2024 16:47:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964466; x=1734569266; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qQQpmK66T3MqtBJyloGmYZGt9Ctq4U4XpvYTcWnQiLM=; b=NkPNBuvdbLTxDo78CR62d4PkCVlBDmuq/swC/C4uJ+M4TkpZl0bJRBzJk+g9kXkJVf Ul1gquHMFYBncmaIC2o1CpPticO9a7/8Ilg1Kg5zg0z0QhieTJEzLVgyrUa3a69FsxZ1 aqWiGk82XMRPAh3rYJORi/BRc7zFJbUFqlfLkcCcSYe/SW0jHRzS7evOf+z/YO1FKhfs x5Pwb+ih1gSH1Lq/E4n/kstFY2YB/Mvybbl69v0pzTAW8/iET5AynoIt4lad/AC3uZK5 fjOzvCIdkWxOLYOyiNtLep/bfyg/B1JlGDEArtmUboN4tAghrKIDdFiMv+dmySaB3WTw WRHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964466; x=1734569266; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qQQpmK66T3MqtBJyloGmYZGt9Ctq4U4XpvYTcWnQiLM=; b=gOTpkdFcO+O1mxHYdglTc6oeX2ffGlcJn1HSJoK9QGVHyYHt0RurKuiohRWwkcAwLK DtXF68yAEwvB/WPL8W/iUqVPJaIGqZxpFE9c1Y1eK7UGzk9EoOs+UExL5lCdgcSVgyTA ZtjQgg3Fjvg+EOiFhTJC35M6eAXF6zpgIMJaJOTT9QSn9ot7uafFxkwehqK5HdXTUjOg JPLuTIcDp9lQ4CTH264cVdPDkGqI8bjxZIpsg+mqzPHApVl5WD9n6X3/l6n5VTidL0Of VpAkW6lYB/dGpFfLveH1LCuGCKRBzKyvHw/T0TdzVxsHri+OSQEFl5W/YA5xCRfG45Vb fYYw== X-Forwarded-Encrypted: i=1; AJvYcCW6r37AkKGTg+pXBBixHJPe6w7AhmBOTsmzb++csiMHBhWY8mX9c2Hr9Z3R4jyNrv+ydbiE9EHwXgqGQAxI@vger.kernel.org X-Gm-Message-State: AOJu0YyZMMKmurKzgasN+5MLviZjmdW0vYIdx5MMkJew1by7bSWjIP2W eh6inG2z4wqB6TniYNjDI1qRpppxxaC0rIVw583CaeILGtgZfwV/nPLaCewbSuQ= X-Gm-Gg: ASbGncs90xNUdIVWKQy05jIZCr4VO2tD9gL1A/wjc89gF3d5NCPko7kdnjCedODXWHg /A4j47i3Tj4LA5eMNu2b03XKktC8l4H09+WcTYTPuEn5Ggkn0NzkFw5rgIv2uUTSOXxiLaHNSY6 EFQjWZi94XtB7RpoJza2/xBKYQe+gND5DX0ZsTVSr7dmn9ASSH6tXRnPubuhTXIurrZSjQvI6Bo SdJFxmT6nll8v8GjskaRIxwl+TzKUTAMJ3Opt4dqifEMCvBk3CYCFV+sW/6H4rn+9JMszo2 X-Google-Smtp-Source: AGHT+IHtzrN5lCLtEOpZ7wN6Vwiw74Jy/Nphl9EoXdDE0Dvq2P8eavVUVGJHmfyFsPMVjXn4QnbdqA== X-Received: by 2002:a05:6000:490a:b0:385:f996:1bb9 with SMTP id ffacd0b85a97d-3878768e743mr1113391f8f.23.1733964466297; Wed, 11 Dec 2024 16:47:46 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:45 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 08/14] dt-bindings: arm: qcom-soc: extend pattern matching to support qcom,wsa881x Date: Thu, 12 Dec 2024 00:47:21 +0000 Message-ID: <20241212004727.2903846-9-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add support for qcom,wsa8815 and qcom,wsa8810 names to be recognised as a valid compatibles. Signed-off-by: Alexey Klimov --- Documentation/devicetree/bindings/arm/qcom-soc.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/qcom-soc.yaml b/Documentation/devicetree/bindings/arm/qcom-soc.yaml index 2ea6d3f65478..ebccafeb13e3 100644 --- a/Documentation/devicetree/bindings/arm/qcom-soc.yaml +++ b/Documentation/devicetree/bindings/arm/qcom-soc.yaml @@ -23,7 +23,7 @@ description: | select: properties: compatible: - pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sar|sc|sd[amx]|sm|x1e)[0-9]+.*$" + pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sar|sc|sd[amx]|sm|wsa|x1e)[0-9]+.*$" required: - compatible @@ -34,6 +34,7 @@ properties: - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|q[dr]u|sa|sc|sd[amx]|sm|x1e)[0-9]+(pro)?-.*$" - pattern: "^qcom,sar[0-9]+[a-z]?-.*$" - pattern: "^qcom,(sa|sc)8[0-9]+[a-z][a-z]?-.*$" + - pattern: "^qcom,wsa[0-9]+.*$" # Legacy namings - variations of existing patterns/compatibles are OK, # but do not add completely new entries to these: From patchwork Thu Dec 12 00:47:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 850462 Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C6FD152E02 for ; Thu, 12 Dec 2024 00:47:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964471; cv=none; b=tiQlE4glggoHfTqA0VaciCnisWEnl74imFSg5S0U7MlzYbyeVZ6weOtpecPBxcg3xB/VdPEDKvrGSIhfmhKbkIz+0bL56lbdLUMeDAQakjoZHiafNizSjk9IBLAmJt6MYPo5nvB5Nw1JlU4/2sMhCBui4pQq3uG+IxjJBF9Drs0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964471; c=relaxed/simple; bh=KxG2H3oHtPjIV+VhCiilLtiyhUfg1u1AKb3+JTgTrMs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=b7aa3UxXQQyg8qu4oTViGYhCWXnbXIxJ3RolfW+2sqxnIy4BvO4V+M8Iqid26fmZVH3mp5LeIwlE6iJjlJ2BhgGoJGuAA5D8OvzichHnCq0WTnm5QYjSxIrTnpVIp+LfmDqIuAPpcK+jRDikkaUPBn54nYSs0TD4aEL5PWp+xew= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=By/vuAI/; arc=none smtp.client-ip=209.85.128.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="By/vuAI/" Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-434e3953b65so276245e9.1 for ; Wed, 11 Dec 2024 16:47:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964468; x=1734569268; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vFHKgaQUdzL/Q4nPVhlEMPI+GbJNKf55IgIGl/KzjWA=; b=By/vuAI/JvC4AssI7Y9TfppP+xN1c6D/OGqMvREbxE0HTIW3VGzWPXsfqybXwY0qhg V/mP7eODc10OJUo9zpNNoUl+44rKbSupxUO0Ku67HwGWo21Q2yPMmc3LONPoagnQsU5k NETlIEIWABQ6X3O1JwQ8SnpOKeIZBk/SoV9RL/3MwCf8oJD2YQgW1mGJcM3rMCaEdEVt 4l5Qm663xU1pQGy9H/Cp0yht5efyziuKcO98Y7UFtFrvTYmekfGF/c4XkyHU8tdux3r6 qmelpG04gYHlYq4EwHKliksPGGa4sT2xj6/GF3Mng3UNDbe53Zd1p6OtCTzBkARiD9NI uMtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964468; x=1734569268; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vFHKgaQUdzL/Q4nPVhlEMPI+GbJNKf55IgIGl/KzjWA=; b=mqPagNnlkc+wCfznpxfKW5WYAak/ML3FTbJLUa1DZ+CP0qZjn0QfYiKJGHq3hHIjd/ 3YYpOCmebO/6UxDknhIc1UJUc3n1Wv19BHXnqc26vXNND12rvr06Z9Q/+lfvQdfT1oVr ip6aGzaZs3HDeEcJVBtJF2LNa8g6bl3lWTpDeqksDI69ecj8MV2JPIvo9MVdjujxDh7a ddDFfhuLtY5NXLBugTgXoXIVSDGhz/iabClb3cYmolwouOwbsbvQyiL1/0gJh9WwJ2ES O0bCM3pt0u93oEWRMUCq+hnhPvpZLj+as+b8cfy7OXKGSuSRIFMVSvfWMiNA6rhmoM6g rZ3w== X-Forwarded-Encrypted: i=1; AJvYcCWBXqJtMEH4Gt5UTw61rYMGlJNIfDkNkR4UrwzQx9tbfCYO/qco0XZ3RS3d5TEzjyzpVICNX7vc/brpQn14@vger.kernel.org X-Gm-Message-State: AOJu0YztrWVio3sTC/a+mXMJuxbu5AsoQHEtgH7Tq5wMueR9I+Lzbz8O amr5MEl7giBkCQgSNKl3/MQ027pqo6xeqT7dWCduIDe2Hf3XxLIPn6LClzS+giE= X-Gm-Gg: ASbGncvQ1DRzDffASro5UqltbQeCnEUtpUbhN7o0XVHeHv97FzjvbYWZZYMzMP/DXze Dnlxot9aQtlKbEqFcjaNeZdciQcCy0Vz0lfMJfH8weFNLkhd+4cmdlB+Vko8uzg7vMV3r3iATLm PIw/zEkgY6mp4K95h5IJUlZQKskUKbBzHdHLIY919/WwSWjlRxu0SyQK8Y1S0rhVuMc8+5c2NgR AH6gDWpn0I4yT6pnnUQStjY9DKqHgJS8Zo6dkv4OVqtATIKt9lOzKpwehb2LnBxmZDOyT0w X-Google-Smtp-Source: AGHT+IGqJQuuqk4Vhp5TZjFSvgTAdQ/xv2AVt/O10VN20Uow3Ku4n2wjK3uOgIBOBh22buJzPhpm7A== X-Received: by 2002:a05:6000:1a85:b0:385:e1a8:e2a1 with SMTP id ffacd0b85a97d-3864ce86758mr3868050f8f.3.1733964468442; Wed, 11 Dec 2024 16:47:48 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:47 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 09/14] ASoC: dt-bindings: qcom, wsa881x: extend description to analog mode Date: Thu, 12 Dec 2024 00:47:22 +0000 Message-ID: <20241212004727.2903846-10-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 WSA881X also supports analog mode when device is configured via i2c only. Document it, add properties, new compatibles and example. While at this, also adjust quotes. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- .../bindings/sound/qcom,wsa881x.yaml | 75 +++++++++++++++++-- 1 file changed, 67 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/sound/qcom,wsa881x.yaml b/Documentation/devicetree/bindings/sound/qcom,wsa881x.yaml index ac03672ebf6d..e482d9dc0de2 100644 --- a/Documentation/devicetree/bindings/sound/qcom,wsa881x.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,wsa881x.yaml @@ -12,15 +12,17 @@ maintainers: description: | WSA8810 is a class-D smart speaker amplifier and WSA8815 is a high-output power class-D smart speaker amplifier. - Their primary operating mode uses a SoundWire digital audio - interface. This binding is for SoundWire interface. - -allOf: - - $ref: dai-common.yaml# + This family of amplifiers support two operating modes: + SoundWire digital audio interface which is a primary mode + and analog mode when device is configured via i2c only. + This binding describes both modes. properties: compatible: - const: sdw10217201000 + enum: + - qcom,wsa8810 + - qcom,wsa8815 + - sdw10217201000 reg: maxItems: 1 @@ -35,17 +37,60 @@ properties: '#sound-dai-cells': const: 0 + clocks: + maxItems: 1 + + mclk-gpios: + description: GPIO spec for mclk + maxItems: 1 + required: - compatible - reg - powerdown-gpios - - "#thermal-sensor-cells" - - "#sound-dai-cells" + - '#thermal-sensor-cells' + - '#sound-dai-cells' + +allOf: + - $ref: dai-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,wsa8810 + const: qcom,wsa8815 + then: + properties: + reg: + description: + In case of analog mode this should be I2C address of the digital + part of the device. The I2C address of analog part of an amplifier + is expected to be located at the fixed offset. + maxItems: 1 + items: + minimum: 0x0e + maximum: 0x0f + + - if: + properties: + compatible: + contains: + enum: + - qcom,wsa8810 + const: qcom,wsa8815 + then: + required: + - clocks + - mclk-gpios unevaluatedProperties: false examples: - | + #include + #include + soundwire@c2d0000 { #address-cells = <2>; #size-cells = <0>; @@ -68,4 +113,18 @@ examples: }; }; + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + amplifier@e { + compatible = "qcom,wsa8810"; + reg = <0x0e>; + clocks = <&q6afecc LPASS_CLK_ID_MCLK_3 LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + powerdown-gpios = <&lpass_tlmm 16 GPIO_ACTIVE_LOW>; + mclk-gpios = <&lpass_tlmm 18 GPIO_ACTIVE_HIGH>; + #sound-dai-cells = <0>; + #thermal-sensor-cells = <0>; + }; + }; ... From patchwork Thu Dec 12 00:47:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 849819 Received: from mail-wr1-f49.google.com (mail-wr1-f49.google.com [209.85.221.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03FBE1632D2 for ; Thu, 12 Dec 2024 00:47:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964473; cv=none; b=a1wQ0JxPZqcEu6fWUc7GI8yClwlH4m07K7bu7LPC0mKSC0jrFzy3bwI95kiaKnsIe8ixwb6XhXN21brQnX459BsBNxm9uW+DZc3xMaWzZ6ISaR0/tgMyWmbOtdGCIcQbddVT7uS20dQErPbz80G8ujvkdTy1vesYs+ZoPdUt9x8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964473; c=relaxed/simple; bh=onN/fyaI2B+gXcyjb4glosU8R39A7qsREEgJ/i/7DUk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HQtsbocWVpAM55aiHms/xJHlieroJ7KidxqQ/6+/6HC1hmSh/wtpSulaMzovBCq36S2LHq0etGn8aFSBMhAsdMjFFNGTVW3FW7i4T4qMOXh/e47leWx34I9hyDD01gemTVTAAj5FIm1v81mzfZkjxFF5LaVxZLRS3/kS7HQZwO0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=XtSIV5AP; arc=none smtp.client-ip=209.85.221.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="XtSIV5AP" Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-3863494591bso7759f8f.1 for ; Wed, 11 Dec 2024 16:47:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964470; x=1734569270; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rV+oSHxMzB7djaacyAb6Ozy1okMulrrztHmf2SfoQUo=; b=XtSIV5APpS0KNQLd44M8RpH6wVTqlpX6nCyxqyxrWI9GDzuP01dcSinh/F6cz5gt74 qFMM9ggeBmCvercGLD7oXBMZez6h+lL56lTMQiGQvVnymR/xn4Hvros81Q5N/Rdv3bK1 fRuMceHnlmphdITh2vtJ5hspMYP/eK3zAgGb1/PwsEUeRALgzeSiatJw0+P3G1lFhH5r 7ES+eItG9x/BCKLuVQ6U7Bn5Dmu2Gy3EN87CtuJ2PEZIobEcCznwX3LBbNuKegAyGpWz 8+I9zYwokrLAfkCGV7/Y6bdVLPbW4f8v8L0L4bzRjv29wrd0pR2rzhgcxooq3hL6TQMC kIng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964470; x=1734569270; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rV+oSHxMzB7djaacyAb6Ozy1okMulrrztHmf2SfoQUo=; b=fG7Qj2NKUZpaYxSl8vpIPekvicGNrlaaLrBXWnlTBTVHqbn7K93eo2t1pLBcXQT8eT F5dnQUy57Apn7/hjiLghIKknuas9hfen7bEci9Vu/GP4C0kVtdHEW7/FEbZyghVkD5oU 4qTKPJHJYvsOb8x/gMLNNoeJNMPOBZju60gs/r8U0en0qA8WDfbCzSk1pMmjoeH+V02j 7FS7MazcG2Q+GuvBc2Hw0TL/0F9bCcCLmR/4pc5aMIGqVtasDSr1CddBW35/RVtX9vlJ IaV3W+FmvE+l7LIfu01GEfRdYo40gYNle+2O+UOJHcSx5LJmu/AqWZOnA1CH/zDmLqJZ iFeg== X-Forwarded-Encrypted: i=1; AJvYcCXLy+ZYf0f8OEzyvUPOZ7FkrMXGJk0LCqXvV7jqVq8hTdYoHn1FZOfXD9uB+QYg/gXALZBZi0/S6eepAyLJ@vger.kernel.org X-Gm-Message-State: AOJu0Yyx2zyAYYYDStvZE0gIVe/r1aT2/1Y+xs/gwPGEGQe2djio8LXO 2Hn8+ZyUA+HGlBTQjCkPgJUzRkB44Q1FxGQn83VWHQjN49rxkiyPRJO2P1m7u4c= X-Gm-Gg: ASbGncugX6qnnIiWblU5vdQV1XspuASJANCHTXt/KzQnq9sRSbhhaZTj3lDp2J12TvG vluRNqt8F9jGo2r2A9Ob7jqHp/gLyteidyME599TCG3wkJQGbprvNV8K7JwZ0dtTdFyf1T2U8f5 +deHAyfZ5yWdq4y7do1dnl/KwKJT3BcHhyqBR0Q+9pVQ/vOMuGNe3lJNNorrBQqi6wZ1TRH0w8q xyEXi3pfvQP2iP0vvVqUNFKyyq3NXKC6R2ZNU7Gtz8GtHlpB18icomfBjmQnpuaMqvlVdwH X-Google-Smtp-Source: AGHT+IFAk1Y8qy4yabp5VFqeN0qshO4/4jp4s6LgayFE/Znd6/U/Ng+pprV0dDY9YOcoyY0cS9nP0g== X-Received: by 2002:a5d:6da4:0:b0:385:e0ea:d4ef with SMTP id ffacd0b85a97d-3864cea1edcmr3389698f8f.58.1733964470591; Wed, 11 Dec 2024 16:47:50 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:49 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 10/14] arm64: dts: qcom: qrb4210-rb2: enable wsa881x amplifier Date: Thu, 12 Dec 2024 00:47:23 +0000 Message-ID: <20241212004727.2903846-11-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 One WSA881X amplifier is connected on QRB4210 RB2 board hence only mono speaker is supported. This amplifier is set to work in analog mode only. Also add required powerdown pin/gpio. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 26 ++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts index 6217bc6e6282..827ce5f7adfb 100644 --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts @@ -264,6 +264,24 @@ zap-shader { }; }; +&i2c1 { + clock-frequency = <400000>; + status = "okay"; + + wsa881x: amplifier@f { + compatible = "qcom,wsa8815"; + reg = <0x0f>; + pinctrl-0 = <&wsa_en_active>; + pinctrl-names = "default"; + clocks = <&q6afecc LPASS_CLK_ID_MCLK_2 LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + powerdown-gpios = <&lpass_tlmm 16 GPIO_ACTIVE_LOW>; + mclk-gpios = <&lpass_tlmm 18 GPIO_ACTIVE_HIGH>; + sound-name-prefix = "SpkrMono"; + #sound-dai-cells = <0>; + #thermal-sensor-cells = <0>; + }; +}; + &i2c2_gpio { clock-frequency = <400000>; status = "okay"; @@ -730,6 +748,14 @@ wcd_reset_n: wcd-reset-n-state { drive-strength = <16>; output-high; }; + + wsa_en_active: wsa-en-active-state { + pins = "gpio106"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + output-high; + }; }; &uart3 { From patchwork Thu Dec 12 00:47:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 849818 Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F1C61714A5 for ; Thu, 12 Dec 2024 00:47:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964479; cv=none; b=D89oLq6GuiXdGxAYIzqSIGuYzzzw5YaA5/LQ8sWjYRpKtRWX17QRr92gBaDhm7X+pttCzWvomZEcu7iZup4Q4a0RrjEdi+m818lW1P3nQ2FjWF7N1GE3XZsCSafKi0oadDQVug7N9fOV1v7xl+doKmA7KQhAezH8O6qT3+Q8ysk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964479; c=relaxed/simple; bh=HGMDJo854LWdAEMDbYe3V3FgD4kXEy0jIF6uIZlTba8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TbAZ+z0M4eDcmGV3sTvekYxnTIeSNL7VcJ7a+BkcLV1RbDhQiJLFKCNHOB7+b8Y6cPdng0jT26rKZxw43cnZBucaO4S9xsVikbw2kJh3YSNWXr1WKw3Yw1toZiqCJa4q1s/TSyIqtjuTUIJpx8/pr1GZquj+sncsQcRhqmMZJxk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=sUyZyo33; arc=none smtp.client-ip=209.85.221.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="sUyZyo33" Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-385deda28b3so14720f8f.0 for ; Wed, 11 Dec 2024 16:47:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964472; x=1734569272; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PJzefhfXLCvFpPCE7E4SHC4/eMmCmW9LBwFKyOQD3hE=; b=sUyZyo33Wv1If8Q17X7df22IFEP7chLEOF2VOkGsLA/M9hdRgy60Dojy7Kg8irzy/g A9qPGcoTUAMeG1T/e+reePOewC0eER7Ppm6c//NLHE5zMUhWGe+a5tr8rlXzrhdew15S XADrwxiovD9BgFJGCp9T1nvV0Pzm3+Rr61+wgyvWn/dPL/psUE7mTlF406ciwM4OgrKR 8NU43sjeDq+bd/n2VQQQ7WeMr125jByd/qcZsE7u3QpGKNsDsdSdCr6BNE7XXSNN3x3T p5jO3pQ9Iva9bjpke23UoJ60q6uk6rMV/TSFYRXoEYv7XSL/EjTxsSyP7+f4q5CGMkmK zLFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964472; x=1734569272; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PJzefhfXLCvFpPCE7E4SHC4/eMmCmW9LBwFKyOQD3hE=; b=R8ekJUhC4kIZSxK7bdDQ8d011RImiuPoeSfJuTldr8yT9v+m9+FyonwSAMF77ZXQdk 9k7Yi6teAG7rM7xRVsrKuaHPmk3tCOh2BGNzpKH75QtbZ7eZ+1uF94oesSn0OguDXuOw W6ttGSTEaCm0AMK+B35Uryk71I7F4kFcm1mJQgQOy1jAVAYXWx7ZsaWlqQOE9ZXGjNTy sNIIHf4HFF9rV91B74NFYzDCN/PnKj9aSguzR3qRdGMZ3Cc9b/Z7+lNbtXbpzFp15jB0 l9ubK3ZFw2/2/M2uJH5KCcE8yemBgo5kudeDYqg4tEL8i3wfhSkmc4JOR/NJJKMyeUaa b+mA== X-Forwarded-Encrypted: i=1; AJvYcCW6z1B9MgkbDOiHwGwjQUN2dgRMJGQAcgH9FSKbmKoUGmbpSprymQkW73cqR2NGds7YVgvUesJ3v8bDuhDS@vger.kernel.org X-Gm-Message-State: AOJu0YyBuxfHjwy4D9yZqUJqiS9QHhGZkDpoqIj2ghmAlwAWg6CjnkHH MRcI5UnrWDzln2LwXsR3FLKtMDbTBofouK5eensTN6y79GbLOfLMMLK8Wfyiel8= X-Gm-Gg: ASbGncsnKSgWCdEMtbQFSkrgauRdxH5mD6JpNaoSMjQ5KdF0IkuqNZ5eY9kQGEnKJKZ jQf2QyAloNRyBQqAzgAcMwJaOjsCMkGNbSZXQyKCgGZqGEh3ofKHEMi7TV/X/b0+fJtHOuE2F2J g3OtFCamRLwBqBhHzDokxpXZkrJm6Bozv7Z6ZDMKLkn4+T+WlJs36iHoRK8FdJ39S/+uiK2AIgc vjsFSOhEuXcu1DAv/2KVyndw05tdIRTsVhHbQDC1fegtSX/7dayNgBLx70MZvOgmuBsR7CU X-Google-Smtp-Source: AGHT+IFRbcZQrk5RB/7oEb8LEAQPJpS59rnG+0JN44epo+uIen9X2Oa3E2pcQDbKXXHVOejhBoJOYA== X-Received: by 2002:a5d:6c6b:0:b0:385:f349:fffb with SMTP id ffacd0b85a97d-387877c973cmr1342990f8f.45.1733964472194; Wed, 11 Dec 2024 16:47:52 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:51 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 11/14] ASoC: codecs: add wsa881x-i2c amplifier codec driver Date: Thu, 12 Dec 2024 00:47:24 +0000 Message-ID: <20241212004727.2903846-12-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add support to analog mode of WSA8810/WSA8815 Class-D Smart Speaker family of amplifiers. Such amplifiers are primarily interfaced with SoundWire but they also support analog mode which is configurable by setting one of the pins to high/low. In such case the WSA881X amplifier is configurable only using i2c. To have stereo two WSA881X amplifiers are required but mono configurations are also possible. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- sound/soc/codecs/Kconfig | 11 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/wsa881x-common.h | 20 + sound/soc/codecs/wsa881x-i2c.c | 1352 +++++++++++++++++++++++++++++ 4 files changed, 1385 insertions(+) create mode 100644 sound/soc/codecs/wsa881x-i2c.c diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index d1607384ea1b..904f6ed771cf 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -352,6 +352,7 @@ config SND_SOC_ALL_CODECS imply SND_SOC_WM9712 imply SND_SOC_WM9713 imply SND_SOC_WSA881X + imply SND_SOC_WSA881X_I2C imply SND_SOC_WSA883X imply SND_SOC_WSA884X imply SND_SOC_ZL38060 @@ -2506,6 +2507,16 @@ config SND_SOC_WSA881X This enables support for Qualcomm WSA8810/WSA8815 Class-D Smart Speaker Amplifier. +config SND_SOC_WSA881X_I2C + tristate "WSA881X Codec - Analog mode" + depends on I2C + select REGMAP_I2C + select SND_SOC_WSA881X_COMMON + help + This enables support for Qualcomm WSA8810/WSA8815 Class-D Smart + Speaker Amplifier that works in analog mode and configurable + via I2C. + config SND_SOC_WSA883X tristate "WSA883X Codec" depends on SOUNDWIRE diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index bde132fc9b37..c3cf8be546e7 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -401,6 +401,7 @@ snd-soc-wm9713-y := wm9713.o snd-soc-wm-hubs-y := wm_hubs.o snd-soc-wsa881x-y := wsa881x.o snd-soc-wsa881x-common-y := wsa881x-common.o +snd-soc-wsa881x-i2c-y := wsa881x-i2c.o snd-soc-wsa883x-y := wsa883x.o snd-soc-wsa884x-y := wsa884x.o snd-soc-zl38060-y := zl38060.o @@ -825,6 +826,7 @@ obj-$(CONFIG_SND_SOC_WM_ADSP) += snd-soc-wm-adsp.o obj-$(CONFIG_SND_SOC_WM_HUBS) += snd-soc-wm-hubs.o obj-$(CONFIG_SND_SOC_WSA881X) += snd-soc-wsa881x.o obj-$(CONFIG_SND_SOC_WSA881X_COMMON) += snd-soc-wsa881x-common.o +obj-$(CONFIG_SND_SOC_WSA881X_I2C) += snd-soc-wsa881x-i2c.o obj-$(CONFIG_SND_SOC_WSA883X) += snd-soc-wsa883x.o obj-$(CONFIG_SND_SOC_WSA884X) += snd-soc-wsa884x.o obj-$(CONFIG_SND_SOC_ZL38060) += snd-soc-zl38060.o diff --git a/sound/soc/codecs/wsa881x-common.h b/sound/soc/codecs/wsa881x-common.h index cf8643e1f7f7..2de36955b2c9 100644 --- a/sound/soc/codecs/wsa881x-common.h +++ b/sound/soc/codecs/wsa881x-common.h @@ -2,6 +2,7 @@ #ifndef __WSA881x_COMMON_H__ #define __WSA881x_COMMON_H__ +#include #include #include @@ -193,6 +194,25 @@ struct wsa881x_priv { bool port_enable[WSA881X_MAX_SWR_PORTS]; #endif +#if IS_ENABLED(CONFIG_SND_SOC_WSA881X_I2C) + /* i2c interace for analog mode */ + struct regmap *regmap_analog; + /* + * First client is for the digital part, + * the second one is for analog part + */ + struct i2c_client *client[2]; + struct i2c_msg xfer_msg[2]; + struct snd_soc_component *component; + struct snd_soc_dai_driver *dai_driver; + struct snd_soc_component_driver *driver; + struct gpio_desc *mclk_pin; + struct clk *wsa_mclk; + bool regmap_flag; + bool boost_enable; + int spk_pa_gain; + int version; +#endif struct gpio_desc *sd_n; /* * Logical state for SD_N GPIO: high for shutdown, low for enable. diff --git a/sound/soc/codecs/wsa881x-i2c.c b/sound/soc/codecs/wsa881x-i2c.c new file mode 100644 index 000000000000..e0f401c42022 --- /dev/null +++ b/sound/soc/codecs/wsa881x-i2c.c @@ -0,0 +1,1352 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2015-2016, 2018-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024, Linaro Limited + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "wsa881x-common.h" + +#define I2C_ANALOG_OFFSET 0x36 +#define SPK_GAIN_12DB 4 + +#define WSA881X_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\ + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\ + SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000 |\ + SNDRV_PCM_RATE_384000) +/* Fractional Rates */ +#define WSA881X_FRAC_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_88200 |\ + SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800) + +#define WSA881X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\ + SNDRV_PCM_FMTBIT_S24_LE |\ + SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) + +#define WSA881X_I2C_DRV_NAME "wsa881x_i2c_codec" + +#define DIGITAL 0 +#define ANALOG 1 + +enum { + WSA881X_1_X = 0, + WSA881X_2_0, +}; + +#define WSA881X_IS_2_0(ver) ((ver == WSA881X_2_0) ? 1 : 0) + +struct reg_default wsa881x_ana_reg_defaults[] = { + {WSA881X_CHIP_ID0, 0x00}, + {WSA881X_CHIP_ID1, 0x00}, + {WSA881X_CHIP_ID2, 0x00}, + {WSA881X_CHIP_ID3, 0x02}, + {WSA881X_BUS_ID, 0x00}, + {WSA881X_CDC_RST_CTL, 0x00}, + {WSA881X_CDC_TOP_CLK_CTL, 0x03}, + {WSA881X_CDC_ANA_CLK_CTL, 0x00}, + {WSA881X_CDC_DIG_CLK_CTL, 0x00}, + {WSA881X_CLOCK_CONFIG, 0x00}, + {WSA881X_ANA_CTL, 0x08}, + {WSA881X_SWR_RESET_EN, 0x00}, + {WSA881X_TEMP_DETECT_CTL, 0x01}, + {WSA881X_TEMP_MSB, 0x00}, + {WSA881X_TEMP_LSB, 0x00}, + {WSA881X_TEMP_CONFIG0, 0x00}, + {WSA881X_TEMP_CONFIG1, 0x00}, + {WSA881X_CDC_CLIP_CTL, 0x03}, + {WSA881X_SDM_PDM9_LSB, 0x00}, + {WSA881X_SDM_PDM9_MSB, 0x00}, + {WSA881X_CDC_RX_CTL, 0x7E}, + {WSA881X_DEM_BYPASS_DATA0, 0x00}, + {WSA881X_DEM_BYPASS_DATA1, 0x00}, + {WSA881X_DEM_BYPASS_DATA2, 0x00}, + {WSA881X_DEM_BYPASS_DATA3, 0x00}, + {WSA881X_OTP_CTRL0, 0x00}, + {WSA881X_OTP_CTRL1, 0x00}, + {WSA881X_HDRIVE_CTL_GROUP1, 0x00}, + {WSA881X_INTR_MODE, 0x00}, + {WSA881X_INTR_MASK, 0x1F}, + {WSA881X_INTR_STATUS, 0x00}, + {WSA881X_INTR_CLEAR, 0x00}, + {WSA881X_INTR_LEVEL, 0x00}, + {WSA881X_INTR_SET, 0x00}, + {WSA881X_INTR_TEST, 0x00}, + {WSA881X_PDM_TEST_MODE, 0x00}, + {WSA881X_ATE_TEST_MODE, 0x00}, + {WSA881X_PIN_CTL_MODE, 0x00}, + {WSA881X_PIN_CTL_OE, 0x00}, + {WSA881X_PIN_WDATA_IOPAD, 0x00}, + {WSA881X_PIN_STATUS, 0x00}, + {WSA881X_DIG_DEBUG_MODE, 0x00}, + {WSA881X_DIG_DEBUG_SEL, 0x00}, + {WSA881X_DIG_DEBUG_EN, 0x00}, + {WSA881X_SWR_HM_TEST1, 0x08}, + {WSA881X_SWR_HM_TEST2, 0x00}, + {WSA881X_TEMP_DETECT_DBG_CTL, 0x00}, + {WSA881X_TEMP_DEBUG_MSB, 0x00}, + {WSA881X_TEMP_DEBUG_LSB, 0x00}, + {WSA881X_SAMPLE_EDGE_SEL, 0x0C}, + {WSA881X_SPARE_0, 0x00}, + {WSA881X_SPARE_1, 0x00}, + {WSA881X_SPARE_2, 0x00}, + {WSA881X_OTP_REG_0, 0x01}, + {WSA881X_OTP_REG_1, 0xFF}, + {WSA881X_OTP_REG_2, 0xC0}, + {WSA881X_OTP_REG_3, 0xFF}, + {WSA881X_OTP_REG_4, 0xC0}, + {WSA881X_OTP_REG_5, 0xFF}, + {WSA881X_OTP_REG_6, 0xFF}, + {WSA881X_OTP_REG_7, 0xFF}, + {WSA881X_OTP_REG_8, 0xFF}, + {WSA881X_OTP_REG_9, 0xFF}, + {WSA881X_OTP_REG_10, 0xFF}, + {WSA881X_OTP_REG_11, 0xFF}, + {WSA881X_OTP_REG_12, 0xFF}, + {WSA881X_OTP_REG_13, 0xFF}, + {WSA881X_OTP_REG_14, 0xFF}, + {WSA881X_OTP_REG_15, 0xFF}, + {WSA881X_OTP_REG_16, 0xFF}, + {WSA881X_OTP_REG_17, 0xFF}, + {WSA881X_OTP_REG_18, 0xFF}, + {WSA881X_OTP_REG_19, 0xFF}, + {WSA881X_OTP_REG_20, 0xFF}, + {WSA881X_OTP_REG_21, 0xFF}, + {WSA881X_OTP_REG_22, 0xFF}, + {WSA881X_OTP_REG_23, 0xFF}, + {WSA881X_OTP_REG_24, 0x03}, + {WSA881X_OTP_REG_25, 0x01}, + {WSA881X_OTP_REG_26, 0x03}, + {WSA881X_OTP_REG_27, 0x11}, + {WSA881X_OTP_REG_28, 0xFF}, + {WSA881X_OTP_REG_29, 0xFF}, + {WSA881X_OTP_REG_30, 0xFF}, + {WSA881X_OTP_REG_31, 0xFF}, + {WSA881X_OTP_REG_63, 0x40}, + /* WSA881x Analog registers */ + {WSA881X_BIAS_REF_CTRL, 0x6C}, + {WSA881X_BIAS_TEST, 0x16}, + {WSA881X_BIAS_BIAS, 0xF0}, + {WSA881X_TEMP_OP, 0x00}, + {WSA881X_TEMP_IREF_CTRL, 0x56}, + {WSA881X_TEMP_ISENS_CTRL, 0x47}, + {WSA881X_TEMP_CLK_CTRL, 0x87}, + {WSA881X_TEMP_TEST, 0x00}, + {WSA881X_TEMP_BIAS, 0x51}, + {WSA881X_TEMP_ADC_CTRL, 0x00}, + {WSA881X_TEMP_DOUT_MSB, 0x00}, + {WSA881X_TEMP_DOUT_LSB, 0x00}, + {WSA881X_ADC_EN_MODU_V, 0x00}, + {WSA881X_ADC_EN_MODU_I, 0x00}, + {WSA881X_ADC_EN_DET_TEST_V, 0x00}, + {WSA881X_ADC_EN_DET_TEST_I, 0x00}, + {WSA881X_ADC_SEL_IBIAS, 0x25}, + {WSA881X_ADC_EN_SEL_IBIAS, 0x10}, + {WSA881X_SPKR_DRV_EN, 0x74}, + {WSA881X_SPKR_DRV_GAIN, 0x01}, + {WSA881X_SPKR_DAC_CTL, 0x40}, + {WSA881X_SPKR_DRV_DBG, 0x15}, + {WSA881X_SPKR_PWRSTG_DBG, 0x00}, + {WSA881X_SPKR_OCP_CTL, 0xD4}, + {WSA881X_SPKR_CLIP_CTL, 0x90}, + {WSA881X_SPKR_BBM_CTL, 0x00}, + {WSA881X_SPKR_MISC_CTL1, 0x80}, + {WSA881X_SPKR_MISC_CTL2, 0x00}, + {WSA881X_SPKR_BIAS_INT, 0x56}, + {WSA881X_SPKR_PA_INT, 0x54}, + {WSA881X_SPKR_BIAS_CAL, 0xAC}, + {WSA881X_SPKR_BIAS_PSRR, 0x54}, + {WSA881X_SPKR_STATUS1, 0x00}, + {WSA881X_SPKR_STATUS2, 0x00}, + {WSA881X_BOOST_EN_CTL, 0x18}, + {WSA881X_BOOST_CURRENT_LIMIT, 0x7A}, + {WSA881X_BOOST_PS_CTL, 0xC0}, + {WSA881X_BOOST_PRESET_OUT1, 0x77}, + {WSA881X_BOOST_PRESET_OUT2, 0x70}, + {WSA881X_BOOST_FORCE_OUT, 0x0E}, + {WSA881X_BOOST_LDO_PROG, 0x16}, + {WSA881X_BOOST_SLOPE_COMP_ISENSE_FB, 0x71}, + {WSA881X_BOOST_RON_CTL, 0x0F}, + {WSA881X_BOOST_LOOP_STABILITY, 0xAD}, + {WSA881X_BOOST_ZX_CTL, 0x34}, + {WSA881X_BOOST_START_CTL, 0x23}, + {WSA881X_BOOST_MISC1_CTL, 0x80}, + {WSA881X_BOOST_MISC2_CTL, 0x00}, + {WSA881X_BOOST_MISC3_CTL, 0x00}, + {WSA881X_BOOST_ATEST_CTL, 0x00}, + {WSA881X_SPKR_PROT_FE_GAIN, 0x46}, + {WSA881X_SPKR_PROT_FE_CM_LDO_SET, 0x3B}, + {WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1, 0x8D}, + {WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2, 0x8D}, + {WSA881X_SPKR_PROT_ATEST1, 0x01}, + {WSA881X_SPKR_PROT_ATEST2, 0x00}, + {WSA881X_SPKR_PROT_FE_VSENSE_VCM, 0x8D}, + {WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1, 0x4D}, + {WSA881X_BONGO_RESRV_REG1, 0x00}, + {WSA881X_BONGO_RESRV_REG2, 0x00}, + {WSA881X_SPKR_PROT_SAR, 0x00}, + {WSA881X_SPKR_STATUS3, 0x00}, +}; + +const struct reg_default wsa881x_ana_reg_defaults_0[] = { + {WSA881X_CHIP_ID0, 0x00}, + {WSA881X_CHIP_ID1, 0x00}, + {WSA881X_CHIP_ID2, 0x00}, + {WSA881X_CHIP_ID3, 0x02}, + {WSA881X_BUS_ID, 0x00}, + {WSA881X_CDC_RST_CTL, 0x00}, + {WSA881X_CDC_TOP_CLK_CTL, 0x03}, + {WSA881X_CDC_ANA_CLK_CTL, 0x00}, + {WSA881X_CDC_DIG_CLK_CTL, 0x00}, + {WSA881X_CLOCK_CONFIG, 0x00}, + {WSA881X_ANA_CTL, 0x08}, + {WSA881X_SWR_RESET_EN, 0x00}, + {WSA881X_TEMP_DETECT_CTL, 0x01}, + {WSA881X_TEMP_MSB, 0x00}, + {WSA881X_TEMP_LSB, 0x00}, + {WSA881X_TEMP_CONFIG0, 0x00}, + {WSA881X_TEMP_CONFIG1, 0x00}, + {WSA881X_CDC_CLIP_CTL, 0x03}, + {WSA881X_SDM_PDM9_LSB, 0x00}, + {WSA881X_SDM_PDM9_MSB, 0x00}, + {WSA881X_CDC_RX_CTL, 0x7E}, + {WSA881X_DEM_BYPASS_DATA0, 0x00}, + {WSA881X_DEM_BYPASS_DATA1, 0x00}, + {WSA881X_DEM_BYPASS_DATA2, 0x00}, + {WSA881X_DEM_BYPASS_DATA3, 0x00}, + {WSA881X_OTP_CTRL0, 0x00}, + {WSA881X_OTP_CTRL1, 0x00}, + {WSA881X_HDRIVE_CTL_GROUP1, 0x00}, + {WSA881X_INTR_MODE, 0x00}, + {WSA881X_INTR_MASK, 0x1F}, + {WSA881X_INTR_STATUS, 0x00}, + {WSA881X_INTR_CLEAR, 0x00}, + {WSA881X_INTR_LEVEL, 0x00}, + {WSA881X_INTR_SET, 0x00}, + {WSA881X_INTR_TEST, 0x00}, + {WSA881X_PDM_TEST_MODE, 0x00}, + {WSA881X_ATE_TEST_MODE, 0x00}, + {WSA881X_PIN_CTL_MODE, 0x00}, + {WSA881X_PIN_CTL_OE, 0x00}, + {WSA881X_PIN_WDATA_IOPAD, 0x00}, + {WSA881X_PIN_STATUS, 0x00}, + {WSA881X_DIG_DEBUG_MODE, 0x00}, + {WSA881X_DIG_DEBUG_SEL, 0x00}, + {WSA881X_DIG_DEBUG_EN, 0x00}, + {WSA881X_SWR_HM_TEST1, 0x08}, + {WSA881X_SWR_HM_TEST2, 0x00}, + {WSA881X_TEMP_DETECT_DBG_CTL, 0x00}, + {WSA881X_TEMP_DEBUG_MSB, 0x00}, + {WSA881X_TEMP_DEBUG_LSB, 0x00}, + {WSA881X_SAMPLE_EDGE_SEL, 0x0C}, + {WSA881X_SPARE_0, 0x00}, + {WSA881X_SPARE_1, 0x00}, + {WSA881X_SPARE_2, 0x00}, + {WSA881X_OTP_REG_0, 0x01}, + {WSA881X_OTP_REG_1, 0xFF}, + {WSA881X_OTP_REG_2, 0xC0}, + {WSA881X_OTP_REG_3, 0xFF}, + {WSA881X_OTP_REG_4, 0xC0}, + {WSA881X_OTP_REG_5, 0xFF}, + {WSA881X_OTP_REG_6, 0xFF}, + {WSA881X_OTP_REG_7, 0xFF}, + {WSA881X_OTP_REG_8, 0xFF}, + {WSA881X_OTP_REG_9, 0xFF}, + {WSA881X_OTP_REG_10, 0xFF}, + {WSA881X_OTP_REG_11, 0xFF}, + {WSA881X_OTP_REG_12, 0xFF}, + {WSA881X_OTP_REG_13, 0xFF}, + {WSA881X_OTP_REG_14, 0xFF}, + {WSA881X_OTP_REG_15, 0xFF}, + {WSA881X_OTP_REG_16, 0xFF}, + {WSA881X_OTP_REG_17, 0xFF}, + {WSA881X_OTP_REG_18, 0xFF}, + {WSA881X_OTP_REG_19, 0xFF}, + {WSA881X_OTP_REG_20, 0xFF}, + {WSA881X_OTP_REG_21, 0xFF}, + {WSA881X_OTP_REG_22, 0xFF}, + {WSA881X_OTP_REG_23, 0xFF}, + {WSA881X_OTP_REG_24, 0x03}, + {WSA881X_OTP_REG_25, 0x01}, + {WSA881X_OTP_REG_26, 0x03}, + {WSA881X_OTP_REG_27, 0x11}, + {WSA881X_OTP_REG_28, 0xFF}, + {WSA881X_OTP_REG_29, 0xFF}, + {WSA881X_OTP_REG_30, 0xFF}, + {WSA881X_OTP_REG_31, 0xFF}, + {WSA881X_OTP_REG_63, 0x40}, +}; + +const struct reg_default wsa881x_ana_reg_defaults_1[] = { + {WSA881X_BIAS_REF_CTRL - WSA881X_ANALOG_BASE, 0x6C}, + {WSA881X_BIAS_TEST - WSA881X_ANALOG_BASE, 0x16}, + {WSA881X_BIAS_BIAS - WSA881X_ANALOG_BASE, 0xF0}, + {WSA881X_TEMP_OP - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_TEMP_IREF_CTRL - WSA881X_ANALOG_BASE, 0x56}, + {WSA881X_TEMP_ISENS_CTRL - WSA881X_ANALOG_BASE, 0x47}, + {WSA881X_TEMP_CLK_CTRL - WSA881X_ANALOG_BASE, 0x87}, + {WSA881X_TEMP_TEST - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_TEMP_BIAS - WSA881X_ANALOG_BASE, 0x51}, + {WSA881X_TEMP_ADC_CTRL - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_TEMP_DOUT_MSB - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_TEMP_DOUT_LSB - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_ADC_EN_MODU_V - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_ADC_EN_MODU_I - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_ADC_EN_DET_TEST_V - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_ADC_EN_DET_TEST_I - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_ADC_SEL_IBIAS - WSA881X_ANALOG_BASE, 0x25}, + {WSA881X_ADC_EN_SEL_IBIAS - WSA881X_ANALOG_BASE, 0x10}, + {WSA881X_SPKR_DRV_EN - WSA881X_ANALOG_BASE, 0x74}, + {WSA881X_SPKR_DRV_GAIN - WSA881X_ANALOG_BASE, 0x01}, + {WSA881X_SPKR_DAC_CTL - WSA881X_ANALOG_BASE, 0x40}, + {WSA881X_SPKR_DRV_DBG - WSA881X_ANALOG_BASE, 0x15}, + {WSA881X_SPKR_PWRSTG_DBG - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_SPKR_OCP_CTL - WSA881X_ANALOG_BASE, 0xD4}, + {WSA881X_SPKR_CLIP_CTL - WSA881X_ANALOG_BASE, 0x90}, + {WSA881X_SPKR_BBM_CTL - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_SPKR_MISC_CTL1 - WSA881X_ANALOG_BASE, 0x80}, + {WSA881X_SPKR_MISC_CTL2 - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_SPKR_BIAS_INT - WSA881X_ANALOG_BASE, 0x56}, + {WSA881X_SPKR_PA_INT - WSA881X_ANALOG_BASE, 0x54}, + {WSA881X_SPKR_BIAS_CAL - WSA881X_ANALOG_BASE, 0xAC}, + {WSA881X_SPKR_BIAS_PSRR - WSA881X_ANALOG_BASE, 0x54}, + {WSA881X_SPKR_STATUS1 - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_SPKR_STATUS2 - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_BOOST_EN_CTL - WSA881X_ANALOG_BASE, 0x18}, + {WSA881X_BOOST_CURRENT_LIMIT - WSA881X_ANALOG_BASE, 0x7A}, + {WSA881X_BOOST_PS_CTL - WSA881X_ANALOG_BASE, 0xC0}, + {WSA881X_BOOST_PRESET_OUT1 - WSA881X_ANALOG_BASE, 0x77}, + {WSA881X_BOOST_PRESET_OUT2 - WSA881X_ANALOG_BASE, 0x70}, + {WSA881X_BOOST_FORCE_OUT - WSA881X_ANALOG_BASE, 0x0E}, + {WSA881X_BOOST_LDO_PROG - WSA881X_ANALOG_BASE, 0x16}, + {WSA881X_BOOST_SLOPE_COMP_ISENSE_FB - WSA881X_ANALOG_BASE, 0x71}, + {WSA881X_BOOST_RON_CTL - WSA881X_ANALOG_BASE, 0x0F}, + {WSA881X_BOOST_LOOP_STABILITY - WSA881X_ANALOG_BASE, 0xAD}, + {WSA881X_BOOST_ZX_CTL - WSA881X_ANALOG_BASE, 0x34}, + {WSA881X_BOOST_START_CTL - WSA881X_ANALOG_BASE, 0x23}, + {WSA881X_BOOST_MISC1_CTL - WSA881X_ANALOG_BASE, 0x80}, + {WSA881X_BOOST_MISC2_CTL - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_BOOST_MISC3_CTL - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_BOOST_ATEST_CTL - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_SPKR_PROT_FE_GAIN - WSA881X_ANALOG_BASE, 0x46}, + {WSA881X_SPKR_PROT_FE_CM_LDO_SET - WSA881X_ANALOG_BASE, 0x3B}, + {WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET1 - WSA881X_ANALOG_BASE, 0x8D}, + {WSA881X_SPKR_PROT_FE_ISENSE_BIAS_SET2 - WSA881X_ANALOG_BASE, 0x8D}, + {WSA881X_SPKR_PROT_ATEST1 - WSA881X_ANALOG_BASE, 0x01}, + {WSA881X_SPKR_PROT_ATEST2 - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_SPKR_PROT_FE_VSENSE_VCM - WSA881X_ANALOG_BASE, 0x8D}, + {WSA881X_SPKR_PROT_FE_VSENSE_BIAS_SET1 - WSA881X_ANALOG_BASE, 0x4D}, + {WSA881X_BONGO_RESRV_REG1 - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_BONGO_RESRV_REG2 - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_SPKR_PROT_SAR - WSA881X_ANALOG_BASE, 0x00}, + {WSA881X_SPKR_STATUS3 - WSA881X_ANALOG_BASE, 0x00}, +}; + +static const struct reg_sequence wsa881x_rev_2_0_dig[] = { + {WSA881X_RESET_CTL, 0x00}, + {WSA881X_TADC_VALUE_CTL, 0x01}, + {WSA881X_INTR_MASK, 0x1B}, + {WSA881X_IOPAD_CTL, 0x00}, + {WSA881X_OTP_REG_28, 0x3F}, + {WSA881X_OTP_REG_29, 0x3F}, + {WSA881X_OTP_REG_30, 0x01}, + {WSA881X_OTP_REG_31, 0x01}, +}; + +static const struct reg_sequence wsa881x_rev_2_0_ana[] = { + {WSA881X_TEMP_ADC_CTRL, 0x03}, + {WSA881X_ADC_SEL_IBIAS, 0x45}, + {WSA881X_SPKR_DRV_GAIN, 0xC1}, + {WSA881X_SPKR_DAC_CTL, 0x42}, + {WSA881X_SPKR_BBM_CTL, 0x02}, + {WSA881X_SPKR_MISC_CTL1, 0x40}, + {WSA881X_SPKR_MISC_CTL2, 0x07}, + {WSA881X_SPKR_BIAS_INT, 0x5F}, + {WSA881X_SPKR_BIAS_PSRR, 0x44}, + {WSA881X_BOOST_PS_CTL, 0xA0}, + {WSA881X_BOOST_PRESET_OUT1, 0xB7}, + {WSA881X_BOOST_LOOP_STABILITY, 0x8D}, + {WSA881X_SPKR_PROT_ATEST2, 0x02}, + {WSA881X_BONGO_RESRV_REG1, 0x5E}, + {WSA881X_BONGO_RESRV_REG2, 0x07}, +}; + +static const struct reg_default wsa881x_rev_2_0_regmap_ana[] = { + {WSA881X_TEMP_ADC_CTRL - WSA881X_ANALOG_BASE, 0x03}, + {WSA881X_ADC_SEL_IBIAS - WSA881X_ANALOG_BASE, 0x45}, + {WSA881X_SPKR_DRV_GAIN - WSA881X_ANALOG_BASE, 0xC1}, + {WSA881X_SPKR_DAC_CTL - WSA881X_ANALOG_BASE, 0x42}, + {WSA881X_SPKR_BBM_CTL - WSA881X_ANALOG_BASE, 0x02}, + {WSA881X_SPKR_MISC_CTL1 - WSA881X_ANALOG_BASE, 0x40}, + {WSA881X_SPKR_MISC_CTL2 - WSA881X_ANALOG_BASE, 0x07}, + {WSA881X_SPKR_BIAS_INT - WSA881X_ANALOG_BASE, 0x5F}, + {WSA881X_SPKR_BIAS_PSRR - WSA881X_ANALOG_BASE, 0x44}, + {WSA881X_BOOST_PS_CTL - WSA881X_ANALOG_BASE, 0xA0}, + {WSA881X_BOOST_PRESET_OUT1 - WSA881X_ANALOG_BASE, 0xB7}, + {WSA881X_BOOST_LOOP_STABILITY - WSA881X_ANALOG_BASE, 0x8D}, + {WSA881X_SPKR_PROT_ATEST2 - WSA881X_ANALOG_BASE, 0x02}, + {WSA881X_BONGO_RESRV_REG1 - WSA881X_ANALOG_BASE, 0x5E}, + {WSA881X_BONGO_RESRV_REG2 - WSA881X_ANALOG_BASE, 0x07}, +}; + +/** + * wsa881x_update_reg_defaults_2_0 - update default values of regs for v2.0 + * + * wsa881x v2.0 has different default values for certain analog and digital + * registers compared to v1.x. Therefore, update the values of these registers + * with the values from tables defined above for v2.0. + */ +static void wsa881x_update_reg_defaults_2_0(void) +{ + int i, j; + + for (i = 0; i < ARRAY_SIZE(wsa881x_rev_2_0_dig); i++) { + for (j = 0; j < ARRAY_SIZE(wsa881x_ana_reg_defaults); j++) + if (wsa881x_ana_reg_defaults[j].reg == + wsa881x_rev_2_0_dig[i].reg) + wsa881x_ana_reg_defaults[j].def = + wsa881x_rev_2_0_dig[i].def; + } + for (i = 0; i < ARRAY_SIZE(wsa881x_rev_2_0_ana); i++) { + for (j = 0; j < ARRAY_SIZE(wsa881x_ana_reg_defaults); j++) + if (wsa881x_ana_reg_defaults[j].reg == + wsa881x_rev_2_0_ana[i].reg) + wsa881x_ana_reg_defaults[j].def = + wsa881x_rev_2_0_ana[i].def; + } +} + +/** + * wsa881x_update_regmap_2_0 - update regmap framework with new tables + * @regmap: pointer to wsa881x regmap structure + * @flag: indicates digital or analog wsa881x slave + * + * wsa881x v2.0 has some new registers for both analog and digital slaves. + * Update the regmap framework with all the new registers. + */ +static void wsa881x_update_regmap_2_0(struct regmap *regmap, int flag) +{ + u16 ret; + + switch (flag) { + case DIGITAL: + ret = regmap_register_patch(regmap, wsa881x_rev_2_0_dig, + ARRAY_SIZE(wsa881x_rev_2_0_dig)); + break; + case ANALOG: + ret = regmap_register_patch(regmap, wsa881x_rev_2_0_ana, + ARRAY_SIZE(wsa881x_rev_2_0_ana)); + break; + default: + pr_debug("%s: unknown version", __func__); + ret = -EINVAL; + break; + } + if (ret) + pr_err("%s: failed to update regmap defaults ret=%d\n", + __func__, ret); +} + +const struct regmap_config wsa881x_ana_regmap_config[] = { + { + .reg_bits = 8, + .val_bits = 8, + .cache_type = REGCACHE_NONE, + .reg_defaults = wsa881x_ana_reg_defaults_0, + .num_reg_defaults = ARRAY_SIZE(wsa881x_ana_reg_defaults_0), + .max_register = WSA881X_SPKR_STATUS3, + .volatile_reg = wsa881x_volatile_register, + .readable_reg = wsa881x_readable_register, + .reg_format_endian = REGMAP_ENDIAN_NATIVE, + .val_format_endian = REGMAP_ENDIAN_NATIVE, + }, + { + .reg_bits = 8, + .val_bits = 8, + .cache_type = REGCACHE_NONE, + .reg_defaults = wsa881x_ana_reg_defaults_1, + .num_reg_defaults = ARRAY_SIZE(wsa881x_ana_reg_defaults_1), + .max_register = WSA881X_SPKR_STATUS3, + .volatile_reg = wsa881x_volatile_register, + .readable_reg = wsa881x_readable_register, + .reg_format_endian = REGMAP_ENDIAN_NATIVE, + .val_format_endian = REGMAP_ENDIAN_NATIVE, + } +}; + +static const struct i2c_device_id wsa881x_i2c_id[]; + +static const int delay_array_msec[] = {10, 20, 30, 40, 50}; + +static const char * const wsa881x_spk_pa_gain_text[] = { +"POS_13P5_DB", "POS_12_DB", "POS_10P5_DB", "POS_9_DB", "POS_7P5_DB", +"POS_6_DB", "POS_4P5_DB", "POS_3_DB", "POS_1P5_DB", "POS_0_DB"}; + +static const struct soc_enum wsa881x_spk_pa_gain_enum[] = { + SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa881x_spk_pa_gain_text), + wsa881x_spk_pa_gain_text), +}; + +static int wsa881x_spk_pa_gain_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct wsa881x_priv *wsa881x = + snd_soc_component_get_drvdata(component); + + ucontrol->value.integer.value[0] = wsa881x->spk_pa_gain; + return 0; +} + +static int wsa881x_spk_pa_gain_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct wsa881x_priv *wsa881x = + snd_soc_component_get_drvdata(component); + + if (ucontrol->value.integer.value[0] < 0 || + ucontrol->value.integer.value[0] > 0xC) { + dev_err(component->dev, "unsupported gain val %ld\n", + ucontrol->value.integer.value[0]); + return -EINVAL; + } + wsa881x->spk_pa_gain = ucontrol->value.integer.value[0]; + return 0; +} + +/* Helpers to figure out which regmap or client contains the register */ +static struct regmap *find_regmap(struct wsa881x_priv *wsa881x, u16 reg) +{ + if (reg >= WSA881X_ANALOG_BASE) + return wsa881x->regmap_analog; + else + return wsa881x->regmap; +} + +static int find_client_index(u16 reg) +{ + return reg >= WSA881X_ANALOG_BASE ? ANALOG : DIGITAL; +} + +static int wsa881x_i2c_write_device(struct wsa881x_priv *wsa881x, + unsigned int reg, unsigned int val) +{ + struct regmap *wsa881x_regmap; + struct i2c_msg *msg; + int bytes = 1; + int ret, i, index; + u8 reg_addr = 0; + u8 data[2]; + + if (wsa881x->regmap_flag) { + wsa881x_regmap = find_regmap(wsa881x, reg); + ret = regmap_write(wsa881x_regmap, reg, val); + for (i = 0; ret && i < ARRAY_SIZE(delay_array_msec); i++) { + dev_err_ratelimited(wsa881x->dev, + "failed writing reg=%x-retry(%d)\n", + reg, i); + /* retry after delay of increasing order */ + msleep(delay_array_msec[i]); + ret = regmap_write(wsa881x_regmap, reg, val); + } + if (ret) + dev_err_ratelimited(wsa881x->dev, + "failed writing reg=%x ret=%d\n", + reg, ret); + else + dev_dbg(wsa881x->dev, "wrote reg=%x val=%x\n", + reg, val); + } else { + index = find_client_index(reg); + reg_addr = (u8)reg; + msg = &wsa881x->xfer_msg[0]; + msg->addr = wsa881x->client[index]->addr; + msg->len = bytes + 1; + msg->flags = 0; + data[0] = reg; + data[1] = (u8)val; + msg->buf = data; + + ret = i2c_transfer(wsa881x->client[index]->adapter, + wsa881x->xfer_msg, 1); + /* Try again if the write fails */ + if (ret != 1) { + pr_err("write failed\n"); + ret = i2c_transfer(wsa881x->client[index]->adapter, + wsa881x->xfer_msg, 1); + if (ret != 1) { + dev_err_ratelimited(wsa881x->dev, + "failed i2c transfer\n"); + return ret; + } + } + dev_dbg(wsa881x->dev, "wrote reg=%x val=%x\n", reg, data[1]); + } + return ret; +} + +static int wsa881x_i2c_read_device(struct wsa881x_priv *wsa881x, + unsigned int reg) +{ + struct regmap *wsa881x_regmap; + struct i2c_msg *msg; + unsigned int val; + int ret, i, index; + u8 reg_addr = 0; + u8 dest[5] = {0}; + + if (wsa881x->regmap_flag) { + wsa881x_regmap = find_regmap(wsa881x, reg); + if (!wsa881x_regmap) { + dev_err_ratelimited(wsa881x->dev, + "invalid register to read\n"); + return -EINVAL; + } + ret = regmap_read(wsa881x_regmap, reg, &val); + for (i = 0; ret && i < ARRAY_SIZE(delay_array_msec); i++) { + dev_err_ratelimited(wsa881x->dev, + "failed to read reg=%x-retry(%d)\n", + reg, i); + /* retry after delay of increasing order */ + msleep(delay_array_msec[i]); + ret = regmap_read(wsa881x_regmap, reg, &val); + } + if (ret) { + dev_err_ratelimited(wsa881x->dev, + "failed to read reg=%x ret=%d\n", + reg, ret); + return ret; + } + dev_dbg(wsa881x->dev, "read success, reg=%x val=%x\n", + reg, val); + } else { + index = find_client_index(reg); + reg_addr = (u8)reg; + msg = &wsa881x->xfer_msg[0]; + msg->addr = wsa881x->client[index]->addr; + msg->len = 1; + msg->flags = 0; + msg->buf = ®_addr; + + msg = &wsa881x->xfer_msg[1]; + msg->addr = wsa881x->client[index]->addr; + msg->len = 1; + msg->flags = I2C_M_RD; + msg->buf = dest; + + ret = i2c_transfer(wsa881x->client[index]->adapter, + wsa881x->xfer_msg, 2); + /* Try again if read fails first time */ + if (ret != 2) { + ret = i2c_transfer(wsa881x->client[index]->adapter, + wsa881x->xfer_msg, 2); + if (ret != 2) { + dev_err_ratelimited(wsa881x->dev, + "failed to read reg=%d\n", + reg); + return ret; + } + } + val = dest[0]; + } + return val; +} + +static unsigned int wsa881x_i2c_read(struct snd_soc_component *component, + unsigned int reg) +{ + struct wsa881x_priv *wsa881x; + int retval; + + wsa881x = snd_soc_component_get_drvdata(component); + + retval = wsa881x_i2c_read_device(wsa881x, reg); + + return retval >= 0 ? retval : 0; +} + +static int wsa881x_i2c_write(struct snd_soc_component *component, + unsigned int reg, unsigned int val) +{ + struct wsa881x_priv *wsa881x; + + wsa881x = snd_soc_component_get_drvdata(component); + + return wsa881x_i2c_write_device(wsa881x, reg, val); +} + +static int wsa881x_boost_ctrl(struct snd_soc_component *component, bool enable) +{ + struct wsa881x_priv *wsa881x = + snd_soc_component_get_drvdata(component); + + if (enable) { + if (!WSA881X_IS_2_0(wsa881x->version)) { + snd_soc_component_update_bits(component, + WSA881X_ANA_CTL, 0x01, 0x01); + snd_soc_component_update_bits(component, + WSA881X_ANA_CTL, 0x04, 0x04); + snd_soc_component_update_bits(component, + WSA881X_BOOST_PS_CTL, + 0x40, 0x00); + snd_soc_component_update_bits(component, + WSA881X_BOOST_PRESET_OUT1, + 0xF0, 0xB0); + snd_soc_component_update_bits(component, + WSA881X_BOOST_ZX_CTL, + 0x20, 0x00); + snd_soc_component_update_bits(component, + WSA881X_BOOST_EN_CTL, + 0x80, 0x80); + } else { + snd_soc_component_update_bits(component, + WSA881X_BOOST_LOOP_STABILITY, + 0x03, 0x03); + snd_soc_component_update_bits(component, + WSA881X_BOOST_MISC2_CTL, + 0xFF, 0x14); + snd_soc_component_update_bits(component, + WSA881X_BOOST_START_CTL, + 0x80, 0x80); + snd_soc_component_update_bits(component, + WSA881X_BOOST_START_CTL, + 0x03, 0x00); + snd_soc_component_update_bits(component, + WSA881X_BOOST_SLOPE_COMP_ISENSE_FB, + 0x0C, 0x04); + snd_soc_component_update_bits(component, + WSA881X_BOOST_SLOPE_COMP_ISENSE_FB, + 0x03, 0x00); + if (snd_soc_component_read(component, WSA881X_OTP_REG_0)) + snd_soc_component_update_bits(component, + WSA881X_BOOST_PRESET_OUT1, + 0xF0, 0x70); + else + snd_soc_component_update_bits(component, + WSA881X_BOOST_PRESET_OUT1, + 0xF0, 0xB0); + snd_soc_component_update_bits(component, + WSA881X_ANA_CTL, 0x03, 0x01); + snd_soc_component_update_bits(component, + WSA881X_SPKR_DRV_EN, + 0x08, 0x08); + snd_soc_component_update_bits(component, + WSA881X_ANA_CTL, 0x04, 0x04); + snd_soc_component_update_bits(component, + WSA881X_BOOST_CURRENT_LIMIT, + 0x0F, 0x08); + snd_soc_component_update_bits(component, + WSA881X_BOOST_EN_CTL, + 0x80, 0x80); + } + /* For WSA8810, start-up time is 1500us as per qcrg sequence */ + usleep_range(1500, 1510); + } else { + /* ENSURE: Class-D amp is shutdown. CLK is still on */ + snd_soc_component_update_bits(component, WSA881X_BOOST_EN_CTL, + 0x80, 0x00); + /* boost settle time is 1500us as per qcrg sequence */ + usleep_range(1500, 1510); + } + return 0; +} + +static void wsa881x_bandgap_ctrl(struct snd_soc_component *component, + bool enable) +{ + if (enable) { + snd_soc_component_update_bits(component, WSA881X_TEMP_OP, + 0x08, 0x08); + /* 400usec sleep is needed as per HW requirement */ + usleep_range(400, 410); + snd_soc_component_update_bits(component, WSA881X_TEMP_OP, + 0x04, 0x04); + } else { + snd_soc_component_update_bits(component, WSA881X_TEMP_OP, + 0x04, 0x00); + snd_soc_component_update_bits(component, WSA881X_TEMP_OP, + 0x08, 0x00); + } +} + +static void wsa881x_clk_ctrl(struct snd_soc_component *component, bool enable) +{ + struct wsa881x_priv *wsa881x = + snd_soc_component_get_drvdata(component); + + if (enable) { + snd_soc_component_write(component, + WSA881X_CDC_RST_CTL, 0x02); + snd_soc_component_write(component, + WSA881X_CDC_RST_CTL, 0x03); + snd_soc_component_write(component, + WSA881X_CLOCK_CONFIG, 0x01); + + snd_soc_component_write(component, + WSA881X_CDC_DIG_CLK_CTL, 0x01); + snd_soc_component_write(component, + WSA881X_CDC_ANA_CLK_CTL, 0x01); + } else { + snd_soc_component_write(component, + WSA881X_CDC_ANA_CLK_CTL, 0x00); + snd_soc_component_write(component, + WSA881X_CDC_DIG_CLK_CTL, 0x00); + if (WSA881X_IS_2_0(wsa881x->version)) + snd_soc_component_update_bits(component, + WSA881X_CDC_TOP_CLK_CTL, 0x01, 0x00); + } +} + +static int wsa881x_rdac_ctrl(struct snd_soc_component *component, bool enable) +{ + struct wsa881x_priv *wsa881x = + snd_soc_component_get_drvdata(component); + + if (enable) { + snd_soc_component_update_bits(component, + WSA881X_ANA_CTL, 0x08, 0x00); + snd_soc_component_update_bits(component, + WSA881X_SPKR_DRV_GAIN, 0x08, 0x08); + snd_soc_component_update_bits(component, + WSA881X_SPKR_DAC_CTL, 0x20, 0x20); + snd_soc_component_update_bits(component, + WSA881X_SPKR_DAC_CTL, 0x20, 0x00); + snd_soc_component_update_bits(component, + WSA881X_SPKR_DAC_CTL, 0x40, 0x40); + snd_soc_component_update_bits(component, + WSA881X_SPKR_DAC_CTL, 0x80, 0x80); + if (WSA881X_IS_2_0(wsa881x->version)) { + snd_soc_component_update_bits(component, + WSA881X_SPKR_BIAS_CAL, 0x01, 0x01); + snd_soc_component_update_bits(component, + WSA881X_SPKR_OCP_CTL, 0x30, 0x30); + snd_soc_component_update_bits(component, + WSA881X_SPKR_OCP_CTL, 0x0C, 0x00); + } + snd_soc_component_update_bits(component, + WSA881X_SPKR_DRV_GAIN, 0xF0, 0x40); + snd_soc_component_update_bits(component, + WSA881X_SPKR_MISC_CTL1, 0x01, 0x01); + } else { + /* Ensure class-D amp is off */ + snd_soc_component_update_bits(component, + WSA881X_SPKR_DAC_CTL, 0x80, 0x00); + } + return 0; +} + +static int wsa881x_spkr_pa_ctrl(struct snd_soc_component *component, + bool enable) +{ + struct wsa881x_priv *wsa881x = + snd_soc_component_get_drvdata(component); + + if (enable) { + /* + * Ensure: Boost is enabled and stable, Analog input is up + * and outputting silence + */ + if (!WSA881X_IS_2_0(wsa881x->version)) { + snd_soc_component_update_bits(component, + WSA881X_ADC_EN_DET_TEST_I, + 0xFF, 0x01); + snd_soc_component_update_bits(component, + WSA881X_ADC_EN_MODU_V, + 0x02, 0x02); + snd_soc_component_update_bits(component, + WSA881X_ADC_EN_DET_TEST_V, + 0xFF, 0x10); + snd_soc_component_update_bits(component, + WSA881X_SPKR_PWRSTG_DBG, + 0xA0, 0xA0); + snd_soc_component_update_bits(component, + WSA881X_SPKR_DRV_EN, + 0x80, 0x80); + usleep_range(700, 710); + snd_soc_component_update_bits(component, + WSA881X_SPKR_PWRSTG_DBG, + 0x00, 0x00); + snd_soc_component_update_bits(component, + WSA881X_ADC_EN_DET_TEST_V, + 0xFF, 0x00); + snd_soc_component_update_bits(component, + WSA881X_ADC_EN_MODU_V, + 0x02, 0x00); + snd_soc_component_update_bits(component, + WSA881X_ADC_EN_DET_TEST_I, + 0xFF, 0x00); + } else + snd_soc_component_update_bits(component, + WSA881X_SPKR_DRV_EN, 0x80, 0x80); + /* add 1000us delay as per qcrg */ + usleep_range(1000, 1010); + snd_soc_component_update_bits(component, + WSA881X_SPKR_DRV_EN, 0x01, 0x01); + if (WSA881X_IS_2_0(wsa881x->version)) + snd_soc_component_update_bits(component, + WSA881X_SPKR_BIAS_CAL, + 0x01, 0x00); + usleep_range(1000, 1010); + snd_soc_component_update_bits(component, + WSA881X_SPKR_DRV_GAIN, + 0xF0, (wsa881x->spk_pa_gain << 4)); + } else { + /* + * Ensure: Boost is still on, Stream from Analog input and + * Speaker Protection has been stopped and input is at 0V + */ + if (WSA881X_IS_2_0(wsa881x->version)) { + snd_soc_component_update_bits(component, + WSA881X_SPKR_BIAS_CAL, + 0x01, 0x01); + usleep_range(1000, 1010); + snd_soc_component_update_bits(component, + WSA881X_SPKR_BIAS_CAL, + 0x01, 0x00); + msleep(20); + snd_soc_component_update_bits(component, + WSA881X_ANA_CTL, 0x03, 0x00); + usleep_range(200, 210); + } + snd_soc_component_update_bits(component, + WSA881X_SPKR_DRV_EN, 0x80, 0x00); + } + return 0; +} + +static int wsa881x_get_boost(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct wsa881x_priv *wsa881x = + snd_soc_component_get_drvdata(component); + + ucontrol->value.integer.value[0] = wsa881x->boost_enable; + return 0; +} + +static int wsa881x_set_boost(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = + snd_soc_kcontrol_component(kcontrol); + struct wsa881x_priv *wsa881x = + snd_soc_component_get_drvdata(component); + int value = ucontrol->value.integer.value[0]; + + wsa881x->boost_enable = value; + return 0; +} + +static const struct snd_kcontrol_new wsa881x_snd_controls[] = { + SOC_SINGLE_EXT("BOOST Switch", SND_SOC_NOPM, 0, 1, 0, + wsa881x_get_boost, wsa881x_set_boost), + + SOC_ENUM_EXT("WSA_SPK PA Gain", wsa881x_spk_pa_gain_enum[0], + wsa881x_spk_pa_gain_get, wsa881x_spk_pa_gain_put), +}; + +static const char * const rdac_text[] = { + "ZERO", "Switch", +}; + +static const struct soc_enum rdac_enum = + SOC_ENUM_SINGLE(SND_SOC_NOPM, 0, ARRAY_SIZE(rdac_text), rdac_text); + +static const struct snd_kcontrol_new rdac_mux[] = { + SOC_DAPM_ENUM("RDAC", rdac_enum) +}; + +static int wsa881x_rdac_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + struct wsa881x_priv *wsa881x = + snd_soc_component_get_drvdata(component); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + wsa881x_clk_ctrl(component, true); + snd_soc_component_update_bits(component, WSA881X_SPKR_DAC_CTL, + 0x02, 0x02); + if (!WSA881X_IS_2_0(wsa881x->version)) + snd_soc_component_update_bits(component, + WSA881X_BIAS_REF_CTRL, + 0x0F, 0x08); + wsa881x_bandgap_ctrl(component, true); + if (!WSA881X_IS_2_0(wsa881x->version)) + snd_soc_component_update_bits(component, + WSA881X_SPKR_BBM_CTL, + 0x02, 0x02); + snd_soc_component_update_bits(component, WSA881X_SPKR_MISC_CTL1, + 0xC0, 0x80); + snd_soc_component_update_bits(component, WSA881X_SPKR_MISC_CTL1, + 0x06, 0x06); + if (!WSA881X_IS_2_0(wsa881x->version)) { + snd_soc_component_update_bits(component, + WSA881X_SPKR_MISC_CTL2, + 0x04, 0x04); + snd_soc_component_update_bits(component, + WSA881X_SPKR_BIAS_INT, + 0x09, 0x09); + } + snd_soc_component_update_bits(component, WSA881X_SPKR_PA_INT, + 0xF0, 0x20); + if (WSA881X_IS_2_0(wsa881x->version)) + snd_soc_component_update_bits(component, + WSA881X_SPKR_PA_INT, + 0x0E, 0x0E); + if (wsa881x->boost_enable) + wsa881x_boost_ctrl(component, true); + break; + case SND_SOC_DAPM_POST_PMU: + wsa881x_rdac_ctrl(component, true); + break; + case SND_SOC_DAPM_PRE_PMD: + wsa881x_rdac_ctrl(component, false); + break; + case SND_SOC_DAPM_POST_PMD: + if (wsa881x->boost_enable) + wsa881x_boost_ctrl(component, false); + wsa881x_clk_ctrl(component, false); + wsa881x_bandgap_ctrl(component, false); + + break; + default: + dev_err(component->dev, "invalid event:%d\n", event); + return -EINVAL; + } + return 0; +} + +static int wsa881x_spkr_pa_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + snd_soc_component_update_bits(component, WSA881X_SPKR_OCP_CTL, + 0xC0, 0x80); + break; + case SND_SOC_DAPM_POST_PMU: + wsa881x_spkr_pa_ctrl(component, true); + break; + case SND_SOC_DAPM_PRE_PMD: + wsa881x_spkr_pa_ctrl(component, false); + break; + case SND_SOC_DAPM_POST_PMD: + snd_soc_component_update_bits(component, WSA881X_SPKR_OCP_CTL, + 0xC0, 0xC0); + break; + default: + dev_err(component->dev, "invalid event:%d\n", event); + return -EINVAL; + } + return 0; +} + +static const struct snd_soc_dapm_widget wsa881x_dapm_widgets[] = { + SND_SOC_DAPM_INPUT("WSA_IN"), + + SND_SOC_DAPM_DAC_E("RDAC Analog", NULL, SND_SOC_NOPM, 0, 0, + wsa881x_rdac_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU | + SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD), + + SND_SOC_DAPM_MUX("WSA_RDAC", SND_SOC_NOPM, 0, 0, + rdac_mux), + + SND_SOC_DAPM_PGA_S("WSA_SPKR PGA", 1, SND_SOC_NOPM, 0, 0, + wsa881x_spkr_pa_event, + SND_SOC_DAPM_PRE_PMU | + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD | + SND_SOC_DAPM_POST_PMD), + + SND_SOC_DAPM_OUTPUT("WSA_SPKR"), +}; + +static const struct snd_soc_dapm_route wsa881x_audio_map[] = { + {"WSA_RDAC", "Switch", "WSA_IN"}, + {"RDAC Analog", NULL, "WSA_RDAC"}, + {"WSA_SPKR PGA", NULL, "RDAC Analog"}, + {"WSA_SPKR", NULL, "WSA_SPKR PGA"}, +}; + +static int wsa881x_probe(struct snd_soc_component *component) +{ + struct wsa881x_priv *wsa881x = snd_soc_component_get_drvdata(component); + + wsa881x->component = component; + wsa881x->spk_pa_gain = SPK_GAIN_12DB; + + return 0; +} + +static const struct snd_soc_dai_ops wsa881x_dai_ops = { + .set_stream = wsa881x_set_stream, + .mute_stream = wsa881x_digital_mute, + .mute_unmute_on_trigger = false, +}; + +static const struct snd_soc_component_driver soc_codec_dev_wsa881x = { + .probe = wsa881x_probe, + .read = wsa881x_i2c_read, + .write = wsa881x_i2c_write, + .controls = wsa881x_snd_controls, + .num_controls = ARRAY_SIZE(wsa881x_snd_controls), + .dapm_widgets = wsa881x_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(wsa881x_dapm_widgets), + .dapm_routes = wsa881x_audio_map, + .num_dapm_routes = ARRAY_SIZE(wsa881x_audio_map), +}; + +static const struct snd_soc_dai_driver wsa_dai[] = { + { + .name = "wsa_rx0", + .id = 0, + .playback = { + .stream_name = "", + .rates = WSA881X_RATES | WSA881X_FRAC_RATES, + .formats = WSA881X_FORMATS, + .rate_max = 384000, + .rate_min = 8000, + .channels_min = 1, + .channels_max = 1, + }, + .ops = &wsa881x_dai_ops, + }, +}; + +static int check_wsa881x_presence(struct wsa881x_priv *wsa881x) +{ + struct i2c_client *client = wsa881x->client[DIGITAL]; + int ret; + + ret = wsa881x_i2c_read_device(wsa881x, WSA881X_CDC_RST_CTL); + if (ret < 0) { + dev_err(&client->dev, "failed to read from addr=%x\n", + client->addr); + return ret; + } + + ret = wsa881x_i2c_write_device(wsa881x, WSA881X_CDC_RST_CTL, 0x01); + if (ret < 0) { + dev_err(&client->dev, "failed write addr=%x reg:0x5 val:0x1\n", + client->addr); + return ret; + } + + /* allow 20ms before trigger next write to verify wsa881x presence */ + msleep(20); + ret = wsa881x_i2c_write_device(wsa881x, WSA881X_CDC_RST_CTL, 0x00); + if (ret < 0) { + dev_err(&client->dev, "failed write addr=%x reg:0x5 val:0x0\n", + client->addr); + return ret; + } + return ret; +} + +static int wsa881x_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct wsa881x_priv *wsa881x; + int leftright; + int ret; + + ret = wsa881x_probe_common(&wsa881x, dev); + if (ret) + return ret; + + wsa881x->mclk_pin = devm_gpiod_get(dev, "mclk", + GPIOD_FLAGS_BIT_NONEXCLUSIVE); + if (IS_ERR(wsa881x->mclk_pin)) + dev_err_probe(dev, PTR_ERR(wsa881x->mclk_pin), + "MCLK GPIO not found\n"); + + wsa881x->wsa_mclk = devm_clk_get_enabled(&client->dev, NULL); + if (IS_ERR(wsa881x->wsa_mclk)) + return dev_err_probe(dev, PTR_ERR(wsa881x->wsa_mclk), + "failed to get mclk\n"); + gpiod_direction_output(wsa881x->mclk_pin, 1); + clk_set_rate(wsa881x->wsa_mclk, 9600000); + + wsa881x->client[DIGITAL] = client; + ret = check_wsa881x_presence(wsa881x); + if (ret < 0) { + dev_err(&client->dev, + "failed to ping wsa with addr:%x, ret = %d\n", + client->addr, ret); + return -ENODEV; + } + + wsa881x->regmap = devm_regmap_init_i2c(client, + &wsa881x_ana_regmap_config[DIGITAL]); + if (IS_ERR(wsa881x->regmap)) { + dev_err(dev, "digital regmap init failed %d\n", ret); + return PTR_ERR(wsa881x->regmap); + } + regcache_cache_bypass(wsa881x->regmap, true); + + wsa881x_init_common(wsa881x); + + wsa881x->version = wsa881x_i2c_read_device(wsa881x, WSA881X_CHIP_ID1); + if (wsa881x->version == WSA881X_2_0) { + wsa881x_update_reg_defaults_2_0(); + wsa881x_update_regmap_2_0(wsa881x->regmap, DIGITAL); + } + + /* + * If we reached this point, then device is present and we're good to + * go to initialise analog part of the amplifier + */ + wsa881x->client[ANALOG] = devm_i2c_new_dummy_device(&client->dev, + client->adapter, + client->addr + I2C_ANALOG_OFFSET); + if (IS_ERR(wsa881x->client[ANALOG])) { + dev_err(dev, + "failed to register i2c device for analog part\n"); + return PTR_ERR(wsa881x->client[ANALOG]); + } + + wsa881x->regmap_analog = devm_regmap_init_i2c(wsa881x->client[ANALOG], + &wsa881x_ana_regmap_config[ANALOG]); + if (IS_ERR(wsa881x->regmap_analog)) { + dev_err(dev, "analog regmap init failed %d\n", ret); + return PTR_ERR(wsa881x->regmap_analog); + } + regcache_cache_bypass(wsa881x->regmap_analog, true); + + wsa881x->client[ANALOG]->dev.platform_data = wsa881x; + i2c_set_clientdata(wsa881x->client[ANALOG], wsa881x); + wsa881x->regmap_flag = true; + + if (wsa881x->version == WSA881X_2_0) + wsa881x_update_regmap_2_0(wsa881x->regmap_analog, ANALOG); + /* finished initialising analog part */ + + leftright = wsa881x_i2c_read_device(wsa881x, WSA881X_BUS_ID) & 0x1; + + wsa881x->driver = devm_kmemdup(dev, &soc_codec_dev_wsa881x, + sizeof(*wsa881x->driver), GFP_KERNEL); + if (!wsa881x->driver) + return -ENOMEM; + + wsa881x->dai_driver = devm_kmemdup(dev, wsa_dai, + sizeof(struct snd_soc_dai_driver), + GFP_KERNEL); + if (!wsa881x->dai_driver) + return -ENOMEM; + + wsa881x->driver->name = devm_kasprintf(dev, GFP_KERNEL, "wsa-codec%d", + leftright); + if (!wsa881x->driver->name) + return -ENOMEM; + + wsa881x->dai_driver->name = devm_kasprintf(dev, GFP_KERNEL, + "wsa_rx%d", leftright); + if (!wsa881x->dai_driver->name) + return -ENOMEM; + + wsa881x->dai_driver->playback.stream_name = devm_kasprintf(dev, + GFP_KERNEL, "WSA881X_AIF%d Playback", + leftright); + if (!wsa881x->dai_driver->playback.stream_name) + return -ENOMEM; + + pm_runtime_set_autosuspend_delay(dev, 3000); + pm_runtime_use_autosuspend(dev); + pm_runtime_mark_last_busy(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + return devm_snd_soc_register_component(dev, + wsa881x->driver, + wsa881x->dai_driver, + ARRAY_SIZE(wsa_dai)); +} + +static int __maybe_unused wsa881x_i2c_suspend(struct device *dev) +{ + struct wsa881x_priv *wsa881x = dev_get_drvdata(dev); + + clk_disable_unprepare(wsa881x->wsa_mclk); + + gpiod_direction_output(wsa881x->sd_n, wsa881x->sd_n_val); + + return 0; +} + +static int __maybe_unused wsa881x_i2c_resume(struct device *dev) +{ + struct wsa881x_priv *wsa881x = dev_get_drvdata(dev); + int ret; + + gpiod_direction_output(wsa881x->sd_n, !wsa881x->sd_n_val); + + gpiod_direction_output(wsa881x->mclk_pin, 1); + ret = clk_prepare_enable(wsa881x->wsa_mclk); + if (ret) { + dev_err(wsa881x->dev, "mclk enable failed\n"); + return ret; + } + + wsa881x_init_common(wsa881x); + + return 0; +} + +static const struct dev_pm_ops wsa881x_i2c_pm_ops = { + SET_RUNTIME_PM_OPS(wsa881x_i2c_suspend, wsa881x_i2c_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(wsa881x_i2c_suspend, wsa881x_i2c_resume) +}; + +static const struct i2c_device_id wsa881x_i2c_id[] = { + {"qcom,wsa8810"}, + {"qcom,wsa8815"}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, wsa881x_i2c_id); + +static const struct of_device_id wsa881x_i2c_driver_table[] = { + {.compatible = "qcom,wsa8815"}, + {} +}; +MODULE_DEVICE_TABLE(of, wsa881x_i2c_driver_table); + +static struct i2c_driver wsa881x_i2c_driver = { + .driver = { + .name = "wsa881x-i2c-codec", + .pm = &wsa881x_i2c_pm_ops, + .of_match_table = wsa881x_i2c_driver_table, + }, + .id_table = wsa881x_i2c_id, + .probe = wsa881x_i2c_probe, +}; + +module_i2c_driver(wsa881x_i2c_driver); +MODULE_DESCRIPTION("WSA881x Codec driver for Analog mode"); +MODULE_LICENSE("GPL"); From patchwork Thu Dec 12 00:47:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 850461 Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DEFE617E016 for ; Thu, 12 Dec 2024 00:47:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964478; cv=none; b=rvGDap9MVfntZ7lzHUsI8uTqR1UHqCjJmZ5nMCmxZJnSE79HUCTtM7KUFYdadwra0yEFGjqsYRxOaako6Ak/10t/x+cATvOsAqRtyH02wlh/cmwG3XgmjM1L+94SAlXpWXwzXokQmLR1u747GQTcqP6o7/JmBTiTvoP9wRgRdg0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964478; c=relaxed/simple; bh=G01gKfVugkgLOj1qCnYDaqgYbwrnec4EMd+74eUtQZE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DiWKPp4+2Ib79snLtez6S1j2DQaSwIN3rT5Z/JknzB6XVX32DaVbm/H7h0HVniHxzWN3Bwe6//hV4FEpSqsYFf8hPq0Ds7Nb/IQcudDNo7GOOm0ov2HL1xgoeVQz4JVYL4FQseExlnPeSkehNQh3hjvFZ8eEKHpVTpO0KgCDPc4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=EFvlN1Ux; arc=none smtp.client-ip=209.85.128.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="EFvlN1Ux" Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-434f80457a4so7371985e9.0 for ; Wed, 11 Dec 2024 16:47:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964474; x=1734569274; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=z3lzZAY2al4gjffBF7O/Qr3GavkSOo8mFCJbq43caK0=; b=EFvlN1UxMWLmJ/pdEbgX8J+gALwlb5avIysoM85JCj1/yWAJm0rk1kldeEauwuxZ2d 76knmtwejDFD4kl17Zd1Tv8JAu50pO9s75W+SnZy2eRtpufDk6zRlDSJBxmrOjEqjxyj eeuYeG30W9fo+Kr/jDmNdLwCVzdcA1hfY0X7IcW7Cep0i1tco7Dnu8rhY5SgQcIu3Fre jD6UVgZrxdyaNU60FsZvacJ3gqqQwcoCQkpCce3TmQDOqRgefAyk1ljiakfjvOoD8doH JKGUfmutvbUMdY3l3JCiFSFyIJH77jvfxBsbC3WixWFSCobZILVBD17aUQzes1Jy+Cl/ AicQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964474; x=1734569274; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=z3lzZAY2al4gjffBF7O/Qr3GavkSOo8mFCJbq43caK0=; b=YgcbWtyCTsS/WlHT1Ba+G75v8gn0q7JkblTvSAWRdVzWDrZRZortXwaskN8QC55iJZ a7YSY9jjTkmK+/pRRNdvFg96voDEERxTzbuPpzm0Q+kAcJN2DmK55arXkCQ42ANUiAfH asFXh40wrn/GdZoOcky/tBnaeyuXGKxtSpjarWHv2UEPely+e6yQA2+DADLMho1rZcx4 uznyV8v0fEmXrlI4R97t8okUfhWeQXHzjwgrIQILQJhwKRCrpf4p+eRSR7UHo22ilhCk Yy62sETHahAymtjW0nd7zMsJLRHB4N+U5WLK4XUtZG6BjTJbTg5N11BGndiV+sXppq/b qZxg== X-Forwarded-Encrypted: i=1; AJvYcCU/faPCNKow03Viq1TRFhp567RdoS/s5kwNN/o0cFz0rm7La1KcupmkKvpXNLdks4oC+MtC5iHjVx3QlguU@vger.kernel.org X-Gm-Message-State: AOJu0YwxUknLCntTSclIMSmYk2olKHs+naIyploXY0PxAQK1DIygCH8z TfxPbR3eT5YMt1wjP+zWItbjlc6TMsEp4ml43dC/uu9FXppgG6rvRHeyw3eLZ7o= X-Gm-Gg: ASbGncuftJWS3dTxd0T/qARD0jrXIpozSRvimyk/gFFu+vUBX5JvU/rCOqECg4vHJ+U 5MZSyBdLxbjITrCWDvKDrySo2nJOlarb2yC5u9l/nY/AISDkMTSyCdlf+hU+zDCoPTsbYvdLAHw /q++qT6VP5Ue3uUz6WH2sCk4baZKn5ebvD1xrvEHfBi1j/WGQFtneX9j9qtuEPJdn21qtjNLExf cjARG67qieCfNYEPPYkqY6ZG8qKvWsjmDKaZc1W/1/CMn6E6FaFw4jTUZkWnvPVLQeSBZ0g X-Google-Smtp-Source: AGHT+IHfxJlBFyDrHmrHUAJImrACZdzTClOYSJj355MVm/7aogrPRx+Wl/aqNqwSqrWJeBi5Ylx+kw== X-Received: by 2002:a5d:6f04:0:b0:386:4a2c:3908 with SMTP id ffacd0b85a97d-38788808b00mr869294f8f.17.1733964474344; Wed, 11 Dec 2024 16:47:54 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:53 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 12/14] arm64: dts: qcom: qrb4210-rb2: add WSA audio playback support Date: Thu, 12 Dec 2024 00:47:25 +0000 Message-ID: <20241212004727.2903846-13-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add support for audio playback via WCD937X/WSA881X. From DSP and rxmacro the sound stream goes into AUX port of wcd codec. wcd codec decodes digital audio into analog and outputs it to single wsa amplifier hence only the mono configuration. The audio playback is verified using the following commands: amixer -c0 cset iface=MIXER,name='AUX_RDAC Switch' 1 amixer -c0 cset iface=MIXER,name='RX_RX2 Digital Volume' 80 amixer -c0 cset iface=MIXER,name='RX INT2_1 MIX1 INP0' 'RX2' amixer -c0 cset iface=MIXER,name='RX_CODEC_DMA_RX_1 Audio Mixer MultiMedia1' 1 amixer -c0 cset iface=MIXER,name='RX_MACRO RX2 MUX' 'AIF2_PB' amixer -c0 cset iface=MIXER,name='SpkrMono WSA_RDAC' 1 amixer -c0 cset iface=MIXER,name='LO Switch' 1 amixer -c0 cset iface=MIXER,name='RX HPH Mode' 4 aplay -D hw:0,0 /usr/share/sounds/alsa/Front_Center.wav Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts index 827ce5f7adfb..34ba563d0d07 100644 --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts @@ -111,7 +111,9 @@ sound { pinctrl-0 = <&lpi_i2s2_active>; pinctrl-names = "default"; model = "Qualcomm-RB2-WSA8815-Speakers-DMIC0"; - audio-routing = "MM_DL1", "MultiMedia1 Playback", + audio-routing = "IN3_AUX", "AUX_OUT", + "SpkrMono WSA_IN", "AUX", + "MM_DL1", "MultiMedia1 Playback", "MM_DL2", "MultiMedia2 Playback"; mm1-dai-link { @@ -145,6 +147,22 @@ codec { sound-dai = <<9611_codec 0>; }; }; + + wsa-dai-link { + link-name = "WSA Playback"; + + cpu { + sound-dai = <&q6afedai RX_CODEC_DMA_RX_1>; + }; + + platform { + sound-dai = <&q6routing>; + }; + + codec { + sound-dai = <&wsa881x>, <&wcd937x 0>, <&swr1 3>, <&rxmacro 1>; + }; + }; }; wcd937x: codec { From patchwork Thu Dec 12 00:47:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 850460 Received: from mail-wr1-f44.google.com (mail-wr1-f44.google.com [209.85.221.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B7C0185923 for ; Thu, 12 Dec 2024 00:47:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964479; cv=none; b=B9d1xpHH811LrO3OhmU8erQ4MHJ5YKkZNMwkVJxasYTtrTNnF0CG2NtrVbA69xzHQjTY2501F4KOSkb26FZNmjlbhOpPmvAsIYiN/Wlxe8jeI2KS+36gsNmFpMIJj6EUuE8kmxKc3bKO4MxdW5uT2MH6ODl8U12dIllHNfoGGa8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964479; c=relaxed/simple; bh=+qZJpWbsefzjYMujqUXhoz/g918GZzo/W+6ECps7Yyc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=b8BTPiMYK5wL56bB7gzR4TSs8N7DjieT8E3+NyFMyZmzdUyqOm0k/iLa5t69tzmwSbrRZY3/kaUhjcbYA3SHs5EqOn6sqMgLz0eKZdXN5c3C1WOBLt7GEIEOZWs64v0P9jZ6fmAr0UeLl9A3wAJ2Ff5PXh4Rl5kF7QPLrKb49y8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=s4t6s1Nk; arc=none smtp.client-ip=209.85.221.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="s4t6s1Nk" Received: by mail-wr1-f44.google.com with SMTP id ffacd0b85a97d-385d7b4da2bso18102f8f.1 for ; Wed, 11 Dec 2024 16:47:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964476; x=1734569276; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=We4dCFru12PZhRdi+XGfgBYzTvC/KMY3TA37oXXagX8=; b=s4t6s1NkRb5oOeGlLmEFg0U7uGnIwNzK22C0lRJ50OwP/THpZ/ns/nGlJK5wqgU8y2 UaUVC+JDDPIM3PB0+7+/9mNoRk1Z64q1rrlKjGgu62g9DJh2pEAouqgmfLKwyMS+p4hA qGeid48QTbZHdokN7L0yVlQFoQDnAZRf3y5J8nwFu4wsy4nWxQuaeye2TYfIhlKd6sZX vGVbDi7vpt5bV05ad8snqZXR0wFhDp25ZdDt5FuUbpoIljsUw87oVwxaeWuL+Gv03ZMj NUdwxCYEH6guHNHc7Ls+r9Y5Cpf3mXD+wDu1nTnwcvcW9vePFvMpMM+bw9EL9gkdVR0l S4bA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964476; x=1734569276; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=We4dCFru12PZhRdi+XGfgBYzTvC/KMY3TA37oXXagX8=; b=u4CBvPYTtAUkU4QAgXGE2fVcoR6H0hwjeQmGVXs+dkBPOMaKK2ZEjxDzErifIQCv8u 49dwdR75dZrBDl6YAILGhCntbinukKZw6/FuVRym275xTBtfRqB8qqdnZ2UbqeWwYoHw /nwuFZ7OSpSZYlDP83kSoHvEplkK2gLAe8nFPJXvI7b1O9C0slx/+IiLvMJEmncw4WFg YH45uNdhT5elCEzEceRzi4jiTjj2Kuj+sM1udKbSAHhrv5wb1Bcmv/rV4ROd0a5IPgAI mBbscIp6nw/OJ8KxAKJG3UnrdKKWb8FUMthRehCUyEz0XfudrI/VHExk9vm8qiZ/icrG Gb0Q== X-Forwarded-Encrypted: i=1; AJvYcCULE7GRCPSt0pAyFgOkJKg16yY21kxV1aYclfgQtErQ7jR+d72f8NmB3HXXxQmX4cC6MFuZT5bkHonUImOs@vger.kernel.org X-Gm-Message-State: AOJu0YwmYxY0rQDGonflhOncVyn/5cieN1TGGoz8o+o/AHlNvaq+k2A/ DPRyYRUYt2gzrRCBq7LzMk6wkgldss6IqoQDLVY1SFTXKn3JSpvpI02mxEEKNeE= X-Gm-Gg: ASbGncsvacgXGMYIOo9aDreWtFI84aIk6qB52CHv3tIrMjupY6xOQHFZmu0Jtri1EaN HAx9Y/fNscwGVaika9P7vnrM6Ol35GAREuZ/kxQH4WIH+3Wgi7rvmjDbk88Yf7WiXuhqFbRg53L VisKQIvXe4ZXC+9JR2XjLRriCl+wHSqYxtBtlg2Cj+vTib6ZphszWRBTXtppoBFUm7Ejov+lWbU km7Qi6fznt40O8CpoVgwN6Uuw6ifoH9mn62nj76FHm27EZcTOjqF4JeXCMqnmmdZtL28n9N X-Google-Smtp-Source: AGHT+IF8s8iPYKfTOUiE9XO1Gdow8KyJ8funy7efvpCgoqXHZtBpV46L9p6MtcxIFwCoVR2JiBVvug== X-Received: by 2002:a5d:5886:0:b0:385:ef2f:9278 with SMTP id ffacd0b85a97d-3864ce86941mr4710014f8f.2.1733964475832; Wed, 11 Dec 2024 16:47:55 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:55 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 13/14] arm64: dts: qcom: qrb4210-rb2: add VA capture support Date: Thu, 12 Dec 2024 00:47:26 +0000 Message-ID: <20241212004727.2903846-14-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add support for audio capture using onboard DMIC. It is directly connected to vamacro and txmacro without any soundwire interfaces. The capture was verified using the following commands: amixer -c0 cset iface=MIXER,name='MultiMedia3 Mixer VA_CODEC_DMA_TX_0' 1 amixer -c0 cset iface=MIXER,name='VA_AIF1_CAP Mixer DEC0' 1 amixer -c0 cset iface=MIXER,name='VA_DEC0 Volume' 110 amixer -c0 cset iface=MIXER,name='VA DMIC MUX0' 2 arecord -D hw:0,2 -f S16_LE -c 2 -r 48000 -d 5 record.wav Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 33 +++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts index 34ba563d0d07..0b096bae74cb 100644 --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts @@ -114,7 +114,8 @@ sound { audio-routing = "IN3_AUX", "AUX_OUT", "SpkrMono WSA_IN", "AUX", "MM_DL1", "MultiMedia1 Playback", - "MM_DL2", "MultiMedia2 Playback"; + "MM_DL2", "MultiMedia2 Playback", + "MultiMedia3 Capture", "MM_UL3"; mm1-dai-link { link-name = "MultiMedia1"; @@ -132,6 +133,14 @@ cpu { }; }; + mm3-dai-link { + link-name = "MultiMedia3"; + + cpu { + sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; + }; + }; + hdmi-i2s-dai-link { link-name = "HDMI/I2S Playback"; @@ -163,6 +172,22 @@ codec { sound-dai = <&wsa881x>, <&wcd937x 0>, <&swr1 3>, <&rxmacro 1>; }; }; + + va-dai-link { + link-name = "VA Capture"; + + cpu { + sound-dai = <&q6afedai VA_CODEC_DMA_TX_0>; + }; + + platform { + sound-dai = <&q6routing>; + }; + + codec { + sound-dai = <&vamacro 0>; + }; + }; }; wcd937x: codec { @@ -827,6 +852,12 @@ &usb_qmpphy_out { remote-endpoint = <&pmi632_ss_in>; }; +&vamacro { + pinctrl-0 = <&lpass_dmic01_active>; + pinctrl-names = "default"; + qcom,dmic-sample-rate = <2400000>; +}; + &wifi { vdd-0.8-cx-mx-supply = <&vreg_l8a_0p664>; vdd-1.8-xo-supply = <&vreg_l16a_1p3>; From patchwork Thu Dec 12 00:47:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Klimov X-Patchwork-Id: 849817 Received: from mail-wr1-f41.google.com (mail-wr1-f41.google.com [209.85.221.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C02118871D for ; Thu, 12 Dec 2024 00:47:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964481; cv=none; b=jFj9HSzmj8ySutEsnxc0wad3ZLNOkuG9m/3bM0E35HLmcMAAYSWKaS4o7Ud/JgCYDY1okD/5rzAgYhgyQgTdQwtYiIoWezHm05+BPtkxbNOHpz6wyN3vDcFmM2NoUaq/1GDefE7Yb7VLwkggrPdP3inloO3tRwc3oFS4N1OwzSc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733964481; c=relaxed/simple; bh=QzuIeMsbqn06WI5qhPV1wr/oyc12cKZ+XBOtXN5CYbk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Oa7QQJ391tG/EDle3CLozGGEuygblzK/WSxzpmr814cdUNzgj21SnQj5/Le0QpNu/IZLzEt3M5k+rJr4lCPkJFN9Z26NBqUvt8DFG+Iy/jDp3oe9ygKcl3kX7IhrBUpLdYR1UCP2BNKXW4JksgoFSg6dQUxUhxA2ZtfhgtT3gHo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Cf0yDtv6; arc=none smtp.client-ip=209.85.221.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Cf0yDtv6" Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-385df53e559so15308f8f.3 for ; Wed, 11 Dec 2024 16:47:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733964478; x=1734569278; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8YUv9wXf1xeMulszUqTOEITp7UUlDCUgSWoOEuWnA1U=; b=Cf0yDtv61ODSF0SdIoYHtgfcMmCSDWWtc/iE3ul6sPR6qU4XVCOI3tDDXgvhgF6SQG n10ix4qfFx+qAvU4XHjm3zpvwLR9N/FqS1MsByQMCwwz4N1aKH6C81c66QDnQv9FKze/ cjfo+YgZsKg3mzhObTqbx8tYbOwDFY/2kRS7mvQQvA+RpeEyHujBB8AOuM88t661GzAu JiUZwBW31X2g0Zfv7rZHUxRGz3QDWTPI51FZbn1uOM62LY+zWaFOKfRrr8wwtcLcTTIj jS6plzepqGM15KRz3j9Vl4F4oyslsOCBZji7jeqx2SGjL0pF1qGg39EDnkTzHXwlYqY2 kPHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733964478; x=1734569278; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8YUv9wXf1xeMulszUqTOEITp7UUlDCUgSWoOEuWnA1U=; b=Yot+jHgBWmTQhF/fSSeDWRh09T3VPHdTXm2NB0HY6CPFSIScjAQUHIlsX+YueeRzT5 2SxHLWvkcPY5GImCdYpsg/+bSuKtuFq69ymzVBT3xQQroJ77wHsbSJE/QkowODyVpv5U SvDXNGGv14j4nEE4AnSm0oyzdZWUcCXZ2DFhUuCrcKDJM/df++atiVvjIzPiTU7/o1d2 uukO7Xw3COTpNEF+i0pO+lnef3NQNC4SSVlMSicVxmL6pQ5pcxAxZfz2hwwpcawF0h56 l9LZrROUUdcl6Qr/iwjpYPAYW30agIftaRNu8WosOAKN23i7jttJbd/INowbw07WIMHP bqyQ== X-Forwarded-Encrypted: i=1; AJvYcCXn8BXPcnzwySeXPxmMZyp90bMPjMZmBlK3HczTBbk7eBwssudODyeWd2bLuz55ckyA5/UZlH4WZlAEFu7M@vger.kernel.org X-Gm-Message-State: AOJu0YwZlc3Qy+eNua7fnaPxAYMcMmALQpX3Hujub6b0IcWmg5spP1m5 fXyJtz6O+x6JxgctM1EzSD2Dj3+Ps/vujq8x+ZCu+6YdnCjkW5UFsPK6lEDbms4= X-Gm-Gg: ASbGncuEw/VwJfn/mRVLqOQOtKg9cDtDtB3KPvovsiPefbm4KHHAPbBDQvOtEv8Vedu NF7oO2zlk3SyQ7lT2dCEu5bJJ1dJVxVBGSlN0AlUdnCSMiAhy78EtUnfKvXk12Aj9NiJLuWMVWi W4UTbthpscexRg1nz3Gj0mzihNPH51t3Qoyoqg14Zw0jkgf7pimGmyHyllMYPzZluTQPBbbCfKj H5Klo+zJVXFaC4LJW0bTzsEl/c1sqgeXiq/wBq36aLOWwhiYwGL68AexbNo1fsDURHqNq+E X-Google-Smtp-Source: AGHT+IGJvDlNsdYx4DutxMjQy1pOyYpJ0oJ3EbMe3FkPnkQ/U4TLzzGqGgOOv0KPDA2qNTcXJbpfuQ== X-Received: by 2002:a5d:6f1e:0:b0:385:ea11:dd92 with SMTP id ffacd0b85a97d-3878768e6a0mr1224692f8f.15.1733964477946; Wed, 11 Dec 2024 16:47:57 -0800 (PST) Received: from localhost.localdomain ([2.222.231.247]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-387824a4ef4sm2459660f8f.39.2024.12.11.16.47.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2024 16:47:56 -0800 (PST) From: Alexey Klimov To: broonie@kernel.org, konradybcio@kernel.org, konrad.dybcio@oss.qualcomm.com, andersson@kernel.org, srinivas.kandagatla@linaro.org Cc: tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dmitry.baryshkov@linaro.org, linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 14/14] ASoC: qcom: sm8250: force single channel via RX_1 output for qrb4210 Date: Thu, 12 Dec 2024 00:47:27 +0000 Message-ID: <20241212004727.2903846-15-alexey.klimov@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212004727.2903846-1-alexey.klimov@linaro.org> References: <20241212004727.2903846-1-alexey.klimov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In case of mono configurations we need to enforce single channel output. This is required for audio playback on QRB4210 RB2 board since it has only one WSA8815 amplifier. Implement data variant for qrb4210-rb2-sndcard with sm8250_qrb4210_fixup_params() that does that. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- sound/soc/qcom/sm8250.c | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/sound/soc/qcom/sm8250.c b/sound/soc/qcom/sm8250.c index 45e0c33fc3f3..b54acaee8dd1 100644 --- a/sound/soc/qcom/sm8250.c +++ b/sound/soc/qcom/sm8250.c @@ -23,8 +23,23 @@ struct sm8250_snd_data { struct sdw_stream_runtime *sruntime[AFE_PORT_MAX]; struct snd_soc_jack jack; bool jack_setup; + void (*sndcard_fixup_params)(struct snd_interval *channels, + struct snd_soc_dai *cpu_dai); }; +static void sm8250_qrb4210_fixup_params(struct snd_interval *channels, + struct snd_soc_dai *cpu_dai) +{ + /* QRB410 RB2 board has only one WSA8815 amplifier */ + switch (cpu_dai->id) { + case RX_CODEC_DMA_RX_1: + channels->min = channels->max = 1; + break; + default: + break; + } +} + static int sm8250_snd_init(struct snd_soc_pcm_runtime *rtd) { struct sm8250_snd_data *data = snd_soc_card_get_drvdata(rtd->card); @@ -35,14 +50,19 @@ static int sm8250_snd_init(struct snd_soc_pcm_runtime *rtd) static int sm8250_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, struct snd_pcm_hw_params *params) { + struct sm8250_snd_data *data = snd_soc_card_get_drvdata(rtd->card); struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); + struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0); rate->min = rate->max = 48000; channels->min = channels->max = 2; + if (data->sndcard_fixup_params) + data->sndcard_fixup_params(channels, cpu_dai); + return 0; } @@ -168,6 +188,7 @@ static int sm8250_platform_probe(struct platform_device *pdev) if (!data) return -ENOMEM; + data->sndcard_fixup_params = device_get_match_data(&pdev->dev); card->dev = dev; dev_set_drvdata(dev, card); snd_soc_card_set_drvdata(card, data); @@ -181,9 +202,10 @@ static int sm8250_platform_probe(struct platform_device *pdev) } static const struct of_device_id snd_sm8250_dt_match[] = { - {.compatible = "qcom,sm8250-sndcard"}, - {.compatible = "qcom,qrb4210-rb2-sndcard"}, - {.compatible = "qcom,qrb5165-rb5-sndcard"}, + {.compatible = "qcom,sm8250-sndcard", .data = NULL }, + {.compatible = "qcom,qrb4210-rb2-sndcard", + .data = sm8250_qrb4210_fixup_params }, + {.compatible = "qcom,qrb5165-rb5-sndcard", .data = NULL }, {} };