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[2001:14ba:a0c3:3a00::782]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54223832c1bsm4261655e87.280.2025.01.03.22.19.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Jan 2025 22:19:18 -0800 (PST) From: Dmitry Baryshkov Date: Sat, 04 Jan 2025 08:19:12 +0200 Subject: [PATCH v3 1/5] nvmem: core: fix bit offsets of more than one byte Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250104-sar2130p-nvmem-v3-1-a94e0b7de2fa@linaro.org> References: <20250104-sar2130p-nvmem-v3-0-a94e0b7de2fa@linaro.org> In-Reply-To: <20250104-sar2130p-nvmem-v3-0-a94e0b7de2fa@linaro.org> To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Akhil P Oommen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2179; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=DP/l7Yoeg48ucLXReCMjDDAHTnXmcOLfOXPpLm9/mx4=; b=owEBbQKS/ZANAwAKARTbcu2+gGW4AcsmYgBneNLgMTBJCitDFHxA6inhG5B42VbEEbUZNj++6 XYj8kLDWTGJAjMEAAEKAB0WIQRdB85SOKWMgfgVe+4U23LtvoBluAUCZ3jS4AAKCRAU23LtvoBl uIo6D/9n2sALObvT7aq5loDvxyEKB1E+9JUzHPf84QwE7EUDospcOxH+mE66SauSJcpDHdkBg8P B3GZ8errhtXYeYYn+Lq8hgmyJ1f8k9Q508hLG73C8DU3n7/ebN81hbhdmeJhVAMIXcuF3NUczt9 5MeKcl7502oWP6+5zzaT2I6W2ylAM4rV4Pow6yGMWn94dxLVURxFudsxwMxt4Cz96oRhniBxXm1 q4y+WHVpPUJTwU2DMNmG2qBM2nBtApAqqhZX4JwNM4JWZASDSa2RerCTB0RZwPRX7j3JRKouHkR okOiCOJp7u6nys6oZKgYDKsTd1LJ46Oa+OIMlrlyINlLSUKiMC0TLBthoi0MIRkdsR4D2C744qT Nwe9s/9T4RM/5gM4q5yMkNz+NvGxq37a2txA5TKhookgEYn8kIMCvz/P/tj8xMKg34NFudHGeSm 25M6NZ2wJ/5LmosQx//Ch4FqyUxaxuKx3BcQ+2ZMvQcbho30ACLRgQ0/qoQQTcBEUKZ85lULuEY P4TORncL+erYKeBex1iNB37Cdjo0FjcRLJ0LvTdwm15kZi1RhQTXEwNIl5WT404VmEKGHM+8ikQ 98oTKw+8DkOcL7epaD30hqpf9o+WU6C5e2t1dTwewA0k2HgrUcp+VCVHOzLnsgogqOvFdQc1Ivt xlh8b4m1DDTj9FA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A If the NVMEM specifies a stride to access data, reading particular cell might require bit offset that is bigger than one byte. Rework NVMEM core code to support bit offsets of more than 8 bits. Signed-off-by: Dmitry Baryshkov --- drivers/nvmem/core.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index d6494dfc20a7324bde6415776dcabbb0bfdd334b..c0af43a37195c3869507a203b370615309aeee67 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -834,7 +834,9 @@ static int nvmem_add_cells_from_dt(struct nvmem_device *nvmem, struct device_nod if (addr && len == (2 * sizeof(u32))) { info.bit_offset = be32_to_cpup(addr++); info.nbits = be32_to_cpup(addr); - if (info.bit_offset >= BITS_PER_BYTE || info.nbits < 1) { + if (info.bit_offset >= BITS_PER_BYTE * info.bytes || + info.nbits < 1 || + info.bit_offset + info.nbits >= BITS_PER_BYTE * info.bytes) { dev_err(dev, "nvmem: invalid bits on %pOF\n", child); of_node_put(child); return -EINVAL; @@ -1627,21 +1629,29 @@ EXPORT_SYMBOL_GPL(nvmem_cell_put); static void nvmem_shift_read_buffer_in_place(struct nvmem_cell_entry *cell, void *buf) { u8 *p, *b; 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[2001:14ba:a0c3:3a00::782]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54223832c1bsm4261655e87.280.2025.01.03.22.19.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Jan 2025 22:19:20 -0800 (PST) From: Dmitry Baryshkov Date: Sat, 04 Jan 2025 08:19:13 +0200 Subject: [PATCH v3 2/5] nvmem: core: verify cell's raw_len Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250104-sar2130p-nvmem-v3-2-a94e0b7de2fa@linaro.org> References: <20250104-sar2130p-nvmem-v3-0-a94e0b7de2fa@linaro.org> In-Reply-To: <20250104-sar2130p-nvmem-v3-0-a94e0b7de2fa@linaro.org> To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Akhil P Oommen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=930; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=bMUpv3/FTqnMwV5u9s/COuv1xw/6j5RQN2haBUShGuQ=; b=owEBbQKS/ZANAwAKARTbcu2+gGW4AcsmYgBneNLhNpEaoF5/Nu4xiwe+9PdqReWSOtYGSpP6l XXWZDC+fmiJAjMEAAEKAB0WIQRdB85SOKWMgfgVe+4U23LtvoBluAUCZ3jS4QAKCRAU23LtvoBl uBaaEACz+dBHD0fxgsvnk2YlNABSiPbK8CM0Y4w+Jnl0u2d3HZDzeeWqFpbE3CIkh3ddqXrVCNm RZRk+ew2A0cMQu7YqoL4LOJOekVeTPaBjwFetRYDkAxwpUeza4PNC1exBhtbUOwm8vd8Qt3I2oh SHUxSRGCQzBkVpaEdriCCZNFCNEbmmGKfteuyHXkqc1ahCg/Shspib9Syrxt2xOxdu9f4rFDOBl 1DUuiaA4BBgDub/ajxrvqmw3UvWxBLyiLIEnAMX5XMmEY99tynDU39JXQvPGW/hJN868xPV/uY6 bYN5tdXKmXt/lWzbc0B+mnuvnzLYA+IqUkt85EGYOAaJLcXJb+12/Bht4Zp5PuXYjaU9fBP8wPt 6ygwrY4v5IJ5cul21nEOuu9Nsxo7pFO1uL2sIRYw8YgZoFU9+U9Qu3OH8G71jOKpU2NT4Vyp0an vymYLKImJoBUouukIUIYtZkmFwRJkM0E8cfkPKrpd9XwZehTAdyV7PRuhzUIJSDQgIHPF+LC9Qz 3HpzbWjGi2iNv5PsI15JelppbYVaf7VJVKe9+MWz21quq1Q4bF7sUTfJn2f7fNaU09CVRSAhXik j23xQ5FCI2wjg56n9riI8EMdqjhHpp1MGN36pWPUiA+K723Hr4kQ+HtSYBPYVBlFp8+keDp6CvX CESGjJFTn0H9g2w== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Check that the NVMEM cell's raw_len is a aligned to word_size. Otherwise Otherwise drivers might face incomplete read while accessing the last part of the NVMEM cell. Signed-off-by: Dmitry Baryshkov --- drivers/nvmem/core.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index c0af43a37195c3869507a203b370615309aeee67..a03a3006bd611ea6e91703cd19c2842bd4f56659 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -602,6 +602,14 @@ static int nvmem_cell_info_to_nvmem_cell_entry_nodup(struct nvmem_device *nvmem, return -EINVAL; } + if (!IS_ALIGNED(cell->raw_len, nvmem->word_size)) { + dev_err(&nvmem->dev, + "cell %s raw len %zd unaligned to nvmem word size %d\n", + cell->name ?: "", cell->raw_len, + nvmem->word_size); + return -EINVAL; + } + return 0; } From patchwork Sat Jan 4 06:19:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 855028 Received: from mail-lf1-f46.google.com (mail-lf1-f46.google.com [209.85.167.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39F47156C62 for ; Sat, 4 Jan 2025 06:19:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735971566; cv=none; b=Wog/HJ0HGAhB4L0rXh3e/qoaxbe0XX5QXzWAso/OhTU4gGOA5l1YmcOJgX5Ygnic9BVtN4PfFu/XeDXFA6E4FZYjbyyUFJOECV5KSJXFsiKdZ2rza79i5bUSkug36I748+MKPl8FXoo0OCPPYDTfiUmBWTo1kxmRv2blAWzM7iA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735971566; c=relaxed/simple; bh=sGP/szOES38d6mStd7Xz/BDPgQX6Jo4hmwT1BUTmpOs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=u/Y4/pMQPH5wHW6mqblE4GgPZPAIO+m9fvUjY/Js7N+sa9Qn5wximNAKzGVSW/RgkifRGq/P0f5rxxZdLSp12rQHB/COYzOD14EO5GNkG3RcEj+kAgyq+95dTrK/u5JiJYi5QYLznVTUuxs3CHDdWmyqoUzAlQAWMKauZR2XzzA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=aENNKscR; arc=none smtp.client-ip=209.85.167.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="aENNKscR" Received: by mail-lf1-f46.google.com with SMTP id 2adb3069b0e04-5401c52000dso14553292e87.3 for ; Fri, 03 Jan 2025 22:19:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1735971563; x=1736576363; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ZNBBuqUNiSerF8kPaEtDmkW48TvvfeL/ZUEeQFP+MhU=; b=aENNKscRUCm+oyE1NpJ4Tp1uYaTeHsrm13WQ0xzqXyd0n46m2D7cFOYO5eZTjAkP3W ByPbXonJkLSp6QLj/6+w22/wRVCz9p34jHqMY5E9axspMpQMBnXAwC8nduIfUcQm5XOD b+GXOVt1plW9B+m2NPYJ9W2C7CQ4GcmFqDZxtD0Loa5jt4NQJUTRpnjFN+RAZIyNVJBc sW4RRqBrgiMP+FPYt5d34c5oxWuYPMMGxcfBDZhieoMRIiNv6u5BsEWl6JgJAFkJfjU8 4d/tt+EtjBoOcuVJsEAIFXn8+snKESY/E7/igF+yUlGEkpntmHa0xfAxOmIo5BiI7o63 yTTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1735971563; x=1736576363; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZNBBuqUNiSerF8kPaEtDmkW48TvvfeL/ZUEeQFP+MhU=; b=LDG47Srby44dkr6MnpF1GYb/0piSTUdtdhLn8+lnRkRBuAJATeJy1KgztfqFNsgN/h KuiF49tF5lpJftPeszOerAx0gJGaun6+NQAZx5tcKs5p98OKoePTkTAsXnreRANFAr6k JqmxG97IPaCG3yzyhqTyqxsELAx5SiY9xaWmhXUZ55YHetC+K1GnvW3MLgpnLwt0Uqmw AzS15Qkp3glSYFUJzXJ3QNo194+y0RseqLqNyP2xaJDZjo41eYDJJlGGUgnJ6P6Vfg6F vCB4hCAQPY1pU2bqYJDEnl4ZnmMDre4x7qL3HFXNOp4DHBwFvyQDYkz9wEwnRtC5vfpI eiDA== X-Forwarded-Encrypted: i=1; AJvYcCVPxYUKFqIOXHfZwqSxKuhbA8Ke3VdZ73a9y7i8lauuFtW8obb0tDo4J7XhAlyuk8miYAX+aE+vFlayV7CB@vger.kernel.org X-Gm-Message-State: AOJu0YwqMRznwWP4RTsgXlc7LcG0eIUsAY0EoaoAVz6JgC72CqMWKLAn P3xiHA8BOqqcwl73Zf447CZKmBBWRvdITKAytGw7GODDo6wkUog0IIuX8BJHyZ0= X-Gm-Gg: ASbGncseAyxhYPqSc8Z38SwliumaJH39zJ/bMHhyJzWslMHB9pVNM61I+o6vMYkpsPc QOX51pFfP2wgsko63EcQEh+zmLAvpMp9OGxJNufznHLt5Bvty2OZBK8BcYSucPiri2BFHnl3t/I 3mgAIO4JiKkN8sC0wR+QlTydgaGqFZNs7DOd87V/Ia7DEaV1hf6r2yauH4JAPsB9cmu/UY8lVFx 1QfV5wDChHFOhEthkG9LlVe+aVWk8hhezA/4OklSXh8mF3LEdKl7YiIcPG93yLEVE3dHDMTc3Lp Ep06jFkIoDwgsVKhzg6FKlN3 X-Google-Smtp-Source: AGHT+IGZzBjoPqp8zB7YtaJvtnPfNwQjVbPCbpOSeyTRDGEni5rygswYpBQTFVQmeI6IzffnJ81I9A== X-Received: by 2002:a05:6512:1296:b0:53e:368c:ac48 with SMTP id 2adb3069b0e04-542295229femr13726743e87.11.1735971563406; Fri, 03 Jan 2025 22:19:23 -0800 (PST) Received: from [127.0.1.1] (2001-14ba-a0c3-3a00--782.rev.dnainternet.fi. [2001:14ba:a0c3:3a00::782]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54223832c1bsm4261655e87.280.2025.01.03.22.19.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Jan 2025 22:19:23 -0800 (PST) From: Dmitry Baryshkov Date: Sat, 04 Jan 2025 08:19:14 +0200 Subject: [PATCH v3 3/5] nvmem: core: update raw_len if the bit reading is required Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250104-sar2130p-nvmem-v3-3-a94e0b7de2fa@linaro.org> References: <20250104-sar2130p-nvmem-v3-0-a94e0b7de2fa@linaro.org> In-Reply-To: <20250104-sar2130p-nvmem-v3-0-a94e0b7de2fa@linaro.org> To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Akhil P Oommen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=988; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=sGP/szOES38d6mStd7Xz/BDPgQX6Jo4hmwT1BUTmpOs=; b=owEBbQKS/ZANAwAKARTbcu2+gGW4AcsmYgBneNLhnI1BmYlLUpy4fF+XLb8R2QFmSkEfV5UmG /LjBx6bNX2JAjMEAAEKAB0WIQRdB85SOKWMgfgVe+4U23LtvoBluAUCZ3jS4QAKCRAU23LtvoBl uGRmD/9bD0kbhu5WeN4Ztgm4a92xL0AeFcVDBzoOR6adZJs7p9cQhPJUPOgjs8G+REiMml0HYdk 04+xsExMBEtQgSHm/hTMpJhkDg3jI5D90ytAVW1MPRfx8AMnwABLVtsZxl6APE4AwT16VNMOE28 T4UKxIfkdjS+wkxKUDT8FkvQ06h9E7d+1biBPSJhPinRcPmDv6asN81gR01/ulXKOJlOivRms+B khi6g/xLcF82i16A+EVfOCEemf5jqYKj5tv5G1tM4OsCKPH9ptS33l9FRJTtoVmfWw+iQVnVyFj ZXVQJlrYtenhJiV1nHZ60iK6FlpfGmMJAjQuXI9c8tLfqbXMCYwiGpqDc0HLhWGv7qHnDDnUh/l z4FQgMjhVHOyQaAfJ74NNyyLccBJZ6YQPilIpy0qN5yxHDaoa6fKUeObYqfSxQqEEahb31Icjnt F602eTkkoxGQCy6nyqoDDq3hSrKu00M3fYrE4Z8APsTvOqq9b690QAVBlGVfP3MlZ2EBYs/ybGO x4RlurwWAw0xmjFnaVZ7RTdCoJL3Wpc+egBXhO9/kXfNC+qlETJ56Ek3OMHbcO8NAVWt2qj9Q+n aUiUreS9bjgfmLrtmoQLkOg92ZsD2KUVBOuLmZhltbKnlT6DavoQQhEm3HdEHTI5s0NwzBgBaxK jh6suB/pYTS3AAw== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A If NVMEM cell uses bit offset or specifies bit truncation, update raw_len manually (following the cell->bytes update), ensuring that the NVMEM access is still word-aligned. Signed-off-by: Dmitry Baryshkov --- drivers/nvmem/core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index a03a3006bd611ea6e91703cd19c2842bd4f56659..17b320bcbe207aed8a32aa2cc7d8dab9b58c13cf 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -591,9 +591,11 @@ static int nvmem_cell_info_to_nvmem_cell_entry_nodup(struct nvmem_device *nvmem, cell->nbits = info->nbits; cell->np = info->np; - if (cell->nbits) + if (cell->nbits) { cell->bytes = DIV_ROUND_UP(cell->nbits + cell->bit_offset, BITS_PER_BYTE); + cell->raw_len = ALIGN(cell->bytes, nvmem->word_size); + } if (!IS_ALIGNED(cell->offset, nvmem->stride)) { dev_err(&nvmem->dev, From patchwork Sat Jan 4 06:19:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 855178 Received: from mail-lf1-f46.google.com (mail-lf1-f46.google.com [209.85.167.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 49A8215D5B6 for ; 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[2001:14ba:a0c3:3a00::782]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54223832c1bsm4261655e87.280.2025.01.03.22.19.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Jan 2025 22:19:24 -0800 (PST) From: Dmitry Baryshkov Date: Sat, 04 Jan 2025 08:19:15 +0200 Subject: [PATCH v3 4/5] nvmem: qfprom: switch to 4-byte aligned reads Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250104-sar2130p-nvmem-v3-4-a94e0b7de2fa@linaro.org> References: <20250104-sar2130p-nvmem-v3-0-a94e0b7de2fa@linaro.org> In-Reply-To: <20250104-sar2130p-nvmem-v3-0-a94e0b7de2fa@linaro.org> To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Akhil P Oommen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2302; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=Weli6Ud1pnhnVMQNhXbarzN29phyH4B6NUF7IDp6kk8=; b=owEBbQKS/ZANAwAKARTbcu2+gGW4AcsmYgBneNLh+pWuyicpF7JwINd5cxvcSYzG01R6FRlle hKcTcxue62JAjMEAAEKAB0WIQRdB85SOKWMgfgVe+4U23LtvoBluAUCZ3jS4QAKCRAU23LtvoBl uFQ1D/0eitlPWKeOQfigM1W6o1iU/oO/yWjCv7h42icKzawH7fw+evIC35b3Pfv+UhxQYvlPoI1 ZYKMgZUFDXU0RArciTtvD5hhjevdOSY6MgQL113UCgDlxfGs/djsxIxj5m4sUKIs3fyZUGjmgVW TajAv26H8istC0y7hfpfwa4ogk2pq5xdv17p+uBWBMDUjAbRxub5N1zA2kYUHHIIqcWo2YdHo56 gexH/TQ03jxOiKdnAyyTGDn+EscyiOe+sOeoHkXjJObaaeSybCWTKmaYs+WQCKBTjNq+0eGoepj Lcz9qH7Tv/ZXb+JB5sCJSi3jRqBhrR1Pepfsmdx7DmQjYa58sy4DGS0blg6qfQLeRBcPkt/dns/ ZFwoV0z2Th+mgLHBlYwmTpix1YEn3v4Fpm1clqsDqQQImH5pZIuJsJ6LCD2ciVa7kEU2GtROobn rFGtVFG/M29Wq1bzNOga/5BPRnXFQmcF74KEaBwWRxfewSqeWj+t4P+w0TbVSDtFSTMqIUK/VkR N6u50Mu1gE5wZV/xUGTIqbqzwMjLfb0zdM5MnKiuS0OU0FPt5BvCHKr+ZT3W7JqsqnkhF3l1GKa AnQDGIlK3OmtDoyNDGgxj4DofIlpNseoNg9TFxP9HTVR4kwPI9seli/hgIHxqXpf8Wzje7ZJygu ZHRfUV574Tt4T9Q== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A All platforms since Snapdragon 8 Gen1 (SM8450) require using 4-byte reads to access QFPROM data. While older platforms were more than happy with 1-byte reads, change the qfprom driver to use 4-byte reads for all the platforms. Specify stride and word size of 4 bytes. To retain compatibility with the existing DT and to simplify porting data from vendor kernels, use fixup_dt_cell_info in order to bump alignment requirements. Signed-off-by: Dmitry Baryshkov --- drivers/nvmem/qfprom.c | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c index 116a39e804c70b4a0374f8ea3ac6ba1dd612109d..a872c640b8c5a558da9ea00e3804c904f8987247 100644 --- a/drivers/nvmem/qfprom.c +++ b/drivers/nvmem/qfprom.c @@ -321,19 +321,32 @@ static int qfprom_reg_read(void *context, unsigned int reg, void *_val, size_t bytes) { struct qfprom_priv *priv = context; - u8 *val = _val; - int i = 0, words = bytes; + u32 *val = _val; void __iomem *base = priv->qfpcorrected; + int words = DIV_ROUND_UP(bytes, sizeof(u32)); + int i; if (read_raw_data && priv->qfpraw) base = priv->qfpraw; - while (words--) - *val++ = readb(base + reg + i++); + for (i = 0; i < words; i++) + *val++ = readl(base + reg + i * sizeof(u32)); return 0; } +/* Align reads to word boundary */ +static void qfprom_fixup_dt_cell_info(struct nvmem_device *nvmem, + struct nvmem_cell_info *cell) +{ + unsigned int byte_offset = cell->offset % sizeof(u32); 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Signed-off-by: Dmitry Baryshkov --- Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml index 80845c722ae46611c722effeaaf014a0caf76e4a..9755b31946bf9d4c1055a993145d06c274b61a37 100644 --- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml +++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml @@ -32,6 +32,7 @@ properties: - qcom,msm8998-qfprom - qcom,qcm2290-qfprom - qcom,qcs404-qfprom + - qcom,sar2130p-qfprom - qcom,sc7180-qfprom - qcom,sc7280-qfprom - qcom,sc8280xp-qfprom