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[209.132.180.67]) by mx.google.com with ESMTP id w7si3275727oie.196.2019.12.19.10.22.52; Thu, 19 Dec 2019 10:22:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LkFxJRzp; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726943AbfLSSWw (ORCPT + 8 others); Thu, 19 Dec 2019 13:22:52 -0500 Received: from mail-pl1-f193.google.com ([209.85.214.193]:38547 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726836AbfLSSWv (ORCPT ); Thu, 19 Dec 2019 13:22:51 -0500 Received: by mail-pl1-f193.google.com with SMTP id f20so2932284plj.5 for ; Thu, 19 Dec 2019 10:22:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zwGoLngI+NuehCxqLPOV9F/7m9EMr7gKWrCKtqW4Jcw=; b=LkFxJRzpxgrqWkDu9NIq14PtAkP7KD2Ey8PxhUOdqF3q1prp7GYNBZmv8MSO/qEczZ 2u9Kg15va+H8l5/rAO/6/yc9XvNmBHw23WDrKmXwASTEOPCYS9BJXNNc49UoVjdF/f/9 WDmz+ZLfwMnyUgxinx7JSl2NztqCZoYDQxIdElK2CJxoQd5ES0NyFZttBLxQdxKgVEEn iBbngNy+1we0hSM0CN0Bmss0lX3gKOtDzIiynlVWFUAS2o0RtcJWB0MA5utzG8J5F80g nQHh6BelnPRRBNkJE7Bk0EduSn/Lfn3bWiLMUxXvH/XrkIB/KZaFSkKB62LX00h1pjjf pdLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zwGoLngI+NuehCxqLPOV9F/7m9EMr7gKWrCKtqW4Jcw=; b=n2lQLUqGvUKtS2wNW89C/jYBxqMkH1vJepmGCcQkEHJtR8jjLr2UpEv+M34y0rA1K+ ibxKoC1EHKYc6QqeJDR2aOtHD2Py/xFb7SmMtMPxCVONZyhXD1lE5oCovYvBq+dO5ZkQ Nhd67KH8SRplxnJirQKxtBeRGD1X260jq8Ewu1x2KjzJLKzYoaic5W6TwoXMw0qGrluX BSB6JsOUxiLFF9JjYQJnfLu4kt5o4U3IBFr08+V+UlCXicKYWeTMezspi7fEUeubW3ht tysMw/OzcKgDM+Vk8JE/FFojiEFWPTzzZfqC0bkh9hc6Ruan4cdsH1GkAbJESmXVD8J1 YIeg== X-Gm-Message-State: APjAAAWKUeSPn89n3573R4CbRZuSIWc7b3nQNQOFaWJqHMHBBFN6d2mT z2hDFi4QP/j3HPefJEt0nCsr36uyrg== X-Received: by 2002:a17:902:409:: with SMTP id 9mr10523602ple.245.1576779770781; Thu, 19 Dec 2019 10:22:50 -0800 (PST) Received: from localhost.localdomain ([2409:4072:6010:65a5:a416:e9bd:178a:9286]) by smtp.gmail.com with ESMTPSA id i3sm9085735pfg.94.2019.12.19.10.22.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2019 10:22:50 -0800 (PST) From: Manivannan Sadhasivam To: mchehab@kernel.org, sakari.ailus@iki.fi Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, c.barrett@framos.com, a.brela@framos.com, peter.griffin@linaro.org, Manivannan Sadhasivam Subject: [PATCH v2 1/6] media: i2c: imx290: Add support for 2 data lanes Date: Thu, 19 Dec 2019 23:52:17 +0530 Message-Id: <20191219182222.18961-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191219182222.18961-1-manivannan.sadhasivam@linaro.org> References: <20191219182222.18961-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IMX290 sensor can output frames with 2/4 CSI2 data lanes. This commit adds support for 2 lane mode in addition to the 4 lane and also configuring the data lane settings in the driver based on system configuration. Signed-off-by: Manivannan Sadhasivam --- drivers/media/i2c/imx290.c | 133 ++++++++++++++++++++++++++++++++++--- 1 file changed, 124 insertions(+), 9 deletions(-) -- 2.17.1 diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index f7678e5a5d87..532ad488b801 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -25,7 +25,18 @@ #define IMX290_STANDBY 0x3000 #define IMX290_REGHOLD 0x3001 #define IMX290_XMSTA 0x3002 +#define IMX290_FR_FDG_SEL 0x3009 #define IMX290_GAIN 0x3014 +#define IMX290_HMAX_LOW 0x301c +#define IMX290_HMAX_HIGH 0x301d +#define IMX290_PHY_LANE_NUM 0x3407 +#define IMX290_CSI_LANE_MODE 0x3443 + +/* HMAX fields */ +#define IMX290_HMAX_2_1920 0x1130 +#define IMX290_HMAX_4_1920 0x0898 +#define IMX290_HMAX_2_720 0x19C8 +#define IMX290_HMAX_4_720 0x0CE4 #define IMX290_DEFAULT_LINK_FREQ 445500000 @@ -56,6 +67,7 @@ struct imx290 { struct device *dev; struct clk *xclk; struct regmap *regmap; + u8 nlanes; struct v4l2_subdev sd; struct v4l2_fwnode_endpoint ep; @@ -89,14 +101,11 @@ static const struct regmap_config imx290_regmap_config = { static const struct imx290_regval imx290_global_init_settings[] = { { 0x3007, 0x00 }, - { 0x3009, 0x00 }, { 0x3018, 0x65 }, { 0x3019, 0x04 }, { 0x301a, 0x00 }, - { 0x3443, 0x03 }, { 0x3444, 0x20 }, { 0x3445, 0x25 }, - { 0x3407, 0x03 }, { 0x303a, 0x0c }, { 0x3040, 0x00 }, { 0x3041, 0x00 }, @@ -169,7 +178,6 @@ static const struct imx290_regval imx290_1080p_settings[] = { { 0x3164, 0x1a }, { 0x3480, 0x49 }, /* data rate settings */ - { 0x3009, 0x01 }, { 0x3405, 0x10 }, { 0x3446, 0x57 }, { 0x3447, 0x00 }, @@ -187,8 +195,6 @@ static const struct imx290_regval imx290_1080p_settings[] = { { 0x3453, 0x00 }, { 0x3454, 0x17 }, { 0x3455, 0x00 }, - { 0x301c, 0x98 }, - { 0x301d, 0x08 }, }; static const struct imx290_regval imx290_720p_settings[] = { @@ -210,7 +216,6 @@ static const struct imx290_regval imx290_720p_settings[] = { { 0x3164, 0x1a }, { 0x3480, 0x49 }, /* data rate settings */ - { 0x3009, 0x01 }, { 0x3405, 0x10 }, { 0x3446, 0x4f }, { 0x3447, 0x00 }, @@ -228,8 +233,6 @@ static const struct imx290_regval imx290_720p_settings[] = { { 0x3453, 0x00 }, { 0x3454, 0x17 }, { 0x3455, 0x00 }, - { 0x301c, 0xe4 }, - { 0x301d, 0x0c }, }; static const struct imx290_regval imx290_10bit_settings[] = { @@ -522,6 +525,25 @@ static int imx290_write_current_format(struct imx290 *imx290, return 0; } +static int imx290_set_hmax(struct imx290 *imx290, u32 val) +{ + int ret; + + ret = imx290_write_reg(imx290, IMX290_HMAX_LOW, (val & 0xff)); + if (ret) { + dev_err(imx290->dev, "Error setting HMAX register\n"); + return ret; + } + + ret = imx290_write_reg(imx290, IMX290_HMAX_HIGH, ((val >> 8) & 0xff)); + if (ret) { + dev_err(imx290->dev, "Error setting HMAX register\n"); + return ret; + } + + return 0; +} + /* Start streaming */ static int imx290_start_streaming(struct imx290 *imx290) { @@ -551,6 +573,40 @@ static int imx290_start_streaming(struct imx290 *imx290) return ret; } + switch (imx290->nlanes) { + case 2: + if (imx290->current_mode->width == 1920) { + ret = imx290_set_hmax(imx290, IMX290_HMAX_2_1920); + if (ret < 0) + return ret; + } else { + ret = imx290_set_hmax(imx290, IMX290_HMAX_2_720); + if (ret < 0) + return ret; + } + + break; + case 4: + if (imx290->current_mode->width == 1920) { + ret = imx290_set_hmax(imx290, IMX290_HMAX_4_1920); + if (ret < 0) + return ret; + } else { + ret = imx290_set_hmax(imx290, IMX290_HMAX_4_720); + if (ret < 0) + return ret; + } + + break; + default: + /* + * We should never hit this since the data lane count is + * validated in probe itself + */ + dev_err(imx290->dev, "Lane configuration not supported\n"); + return -EINVAL; + } + /* Apply customized values from user */ ret = v4l2_ctrl_handler_setup(imx290->sd.ctrl_handler); if (ret) { @@ -607,6 +663,49 @@ static int imx290_get_regulators(struct device *dev, struct imx290 *imx290) imx290->supplies); } +static int imx290_set_data_lanes(struct imx290 *imx290) +{ + int ret = 0, laneval, frsel; + + switch (imx290->nlanes) { + case 2: + laneval = 0x01; + frsel = 0x02; + break; + case 4: + laneval = 0x03; + frsel = 0x01; + break; + default: + /* + * We should never hit this since the data lane count is + * validated in probe itself + */ + dev_err(imx290->dev, "Lane configuration not supported\n"); + ret = -EINVAL; + goto exit; + } + + ret = imx290_write_reg(imx290, IMX290_PHY_LANE_NUM, laneval); + if (ret) { + dev_err(imx290->dev, "Error setting Physical Lane number register\n"); + goto exit; + } + + ret = imx290_write_reg(imx290, IMX290_CSI_LANE_MODE, laneval); + if (ret) { + dev_err(imx290->dev, "Error setting CSI Lane mode register\n"); + goto exit; + } + + ret = imx290_write_reg(imx290, IMX290_FR_FDG_SEL, frsel); + if (ret) + dev_err(imx290->dev, "Error setting FR/FDG SEL register\n"); + +exit: + return ret; +} + static int imx290_power_on(struct device *dev) { struct i2c_client *client = to_i2c_client(dev); @@ -631,6 +730,9 @@ static int imx290_power_on(struct device *dev) gpiod_set_value_cansleep(imx290->rst_gpio, 1); usleep_range(30000, 31000); + /* Set data lane count */ + imx290_set_data_lanes(imx290); + return 0; } @@ -703,6 +805,16 @@ static int imx290_probe(struct i2c_client *client) goto free_err; } + /* Get number of data lanes */ + imx290->nlanes = imx290->ep.bus.mipi_csi2.num_data_lanes; + if (imx290->nlanes != 2 && imx290->nlanes != 4) { + dev_err(dev, "Invalid data lanes: %d\n", imx290->nlanes); + ret = -EINVAL; + goto free_err; + } + + dev_dbg(dev, "Using %u data lanes\n", imx290->nlanes); + if (!imx290->ep.nr_of_link_frequencies) { dev_err(dev, "link-frequency property not found in DT\n"); ret = -EINVAL; @@ -822,6 +934,9 @@ static int imx290_probe(struct i2c_client *client) goto free_entity; } + /* Set data lane count */ + imx290_set_data_lanes(imx290); + pm_runtime_set_active(dev); pm_runtime_enable(dev); pm_runtime_idle(dev); From patchwork Thu Dec 19 18:22:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 182149 Delivered-To: patch@linaro.org Received: by 2002:a92:d0a:0:0:0:0:0 with SMTP id 10csp835665iln; Thu, 19 Dec 2019 10:23:02 -0800 (PST) X-Google-Smtp-Source: APXvYqzw3NmLjoISOQO8UnDP1mph+OUOmHUHkJFbCGMU9aoSZGtqXdIA7lBj4UrWGqyFlUJwAME6 X-Received: by 2002:a9d:5616:: with SMTP id e22mr9855867oti.366.1576779782410; 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[209.132.180.67]) by mx.google.com with ESMTP id e25si638225oie.146.2019.12.19.10.23.02; Thu, 19 Dec 2019 10:23:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kmDLD54W; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727078AbfLSSXB (ORCPT + 8 others); Thu, 19 Dec 2019 13:23:01 -0500 Received: from mail-pl1-f195.google.com ([209.85.214.195]:46423 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726998AbfLSSXB (ORCPT ); Thu, 19 Dec 2019 13:23:01 -0500 Received: by mail-pl1-f195.google.com with SMTP id y8so2914158pll.13 for ; Thu, 19 Dec 2019 10:23:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AFvgHo+YGqFoje0Tn82GYQJ1a/RGDe/xy+Kyh3iTfBI=; b=kmDLD54Wg3ujI/AZ5o82fQsFYrDiuccUSsctI4Y7S7mXX6MyEfNbDjjW9+s6zcVUKS nygmXBu+d+VM9XCAAmQ3nbV9d3I72uZUIsjZ2SF8TFVUHPw9QRjNM6Jw+1BRPLeBXvp1 cBNCRZIY/A1kpYJfHUDMOI8ai1nkGnezL24ODwAzUUPH7TiHct5j6i/A08jdpjRE3R5J pQvdnIciCIRAL3pDWcp2YfwuPzLAraQHzAVxWEuuc2oUYwHjmUQ7vD7F4aLl++6gwKFt mqL2MxBLFXllu3VhBGuTZzEB+Xzt4jE5lsgOpSSCUES1bflOqdaIw4CudFV4w25Q/kpG sIbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AFvgHo+YGqFoje0Tn82GYQJ1a/RGDe/xy+Kyh3iTfBI=; b=V94PEePSc48/n3vWvuoGdYe5uGgZzECAJz9z11tW7qRulXWD/cMhPIc8nhgRPQoeVN 7TAAca61+HJb0KeFKI7CVnmhPrKCkXbB2TpplrTcEfikQ29w4M8uMWvBdkTdesOGZFPF +ce8nuUJO7UjmdVG4ISOCQ0glIoz96EsgwdVV0WZcQMbdXiBYQWPIZAvSbnJkMRSzPL+ ty2kDFUUdZphvlE7jwzRuY/XwPt1cmg8TgGj2uJFmASdACcKAD52lzGeD95rEkPxe9eG nw7Uw2Kwh5EDA0OHViBz9wBJOeM58gcL6AILX9ZQBgybTQXNRRxJunsTgHhRGM55h4SZ xbDA== X-Gm-Message-State: APjAAAWaZkUN2R2dJ8qHuZ1wYPH9vWMwE3/rTDePUvnCUv3jH/+AwQX9 coHQ8ISLGxS6Kuoul+dTxgxb X-Received: by 2002:a17:902:bd93:: with SMTP id q19mr8338103pls.134.1576779780558; Thu, 19 Dec 2019 10:23:00 -0800 (PST) Received: from localhost.localdomain ([2409:4072:6010:65a5:a416:e9bd:178a:9286]) by smtp.gmail.com with ESMTPSA id i3sm9085735pfg.94.2019.12.19.10.22.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2019 10:23:00 -0800 (PST) From: Manivannan Sadhasivam To: mchehab@kernel.org, sakari.ailus@iki.fi Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, c.barrett@framos.com, a.brela@framos.com, peter.griffin@linaro.org, Manivannan Sadhasivam Subject: [PATCH v2 3/6] media: i2c: imx290: Add RAW12 mode support Date: Thu, 19 Dec 2019 23:52:19 +0530 Message-Id: <20191219182222.18961-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191219182222.18961-1-manivannan.sadhasivam@linaro.org> References: <20191219182222.18961-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org IMX290 is capable of outputting frames in both Raw Bayer (packed) 10 and 12 bit formats. Since the driver already supports RAW10 mode, let's add the missing RAW12 mode as well. Signed-off-by: Manivannan Sadhasivam --- drivers/media/i2c/imx290.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) -- 2.17.1 diff --git a/drivers/media/i2c/imx290.c b/drivers/media/i2c/imx290.c index 96eea0aafd3e..b6eeca56d3c9 100644 --- a/drivers/media/i2c/imx290.c +++ b/drivers/media/i2c/imx290.c @@ -75,6 +75,7 @@ struct imx290 { struct clk *xclk; struct regmap *regmap; u8 nlanes; + u8 bpp; struct v4l2_subdev sd; struct v4l2_fwnode_endpoint ep; @@ -98,6 +99,7 @@ struct imx290_pixfmt { static const struct imx290_pixfmt imx290_formats[] = { { MEDIA_BUS_FMT_SRGGB10_1X10 }, + { MEDIA_BUS_FMT_SRGGB12_1X12 }, }; static const struct regmap_config imx290_regmap_config = { @@ -265,6 +267,18 @@ static const struct imx290_regval imx290_10bit_settings[] = { { 0x300b, 0x00}, }; +static const struct imx290_regval imx290_12bit_settings[] = { + { 0x3005, 0x01 }, + { 0x3046, 0x01 }, + { 0x3129, 0x00 }, + { 0x317c, 0x00 }, + { 0x31ec, 0x0e }, + { 0x3441, 0x0c }, + { 0x3442, 0x0c }, + { 0x300a, 0xf0 }, + { 0x300b, 0x00 }, +}; + /* supported link frequencies */ static const s64 imx290_link_freq[] = { IMX290_DEFAULT_LINK_FREQ, @@ -550,6 +564,21 @@ static int imx290_write_current_format(struct imx290 *imx290, dev_err(imx290->dev, "Could not set format registers\n"); return ret; } + + imx290->bpp = 10; + + break; + case MEDIA_BUS_FMT_SRGGB12_1X12: + ret = imx290_set_register_array(imx290, imx290_12bit_settings, + ARRAY_SIZE( + imx290_12bit_settings)); + if (ret < 0) { + dev_err(imx290->dev, "Could not set format registers\n"); + return ret; + } + + imx290->bpp = 12; + break; default: dev_err(imx290->dev, "Unknown pixel format\n"); @@ -913,6 +942,9 @@ static int imx290_probe(struct i2c_client *client) goto free_err; } + /* Default bits per pixel value */ + imx290->bpp = 10; + mutex_init(&imx290->lock); v4l2_ctrl_handler_init(&imx290->ctrls, 4);