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Fri, 10 Jan 2025 07:21:24 -0800 (PST) From: Neil Armstrong Date: Fri, 10 Jan 2025 16:21:18 +0100 Subject: [PATCH 1/4] dt-bindings: interconnect: OSM L3: Document sm8650 OSM L3 compatible Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250110-topic-sm8650-ddr-bw-scaling-v1-1-041d836b084c@linaro.org> References: <20250110-topic-sm8650-ddr-bw-scaling-v1-0-041d836b084c@linaro.org> In-Reply-To: <20250110-topic-sm8650-ddr-bw-scaling-v1-0-041d836b084c@linaro.org> To: Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=861; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=6x20OZAZDWy1n/Lp2uA0gIfP0RiekaAArUBAmfzhPLk=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBngTrxlbDN8zf+COXdCpUdXQR2nXiX4+hMgzlbf6bJ yMSGzUKJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZ4E68QAKCRB33NvayMhJ0bcnEA DAj2swcSJPRv8vfiExrlBZCOQsC3Aqebwfj7CDQbggLFualRA2eQLtwOnrXOQCmh4udUcLnIRlIpAM kRjp8fxmDRYcraN9LezmI6xM60Nt349J6JGBy3ArzGqu52G9liUhDcoa15K69h0zA2gn28igjxMnSL /fvhl4Dr9J2YL8R8LKgdNB++7E/v58oFPsRheE1XZfCQmixUju/z9mD2hRy1hJOu2Gqrclskd/c/Vt oXX2j06UunlUrPYa8HnKb0OmG88kSELaimYJtbwrhSunCNgAcbgxiqVDMxLnakknoGfedyJPKfdiiE H4wLc9U5bf/AvVKJvyXDy0kkecsERfLD2OPp2Brn0/QjOOnzOMsh7/zsGWgsC9qatOOPDvSkBuhHdU JVnfGmCqXpRMR3+Gr2blsUMOb8kY/4NWn4S4WPXZX7CbKtNN4O0972PLwdO3+YqkDrF8Sqt0auHz6o L0um3XVlMf1a1pV8om9Y7LNNd33fwArHI1pppo3c63CxG9TNtYkrx6M+qrdivoJsqDzsVeTojepJ1+ CJOyIjXklxt2HqG6HUEdyekVPzw4/BnTRiDLQuAgppm5eLlr9XKfLbGJ4q832NRPu9zPLGclkwlzcM 3baByQ3cyPaluwAoeOAF0eHVrIbkQRGpJM8cpPs7Q9Vy8J7J3mnOMG6Nzhxw== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Document the OSM L3 found in the Qualcomm SM8650 platform. Signed-off-by: Neil Armstrong Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index 21dae0b92819622fa56b0a46beaeb6f585cdec35..4ac0863205b3b30cdfcde6fe1bf5abc3b122a2f5 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -33,6 +33,7 @@ properties: - qcom,sm6375-cpucp-l3 - qcom,sm8250-epss-l3 - qcom,sm8350-epss-l3 + - qcom,sm8650-epss-l3 - const: qcom,epss-l3 reg: From patchwork Fri Jan 10 15:21:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 857430 Received: from mail-wm1-f42.google.com (mail-wm1-f42.google.com [209.85.128.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C866211498 for ; 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Fri, 10 Jan 2025 07:21:25 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2e92794sm88714725e9.37.2025.01.10.07.21.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Jan 2025 07:21:25 -0800 (PST) From: Neil Armstrong Date: Fri, 10 Jan 2025 16:21:19 +0100 Subject: [PATCH 2/4] arm64: dts: qcom: sm8650: add OSM L3 node Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250110-topic-sm8650-ddr-bw-scaling-v1-2-041d836b084c@linaro.org> References: <20250110-topic-sm8650-ddr-bw-scaling-v1-0-041d836b084c@linaro.org> In-Reply-To: <20250110-topic-sm8650-ddr-bw-scaling-v1-0-041d836b084c@linaro.org> To: Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Add the OSC L3 Cache controller node. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 86684cb9a9325618ddb74458621cf4bbdc1cc0d1..bc09e879c1440873a52daf3fc7a38f451f1f972c 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -5506,6 +5506,16 @@ rpmhpd_opp_turbo_l1: opp-416 { }; }; + epss_l3: interconnect@17d90000 { + compatible = "qcom,sm8650-epss-l3", "qcom,epss-l3"; + reg = <0 0x17d90000 0 0x1000>; + + clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; + cpufreq_hw: cpufreq@17d91000 { compatible = "qcom,sm8650-cpufreq-epss", "qcom,cpufreq-epss"; reg = <0 0x17d91000 0 0x1000>, From patchwork Fri Jan 10 15:21:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 856447 Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6EBFB2116EF for ; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Add the interconnect entry for each cpu, with 3 different paths: - CPU to Last Level Cache Controller (LLCC) - Last Level Cache Controller (LLCC) to DDR - L3 Cache from CPU to DDR interface Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 57 ++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index bc09e879c1440873a52daf3fc7a38f451f1f972c..e194a95cdcc0f0f692e62b942331cd9e07a4eae0 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -85,6 +86,13 @@ cpu0: cpu@0 { qcom,freq-domain = <&cpufreq_hw 0>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; + #cooling-cells = <2>; l2_0: l2-cache { @@ -118,6 +126,13 @@ cpu1: cpu@100 { qcom,freq-domain = <&cpufreq_hw 0>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; + #cooling-cells = <2>; }; @@ -138,6 +153,13 @@ cpu2: cpu@200 { qcom,freq-domain = <&cpufreq_hw 3>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; + #cooling-cells = <2>; l2_200: l2-cache { @@ -165,6 +187,13 @@ cpu3: cpu@300 { qcom,freq-domain = <&cpufreq_hw 3>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; + #cooling-cells = <2>; }; @@ -185,6 +214,13 @@ cpu4: cpu@400 { qcom,freq-domain = <&cpufreq_hw 3>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; + #cooling-cells = <2>; l2_400: l2-cache { @@ -212,6 +248,13 @@ cpu5: cpu@500 { qcom,freq-domain = <&cpufreq_hw 1>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; + #cooling-cells = <2>; l2_500: l2-cache { @@ -239,6 +282,13 @@ cpu6: cpu@600 { qcom,freq-domain = <&cpufreq_hw 1>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, + <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + <&epss_l3 MASTER_EPSS_L3_APPS + &epss_l3 SLAVE_EPSS_L3_SHARED>; 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Fri, 10 Jan 2025 07:21:27 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2e92794sm88714725e9.37.2025.01.10.07.21.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Jan 2025 07:21:27 -0800 (PST) From: Neil Armstrong Date: Fri, 10 Jan 2025 16:21:21 +0100 Subject: [PATCH 4/4] arm64: dts: qcom: add cpu OPP table with DDR, LLCC & L3 bandwidths Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250110-topic-sm8650-ddr-bw-scaling-v1-4-041d836b084c@linaro.org> References: <20250110-topic-sm8650-ddr-bw-scaling-v1-0-041d836b084c@linaro.org> In-Reply-To: <20250110-topic-sm8650-ddr-bw-scaling-v1-0-041d836b084c@linaro.org> To: Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Add the OPP tables for each CPU clusters (cpu0-1, cpu2-3-4, cpu5-6 & cpu7) to permit scaling the Last Level Cache Controller (LLCC), DDR and L3 cache frequency by aggregating bandwidth requests of all CPU core with referenc to the current OPP they are configured in by the LMH/EPSS hardware. The effect is a proper caches & DDR frequency scaling when CPU cores changes frequency. The OPP tables were built using the downstream memlat ddr, llcc & l3 tables for each cluster types with the actual EPSS cpufreq LUT tables from running HDK and QRD devices. The cpu2 and cpu5 tables are similar but must be kept separate to take in account that they define OPP for shared CPUs of two different clusters that can scale separately, thus vote different bandwidths. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 871 +++++++++++++++++++++++++++++++++++ 1 file changed, 871 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index e194a95cdcc0f0f692e62b942331cd9e07a4eae0..c638c2cd2a9b005fdd9201bd19ecc8b8173411da 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -86,6 +86,8 @@ cpu0: cpu@0 { qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY @@ -126,6 +128,8 @@ cpu1: cpu@100 { qcom,freq-domain = <&cpufreq_hw 0>; + operating-points-v2 = <&cpu0_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY @@ -153,6 +157,8 @@ cpu2: cpu@200 { qcom,freq-domain = <&cpufreq_hw 3>; + operating-points-v2 = <&cpu2_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY @@ -187,6 +193,8 @@ cpu3: cpu@300 { qcom,freq-domain = <&cpufreq_hw 3>; + operating-points-v2 = <&cpu2_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY @@ -214,6 +222,8 @@ cpu4: cpu@400 { qcom,freq-domain = <&cpufreq_hw 3>; + operating-points-v2 = <&cpu2_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY @@ -248,6 +258,8 @@ cpu5: cpu@500 { qcom,freq-domain = <&cpufreq_hw 1>; + operating-points-v2 = <&cpu5_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY @@ -282,6 +294,8 @@ cpu6: cpu@600 { qcom,freq-domain = <&cpufreq_hw 1>; + operating-points-v2 = <&cpu5_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY @@ -316,6 +330,8 @@ cpu7: cpu@700 { qcom,freq-domain = <&cpufreq_hw 2>; + operating-points-v2 = <&cpu7_opp_table>; + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>, <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY @@ -483,6 +499,861 @@ memory@a0000000 { reg = <0 0xa0000000 0 0>; }; + cpu0_opp_table: opp-table-cpu0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-307200000 { + opp-hz = /bits/ 64 <307200000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-364800000 { + opp-hz = /bits/ 64 <364800000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-460800000 { + opp-hz = /bits/ 64 <460800000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (384000 * 32)>; + }; + + opp-556800000 { + opp-hz = /bits/ 64 <556800000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>; + }; + + opp-672000000 { + opp-hz = /bits/ 64 <672000000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>; + }; + + opp-787200000 { + opp-hz = /bits/ 64 <787200000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (729600 * 32)>; + }; + + opp-902400000 { + opp-hz = /bits/ 64 <902400000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (844800 * 32)>; + }; + + opp-1017600000 { + opp-hz = /bits/ 64 <1017600000>; + opp-peak-kBps = <(466000 * 16) (547000 * 4) (940800 * 32)>; + }; + + opp-1132800000 { + opp-hz = /bits/ 64 <1132800000>; + opp-peak-kBps = <(466000 * 16) (547000 * 4) (1036800 * 32)>; + }; + + opp-1248000000 { + opp-hz = /bits/ 64 <1248000000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (1132800 * 32)>; + }; + + opp-1344000000 { + opp-hz = /bits/ 64 <1344000000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (1248000 * 32)>; + }; + + opp-1440000000 { + opp-hz = /bits/ 64 <1440000000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (1248000 * 32)>; + }; + + opp-1459200000 { + opp-hz = /bits/ 64 <1459200000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (1248000 * 32)>; + }; + + opp-1536000000 { + opp-hz = /bits/ 64 <1536000000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (1440000 * 32)>; + }; + + opp-1574400000 { + opp-hz = /bits/ 64 <1574400000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (1440000 * 32)>; + }; + + opp-1651200000 { + opp-hz = /bits/ 64 <1651200000>; + opp-peak-kBps = <(600000 * 16) (1555000 * 4) (1440000 * 32)>; + }; + + opp-1689600000 { + opp-hz = /bits/ 64 <1689600000>; + opp-peak-kBps = <(600000 * 16) (1555000 * 4) (1440000 * 32)>; + }; + + opp-1747200000 { + opp-hz = /bits/ 64 <1747200000>; + opp-peak-kBps = <(600000 * 16) (1555000 * 4) (1440000 * 32)>; + }; + + opp-1804800000 { + opp-hz = /bits/ 64 <1804800000>; + opp-peak-kBps = <(600000 * 16) (1555000 * 4) (1555200 * 32)>; + }; + + opp-1843200000 { + opp-hz = /bits/ 64 <1843200000>; + opp-peak-kBps = <(600000 * 16) (1555000 * 4) (1555200 * 32)>; + }; + + opp-1920000000 { + opp-hz = /bits/ 64 <1920000000>; + opp-peak-kBps = <(600000 * 16) (1555000 * 4) (1651200 * 32)>; + }; + + opp-1939200000 { + opp-hz = /bits/ 64 <1939200000>; + opp-peak-kBps = <(600000 * 16) (1555000 * 4) (1651200 * 32)>; + }; + + opp-2035200000 { + opp-hz = /bits/ 64 <2035200000>; + opp-peak-kBps = <(600000 * 16) (1555000 * 4) (1843200 * 32)>; + }; + + opp-2150400000 { + opp-hz = /bits/ 64 <2150400000>; + opp-peak-kBps = <(600000 * 16) (1555000 * 4) (1843200 * 32)>; + }; + + opp-2265600000 { + opp-hz = /bits/ 64 <2265600000>; + opp-peak-kBps = <(600000 * 16) (1555000 * 4) (2035200 * 32)>; + }; + }; + + cpu2_opp_table: opp-table-cpu2 { + compatible = "operating-points-v2"; + opp-shared; + + opp-460800000 { + opp-hz = /bits/ 64 <460800000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-499200000 { + opp-hz = /bits/ 64 <499200000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-576000000 { + opp-hz = /bits/ 64 <576000000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-614400000 { + opp-hz = /bits/ 64 <614400000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>; + }; + + opp-691200000 { + opp-hz = /bits/ 64 <691200000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-729600000 { + opp-hz = /bits/ 64 <729600000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-806400000 { + opp-hz = /bits/ 64 <806400000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-844800000 { + opp-hz = /bits/ 64 <844800000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-902400000 { + opp-hz = /bits/ 64 <902400000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-960000000 { + opp-hz = /bits/ 64 <960000000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (844800 * 32)>; + }; + + opp-1036800000 { + opp-hz = /bits/ 64 <1036800000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (844800 * 32)>; + }; + + opp-1075200000 { + opp-hz = /bits/ 64 <1075200000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (844800 * 32)>; + }; + + opp-1152000000 { + opp-hz = /bits/ 64 <1152000000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (844800 * 32)>; + }; + + opp-1190400000 { + opp-hz = /bits/ 64 <1190400000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (1036800 * 32)>; + }; + + opp-1267200000 { + opp-hz = /bits/ 64 <1267200000>; + opp-peak-kBps = <(600000 * 16) (2092000 * 4) (1036800 * 32)>; + }; + + opp-1286400000 { + opp-hz = /bits/ 64 <1286400000>; + opp-peak-kBps = <(600000 * 16) (2092000 * 4) (1036800 * 32)>; + }; + + opp-1382400000 { + opp-hz = /bits/ 64 <1382400000>; + opp-peak-kBps = <(600000 * 16) (2092000 * 4) (1036800 * 32)>; + }; + + opp-1401600000 { + opp-hz = /bits/ 64 <1401600000>; + opp-peak-kBps = <(600000 * 16) (2092000 * 4) (1248000 * 32)>; + }; + + opp-1497600000 { + opp-hz = /bits/ 64 <1497600000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1612800000 { + opp-hz = /bits/ 64 <1612800000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1708800000 { + opp-hz = /bits/ 64 <1708800000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1728000000 { + opp-hz = /bits/ 64 <1728000000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1824000000 { + opp-hz = /bits/ 64 <1824000000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1843200000 { + opp-hz = /bits/ 64 <1843200000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1920000000 { + opp-hz = /bits/ 64 <1920000000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1440000 * 32)>; + }; + + opp-1958400000 { + opp-hz = /bits/ 64 <1958400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2035200000 { + opp-hz = /bits/ 64 <2035200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2073600000 { + opp-hz = /bits/ 64 <2073600000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2131200000 { + opp-hz = /bits/ 64 <2131200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2188800000 { + opp-hz = /bits/ 64 <2188800000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2246400000 { + opp-hz = /bits/ 64 <2246400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2304000000 { + opp-hz = /bits/ 64 <2304000000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2323200000 { + opp-hz = /bits/ 64 <2323200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2380800000 { + opp-hz = /bits/ 64 <2380800000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2400000000 { + opp-hz = /bits/ 64 <2400000000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2438400000 { + opp-hz = /bits/ 64 <2438400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2515200000 { + opp-hz = /bits/ 64 <2515200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2572800000 { + opp-hz = /bits/ 64 <2572800000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1651200 * 32)>; + }; + + opp-2630400000 { + opp-hz = /bits/ 64 <2630400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1651200 * 32)>; + }; + + opp-2707200000 { + opp-hz = /bits/ 64 <2707200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1651200 * 32)>; + }; + + opp-2764800000 { + opp-hz = /bits/ 64 <2764800000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1843200 * 32)>; + }; + + opp-2841600000 { + opp-hz = /bits/ 64 <2841600000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-2899200000 { + opp-hz = /bits/ 64 <2899200000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-2956800000 { + opp-hz = /bits/ 64 <2956800000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-3014400000 { + opp-hz = /bits/ 64 <3014400000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-3072000000 { + opp-hz = /bits/ 64 <3072000000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-3148800000 { + opp-hz = /bits/ 64 <3148800000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (2035200 * 32)>; + }; + }; + + cpu5_opp_table: opp-table-cpu5 { + compatible = "operating-points-v2"; + opp-shared; + + opp-460800000 { + opp-hz = /bits/ 64 <460800000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-499200000 { + opp-hz = /bits/ 64 <499200000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-576000000 { + opp-hz = /bits/ 64 <576000000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-614400000 { + opp-hz = /bits/ 64 <614400000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>; + }; + + opp-691200000 { + opp-hz = /bits/ 64 <691200000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-729600000 { + opp-hz = /bits/ 64 <729600000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-806400000 { + opp-hz = /bits/ 64 <806400000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-844800000 { + opp-hz = /bits/ 64 <844800000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-902400000 { + opp-hz = /bits/ 64 <902400000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-960000000 { + opp-hz = /bits/ 64 <960000000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (844800 * 32)>; + }; + + opp-1036800000 { + opp-hz = /bits/ 64 <1036800000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (844800 * 32)>; + }; + + opp-1075200000 { + opp-hz = /bits/ 64 <1075200000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (844800 * 32)>; + }; + + opp-1152000000 { + opp-hz = /bits/ 64 <1152000000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (844800 * 32)>; + }; + + opp-1190400000 { + opp-hz = /bits/ 64 <1190400000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (1036800 * 32)>; + }; + + opp-1267200000 { + opp-hz = /bits/ 64 <1267200000>; + opp-peak-kBps = <(600000 * 16) (2092000 * 4) (1036800 * 32)>; + }; + + opp-1286400000 { + opp-hz = /bits/ 64 <1286400000>; + opp-peak-kBps = <(600000 * 16) (2092000 * 4) (1036800 * 32)>; + }; + + opp-1382400000 { + opp-hz = /bits/ 64 <1382400000>; + opp-peak-kBps = <(600000 * 16) (2092000 * 4) (1036800 * 32)>; + }; + + opp-1401600000 { + opp-hz = /bits/ 64 <1401600000>; + opp-peak-kBps = <(600000 * 16) (2092000 * 4) (1248000 * 32)>; + }; + + opp-1497600000 { + opp-hz = /bits/ 64 <1497600000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1612800000 { + opp-hz = /bits/ 64 <1612800000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1708800000 { + opp-hz = /bits/ 64 <1708800000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1728000000 { + opp-hz = /bits/ 64 <1728000000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1824000000 { + opp-hz = /bits/ 64 <1824000000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1843200000 { + opp-hz = /bits/ 64 <1843200000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1920000000 { + opp-hz = /bits/ 64 <1920000000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1440000 * 32)>; + }; + + opp-1958400000 { + opp-hz = /bits/ 64 <1958400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2035200000 { + opp-hz = /bits/ 64 <2035200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2073600000 { + opp-hz = /bits/ 64 <2073600000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2131200000 { + opp-hz = /bits/ 64 <2131200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2188800000 { + opp-hz = /bits/ 64 <2188800000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2246400000 { + opp-hz = /bits/ 64 <2246400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2304000000 { + opp-hz = /bits/ 64 <2304000000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2323200000 { + opp-hz = /bits/ 64 <2323200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2380800000 { + opp-hz = /bits/ 64 <2380800000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2400000000 { + opp-hz = /bits/ 64 <2400000000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2438400000 { + opp-hz = /bits/ 64 <2438400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2515200000 { + opp-hz = /bits/ 64 <2515200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2572800000 { + opp-hz = /bits/ 64 <2572800000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1651200 * 32)>; + }; + + opp-2630400000 { + opp-hz = /bits/ 64 <2630400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1651200 * 32)>; + }; + + opp-2707200000 { + opp-hz = /bits/ 64 <2707200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1651200 * 32)>; + }; + + opp-2764800000 { + opp-hz = /bits/ 64 <2764800000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1843200 * 32)>; + }; + + opp-2841600000 { + opp-hz = /bits/ 64 <2841600000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-2899200000 { + opp-hz = /bits/ 64 <2899200000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-2956800000 { + opp-hz = /bits/ 64 <2956800000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-3014400000 { + opp-hz = /bits/ 64 <3014400000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-3072000000 { + opp-hz = /bits/ 64 <3072000000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-3148800000 { + opp-hz = /bits/ 64 <3148800000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (2035200 * 32)>; + }; + }; + + cpu7_opp_table: opp-table-cpu7 { + compatible = "operating-points-v2"; + opp-shared; + + opp-480000000 { + opp-hz = /bits/ 64 <480000000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-499200000 { + opp-hz = /bits/ 64 <499200000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-576000000 { + opp-hz = /bits/ 64 <576000000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>; + }; + + opp-614400000 { + opp-hz = /bits/ 64 <614400000>; + opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>; + }; + + opp-672000000 { + opp-hz = /bits/ 64 <672000000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-729600000 { + opp-hz = /bits/ 64 <729600000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-787200000 { + opp-hz = /bits/ 64 <787200000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-844800000 { + opp-hz = /bits/ 64 <844800000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-902400000 { + opp-hz = /bits/ 64 <902400000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-940800000 { + opp-hz = /bits/ 64 <940800000>; + opp-peak-kBps = <(466000 * 16) (768000 * 4) (499200 * 32)>; + }; + + opp-1017600000 { + opp-hz = /bits/ 64 <1017600000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (844800 * 32)>; + }; + + opp-1075200000 { + opp-hz = /bits/ 64 <1075200000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (844800 * 32)>; + }; + + opp-1132800000 { + opp-hz = /bits/ 64 <1132800000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (844800 * 32)>; + }; + + opp-1190400000 { + opp-hz = /bits/ 64 <1190400000>; + opp-peak-kBps = <(466000 * 16) (1555000 * 4) (1036800 * 32)>; + }; + + opp-1248000000 { + opp-hz = /bits/ 64 <1248000000>; + opp-peak-kBps = <(600000 * 16) (2092000 * 4) (1036800 * 32)>; + }; + + opp-1305600000 { + opp-hz = /bits/ 64 <1305600000>; + opp-peak-kBps = <(600000 * 16) (2092000 * 4) (1036800 * 32)>; + }; + + opp-1363200000 { + opp-hz = /bits/ 64 <1363200000>; + opp-peak-kBps = <(600000 * 16) (2092000 * 4) (1036800 * 32)>; + }; + + opp-1420800000 { + opp-hz = /bits/ 64 <1420800000>; + opp-peak-kBps = <(600000 * 16) (2092000 * 4) (1248000 * 32)>; + }; + + opp-1478400000 { + opp-hz = /bits/ 64 <1478400000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1555200000 { + opp-hz = /bits/ 64 <1555200000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1593600000 { + opp-hz = /bits/ 64 <1593600000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1670400000 { + opp-hz = /bits/ 64 <1670400000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1708800000 { + opp-hz = /bits/ 64 <1708800000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1804800000 { + opp-hz = /bits/ 64 <1804800000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1824000000 { + opp-hz = /bits/ 64 <1824000000>; + opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1248000 * 32)>; + }; + + opp-1939200000 { + opp-hz = /bits/ 64 <1939200000>; + opp-peak-kBps = <(806000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2035200000 { + opp-hz = /bits/ 64 <2035200000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2073600000 { + opp-hz = /bits/ 64 <2073600000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2112000000 { + opp-hz = /bits/ 64 <2112000000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2169600000 { + opp-hz = /bits/ 64 <2169600000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2208000000 { + opp-hz = /bits/ 64 <2208000000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2246400000 { + opp-hz = /bits/ 64 <2246400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2304000000 { + opp-hz = /bits/ 64 <2304000000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2342400000 { + opp-hz = /bits/ 64 <2342400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2380800000 { + opp-hz = /bits/ 64 <2380800000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2438400000 { + opp-hz = /bits/ 64 <2438400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2457600000 { + opp-hz = /bits/ 64 <2457600000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2496000000 { + opp-hz = /bits/ 64 <2496000000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2553600000 { + opp-hz = /bits/ 64 <2553600000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1440000 * 32)>; + }; + + opp-2630400000 { + opp-hz = /bits/ 64 <2630400000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1651200 * 32)>; + }; + + opp-2688000000 { + opp-hz = /bits/ 64 <2688000000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1651200 * 32)>; + }; + + opp-2745600000 { + opp-hz = /bits/ 64 <2745600000>; + opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1843200 * 32)>; + }; + + opp-2803200000 { + opp-hz = /bits/ 64 <2803200000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-2880000000 { + opp-hz = /bits/ 64 <2880000000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-2937600000 { + opp-hz = /bits/ 64 <2937600000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-2995200000 { + opp-hz = /bits/ 64 <2995200000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-3052800000 { + opp-hz = /bits/ 64 <3052800000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (1843200 * 32)>; + }; + + opp-3187200000 { + opp-hz = /bits/ 64 <3187200000>; + opp-peak-kBps = <(1066000 * 16) (4224000 * 4) (2035200 * 32)>; + }; + }; + pmu-a520 { compatible = "arm,cortex-a520-pmu"; interrupts = ;