From patchwork Wed Feb 5 09:51:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 863433 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 24AE222B8A7; Wed, 5 Feb 2025 09:52:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749178; cv=none; b=HtaNrf5YfxiOQfWYKciScNd7eyzVtD8UwUbQy3CThH0buVOWWDgyJ+5RTxXBIAxjf7tGVONfBA3icDb8L4zVvzqLUkS1yaWvKxLthMO6lyFdnuLRarc+Jbt3d/np6eMrsgt2bGDvWkLEo31SMz/3YiIygisiGeR9nvu/0szyza8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749178; c=relaxed/simple; bh=BHuiUtSV91zBPe3AHwqHvnwH0yVBbd7xycQRGNHlHU4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=F/QjMarPU9LJmb5zvZ7b+Y7Ff+sIUiDAGfFEJhNJ1s5TRD0Fd2rspTy+9KFv+vfBwuiUSr9m2z8LAzNE9KP33qgPlekUD4qKQV16qs9iRiusCaKvD9ZXUdyryKfeLw1Xs3A+DJ+EkhTUOFQS266xBOAMlSUhgGbPvDk97DxeghA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=PsWr45Uv; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="PsWr45Uv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738749177; x=1770285177; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BHuiUtSV91zBPe3AHwqHvnwH0yVBbd7xycQRGNHlHU4=; b=PsWr45Uv8FdChalqEC2HDsxCIMKuleQFbVkZrXcqciEizJ73y6OVnRbi jShPAjagzTGszMlvGuN8IKFwha73MnvmapKI+fODWwxlCSJAT5o6gxYbQ qBx3uxdORg7DQwZJPQxkkT5G2vNlxg5AhS7EMtBC08as86GGJAaqqMx1w KFPvs8Siwi+Aa7/jHvhlx/92cABqoz5f0pYzRx7lHmAl9XYzqGJ6KrFBg an55eih+D5XZRSWGXyGPBdp3ICHcrldgxpNCdePjLhWp4P2NU2q8xu/Qf 3Jlp5tOg2wV/z6mN8IClQJ6wZdA43NrMZy1Tya6VsCt7CyszVHXcVV6b+ Q==; X-CSE-ConnectionGUID: hKiw3KcwQcSOirOb7d+vZA== X-CSE-MsgGUID: USWg42UdSjex+oiyzidbDA== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="49922059" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="49922059" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 01:52:49 -0800 X-CSE-ConnectionGUID: NmD2/YhzQtasqBOF9Vaiew== X-CSE-MsgGUID: wCLm2/SaRW6UUO4RtZlJ+A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="115822420" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa003.jf.intel.com with ESMTP; 05 Feb 2025 01:52:47 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 9B6F5299; Wed, 05 Feb 2025 11:52:45 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Patrick Rudolph , Linus Walleij Subject: [PATCH v3 01/10] pinctrl: cy8c95x0: Use better bitmap APIs where appropriate Date: Wed, 5 Feb 2025 11:51:11 +0200 Message-ID: <20250205095243.512292-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> References: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 There are bitmap_gather() and bitmap_scatter() that are factually reimplemented in the driver. Use better bitmap APIs where appropriate. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 33 +++++++++++------------------- 1 file changed, 12 insertions(+), 21 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index d73004b4a45e..f53dbcaf9a32 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -137,7 +137,7 @@ static const struct dmi_system_id cy8c95x0_dmi_acpi_irq_info[] = { * @irq_trig_low: I/O bits affected by a low voltage level * @irq_trig_high: I/O bits affected by a high voltage level * @push_pull: I/O bits configured as push pull driver - * @shiftmask: Mask used to compensate for Gport2 width + * @map: Mask used to compensate for Gport2 width * @nport: Number of Gports in this chip * @gpio_chip: gpiolib chip * @driver_data: private driver data @@ -158,7 +158,7 @@ struct cy8c95x0_pinctrl { DECLARE_BITMAP(irq_trig_low, MAX_LINE); DECLARE_BITMAP(irq_trig_high, MAX_LINE); DECLARE_BITMAP(push_pull, MAX_LINE); - DECLARE_BITMAP(shiftmask, MAX_LINE); + DECLARE_BITMAP(map, MAX_LINE); unsigned int nport; struct gpio_chip gpio_chip; unsigned long driver_data; @@ -622,13 +622,8 @@ static int cy8c95x0_write_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, int ret; /* Add the 4 bit gap of Gport2 */ - bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE); - bitmap_shift_left(tmask, tmask, 4, MAX_LINE); - bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3); - - bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); - bitmap_shift_left(tval, tval, 4, MAX_LINE); - bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3); + bitmap_scatter(tmask, mask, chip->map, MAX_LINE); + bitmap_scatter(tval, val, chip->map, MAX_LINE); for (unsigned int i = 0; i < chip->nport; i++) { /* Skip over unused banks */ @@ -653,19 +648,13 @@ static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, { DECLARE_BITMAP(tmask, MAX_LINE); DECLARE_BITMAP(tval, MAX_LINE); - DECLARE_BITMAP(tmp, MAX_LINE); int read_val; u8 bits; int ret; /* Add the 4 bit gap of Gport2 */ - bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE); - bitmap_shift_left(tmask, tmask, 4, MAX_LINE); - bitmap_replace(tmask, tmask, mask, chip->shiftmask, BANK_SZ * 3); - - bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); - bitmap_shift_left(tval, tval, 4, MAX_LINE); - bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3); + bitmap_scatter(tmask, mask, chip->map, MAX_LINE); + bitmap_scatter(tval, val, chip->map, MAX_LINE); for (unsigned int i = 0; i < chip->nport; i++) { /* Skip over unused banks */ @@ -685,8 +674,7 @@ static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, } /* Fill the 4 bit gap of Gport2 */ - bitmap_shift_right(tmp, tval, 4, MAX_LINE); - bitmap_replace(val, tmp, tval, chip->shiftmask, MAX_LINE); + bitmap_gather(val, tval, chip->map, MAX_LINE); return 0; } @@ -1486,8 +1474,11 @@ static int cy8c95x0_probe(struct i2c_client *client) return PTR_ERR(chip->regmap); bitmap_zero(chip->push_pull, MAX_LINE); - bitmap_zero(chip->shiftmask, MAX_LINE); - bitmap_set(chip->shiftmask, 0, 20); + + /* Setup HW pins mapping */ + bitmap_fill(chip->map, MAX_LINE); + bitmap_clear(chip->map, 20, 4); + mutex_init(&chip->i2c_lock); if (dmi_first_match(cy8c95x0_dmi_acpi_irq_info)) { From patchwork Wed Feb 5 09:51:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 863432 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D481622B59A; Wed, 5 Feb 2025 09:52:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749181; cv=none; b=nMQj8SWSb990bcsBhXOsk/Mg89/247Oi5ZLBv6hojRQtLpyGwZMCXCi9TXWfKjyLv6RD+ZMiDnYEqIN3NkYt0M/t64Cj6WfzPxcTiwgUZ1KGYjyXnZQiZroIJURloQHLaBt19jR6CCcP3GzpKjORJoFJk9nNRJ5RQjVdpaNGT0Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749181; c=relaxed/simple; bh=tZcHogWpC3u+t+y2IsGjxMavEbq1olEFTwGR+RsGkcs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SdWxh0z7XAHvZ0Tu2W0SDEWtMt2P6pIFYGUk4FMqy2IygVbsTE7yJb5C95o7BB9G0wB7ZWYAszZEc61TEJ2DbVPHZbZbfBbQuI8GHImzSbKmDCb7t1nWs/mI2pTFTy2KO6aa/tN6sQnw6ome/lwAT1BPBohKHnF8eSGIgdh+bpY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=QTKWnDQb; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QTKWnDQb" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738749176; x=1770285176; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tZcHogWpC3u+t+y2IsGjxMavEbq1olEFTwGR+RsGkcs=; b=QTKWnDQbIF2gkK0wpBu1qa9gJiyZ8hO6ngy6z/lxqGoKSQlGHeW9esu7 GsptnN9CvyngIjdf26Rw1hUAQkOMM8yeslsAESjV4QCLat/uVIyGN5zc5 NwC8PpFDESwI20+uzwgsgnSywWgz47XvWEGLTZ5+V4FZcD/lahdMDfZ6G 3mXJtJAjHvqVBokNyCki5rEd2ytALCBBbqcg7SqXcbMnyxpQT0Aga3L8r faI9Hic4dKJRGyYf5sTFWl8yQDXLkyyTQyEqtI3HkWKol/Le/3LAgH3M6 qRsxHwIOJK8eSFP7v0UVuU9RFx0F/+u/WkhQDQFdEBeuqxRgUP6c9ZAKR Q==; X-CSE-ConnectionGUID: m5dNAUZlQSOzZbkCUVHNNA== X-CSE-MsgGUID: pwxbIslKRPSbZ6QNIxASYA== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="49922061" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="49922061" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 01:52:49 -0800 X-CSE-ConnectionGUID: WUTYvjSAR3Cx5QL8OwhTXQ== X-CSE-MsgGUID: SCQnpLnuSEqqtMkKWxKW1Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="115822421" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa003.jf.intel.com with ESMTP; 05 Feb 2025 01:52:47 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id B47D23A7; Wed, 05 Feb 2025 11:52:45 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Patrick Rudolph , Linus Walleij Subject: [PATCH v3 02/10] pinctrl: cy8c95x0; Switch to use for_each_set_clump8() Date: Wed, 5 Feb 2025 11:51:12 +0200 Message-ID: <20250205095243.512292-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> References: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 for_each_set_clump8() has embedded check for unset clump to skip. Switch driver to use for_each_set_clump8(). Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index f53dbcaf9a32..0eb570952f3f 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -617,21 +617,18 @@ static int cy8c95x0_write_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, { DECLARE_BITMAP(tmask, MAX_LINE); DECLARE_BITMAP(tval, MAX_LINE); + unsigned long bits, offset; int write_val; - u8 bits; int ret; /* Add the 4 bit gap of Gport2 */ bitmap_scatter(tmask, mask, chip->map, MAX_LINE); bitmap_scatter(tval, val, chip->map, MAX_LINE); - for (unsigned int i = 0; i < chip->nport; i++) { - /* Skip over unused banks */ - bits = bitmap_get_value8(tmask, i * BANK_SZ); - if (!bits) - continue; + for_each_set_clump8(offset, bits, tmask, chip->tpin) { + unsigned int i = offset / 8; - write_val = bitmap_get_value8(tval, i * BANK_SZ); + write_val = bitmap_get_value8(tval, offset); ret = cy8c95x0_regmap_update_bits(chip, reg, i, bits, write_val); if (ret < 0) { @@ -648,19 +645,16 @@ static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, { DECLARE_BITMAP(tmask, MAX_LINE); DECLARE_BITMAP(tval, MAX_LINE); + unsigned long bits, offset; int read_val; - u8 bits; int ret; /* Add the 4 bit gap of Gport2 */ bitmap_scatter(tmask, mask, chip->map, MAX_LINE); bitmap_scatter(tval, val, chip->map, MAX_LINE); - for (unsigned int i = 0; i < chip->nport; i++) { - /* Skip over unused banks */ - bits = bitmap_get_value8(tmask, i * BANK_SZ); - if (!bits) - continue; + for_each_set_clump8(offset, bits, tmask, chip->tpin) { + unsigned int i = offset / 8; ret = cy8c95x0_regmap_read(chip, reg, i, &read_val); if (ret < 0) { @@ -669,8 +663,8 @@ static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, } read_val &= bits; - read_val |= bitmap_get_value8(tval, i * BANK_SZ) & ~bits; - bitmap_set_value8(tval, read_val, i * BANK_SZ); + read_val |= bitmap_get_value8(tval, offset) & ~bits; + bitmap_set_value8(tval, read_val, offset); } /* Fill the 4 bit gap of Gport2 */ From patchwork Wed Feb 5 09:51:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 863435 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 886C322ACDF; Wed, 5 Feb 2025 09:52:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749175; cv=none; b=c4avof/T4TKraXC7awb595/nfHdrm0cdMkzpYjNeSISPbh5MeE6rhTkfrjG5vSSbUPz4tfaIWJNhOSzK2I/EEXqEebdpJ1D9SeFb1gQNgW2F0CQSIGWzYUeGh0L3PilgnWzykqmnDpt8Dx8vevdYEiG8Mlfbly5Iv78WAOFs7ts= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749175; c=relaxed/simple; bh=XjzpqwWtdQHVRnKD94VMrrwrQ6eYKxVsJnhtKTlNRCY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nBHCWNTjcWRopjkEySNk4QHmmkz3qDJK76kJ42TqH7dIofqNFMxHZLXALsMiPtYcjhZhZtM5xOPNvZW5N7gcF1k3Bs5SVkES8Zkx91deRxOIBwMfBe2z/Qs6jduMc2FX/aDtgpWiCbBsGUB90pHdTMzvjGMvx6tYkgSK8POe7lg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=N/yPGDV4; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="N/yPGDV4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738749174; x=1770285174; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XjzpqwWtdQHVRnKD94VMrrwrQ6eYKxVsJnhtKTlNRCY=; b=N/yPGDV44ETfH0cQXt+VzOv9nR2dFVYBKRy0wg4y4QenCtnMYxW8H+rI WpOaPXQBjXtwnVWwQhNgAxduYWyHDbtiaN1cNXFySe2ulslbL7LaS+leh ojPL348fezIvlx5YI49kqZjhpvKoAYi2KDGvBizHgWZWJLonnbQBrYU9+ Ijnc4tS6nzon30L8Dz6HTaWCf0AVRGnjPXKxiA5RrRjQkERsBy1gPvDt8 +FBQbU+FurXmhGFcgqkgl5d7CO7HZXWf30WaEHMVq3j1F1hY1MTEjDNjn dGEQbWYBrgF02FN9A6FzcHYPF/LAEtzrKkPSQhQ4B8Djvqf/EShTCOHJ8 w==; X-CSE-ConnectionGUID: Az/OzIn4QqCMzlzbBSI2sQ== X-CSE-MsgGUID: yrf26Mc7Rfq4aU3ks0h7Ew== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="49922052" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="49922052" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 01:52:49 -0800 X-CSE-ConnectionGUID: jUCim4aKSYyu/5XCRyF5kg== X-CSE-MsgGUID: vQ2Po2amR/yYwiOM9lDb4w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="115822423" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa003.jf.intel.com with ESMTP; 05 Feb 2025 01:52:47 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id BEAED399; Wed, 05 Feb 2025 11:52:45 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Patrick Rudolph , Linus Walleij Subject: [PATCH v3 03/10] pinctrl: cy8c95x0: Transform to cy8c95x0_regmap_read_bits() Date: Wed, 5 Feb 2025 11:51:13 +0200 Message-ID: <20250205095243.512292-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> References: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The returned value of cy8c95x0_regmap_read() is used always with a bitmask being applied. Move that bitmasking code into the function. At the same time transform it to cy8c95x0_regmap_read_bits() which will be in align with the write and update counterparts. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 45 +++++++++++++++++------------- 1 file changed, 25 insertions(+), 20 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 0eb570952f3f..0d732e7a0868 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -575,12 +575,13 @@ static int cy8c95x0_regmap_update_bits(struct cy8c95x0_pinctrl *chip, unsigned i } /** - * cy8c95x0_regmap_read() - reads a register using the regmap cache + * cy8c95x0_regmap_read_bits() - reads a register using the regmap cache * @chip: The pinctrl to work on * @reg: The register to read from. Can be direct access or muxed register. * @port: The port to be used for muxed registers or quick path direct access * registers. Otherwise unused. - * @read_val: Value read from hardware or cache + * @mask: Bitmask to apply + * @val: Value read from hardware or cache * * This function handles the register reads from the direct access registers and * the muxed registers while caching all register accesses, internally handling @@ -590,10 +591,12 @@ static int cy8c95x0_regmap_update_bits(struct cy8c95x0_pinctrl *chip, unsigned i * * Return: 0 for successful request, else a corresponding error value */ -static int cy8c95x0_regmap_read(struct cy8c95x0_pinctrl *chip, unsigned int reg, - unsigned int port, unsigned int *read_val) +static int cy8c95x0_regmap_read_bits(struct cy8c95x0_pinctrl *chip, unsigned int reg, + unsigned int port, unsigned int mask, unsigned int *val) { - int off, ret; + unsigned int off; + unsigned int tmp; + int ret; /* Registers behind the PORTSEL mux have their own range in regmap */ if (cy8c95x0_muxed_register(reg)) { @@ -605,11 +608,14 @@ static int cy8c95x0_regmap_read(struct cy8c95x0_pinctrl *chip, unsigned int reg, else off = reg; } - guard(mutex)(&chip->i2c_lock); - ret = regmap_read(chip->regmap, off, read_val); + scoped_guard(mutex, &chip->i2c_lock) + ret = regmap_read(chip->regmap, off, &tmp); + if (ret) + return ret; - return ret; + *val = tmp & mask; + return 0; } static int cy8c95x0_write_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, @@ -646,7 +652,7 @@ static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, DECLARE_BITMAP(tmask, MAX_LINE); DECLARE_BITMAP(tval, MAX_LINE); unsigned long bits, offset; - int read_val; + unsigned int read_val; int ret; /* Add the 4 bit gap of Gport2 */ @@ -656,13 +662,12 @@ static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, for_each_set_clump8(offset, bits, tmask, chip->tpin) { unsigned int i = offset / 8; - ret = cy8c95x0_regmap_read(chip, reg, i, &read_val); + ret = cy8c95x0_regmap_read_bits(chip, reg, i, bits, &read_val); if (ret < 0) { dev_err(chip->dev, "failed reading register %d, port %u: err %d\n", reg, i, ret); return ret; } - read_val &= bits; read_val |= bitmap_get_value8(tval, offset) & ~bits; bitmap_set_value8(tval, read_val, offset); } @@ -699,10 +704,10 @@ static int cy8c95x0_gpio_get_value(struct gpio_chip *gc, unsigned int off) struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); u8 port = cypress_get_port(chip, off); u8 bit = cypress_get_pin_mask(chip, off); - u32 reg_val; + unsigned int reg_val; int ret; - ret = cy8c95x0_regmap_read(chip, CY8C95X0_INPUT, port, ®_val); + ret = cy8c95x0_regmap_read_bits(chip, CY8C95X0_INPUT, port, bit, ®_val); if (ret < 0) { /* * NOTE: @@ -713,7 +718,7 @@ static int cy8c95x0_gpio_get_value(struct gpio_chip *gc, unsigned int off) return 0; } - return !!(reg_val & bit); + return reg_val ? 1 : 0; } static void cy8c95x0_gpio_set_value(struct gpio_chip *gc, unsigned int off, @@ -731,14 +736,14 @@ static int cy8c95x0_gpio_get_direction(struct gpio_chip *gc, unsigned int off) struct cy8c95x0_pinctrl *chip = gpiochip_get_data(gc); u8 port = cypress_get_port(chip, off); u8 bit = cypress_get_pin_mask(chip, off); - u32 reg_val; + unsigned int reg_val; int ret; - ret = cy8c95x0_regmap_read(chip, CY8C95X0_DIRECTION, port, ®_val); + ret = cy8c95x0_regmap_read_bits(chip, CY8C95X0_DIRECTION, port, bit, ®_val); if (ret < 0) return ret; - if (reg_val & bit) + if (reg_val) return GPIO_LINE_DIRECTION_IN; return GPIO_LINE_DIRECTION_OUT; @@ -751,8 +756,8 @@ static int cy8c95x0_gpio_get_pincfg(struct cy8c95x0_pinctrl *chip, enum pin_config_param param = pinconf_to_config_param(*config); u8 port = cypress_get_port(chip, off); u8 bit = cypress_get_pin_mask(chip, off); + unsigned int reg_val; unsigned int reg; - u32 reg_val; u16 arg = 0; int ret; @@ -809,11 +814,11 @@ static int cy8c95x0_gpio_get_pincfg(struct cy8c95x0_pinctrl *chip, * Writing 1 to one of the drive mode registers will automatically * clear conflicting set bits in the other drive mode registers. */ - ret = cy8c95x0_regmap_read(chip, reg, port, ®_val); + ret = cy8c95x0_regmap_read_bits(chip, reg, port, bit, ®_val); if (ret < 0) return ret; - if (reg_val & bit) + if (reg_val) arg = 1; if (param == PIN_CONFIG_OUTPUT_ENABLE) arg = !arg; From patchwork Wed Feb 5 09:51:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 863434 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6AF0422B581; Wed, 5 Feb 2025 09:52:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749177; cv=none; b=LPfR+tXt+RzTopdzsea83UXiVr8f7dUTDdxloyDlUnW6D68w20KyX/GbeO9FchLBO6wrLEN9F8JpQvKemn5oJ3QTICTsu9qAWSXCjH285RhSBSzKKE+sRKAgAeXilkEf5qRIUltLRcv8gaP1IPsUswHltXsLBaFcEipQx3Z9nRI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749177; c=relaxed/simple; bh=WHK9fb8+ayViHTHccDGl4xThI9FDf2VmEmsUNQRZRDo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NEhzfDPxkT5Zf9E4RmGEEhmcz9HC5jVzD8EXCWD6J4we9+zKxbVm+tA6aDxpXI0vfjYik0KAHoW5gQYmiWI6PWnv1TSbDPKUcQmPaBX+WcGpLGOxwAPYofVr9F6tFNDDT/u/cDg8mK4BlIdnweZQ4jtdHFPRL8o5szvklYF7Sv0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=c0IhnNaZ; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="c0IhnNaZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738749176; x=1770285176; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WHK9fb8+ayViHTHccDGl4xThI9FDf2VmEmsUNQRZRDo=; b=c0IhnNaZGibdvY9oOJEz18h8NUPEaGWBlsiXvwT3tFEMUAgOvqObM8S9 hZOmz6YMJVmkgLGwkTlCMhQwDricra53kVrmIsObTPRCxjswTOzZ8cxqJ 3j6f8Ve6ruywoUgkylvLcyGR/RTc+eraaDgaZhyh5gLGwDTvh2ZhouKrT JQL12ui+fBZq5FQysK3mfpIp6kl4mvUF9JX5kkJ325J284anWvuBASVcE ElFAhf9qYGgIyzDi8PKCRIbFJHklnL1vNO8vaHxsx6dzxqKT1BlQRDAvg lqR/MYOEsIb6nXV/IVKL/hUdocID1CO7ZBnp9H5MweomggTBW8VwBc0FM w==; X-CSE-ConnectionGUID: OQHciC4CSUWJ0I7xgFp6JQ== X-CSE-MsgGUID: gScozbGmQqewosrL0eOJ/Q== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="49922057" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="49922057" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 01:52:49 -0800 X-CSE-ConnectionGUID: RVXUa+O4TYyH4fTq5leG4w== X-CSE-MsgGUID: 63Z1QRr4SZ6pGm+CQxIhgA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="115822422" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa003.jf.intel.com with ESMTP; 05 Feb 2025 01:52:47 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id D319349A; Wed, 05 Feb 2025 11:52:45 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Patrick Rudolph , Linus Walleij Subject: [PATCH v3 04/10] pinctrl: cy8c95x0: Remove redundant check in cy8c95x0_regmap_update_bits_base() Date: Wed, 5 Feb 2025 11:51:14 +0200 Message-ID: <20250205095243.512292-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> References: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The function is never called with the PORTSEL register in the argument. Drop unneeded check, but rescue a comment. While at it, drop inline and allow any compiler to choose better stragy (note, that inline in C code is only a recomendation to most of the modern compilers anyway). Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 0d732e7a0868..04b534b950d0 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -477,20 +477,14 @@ static const struct regmap_config cy8c9520_i2c_regmap = { #endif }; -static inline int cy8c95x0_regmap_update_bits_base(struct cy8c95x0_pinctrl *chip, - unsigned int reg, - unsigned int port, - unsigned int mask, - unsigned int val, - bool *change, bool async, - bool force) +/* Caller should never modify PORTSEL directly */ +static int cy8c95x0_regmap_update_bits_base(struct cy8c95x0_pinctrl *chip, + unsigned int reg, unsigned int port, + unsigned int mask, unsigned int val, + bool *change, bool async, bool force) { int ret, off, i; - /* Caller should never modify PORTSEL directly */ - if (reg == CY8C95X0_PORTSEL) - return -EINVAL; - /* Registers behind the PORTSEL mux have their own range in regmap */ if (cy8c95x0_muxed_register(reg)) { off = CY8C95X0_MUX_REGMAP_TO_OFFSET(reg, port); From patchwork Wed Feb 5 09:51:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 863436 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E8A622A7FC; Wed, 5 Feb 2025 09:52:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749172; cv=none; b=F+/mSMyR/cynDqBZmRX1WAh40ZrpVgXcl3eqaZr0aRaDDbzhe//UPpBy4Siz0N5QmkEvDBhvsWr61fZYOktPVRYkWyWc/prjVL9ypulZTuAUEKEGY34TqhpppjfiUjE7vnpFT/h+C2KcX2mISJ99C+b2jewwB6YYqh9e7TB42WE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749172; c=relaxed/simple; bh=L0Mwe6DQAGdn7OC7tFDCP8gYeLBNzoodU0fyoPrg+WM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ic1qkmsGen4it1IO//CzZJ0O2Qk7/92Z3cE9idFbn5KARRxbDg8e/z6i7kTx0NjwuCTvRpkDMGLHoX4hslGCZeiVZYNAcXu1+k78E9RdrniqprQdk8CApSJZ7ta8ugU5rrq5M0Al2kN2V+mjYVanEJsesBx/0QrufOxC6c9gemo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=epLmuozv; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="epLmuozv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738749171; x=1770285171; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=L0Mwe6DQAGdn7OC7tFDCP8gYeLBNzoodU0fyoPrg+WM=; b=epLmuozvLQ1SwZPQhMz+9+7zRig5bxm7CHcYMQWspAlq1bBiFSA4CXbU EaKWcd7WGbimlCshUxeAGAYU+ovEUHwkIKSmTla0KsiBj9SRV8VKgj/l1 IOi0qNvvjiNsPsgrXIWmzJO7aKeti3dRzQ0aY2ILofNUgnf1h1oggUBfM K/IY627oUCesKKyUBmDKiq5ftDOo+rS29Ya9TaWpLG8ADnMnsz/V/Grhx jNa0vL0wuzXyvWei0a9IGGszQonhhVUgvDDFT3OBrX486gfEu2n+sVYHq yWE6ritklVwxGxBooyzVX2vGob7G2lOeFJcPOQdv7i0Muxj+XaLDqnNGn w==; X-CSE-ConnectionGUID: JXdaVpm8RSO00jWBU/MY4A== X-CSE-MsgGUID: YmlNl2uUS1yuddVviMqeqw== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="38512589" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="38512589" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 01:52:50 -0800 X-CSE-ConnectionGUID: Ohft9cOdRd+H1eJCcv4XCg== X-CSE-MsgGUID: /xXOjKF6QLOCQrWMFhczVQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="141744566" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa001.fm.intel.com with ESMTP; 05 Feb 2025 01:52:49 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id D8D143B1; Wed, 05 Feb 2025 11:52:45 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Patrick Rudolph , Linus Walleij Subject: [PATCH v3 05/10] pinctrl: cy8c95x0: Replace 'return ret' by 'return 0' in some cases Date: Wed, 5 Feb 2025 11:51:15 +0200 Message-ID: <20250205095243.512292-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> References: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 When it's known that the returned value can't be non-zero, use 'return 0' explicitly. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 04b534b950d0..19f92ec83871 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -517,7 +517,7 @@ static int cy8c95x0_regmap_update_bits_base(struct cy8c95x0_pinctrl *chip, regcache_cache_only(chip->regmap, false); } - return ret; + return 0; } /** @@ -1286,7 +1286,7 @@ static int cy8c95x0_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *configs, unsigned int num_configs) { struct cy8c95x0_pinctrl *chip = pinctrl_dev_get_drvdata(pctldev); - int ret = 0; + int ret; int i; for (i = 0; i < num_configs; i++) { @@ -1295,7 +1295,7 @@ static int cy8c95x0_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, return ret; } - return ret; + return 0; } static const struct pinconf_ops cy8c95x0_pinconf_ops = { From patchwork Wed Feb 5 09:51:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 862218 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AD47322B8B9; Wed, 5 Feb 2025 09:52:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749183; cv=none; b=mDYCjCrry7BhFQpUx4+QDEsTaqyxxeOW8jQxiwMioCBRDYqSzR3TDi+HIfP4NbVpRYobewvkRp/nul4+P6Y+wk6uyu9w7UV0ZWwsAzf7k1rzafr9CBDOCc8aaEbRF5gLLF2g2D5gbW2eYh94K01m8hrA2C9dQ/1fvukecnwGfIE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749183; c=relaxed/simple; bh=WIStjLvfgR5ngbR7mouxyJ0bpHzXhBGse4C094h8aY4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DoIdecT6B+yOOucLlzGSndYm+Rb5Egt1PeK03YHYebthllKwP6wUNsdFA4VV5fyuk57z81Sc80E/J9tMTNQuvTM/2gn4FRKcgb2NG1BG8tAVvwV4xIfOzwIJvwqsxKbUgfjWKGaNTMYf3mi99NSkTlrXxUwlrl6SKrhF0oIPEZo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=iOBSc6fZ; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="iOBSc6fZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738749178; x=1770285178; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WIStjLvfgR5ngbR7mouxyJ0bpHzXhBGse4C094h8aY4=; b=iOBSc6fZ2utxcAhd9IQgTASwQdIf/5Toq0YSn1mGsxJAQXZm9XUaUhxf 3YNFul1/YodSjf5+0SjswcwbO2w1NSFo8KztedK3wxygYpaakg5RxIaKs XrgM3BxHvW5WUNjl86+mzn2RR4D4oxNPUNtdLYR/i8oIjvtl5wBMN+vcA DiwBKl/aNDkqQsgVgIevCSK9ubJ90LC1AxpdfIzKl8TnSe3fj8aHa9vaO KijlL9yI8cgrlgf+T+V3MtDTedmemH8q7PEHfVV7yy9Dgs0Hnn3BmfCBT +zS746T6dUSrv/YNVSS+4bzzYI7KRNfMyXPdfJPsxGS3u87STT47GHv+h w==; X-CSE-ConnectionGUID: 0uyPO9LvQYm0qctissNoEQ== X-CSE-MsgGUID: rKN5enXiSYee/gCHDPywpQ== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="49922067" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="49922067" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 01:52:51 -0800 X-CSE-ConnectionGUID: 5Y8xcylkQxeuqFPLRcHp6g== X-CSE-MsgGUID: S+kweudCT0a5uxdkaXxqjg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="115822426" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa003.jf.intel.com with ESMTP; 05 Feb 2025 01:52:49 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id E7B9957C; Wed, 05 Feb 2025 11:52:45 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Patrick Rudolph , Linus Walleij Subject: [PATCH v3 06/10] pinctrl: cy8c95x0: Initialise boolean variable with boolean values Date: Wed, 5 Feb 2025 11:51:16 +0200 Message-ID: <20250205095243.512292-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> References: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The 'ret' variable in cy8c95x0_irq_handler() is defined as bool, but is intialised with integers. Avoid implicit castings and initialise boolean variable with boolean values. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 19f92ec83871..7e79f20f4d78 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -1076,7 +1076,7 @@ static irqreturn_t cy8c95x0_irq_handler(int irq, void *devid) if (!ret) return IRQ_RETVAL(0); - ret = 0; + ret = false; for_each_set_bit(level, pending, MAX_LINE) { /* Already accounted for 4bit gap in GPort2 */ nested_irq = irq_find_mapping(gc->irq.domain, level); @@ -1095,7 +1095,7 @@ static irqreturn_t cy8c95x0_irq_handler(int irq, void *devid) else handle_nested_irq(nested_irq); - ret = 1; + ret = true; } return IRQ_RETVAL(ret); From patchwork Wed Feb 5 09:51:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 862219 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EDA9E22C355; Wed, 5 Feb 2025 09:52:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749180; cv=none; b=FjwalLPoCyDAUdBh7qqM8rPu8pu08mLD0e2CBwgA/WnIy+c3wHPHmUNXUCmXDxEfM96H5iMlHSjINgmQkzZnHNAcviwbbNoiLsTC78j5xYljqfkskv1u4w2qVJXr06U2BDZf7INNmZeIoV/hY90KIZqnKxzWjCttXa9Z2ZGEeL0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749180; c=relaxed/simple; bh=hx2GED+KzknC2aIdo2tmM0oA+QVXDCoaWc8rqNOrIQY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cyWyCW3xkRUXHfy1yZOPlo8VDirrJfSAk/ka2XCj6QI8fLrzEroRuqrcEvB8WAihhAioa1GPnOt8LLYPIGu4gCJVvX+uNL91ldojN2I2GV7SSIlXwCjDo33LDRLUS6bgJ2voZJDDiWwmoecrYnltL4TtP0CyJTiV5UU7/Dv1ncw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=SqRJMn7K; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="SqRJMn7K" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738749179; x=1770285179; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hx2GED+KzknC2aIdo2tmM0oA+QVXDCoaWc8rqNOrIQY=; b=SqRJMn7Kr4rln4kdenCD6hjT+k/gmB/ned1QVGe8iKhxBEANJaD4HL5X sLLbRtMl0HFf11EBZT7GG20DZ7oEeTKlHGWerpZ9lKzKgWOuAgZeSjw2v 6QHrjZoQopQts+K5ui23i0G2uyChhvlRDy0KBfZwsHKn0mcmMLrdr63+9 JyEamb+1D0SWfRph8Ktoy2zysGKDGyfnzr1Ym/gmGLvwi/20Byd3Un4F/ FpB9IT5IpnFQcbl7EzaaLVfO+gM0IBqfTWU1B2EmGWQzQJfiMj81QjT7K jFDeyCMryiMm1mWikSvoPJg6qUMjTFsLlZn3TZHN9i9yk+PW+k9/Yvf5s A==; X-CSE-ConnectionGUID: lgUzN+yRRr6S3jP1xiHH2Q== X-CSE-MsgGUID: RFVH9w2vRhGqINIB8us2PA== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="49922070" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="49922070" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 01:52:51 -0800 X-CSE-ConnectionGUID: +vSdjsUtTdea0WitTjtoWg== X-CSE-MsgGUID: Gyu5BE4tRWmjqj8EpvHzrg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="115822427" Received: from black.fi.intel.com ([10.237.72.28]) by orviesa003.jf.intel.com with ESMTP; 05 Feb 2025 01:52:50 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id ED2184F0; Wed, 05 Feb 2025 11:52:45 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Patrick Rudolph , Linus Walleij Subject: [PATCH v3 07/10] pinctrl: cy8c95x0: Get rid of cy8c95x0_pinmux_direction() forward declaration Date: Wed, 5 Feb 2025 11:51:17 +0200 Message-ID: <20250205095243.512292-8-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> References: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The function is used before being defined. Just move it up enough to get rid of forward declaration. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 54 ++++++++++++++---------------- 1 file changed, 25 insertions(+), 29 deletions(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 7e79f20f4d78..3f2bdaea58b4 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -310,9 +310,6 @@ static const char * const cy8c95x0_groups[] = { "gp77", }; -static int cy8c95x0_pinmux_direction(struct cy8c95x0_pinctrl *chip, - unsigned int pin, bool input); - static inline u8 cypress_get_port(struct cy8c95x0_pinctrl *chip, unsigned int pin) { /* Account for GPORT2 which only has 4 bits */ @@ -672,6 +669,31 @@ static int cy8c95x0_read_regs_mask(struct cy8c95x0_pinctrl *chip, int reg, return 0; } +static int cy8c95x0_pinmux_direction(struct cy8c95x0_pinctrl *chip, unsigned int pin, bool input) +{ + u8 port = cypress_get_port(chip, pin); + u8 bit = cypress_get_pin_mask(chip, pin); + int ret; + + ret = cy8c95x0_regmap_write_bits(chip, CY8C95X0_DIRECTION, port, bit, input ? bit : 0); + if (ret) + return ret; + + /* + * Disable driving the pin by forcing it to HighZ. Only setting + * the direction register isn't sufficient in Push-Pull mode. + */ + if (input && test_bit(pin, chip->push_pull)) { + ret = cy8c95x0_regmap_write_bits(chip, CY8C95X0_DRV_HIZ, port, bit, bit); + if (ret) + return ret; + + __clear_bit(pin, chip->push_pull); + } + + return 0; +} + static int cy8c95x0_gpio_direction_input(struct gpio_chip *gc, unsigned int off) { return pinctrl_gpio_direction_input(gc, off); @@ -1229,32 +1251,6 @@ static int cy8c95x0_gpio_request_enable(struct pinctrl_dev *pctldev, return cy8c95x0_set_mode(chip, pin, false); } -static int cy8c95x0_pinmux_direction(struct cy8c95x0_pinctrl *chip, - unsigned int pin, bool input) -{ - u8 port = cypress_get_port(chip, pin); - u8 bit = cypress_get_pin_mask(chip, pin); - int ret; - - ret = cy8c95x0_regmap_write_bits(chip, CY8C95X0_DIRECTION, port, bit, input ? bit : 0); - if (ret) - return ret; - - /* - * Disable driving the pin by forcing it to HighZ. Only setting - * the direction register isn't sufficient in Push-Pull mode. - */ - if (input && test_bit(pin, chip->push_pull)) { - ret = cy8c95x0_regmap_write_bits(chip, CY8C95X0_DRV_HIZ, port, bit, bit); - if (ret) - return ret; - - __clear_bit(pin, chip->push_pull); - } - - return 0; -} - static int cy8c95x0_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int pin, bool input) From patchwork Wed Feb 5 09:51:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 862221 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 40E9422A7F7; Wed, 5 Feb 2025 09:52:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749176; cv=none; b=XuqOsw8s4B5VleadVo59zlpKzMWQoOOlgGtw+CQP9ZPGKUPFCU0UzGGJxlDnUkCb4C8kB+skH+aIzFfVfNSL3YsUVNQETayU/iiSQCQixQF6402lmyT/jrOjtwfPzyjRrFDmSqopTn+tDEmI4hNMDt0nGBdo4z42A7VhPtqTZO0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749176; c=relaxed/simple; bh=FAWGBV/902TKRkCoeAgWBC7ktaoSHLd/quSF9HPzNa8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=N5SfBeofx7l7PQdyl64XuzUNlFYr8wJLH5dSdn0zlStA4jkJT2KIA26lV1Mm+XGee20FIHiWYE7AbpuKyC8qidusNJFL/dwjIHiUQEjZ19fpzTW99N6SchQVe+v+dVdGsNSSwPdE3WtAPtrrsIV4xdzbLuuRAWv+QDPt2GLesjQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=FO7JsVOq; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="FO7JsVOq" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738749171; x=1770285171; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=FAWGBV/902TKRkCoeAgWBC7ktaoSHLd/quSF9HPzNa8=; b=FO7JsVOqwqEVHoNPk66Cu3yyF6igNU4Ha+yiorMWslq0tPMbNUeYPE97 4IRgeu6nVeptmVIsvW9rkNBLyUIelCV1ORl2uGxSZJ7OK5+yofOMRRQtY kdrWU5n8MA2O27JKQYNb61EbB8qZTOFOS3EAYfavuyMdxPALupmoEa5+C bYaFe6OtCddU+21hA+RROQAH1T7EvUfq5nkqdk0RkxBCsGPyhX1BrwQ6k EDGlYRwb1WntsnZSyNr03FnwmwTpq2csq03Ll0/81o4M3jHzfLB2+PuzI uNJrGzJaboISETbnn8+wgjUPuANXKE9Rl9wxqZ66yzijAfqmjYwPAiKrX g==; X-CSE-ConnectionGUID: cLTuO0jCSTqor+8kOGOUwQ== X-CSE-MsgGUID: rgzAmvOsRuqOPLO3jkpOdQ== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="38512592" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="38512592" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 01:52:51 -0800 X-CSE-ConnectionGUID: +2Doz2KhS2ucDQf96nLBeA== X-CSE-MsgGUID: WR5q4L4kSmCge2Wizv+91A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="141744569" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa001.fm.intel.com with ESMTP; 05 Feb 2025 01:52:49 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 0216A5F0; Wed, 05 Feb 2025 11:52:45 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Patrick Rudolph , Linus Walleij Subject: [PATCH v3 08/10] pinctrl: cy8c95x0: Drop unneeded casting Date: Wed, 5 Feb 2025 11:51:18 +0200 Message-ID: <20250205095243.512292-9-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> References: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The 'arg' variable in cy8c95x0_gpio_get_pincfg() is already type of u16. No need to cast it, so drop unneeded casting. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 3f2bdaea58b4..4b683401cae1 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -839,7 +839,7 @@ static int cy8c95x0_gpio_get_pincfg(struct cy8c95x0_pinctrl *chip, if (param == PIN_CONFIG_OUTPUT_ENABLE) arg = !arg; - *config = pinconf_to_config_packed(param, (u16)arg); + *config = pinconf_to_config_packed(param, arg); return 0; } From patchwork Wed Feb 5 09:51:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 862222 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A99022ACE3; Wed, 5 Feb 2025 09:52:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749175; cv=none; b=Kc3sPRPtF4LdY/YBXbDVlPIOtBCu9BwzG/RXI3WXrm18Dggt7JchzL0yWZUTzfkPEIyWaG36IMgfFtv3cBJcakkr1KyaDQvZXEWAoh8Yd7KXEIVw2RBRET2BeXWqK9ygVxRLhROESS9I4MTJfIgDDHGnzHPCKddgbBjBNsgR9yA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749175; c=relaxed/simple; bh=tjMPrFtH7wAH3bi/jk/qnEWeqMAYZF1oQcUmi9I02uY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UGx5KJz4Cq0PZ4k7w6qqgdMjF0XfMh2PB60pDHTNf0+RJ1n0kR3ceRb+606MJfwQ2slzpNCNZ69INjBqXKRKv2TAnuZzgzkjd750ArueGSnzsjdMfc8nsosO9rdPfYOaxRFANStAYmGblBo+S+yokxdTN3tDAgb7wj9R8pKthUs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=C3m9adId; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="C3m9adId" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738749173; x=1770285173; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tjMPrFtH7wAH3bi/jk/qnEWeqMAYZF1oQcUmi9I02uY=; b=C3m9adId2/OezR5maT6j25HUkqjcWiX7mTP+wovsNeFw5gzjIIVW1jJk 97+fUDFdr+ILkx1N7m2uIVZwg6u5q7B+sbcWiiELn8/5jwde2NXZRSchF mkXzWnZQLotOXDwYxQmzXXpVejTnYIaceymMKDCzeySmj5y9Bh26biguA zNaJ+1P06tClAZuGkCiQn88A1kyqXVECjfkd/szfdv9IWKMci5iCj/eYq iB1IMA9W09sD5gP5cQvJ15z1gVeVShQPqKHtxYS8VvAIWF5rVgzIvYpNU LrGMTsmxAIRXr6XcxR60B65lS/L5J+Cx+8dn2M8Z5rvqEuvAbbAbq1x8g A==; X-CSE-ConnectionGUID: AxPj/AXeSYiCXzWFuxSuhg== X-CSE-MsgGUID: HtE3jka1RE2GvZIhcZuScA== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="38512598" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="38512598" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 01:52:51 -0800 X-CSE-ConnectionGUID: W9cvhKs+Q42i2OlXuczLWA== X-CSE-MsgGUID: T/wLfKomTweK+R20HFF3qg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="141744571" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa001.fm.intel.com with ESMTP; 05 Feb 2025 01:52:49 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 09090627; Wed, 05 Feb 2025 11:52:46 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Patrick Rudolph , Linus Walleij Subject: [PATCH v3 09/10] pinctrl: cy8c95x0: Separate EEPROM related register definitios Date: Wed, 5 Feb 2025 11:51:19 +0200 Message-ID: <20250205095243.512292-10-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> References: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Currently it's not easy to see at a glance the group of the registers that are per port. Add a blank line and a comment to make it better. Also add a missing definition for one of the EEPROM related registers. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 4b683401cae1..6a2c7343bf55 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -40,6 +40,7 @@ /* Port Select configures the port */ #define CY8C95X0_PORTSEL 0x18 + /* Port settings, write PORTSEL first */ #define CY8C95X0_INTMASK 0x19 #define CY8C95X0_SELPWM 0x1A @@ -53,6 +54,9 @@ #define CY8C95X0_DRV_PP_FAST 0x21 #define CY8C95X0_DRV_PP_SLOW 0x22 #define CY8C95X0_DRV_HIZ 0x23 + +/* Internal device configuration */ +#define CY8C95X0_ENABLE_WDE 0x2D #define CY8C95X0_DEVID 0x2E #define CY8C95X0_WATCHDOG 0x2F #define CY8C95X0_COMMAND 0x30 From patchwork Wed Feb 5 09:51:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 862220 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D20C22ACCA; Wed, 5 Feb 2025 09:52:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749178; cv=none; b=RFc99IBQCH2TmpKtxX6LFXSg5m7vILbJaltCxMEX8lxlylLy6CAKtkFtQb6RSqpwW/SYYlxinYvZw4FKUplbj8O8zeYlQi0MQqMMyNO+14TVdWq32t58nWHrPTXnU43YLIGkI5BMDaVHEROUxcKHJ1GvuTnK02OXkVTwXEX98ic= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738749178; c=relaxed/simple; bh=0MoEI0eBIjLxlnT1eDS9MskS78jdqEckyg9PwNiDdyI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IdZ0gioNvTYKFfRJNGMMjtmtsoKYpS3O9O0BzOwbOx6JO39JEJY5ZQdEujH3aRSjJj8Cg2o/bEVWRY8EcKE0FfTxxI0JA8D/fgyA+/IjeoMhj+L1mbz+TLK3X36p7wQ6LbVBUpsRBvdWNWypu2923JJplvBzaorIcytwPd4xsVQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=O2ccaXfV; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="O2ccaXfV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738749173; x=1770285173; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0MoEI0eBIjLxlnT1eDS9MskS78jdqEckyg9PwNiDdyI=; b=O2ccaXfVCPusRIu0bfxVqe2YdtXNPa5rxyg9BTk8c8B+9i6W9pfAVFUy SOZ8NoTc/98WDjIn2qEUYhi896KvassYMuM1EOmsX1mQmiOeb5ggvNQ9I xN50PhJ4ccB1oXJFxQ9Q7xbkbyZhhLbONKiDFOZf9SZG3YLSnP/n6pTqB tsxVbEPjzUJpjktD21B2vQxbk72JkEALTGkKz06Hq4R5IEO77YWoI3r61 CfpH9F+23xOlMP9BtDrH2fRfe+dvFCf86gKLGeJn4F5BvX8L1qzA8tBLl z7tweHZ+UizWmiInv8GkHRnGBJoOEnjpcJLutM3zHyVNcYICR0Ke+gO5W w==; X-CSE-ConnectionGUID: yzGJrGCQRwCBpq2PR/oS5w== X-CSE-MsgGUID: 96SNR/MJTn27oikFsSHiUQ== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="38512596" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="38512596" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 01:52:51 -0800 X-CSE-ConnectionGUID: z6b4VcBfR9GeLAkm1hXeog== X-CSE-MsgGUID: 8hgW7p/rRjCbTY2HZXW+lw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="141744570" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa001.fm.intel.com with ESMTP; 05 Feb 2025 01:52:49 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 10C3663F; Wed, 05 Feb 2025 11:52:46 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Patrick Rudolph , Linus Walleij Subject: [PATCH v3 10/10] pinctrl: cy8c95x0: Fix comment style Date: Wed, 5 Feb 2025 11:51:20 +0200 Message-ID: <20250205095243.512292-11-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1336.g36b5255a03ac In-Reply-To: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> References: <20250205095243.512292-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 One comment style is not aligned with the rest. Fix that. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-cy8c95x0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 6a2c7343bf55..3cfbcaee9e65 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -502,7 +502,8 @@ static int cy8c95x0_regmap_update_bits_base(struct cy8c95x0_pinctrl *chip, if (ret < 0) return ret; - /* Mimic what hardware does and update the cache when a WC bit is written. + /* + * Mimic what hardware does and update the cache when a WC bit is written. * Allows to mark the registers as non-volatile and reduces I/O cycles. */ if (cy8c95x0_wc_register(reg) && (mask & val)) {