From patchwork Wed Feb 5 15:52:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Artem Bityutskiy X-Patchwork-Id: 862337 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D7B119F495 for ; Wed, 5 Feb 2025 15:52:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738770740; cv=none; b=HYMBSyhwAJMJxNOvp5Zk7+2Fw8p10IebYF0n1E13xr8PIprfM45a4JhPC5Lcrt6ttFHTiYWIvmgiEmEvpK3yI/SyA9aWsZrTsQS2/WQWyBaL1to4/q7q3kKAe35OPAYMf/vHxMfDIg3sX951kYarhPM6Y8AFsfiAguQhEnv4CTM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738770740; c=relaxed/simple; bh=PDj+Y98L05dWt4Fv/laxlb5v4dHB5KYskh5/bLm1iwc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jThBO2nZaLYTHcGTk+uXNibKzy2SHD/VWpZNR+ZpLoAQuXIfwKkbIpxcaFqtIhjaQlE+gITb22Z7bQabiFMQUqGisOeb4/9FH7K/nbJLnWRIoPgeDbAyMrl4K3q7SyQoPOX8+pdvZfWUYnMpACdJizfTpwnwYaDrDJof7NxhuaQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=LUqU203W; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="LUqU203W" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738770739; x=1770306739; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PDj+Y98L05dWt4Fv/laxlb5v4dHB5KYskh5/bLm1iwc=; b=LUqU203WyNWoHyBWJy8JUqIPa+10mOfY3uaYJITx6l9UOSbwD1OvE6Ay lk/7k/J46slBclsXd48u7vs49jim8iNxXGwDqVFWIlgX2VWREpnUX+l0d EVwPbBZFxDh+zGb/etAOBRw2T3El01W/ztScHb6FRPZdrtgjw9TRHtOKB Np7Rgb7r3O5urU2Xmj1ABLnkLc7FCxk3FW8fgzz/E+D+PWWgOmjhv1faG i8JsT6h/1AKUl74ZmE6nbiT4/G1hucy9mke1BCoI3p8V4fpO2ln9WNpKy gAsaf3oFJyfnRssz7dG9X3h6flYYpM9W4GkA8GPk7oddPGZaQFV7t+R0p A==; X-CSE-ConnectionGUID: s27F4GhfQZ2vIt6LE30SfQ== X-CSE-MsgGUID: nIpz3tTTTyS7SupHMfliDQ== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="50330979" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="50330979" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 07:52:18 -0800 X-CSE-ConnectionGUID: WAoS6gPtRrKFce+eOfIZWQ== X-CSE-MsgGUID: JzQSSfbNTjaHiNkRi/jsrw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="111516296" Received: from powerlab.fi.intel.com (HELO powerlab.backendnet) ([10.237.71.25]) by fmviesa009.fm.intel.com with ESMTP; 05 Feb 2025 07:52:15 -0800 From: Artem Bityutskiy To: x86@kernel.org Cc: Linux PM Mailing List , "Rafael J. Wysocki" , Len Brown , Artem Bityutskiy , dave.hansen@linux.intel.com, gautham.shenoy@amd.com Subject: [PATCH v11 1/4] x86/smp: Allow calling mwait_play_dead with an arbitrary hint Date: Wed, 5 Feb 2025 17:52:08 +0200 Message-ID: <20250205155211.329780-2-artem.bityutskiy@linux.intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250205155211.329780-1-artem.bityutskiy@linux.intel.com> References: <20250205155211.329780-1-artem.bityutskiy@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Patryk Wlazlyn Introduce a helper function to allow offlined CPUs to enter idle states with a specific MWAIT hint. The new helper will be used in subsequent patches by the acpi_idle and intel_idle drivers. No functional change intended. Signed-off-by: Patryk Wlazlyn Reviewed-by: Gautham R. Shenoy Signed-off-by: Artem Bityutskiy Acked-by: Rafael J. Wysocki --- arch/x86/include/asm/smp.h | 3 ++ arch/x86/kernel/smpboot.c | 88 ++++++++++++++++++++------------------ 2 files changed, 50 insertions(+), 41 deletions(-) diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h index ca073f40698f..80f8bfd83fc7 100644 --- a/arch/x86/include/asm/smp.h +++ b/arch/x86/include/asm/smp.h @@ -114,6 +114,7 @@ void wbinvd_on_cpu(int cpu); int wbinvd_on_all_cpus(void); void smp_kick_mwait_play_dead(void); +void mwait_play_dead(unsigned int eax_hint); void native_smp_send_reschedule(int cpu); void native_send_call_func_ipi(const struct cpumask *mask); @@ -164,6 +165,8 @@ static inline struct cpumask *cpu_llc_shared_mask(int cpu) { return (struct cpumask *)cpumask_of(0); } + +static inline void mwait_play_dead(unsigned int eax_hint) { } #endif /* CONFIG_SMP */ #ifdef CONFIG_DEBUG_NMI_SELFTEST diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index c10850ae6f09..8aad14e43f54 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1258,47 +1258,9 @@ void play_dead_common(void) local_irq_disable(); } -/* - * We need to flush the caches before going to sleep, lest we have - * dirty data in our caches when we come back up. - */ -static inline void mwait_play_dead(void) +void __noreturn mwait_play_dead(unsigned int eax_hint) { struct mwait_cpu_dead *md = this_cpu_ptr(&mwait_cpu_dead); - unsigned int eax, ebx, ecx, edx; - unsigned int highest_cstate = 0; - unsigned int highest_subcstate = 0; - int i; - - if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || - boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) - return; - if (!this_cpu_has(X86_FEATURE_MWAIT)) - return; - if (!this_cpu_has(X86_FEATURE_CLFLUSH)) - return; - - eax = CPUID_LEAF_MWAIT; - ecx = 0; - native_cpuid(&eax, &ebx, &ecx, &edx); - - /* - * eax will be 0 if EDX enumeration is not valid. - * Initialized below to cstate, sub_cstate value when EDX is valid. - */ - if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED)) { - eax = 0; - } else { - edx >>= MWAIT_SUBSTATE_SIZE; - for (i = 0; i < 7 && edx; i++, edx >>= MWAIT_SUBSTATE_SIZE) { - if (edx & MWAIT_SUBSTATE_MASK) { - highest_cstate = i; - highest_subcstate = edx & MWAIT_SUBSTATE_MASK; - } - } - eax = (highest_cstate << MWAIT_SUBSTATE_SIZE) | - (highest_subcstate - 1); - } /* Set up state for the kexec() hack below */ md->status = CPUDEAD_MWAIT_WAIT; @@ -1319,7 +1281,7 @@ static inline void mwait_play_dead(void) mb(); __monitor(md, 0, 0); mb(); - __mwait(eax, 0); + __mwait(eax_hint, 0); if (READ_ONCE(md->control) == CPUDEAD_MWAIT_KEXEC_HLT) { /* @@ -1341,6 +1303,50 @@ static inline void mwait_play_dead(void) } } +/* + * We need to flush the caches before going to sleep, lest we have + * dirty data in our caches when we come back up. + */ +static inline void mwait_play_dead_cpuid_hint(void) +{ + unsigned int eax, ebx, ecx, edx; + unsigned int highest_cstate = 0; + unsigned int highest_subcstate = 0; + int i; + + if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) + return; + if (!this_cpu_has(X86_FEATURE_MWAIT)) + return; + if (!this_cpu_has(X86_FEATURE_CLFLUSH)) + return; + + eax = CPUID_LEAF_MWAIT; + ecx = 0; + native_cpuid(&eax, &ebx, &ecx, &edx); + + /* + * eax will be 0 if EDX enumeration is not valid. + * Initialized below to cstate, sub_cstate value when EDX is valid. + */ + if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED)) { + eax = 0; + } else { + edx >>= MWAIT_SUBSTATE_SIZE; + for (i = 0; i < 7 && edx; i++, edx >>= MWAIT_SUBSTATE_SIZE) { + if (edx & MWAIT_SUBSTATE_MASK) { + highest_cstate = i; + highest_subcstate = edx & MWAIT_SUBSTATE_MASK; + } + } + eax = (highest_cstate << MWAIT_SUBSTATE_SIZE) | + (highest_subcstate - 1); + } + + mwait_play_dead(eax); +} + /* * Kick all "offline" CPUs out of mwait on kexec(). See comment in * mwait_play_dead(). @@ -1391,7 +1397,7 @@ void native_play_dead(void) play_dead_common(); tboot_shutdown(TB_SHUTDOWN_WFS); - mwait_play_dead(); + mwait_play_dead_cpuid_hint(); if (cpuidle_play_dead()) hlt_play_dead(); } From patchwork Wed Feb 5 15:52:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Artem Bityutskiy X-Patchwork-Id: 862880 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAC0419B586 for ; Wed, 5 Feb 2025 15:52:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738770741; cv=none; b=Nyuwh8UZwO38Pqy5JZlGl29/ZURXumF1bIqRN3AenwEWod7CWDpyF4YF9QsPHYnYXK43iHYNdxIPoGuyzwe4dUVhuZIWs+KE/r18lZUak0vm0dZCrzVEkHx6wQFt05A7ikW16xkMin/Iblq+0JwLdPY/p7tcfMzKZAETe2M/PC8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738770741; c=relaxed/simple; bh=t7eOToCgBKG1DbFYdZ+wsVNuSxawOa1QVblX3KxdcSQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jNMqUE42pvEon4Igt93GofHWul639KIlfcL3LagWNoXRcH+fTWR1AQlTarvNig/ZlEws8klxUQlz/HRVeYJ982I8P/5jDtUIrEsY1iCdgJh/oWZGOW+ARKrg2UcHqKkO0aQmt7srnBZuSJ3SX9mXpom8Nrmw3AJMgAVPBJuRNas= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ZU6TNJ/1; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ZU6TNJ/1" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738770740; x=1770306740; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=t7eOToCgBKG1DbFYdZ+wsVNuSxawOa1QVblX3KxdcSQ=; b=ZU6TNJ/1hVH+gVJOoHJ+uYHTArss1/onMB9A1XtN7EKJ31w7u1jXcB85 y5uCI8l9DR6FNTy7gjhLFJlQplm4Nf5lBAB4uRbUBIl2UEyWBbsMOLpOm AneRwJLXlB/s3Oqyu8dqlwW/tMMwCplrZFoUrT5yYi+RZp8AFWTx3dlfK OaVonKKyQ/Q89OEv/tQCBxyuWFUKi4pGPAM4OwSALsCHvWgr6DZDxSCNv dfm8KsFK7BZRJs1XEH8i+emOrtORePZyus7LBBfLHnlmOSGOa/FZ4scaw Kyq/fGwOYloqBi5vpSKi02owxf4VGW/TgW1WCh7vQtF2Z5ktHfRO9DahH g==; X-CSE-ConnectionGUID: k+kTEa95SXe+yl2joEyKMg== X-CSE-MsgGUID: YQh9blhrTQylce3rgUNZSg== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="50330989" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="50330989" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 07:52:20 -0800 X-CSE-ConnectionGUID: GDa+AjonRcGt9IHSkn88HQ== X-CSE-MsgGUID: P0YfcayZRwagxx/6KxBrIg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="111516304" Received: from powerlab.fi.intel.com (HELO powerlab.backendnet) ([10.237.71.25]) by fmviesa009.fm.intel.com with ESMTP; 05 Feb 2025 07:52:17 -0800 From: Artem Bityutskiy To: x86@kernel.org Cc: Linux PM Mailing List , "Rafael J. Wysocki" , Len Brown , Artem Bityutskiy , dave.hansen@linux.intel.com, gautham.shenoy@amd.com Subject: [PATCH v11 2/4] ACPI: processor_idle: Add FFH state handling Date: Wed, 5 Feb 2025 17:52:09 +0200 Message-ID: <20250205155211.329780-3-artem.bityutskiy@linux.intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250205155211.329780-1-artem.bityutskiy@linux.intel.com> References: <20250205155211.329780-1-artem.bityutskiy@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Patryk Wlazlyn Recent Intel platforms will depend on the idle driver to pass the correct hint for playing dead via mwait_play_dead_with_hint(). Expand the existing enter_dead interface with handling for FFH states and pass the MWAIT hint to the mwait_play_dead code. Signed-off-by: Patryk Wlazlyn Suggested-by: Gautham R. Shenoy Signed-off-by: Artem Bityutskiy Acked-by: Rafael J. Wysocki --- arch/x86/kernel/acpi/cstate.c | 10 ++++++++++ drivers/acpi/processor_idle.c | 2 ++ include/acpi/processor.h | 5 +++++ 3 files changed, 17 insertions(+) diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c index 5854f0b8f0f1..5bdb65516969 100644 --- a/arch/x86/kernel/acpi/cstate.c +++ b/arch/x86/kernel/acpi/cstate.c @@ -16,6 +16,7 @@ #include #include #include +#include /* * Initialize bm_flags based on the CPU cache properties @@ -205,6 +206,15 @@ int acpi_processor_ffh_cstate_probe(unsigned int cpu, } EXPORT_SYMBOL_GPL(acpi_processor_ffh_cstate_probe); +void acpi_processor_ffh_play_dead(struct acpi_processor_cx *cx) +{ + unsigned int cpu = smp_processor_id(); + struct cstate_entry *percpu_entry; + + percpu_entry = per_cpu_ptr(cpu_cstate_entry, cpu); + mwait_play_dead(percpu_entry->states[cx->index].eax); +} + void __cpuidle acpi_processor_ffh_cstate_enter(struct acpi_processor_cx *cx) { unsigned int cpu = smp_processor_id(); diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c index 698897b29de2..586cc7d1d8aa 100644 --- a/drivers/acpi/processor_idle.c +++ b/drivers/acpi/processor_idle.c @@ -590,6 +590,8 @@ static void acpi_idle_play_dead(struct cpuidle_device *dev, int index) raw_safe_halt(); else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { io_idle(cx->address); + } else if (cx->entry_method == ACPI_CSTATE_FFH) { + acpi_processor_ffh_play_dead(cx); } else return; } diff --git a/include/acpi/processor.h b/include/acpi/processor.h index a17e97e634a6..63a37e72b721 100644 --- a/include/acpi/processor.h +++ b/include/acpi/processor.h @@ -280,6 +280,7 @@ int acpi_processor_ffh_cstate_probe(unsigned int cpu, struct acpi_processor_cx *cx, struct acpi_power_register *reg); void acpi_processor_ffh_cstate_enter(struct acpi_processor_cx *cstate); +void acpi_processor_ffh_play_dead(struct acpi_processor_cx *cx); #else static inline void acpi_processor_power_init_bm_check(struct acpi_processor_flags @@ -300,6 +301,10 @@ static inline void acpi_processor_ffh_cstate_enter(struct acpi_processor_cx { return; } +static inline void acpi_processor_ffh_play_dead(struct acpi_processor_cx *cx) +{ + return; +} #endif static inline int call_on_cpu(int cpu, long (*fn)(void *), void *arg, From patchwork Wed Feb 5 15:52:10 2025 Content-Type: text/plain; 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05 Feb 2025 07:52:20 -0800 From: Artem Bityutskiy To: x86@kernel.org Cc: Linux PM Mailing List , "Rafael J. Wysocki" , Len Brown , Artem Bityutskiy , dave.hansen@linux.intel.com, gautham.shenoy@amd.com Subject: [PATCH v11 3/4] intel_idle: Provide the default enter_dead() handler Date: Wed, 5 Feb 2025 17:52:10 +0200 Message-ID: <20250205155211.329780-4-artem.bityutskiy@linux.intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250205155211.329780-1-artem.bityutskiy@linux.intel.com> References: <20250205155211.329780-1-artem.bityutskiy@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Patryk Wlazlyn Recent Intel platforms require idle driver to provide information about the MWAIT hint used to enter the deepest idle state in the play_dead code. Provide the default enter_dead() handler for all of the platforms and allow overwriting with a custom handler for each platform if needed. Signed-off-by: Patryk Wlazlyn Signed-off-by: Artem Bityutskiy Acked-by: Rafael J. Wysocki --- drivers/idle/intel_idle.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index 118fe1d37c22..e59073efb6fa 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c @@ -57,6 +57,7 @@ #include #include #include +#include #define INTEL_IDLE_VERSION "0.5.1" @@ -228,6 +229,15 @@ static __cpuidle int intel_idle_s2idle(struct cpuidle_device *dev, return 0; } +static void intel_idle_enter_dead(struct cpuidle_device *dev, int index) +{ + struct cpuidle_driver *drv = cpuidle_get_cpu_driver(dev); + struct cpuidle_state *state = &drv->states[index]; + unsigned long eax = flg2MWAIT(state->flags); + + mwait_play_dead(eax); +} + /* * States are indexed by the cstate number, * which is also the index into the MWAIT hint array. @@ -1800,6 +1810,7 @@ static void __init intel_idle_init_cstates_acpi(struct cpuidle_driver *drv) state->flags |= CPUIDLE_FLAG_TIMER_STOP; state->enter = intel_idle; + state->enter_dead = intel_idle_enter_dead; state->enter_s2idle = intel_idle_s2idle; } } @@ -2149,6 +2160,9 @@ static void __init intel_idle_init_cstates_icpu(struct cpuidle_driver *drv) !cpuidle_state_table[cstate].enter_s2idle) break; + if (!cpuidle_state_table[cstate].enter_dead) + cpuidle_state_table[cstate].enter_dead = intel_idle_enter_dead; + /* If marked as unusable, skip this state. */ if (cpuidle_state_table[cstate].flags & CPUIDLE_FLAG_UNUSABLE) { pr_debug("state %s is disabled\n", From patchwork Wed Feb 5 15:52:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Artem Bityutskiy X-Patchwork-Id: 862879 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 495D01B6CE3 for ; Wed, 5 Feb 2025 15:52:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738770745; cv=none; b=LY3vkDjJWp7oUUMNLPFWcDOXY+tRfvByYjd75zKij2wMM2rYnZ28LJ+DTsyYQH/ywBAsTYsaHeW+G+d+nZFoQY6CwrMZ58PFeD8cgMSjKbr8EyV+k8Ahv/CIqdxqI6i5O54hptEmd+pnPIZijxq7A2Qti8YBBMthi7ptM58tww0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738770745; c=relaxed/simple; bh=8g5Q+/bH4UDe9bA4r8IedJnW/2tHuDoeACpjvTizwXE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aZq8gjiAoFutnyYRAdhndOfZm3qC1Zd9pRCoEnt7WZm5cXzXhV3jgohW3rhRUwCmcQb/Wvg3ILh9+aPEw7yily8W5RdBiPkwokebdOFxgSeFWr0IhilbBCBQVma65omnnh834Z0jzuWZBSO6eWg7OqT9VR4H2i9FgUD4dg0nLWk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=UyKylPmT; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="UyKylPmT" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1738770745; x=1770306745; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8g5Q+/bH4UDe9bA4r8IedJnW/2tHuDoeACpjvTizwXE=; b=UyKylPmTvkT4qyP/yhj8b8n/Li/K6oLrZ7HAtNblHwXjs6tmYL46ehyT JviSRR0q0PyWDA9G8LnK8j7lXyg2v8G6WnNH7g/HbPHT8G6vN1SwVAaEr 2V2lpCf8PKKON1fRkfjKSyUdnFrMgNWIcYKs86ehBM/TMz6rCm3I9/ByM /j+OYfntJh4HdK7XslxeuDT+BKHrPbx/ybC2kfdfDD9wZbGQ9oUBml5lX fjbpEHjvqpenNrMdd+PmRzJ05k8mHcwgZ89eEoQ3DpX4rycKAUnP72RF/ wGHRtiKcQcIuZgBRQaz5r824oYZxVloV1ypt/TGaKvdzifwbc07ElpUYS A==; X-CSE-ConnectionGUID: TztyBPnAS6qBxs5k7WD8iw== X-CSE-MsgGUID: GqiUnsYVR8mDNqOg5PRt9A== X-IronPort-AV: E=McAfee;i="6700,10204,11336"; a="50331016" X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="50331016" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Feb 2025 07:52:25 -0800 X-CSE-ConnectionGUID: dWrR5ZAaSl6b7WgJjFOJlg== X-CSE-MsgGUID: wZ+0PgUdS8mwBNIqtmKUTw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,261,1732608000"; d="scan'208";a="111516325" Received: from powerlab.fi.intel.com (HELO powerlab.backendnet) ([10.237.71.25]) by fmviesa009.fm.intel.com with ESMTP; 05 Feb 2025 07:52:22 -0800 From: Artem Bityutskiy To: x86@kernel.org Cc: Linux PM Mailing List , "Rafael J. Wysocki" , Len Brown , Artem Bityutskiy , dave.hansen@linux.intel.com, gautham.shenoy@amd.com Subject: [PATCH v11 4/4] x86/smp: Eliminate mwait_play_dead_cpuid_hint() Date: Wed, 5 Feb 2025 17:52:11 +0200 Message-ID: <20250205155211.329780-5-artem.bityutskiy@linux.intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250205155211.329780-1-artem.bityutskiy@linux.intel.com> References: <20250205155211.329780-1-artem.bityutskiy@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Patryk Wlazlyn Currently, mwait_play_dead_cpuid_hint() looks up the MWAIT hint of the deepest idle state by inspecting CPUID leaf 0x5 with the assumption that, if the number of sub-states for a given major C-state is nonzero, those sub-states are always represented by consecutive numbers starting from 0. This assumption is not based on the documented platform behavior and in fact it is not met on recent Intel platforms. For example, Intel's Sierra Forest report two C-states with two substates each in cpuid leaf 0x5: Name* target cstate target subcstate (mwait hint) =========================================================== C1 0x00 0x00 C1E 0x00 0x01 -- 0x10 ---- C6S 0x20 0x22 C6P 0x20 0x23 -- 0x30 ---- /* No more (sub)states all the way down to the end. */ =========================================================== * Names of the cstates are not included in the CPUID leaf 0x5, they are taken from the product specific documentation. Notice that hints 0x20 and 0x21 are not defined for C-state 0x20 (C6), so the existing MWAIT hint lookup in mwait_play_dead_cpuid_hint() based on the CPUID leaf 0x5 contents does not work in this case. Instead of using MWAIT hint lookup that is not guaranteed to work, make native_play_dead() rely on the idle driver for the given platform to put CPUs going offline into appropriate idle state and, if that fails, fall back to hlt_play_dead(). Accordingly, drop mwait_play_dead_cpuid_hint() altogether and make native_play_dead() call cpuidle_play_dead() instead of it unconditionally with the assumption that it will not return if it is successful. Still, in case cpuidle_play_dead() fails, call hlt_play_dead() at the end. Signed-off-by: Patryk Wlazlyn Reviewed-by: Gautham R. Shenoy Signed-off-by: Artem Bityutskiy Acked-by: Rafael J. Wysocki --- arch/x86/kernel/smpboot.c | 54 +++++---------------------------------- 1 file changed, 7 insertions(+), 47 deletions(-) diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 8aad14e43f54..5746084bafe4 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1258,6 +1258,10 @@ void play_dead_common(void) local_irq_disable(); } +/* + * We need to flush the caches before going to sleep, lest we have + * dirty data in our caches when we come back up. + */ void __noreturn mwait_play_dead(unsigned int eax_hint) { struct mwait_cpu_dead *md = this_cpu_ptr(&mwait_cpu_dead); @@ -1303,50 +1307,6 @@ void __noreturn mwait_play_dead(unsigned int eax_hint) } } -/* - * We need to flush the caches before going to sleep, lest we have - * dirty data in our caches when we come back up. - */ -static inline void mwait_play_dead_cpuid_hint(void) -{ - unsigned int eax, ebx, ecx, edx; - unsigned int highest_cstate = 0; - unsigned int highest_subcstate = 0; - int i; - - if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || - boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) - return; - if (!this_cpu_has(X86_FEATURE_MWAIT)) - return; - if (!this_cpu_has(X86_FEATURE_CLFLUSH)) - return; - - eax = CPUID_LEAF_MWAIT; - ecx = 0; - native_cpuid(&eax, &ebx, &ecx, &edx); - - /* - * eax will be 0 if EDX enumeration is not valid. - * Initialized below to cstate, sub_cstate value when EDX is valid. - */ - if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED)) { - eax = 0; - } else { - edx >>= MWAIT_SUBSTATE_SIZE; - for (i = 0; i < 7 && edx; i++, edx >>= MWAIT_SUBSTATE_SIZE) { - if (edx & MWAIT_SUBSTATE_MASK) { - highest_cstate = i; - highest_subcstate = edx & MWAIT_SUBSTATE_MASK; - } - } - eax = (highest_cstate << MWAIT_SUBSTATE_SIZE) | - (highest_subcstate - 1); - } - - mwait_play_dead(eax); -} - /* * Kick all "offline" CPUs out of mwait on kexec(). See comment in * mwait_play_dead(). @@ -1397,9 +1357,9 @@ void native_play_dead(void) play_dead_common(); tboot_shutdown(TB_SHUTDOWN_WFS); - mwait_play_dead_cpuid_hint(); - if (cpuidle_play_dead()) - hlt_play_dead(); + /* Below returns only on error. */ + cpuidle_play_dead(); + hlt_play_dead(); } #else /* ... !CONFIG_HOTPLUG_CPU */