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Sat, 08 Feb 2025 19:21:28 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54505e41c63sm279711e87.148.2025.02.08.19.21.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Feb 2025 19:21:27 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 09 Feb 2025 05:21:12 +0200 Subject: [PATCH v5 2/8] drm/msm/dpu: remove duplicate code calculating sum of bandwidths Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250209-dpu-perf-rework-v5-2-87e936cf3004@linaro.org> References: <20250209-dpu-perf-rework-v5-0-87e936cf3004@linaro.org> In-Reply-To: <20250209-dpu-perf-rework-v5-0-87e936cf3004@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Stephen Boyd , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4737; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=VkKt7DJwj8H2cF9BwqW7u1ROLqNk4NBL0guvyk9GsSU=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnqB8wh6HJKbyu78/IMI06YCXqau9Jwg6s8jEuH rR2Fc6F4SyJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ6gfMAAKCRCLPIo+Aiko 1TPcB/49BWLC7cQRm6HFzEGFU4HgjYm8aRd57tVqmsvestZ0rfSc6ldlE3TwOrteRyekalsf+8D ikGK1Cipbxh7Weo3N7TfuM/rtgRCX7NJIhRUlCzqY22seU2u+qYxrm0jDlVhdSv7Tp4N3MJphJx o59XVnEiETSkzTcsPUzwuuyBviEWrvr6/r7BPS4da0hrYbgdK8Y1upkZAX+bZAvdSZ/gwlbNjru M5GgsRBk6h2X7jZDmy0SSakAePkWwP/209i8iEUmtrkY8RyMljEJZQG1BD8SuErUbNYytCAh93D +iUPWQq2L+PkcYRr2V7OdK4pLabe2j86biKfc+KfcW1T3L56 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The code in dpu_core_perf_crtc_check() mostly duplicates code in dpu_core_perf_aggregate(). Remove the duplication by reusing the latter function. Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 94 +++++++++++---------------- 1 file changed, 38 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index c7ac1140e79dbf48566a89fa4d70f6bec69d1d81..f0d490afb53be2f4bc706af91da05bb893a5fe34 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -140,6 +140,30 @@ static void _dpu_core_perf_calc_crtc(const struct dpu_core_perf *core_perf, perf->max_per_pipe_ib, perf->bw_ctl); } +static void dpu_core_perf_aggregate(struct drm_device *ddev, + enum dpu_crtc_client_type curr_client_type, + struct dpu_core_perf_params *perf) +{ + struct dpu_crtc_state *dpu_cstate; + struct drm_crtc *tmp_crtc; + + drm_for_each_crtc(tmp_crtc, ddev) { + if (tmp_crtc->enabled && + curr_client_type == dpu_crtc_get_client_type(tmp_crtc)) { + dpu_cstate = to_dpu_crtc_state(tmp_crtc->state); + + perf->max_per_pipe_ib = max(perf->max_per_pipe_ib, + dpu_cstate->new_perf.max_per_pipe_ib); + + perf->bw_ctl += dpu_cstate->new_perf.bw_ctl; + + DRM_DEBUG_ATOMIC("crtc=%d bw=%llu\n", + tmp_crtc->base.id, + dpu_cstate->new_perf.bw_ctl); + } + } +} + /** * dpu_core_perf_crtc_check - validate performance of the given crtc state * @crtc: Pointer to crtc @@ -150,11 +174,9 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc, struct drm_crtc_state *state) { u32 bw, threshold; - u64 bw_sum_of_intfs = 0; - enum dpu_crtc_client_type curr_client_type; struct dpu_crtc_state *dpu_cstate; - struct drm_crtc *tmp_crtc; struct dpu_kms *kms; + struct dpu_core_perf_params perf; if (!crtc || !state) { DPU_ERROR("invalid crtc\n"); @@ -172,68 +194,28 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc, /* obtain new values */ _dpu_core_perf_calc_crtc(&kms->perf, crtc, state, &dpu_cstate->new_perf); - bw_sum_of_intfs = dpu_cstate->new_perf.bw_ctl; - curr_client_type = dpu_crtc_get_client_type(crtc); - - drm_for_each_crtc(tmp_crtc, crtc->dev) { - if (tmp_crtc->enabled && - dpu_crtc_get_client_type(tmp_crtc) == curr_client_type && - tmp_crtc != crtc) { - struct dpu_crtc_state *tmp_cstate = - to_dpu_crtc_state(tmp_crtc->state); - - DRM_DEBUG_ATOMIC("crtc:%d bw:%llu ctrl:%d\n", - tmp_crtc->base.id, tmp_cstate->new_perf.bw_ctl, - tmp_cstate->bw_control); - - bw_sum_of_intfs += tmp_cstate->new_perf.bw_ctl; - } + dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf); - /* convert bandwidth to kb */ - bw = DIV_ROUND_UP_ULL(bw_sum_of_intfs, 1000); - DRM_DEBUG_ATOMIC("calculated bandwidth=%uk\n", bw); + /* convert bandwidth to kb */ + bw = DIV_ROUND_UP_ULL(perf.bw_ctl, 1000); + DRM_DEBUG_ATOMIC("calculated bandwidth=%uk\n", bw); - threshold = kms->perf.perf_cfg->max_bw_high; + threshold = kms->perf.perf_cfg->max_bw_high; - DRM_DEBUG_ATOMIC("final threshold bw limit = %d\n", threshold); + DRM_DEBUG_ATOMIC("final threshold bw limit = %d\n", threshold); - if (!threshold) { - DPU_ERROR("no bandwidth limits specified\n"); - return -E2BIG; - } else if (bw > threshold) { - DPU_ERROR("exceeds bandwidth: %ukb > %ukb\n", bw, - threshold); - return -E2BIG; - } + if (!threshold) { + DPU_ERROR("no bandwidth limits specified\n"); + return -E2BIG; + } else if (bw > threshold) { + DPU_ERROR("exceeds bandwidth: %ukb > %ukb\n", bw, + threshold); + return -E2BIG; } return 0; } -static void dpu_core_perf_aggregate(struct drm_device *ddev, - enum dpu_crtc_client_type curr_client_type, - struct dpu_core_perf_params *perf) -{ - struct dpu_crtc_state *dpu_cstate; - struct drm_crtc *tmp_crtc; - - drm_for_each_crtc(tmp_crtc, ddev) { - if (tmp_crtc->enabled && - curr_client_type == dpu_crtc_get_client_type(tmp_crtc)) { - dpu_cstate = to_dpu_crtc_state(tmp_crtc->state); - - perf->max_per_pipe_ib = max(perf->max_per_pipe_ib, - dpu_cstate->new_perf.max_per_pipe_ib); - - perf->bw_ctl += dpu_cstate->new_perf.bw_ctl; - - DRM_DEBUG_ATOMIC("crtc=%d bw=%llu\n", - tmp_crtc->base.id, - dpu_cstate->new_perf.bw_ctl); - } - } -} - static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, struct drm_crtc *crtc) { From patchwork Sun Feb 9 03:21:14 2025 Content-Type: text/plain; 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Sat, 08 Feb 2025 19:21:33 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54505e41c63sm279711e87.148.2025.02.08.19.21.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Feb 2025 19:21:32 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 09 Feb 2025 05:21:14 +0200 Subject: [PATCH v5 4/8] drm/msm/dpu: make fix_core_ab_vote consistent with fix_core_ib_vote Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250209-dpu-perf-rework-v5-4-87e936cf3004@linaro.org> References: <20250209-dpu-perf-rework-v5-0-87e936cf3004@linaro.org> In-Reply-To: <20250209-dpu-perf-rework-v5-0-87e936cf3004@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Stephen Boyd , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2751; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=AzzOh5VbF1xgAFQDr0y7LJ2KKNxSxWjiNvu2zCJupLo=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnqB8wbEoQjB6wQCSSdRKzM+SCwM5gypX8YeKBP ui6NfvZgOmJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ6gfMAAKCRCLPIo+Aiko 1f1IB/9yXGycsTIgai3Ycx5zE0WAn9SRkd3ZTPGkvT6nN/1olXIWl0yfr5urQEcc/Z627VFf6zj 4UOdY+5tBukXG79csVVpw2WZqYr8vk734G59APRvZgRCu09G/df3tCXXhks6jNzLzWdfU5i7oOv jzk2XQtIApk+SFZau1M2eY5Mf+AitQx5lUGi9DaGaIuo05S6VavA16tjhUDepElFQK2Xl34AbYa w0dszxG26uUR1gaDLxGKWwUvcoDzGE6ej2PNsTrjeHKrhEdrzZUDlNzTZ01OGb9R9C5nlBDpvra IrBuQRpBJvzpPW0P1LZ76Pvz4Pi14cy4xFMV9IIcLZc/Kkvm X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The fix_core_ab_vote is an average bandwidth value, used for bandwidth overrides in several cases. However there is an internal inconsistency: fix_core_ib_vote is defined in KBps, while fix_core_ab_vote is defined in Bps. Fix that by changing the type of the variable to u32 and using * 1000ULL multiplier when setting up the dpu_core_perf_params::bw_ctl value. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 7263ab63a692554cd51a7fd91bd6250330179240..7cabc8f26908cfd2dbbffebd7c70fc37d9159733 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -125,7 +125,7 @@ static void _dpu_core_perf_calc_crtc(const struct dpu_core_perf *core_perf, perf->max_per_pipe_ib = 0; perf->core_clk_rate = 0; } else if (core_perf->perf_tune.mode == DPU_PERF_MODE_FIXED) { - perf->bw_ctl = core_perf->fix_core_ab_vote; + perf->bw_ctl = core_perf->fix_core_ab_vote * 1000ULL; perf->max_per_pipe_ib = core_perf->fix_core_ib_vote; perf->core_clk_rate = core_perf->fix_core_clk_rate; } else { @@ -479,7 +479,7 @@ int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent) &perf->fix_core_clk_rate); debugfs_create_u32("fix_core_ib_vote", 0600, entry, &perf->fix_core_ib_vote); - debugfs_create_u64("fix_core_ab_vote", 0600, entry, + debugfs_create_u32("fix_core_ab_vote", 0600, entry, &perf->fix_core_ab_vote); return 0; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h index e2ab7b3a8246c11f844d25c64354526ad162e15c..d2f21d34e501e443ec89604217929eea476e88fb 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h @@ -41,7 +41,7 @@ struct dpu_core_perf_tune { * @enable_bw_release: debug control for bandwidth release * @fix_core_clk_rate: fixed core clock request in Hz used in mode 2 * @fix_core_ib_vote: fixed core ib vote in KBps used in mode 2 - * @fix_core_ab_vote: fixed core ab vote in bps used in mode 2 + * @fix_core_ab_vote: fixed core ab vote in KBps used in mode 2 */ struct dpu_core_perf { const struct dpu_perf_cfg *perf_cfg; @@ -51,7 +51,7 @@ struct dpu_core_perf { u32 enable_bw_release; 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Sat, 08 Feb 2025 19:21:38 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54505e41c63sm279711e87.148.2025.02.08.19.21.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Feb 2025 19:21:37 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 09 Feb 2025 05:21:16 +0200 Subject: [PATCH v5 6/8] drm/msm/dpu: rename average bandwidth-related debugfs files Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250209-dpu-perf-rework-v5-6-87e936cf3004@linaro.org> References: <20250209-dpu-perf-rework-v5-0-87e936cf3004@linaro.org> In-Reply-To: <20250209-dpu-perf-rework-v5-0-87e936cf3004@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Stephen Boyd , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1348; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=nDUhilGfCQVAayq/I/z8Ob2cdZRV9/FaOC6Z8D7SAY0=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnqB8x3OR7Ca1tuaLoz9sFjn4we4MgkSO2z5FnP v5kDn4TMNCJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ6gfMQAKCRCLPIo+Aiko 1W+JB/9MmL89omNtMkNihdFHUoYIcD93L5lMfDfuVIPuV/sswg2iy/9vE58JLWzYG5w/pQGu0ee K1qTLql81r8nyGAF6gP+0Oyp9dk8aJZ7pfMpiZ3nb7HL7Eie8BnCidkr1KZ608reycOrZ4k4ZYJ MxkHUpbKLoQRDrcat0MC1KnCZKsmfwXBRSlKMe4zLiX+iHjAI3aBZkt6y1yCOmk5n8ezKP1lpa5 Ex4fy5+9faQp4jPANUlrrAuDx9O0oRmQvqP85f9hIStcT9HS2KraU90mdEXO++17X8DBoLv9Rgt /UdE+Ts0hddoUh/+PAJnw+drsVJCzibrYiARky1igeyQH/bG X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Rename the debugfs files to match their purpose and the patter provided by other bandwidth and clock-related files: threshold_high -> max_core_ab threshold_low -> low_core_ab Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index b93f7556f187d46b325a689ad01ec177cecbc37a..70f43e8359caee2082f2ca9944a17a6a20aa3d49 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -464,9 +464,9 @@ int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent) &perf->core_clk_rate); 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Sat, 08 Feb 2025 19:21:43 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54505e41c63sm279711e87.148.2025.02.08.19.21.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Feb 2025 19:21:41 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 09 Feb 2025 05:21:18 +0200 Subject: [PATCH v5 8/8] drm/msm/dpu: handle perf mode in _dpu_core_perf_crtc_update_bus() Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250209-dpu-perf-rework-v5-8-87e936cf3004@linaro.org> References: <20250209-dpu-perf-rework-v5-0-87e936cf3004@linaro.org> In-Reply-To: <20250209-dpu-perf-rework-v5-0-87e936cf3004@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Stephen Boyd , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3426; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=EjVnzSvwGeLB3HXokJpPau5v3ni0TOZS9ZUms7htZ/E=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnqB8x64F2cJNeOu1Uli/yCTGic6MsHG4iZAHU0 xuYkcG1bUyJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ6gfMQAKCRCLPIo+Aiko 1dRQB/9KevaeocmmMuzIO8TfX0MVz2QgpEIEX19HB0AkRYNpfMcBZFYbPMOEOjm7UT+GjkTHz5Q oQQ/7zMIqsyW/6ObGU75R3mPz9vZ8iV9oa/yZ8lv1c3/VSqliYLdwO+gebs92S3DS6ZxGmgTG8c a1I83mr92Vh1pxUJDygWzDiflhiVd0KxhTWIjXiyb4Iflz8RET3n+qv8scrqFNe+7RYOx8cIeF2 cljFJWxAmaIDHdQvvcK/rWlaBdTahxLsET4m7fYFBv0ZM+nptASfNzpI8wRg5aQWf+yUwIQ39si dwX5THa0LLAZkrWtLqS8NVfCSd8hKtLkWrV59iILpHtN8zCk X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Move perf mode handling for the bandwidth to _dpu_core_perf_crtc_update_bus() rather than overriding per-CRTC data and then aggregating known values. Note, this changes the fix_core_ab_vote. Previously it would be multiplied per the CRTC number, now it will be used directly for interconnect voting. This better reflects user requirements in the case of different resolutions being set on different CRTCs: instead of using the same bandwidth for each CRTC (which is incorrect) user can now calculate overall bandwidth required by all outputs and use that value. Note #2: this also disables threshold checks for user-entered bandwidth values. First of all, it doesn't make sense to fail atomic commits because of the debugfs input. Compositors have no way to correlate failing commits with debugfs settings. Second, it makes sense to allow users to go beyond these values and check whether this makes any difference or fixes the issue. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 36 +++++++++++++-------------- 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index c8e20be08aa83c8bdd70065643b46676eeed610f..7ff3405c6867556a8dc776783b91f1da6c86ef3f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -118,20 +118,9 @@ static void _dpu_core_perf_calc_crtc(const struct dpu_core_perf *core_perf, return; } - memset(perf, 0, sizeof(struct dpu_core_perf_params)); - - if (core_perf->perf_tune.mode == DPU_PERF_MODE_MINIMUM) { - perf->bw_ctl = 0; - perf->max_per_pipe_ib = 0; - } else if (core_perf->perf_tune.mode == DPU_PERF_MODE_FIXED) { - perf->bw_ctl = core_perf->fix_core_ab_vote * 1000ULL; - perf->max_per_pipe_ib = core_perf->fix_core_ib_vote; - } else { - perf->bw_ctl = _dpu_core_perf_calc_bw(perf_cfg, crtc); - perf->max_per_pipe_ib = perf_cfg->min_dram_ib; - } + perf->bw_ctl = _dpu_core_perf_calc_bw(perf_cfg, crtc); + perf->max_per_pipe_ib = perf_cfg->min_dram_ib; perf->core_clk_rate = _dpu_core_perf_calc_clk(perf_cfg, crtc, state); - DRM_DEBUG_ATOMIC( "crtc=%d clk_rate=%llu core_ib=%u core_ab=%u\n", crtc->base.id, perf->core_clk_rate, @@ -220,18 +209,29 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, { struct dpu_core_perf_params perf = { 0 }; int i, ret = 0; - u64 avg_bw; + u32 avg_bw; + u32 peak_bw; if (!kms->num_paths) return 0; - dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf); + if (kms->perf.perf_tune.mode == DPU_PERF_MODE_MINIMUM) { + avg_bw = 0; + peak_bw = 0; + } else if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) { + avg_bw = kms->perf.fix_core_ab_vote; + peak_bw = kms->perf.fix_core_ib_vote; + } else { + dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf); + + avg_bw = div_u64(perf.bw_ctl, 1000); /*Bps_to_icc*/ + peak_bw = perf.max_per_pipe_ib; + } - avg_bw = perf.bw_ctl; - do_div(avg_bw, (kms->num_paths * 1000)); /*Bps_to_icc*/ + avg_bw /= kms->num_paths; for (i = 0; i < kms->num_paths; i++) - icc_set_bw(kms->path[i], avg_bw, perf.max_per_pipe_ib); + icc_set_bw(kms->path[i], avg_bw, peak_bw); return ret; }