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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4394dc1c56asm457605e9.0.2025.02.10.13.29.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 13:29:38 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 01/10] target: Set disassemble_info::endian value for little-endian targets Date: Mon, 10 Feb 2025 22:29:21 +0100 Message-ID: <20250210212931.62401-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250210212931.62401-1-philmd@linaro.org> References: <20250210212931.62401-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field for little-endian targets. Note, there was no disas_set_info() handler registered for the TriCore target, so we implement one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson --- target/alpha/cpu.c | 1 + target/avr/cpu.c | 1 + target/hexagon/cpu.c | 1 + target/i386/cpu.c | 1 + target/loongarch/cpu.c | 1 + target/rx/cpu.c | 1 + target/tricore/cpu.c | 6 ++++++ 7 files changed, 12 insertions(+) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index da21f99a6ac..acf81fda371 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -85,6 +85,7 @@ static int alpha_cpu_mmu_index(CPUState *cs, bool ifetch) static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) { + info->endian = BFD_ENDIAN_LITTLE; info->mach = bfd_mach_alpha_ev6; info->print_insn = print_insn_alpha; } diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 5a0e21465e5..2871d30540a 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -102,6 +102,7 @@ static void avr_cpu_reset_hold(Object *obj, ResetType type) static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) { + info->endian = BFD_ENDIAN_LITTLE; info->mach = bfd_arch_avr; info->print_insn = avr_print_insn; } diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 238e63bcea4..a9beb9a1757 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -293,6 +293,7 @@ static void hexagon_cpu_reset_hold(Object *obj, ResetType type) static void hexagon_cpu_disas_set_info(CPUState *s, disassemble_info *info) { info->print_insn = print_insn_hexagon; + info->endian = BFD_ENDIAN_LITTLE; } static void hexagon_cpu_realize(DeviceState *dev, Error **errp) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index b5dd60d2812..85815c0805d 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8497,6 +8497,7 @@ static void x86_disas_set_info(CPUState *cs, disassemble_info *info) X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; + info->endian = BFD_ENDIAN_LITTLE; info->mach = (env->hflags & HF_CS64_MASK ? bfd_mach_x86_64 : env->hflags & HF_CS32_MASK ? bfd_mach_i386_i386 : bfd_mach_i386_i8086); diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 227870e2856..cb9b9f909f3 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -617,6 +617,7 @@ static void loongarch_cpu_reset_hold(Object *obj, ResetType type) static void loongarch_cpu_disas_set_info(CPUState *s, disassemble_info *info) { + info->endian = BFD_ENDIAN_LITTLE; info->print_insn = print_insn_loongarch; } diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 154906ef5f4..acd5a6e12da 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -160,6 +160,7 @@ static void rx_cpu_set_irq(void *opaque, int no, int request) static void rx_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) { + info->endian = BFD_ENDIAN_LITTLE; info->mach = bfd_mach_rx; info->print_insn = print_insn_rx; } diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index eb794674c8d..49c18a0cd92 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -35,6 +35,11 @@ static const gchar *tricore_gdb_arch_name(CPUState *cs) return "tricore"; } +static void tricore_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) +{ + info->endian = BFD_ENDIAN_LITTLE; +} + static void tricore_cpu_set_pc(CPUState *cs, vaddr value) { cpu_env(cs)->PC = value & ~(target_ulong)1; @@ -201,6 +206,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data) cc->gdb_num_core_regs = 44; cc->gdb_arch_name = tricore_gdb_arch_name; + cc->disas_set_info = tricore_cpu_disas_set_info; cc->dump_state = tricore_cpu_dump_state; cc->set_pc = tricore_cpu_set_pc; cc->get_pc = tricore_cpu_get_pc; From patchwork Mon Feb 10 21:29:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 863858 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e42:0:b0:385:e875:8a9e with SMTP id r2csp1807597wrt; Mon, 10 Feb 2025 13:31:10 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUxKuRyo/aB99MY+eYT1WaC57/Ko5e8rARCLmTvlQn6AC2fveelHLNAecNilmZ5MNCjbkLj2g==@linaro.org X-Google-Smtp-Source: AGHT+IFME50/lYxu+HTG4A9OdZvHeQnqVrMhJrVgNonCI6Gro8KQdWjAamydjokXSt3LszzZ4rJ5 X-Received: by 2002:a05:622a:148e:b0:462:b7c9:10e with SMTP id d75a77b69052e-471a1288c90mr12368611cf.13.1739223070604; Mon, 10 Feb 2025 13:31:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1739223070; cv=none; d=google.com; s=arc-20240605; b=M46B/kohkFFI32X7uvcCoGRMogo6OduL01RSlVQExJ60HD3eil+wQo4I/d0wR/5jz2 KyK5VK5b+pZoKMVNxgcR/4l3b8VV6lZN+7A+1pELIwJGZW6GXFR8WkrgFfBlkdIi9EK4 HeKvRCrDw3ih7qJl0OTUDoUHmzfGTM+1als//sphwvB2XTmZBfMGnVEUpSMZFZLBIM/D pDXs5ju+6ErPVZuugvOK8Z4knGLK0fHOokKIRHuzbII+tnoy7OKuI6QDj+Dl1R7lYWsL Mpy6PGCiPGoX/GxzLvSfyqrJh/g10pdWjwaiyZXRMXCiPXYh1Cr5Sb/E3raIzlZWj7uz pRoA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=qcxWKPPyBgEMSe447dc/9VeQiSKl/TYrx71q+3sl0Qs=; fh=mM1ERsVQwgcKb3yo7TgbYZeCYb5iRr8ycQ/rB4WqrWI=; b=ldpHjy21Ijd2hWhzR0DDnWhdk8P6fELiyO41qH1ZITLmjQ9N4qvjBEdYsnTEYx91Ts M+PgrFg/Cm0U4Hs/T3lHfnCQMTCYUFedXVVF8+aHUlk9c/kQTemXklXM+lpeQGO+fnfk rjKhXKPpHaNx7ljlJpBZ5VsEZpTvg4AolZCfH0KnaQBm/b2koXNiszxJ2KEN/WIsaaIa NShHMSS8lPWQ7f5KenHdF3F0mEbj2Nu/+B1uCwHPg4/f26TzabCnxSGFotkiz6LlFuy1 hJTLaOful64nVSyWEzk5fQf/4jQ789u1+V9wGogUfbcTnrzMwl60s8lEai138jH/hMby x2FQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YGCGHjw1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dd8dee385sm6091870f8f.61.2025.02.10.13.29.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 13:29:42 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 02/10] target: Set disassemble_info::endian value for big-endian targets Date: Mon, 10 Feb 2025 22:29:22 +0100 Message-ID: <20250210212931.62401-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250210212931.62401-1-philmd@linaro.org> References: <20250210212931.62401-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field for big-endian targets. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson --- target/hppa/cpu.c | 1 + target/m68k/cpu.c | 1 + target/openrisc/cpu.c | 1 + target/s390x/cpu.c | 1 + target/sparc/cpu.c | 1 + 5 files changed, 5 insertions(+) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 4bb5cff624e..d15f8c9c217 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -150,6 +150,7 @@ static int hppa_cpu_mmu_index(CPUState *cs, bool ifetch) static void hppa_cpu_disas_set_info(CPUState *cs, disassemble_info *info) { info->mach = bfd_mach_hppa20; + info->endian = BFD_ENDIAN_BIG; info->print_insn = print_insn_hppa; } diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 5eac4a38c62..ff167aaea71 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -122,6 +122,7 @@ static void m68k_cpu_reset_hold(Object *obj, ResetType type) static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info) { info->print_insn = print_insn_m68k; + info->endian = BFD_ENDIAN_BIG; info->mach = 0; } diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index a74fab43a91..33c81928370 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -83,6 +83,7 @@ static int openrisc_cpu_mmu_index(CPUState *cs, bool ifetch) static void openrisc_disas_set_info(CPUState *cpu, disassemble_info *info) { + info->endian = BFD_ENDIAN_BIG; info->print_insn = print_insn_or1k; } diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 3bea014f9ee..972d265478d 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -243,6 +243,7 @@ static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) { info->mach = bfd_mach_s390_64; info->cap_arch = CS_ARCH_SYSZ; + info->endian = BFD_ENDIAN_BIG; info->cap_insn_unit = 2; info->cap_insn_split = 6; } diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index e3b46137178..9fd222e4c82 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -106,6 +106,7 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request) static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info) { info->print_insn = print_insn_sparc; + info->endian = BFD_ENDIAN_BIG; #ifdef TARGET_SPARC64 info->mach = bfd_mach_sparc_v9b; #endif From patchwork Mon Feb 10 21:29:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 863861 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e42:0:b0:385:e875:8a9e with SMTP id r2csp1808180wrt; Mon, 10 Feb 2025 13:32:44 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWwt0vRTn2lB/l9gWczGtDxK0PdsZt0NQvvyvj/4GUIGfnQ8xHl23xLlcGie1rOW3sJeBZP1A==@linaro.org X-Google-Smtp-Source: AGHT+IH0Rp0DK+++1HOMbGiqB82k5vrFsQDXaTS2eJUNiGI59bqeTv9es+5wZ3dHK3UzBNkIjMQo X-Received: by 2002:ac8:584b:0:b0:471:914c:5098 with SMTP id d75a77b69052e-471914c55b4mr90087841cf.29.1739223164139; Mon, 10 Feb 2025 13:32:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1739223164; cv=none; d=google.com; s=arc-20240605; b=BcHSRgQuKUovNREPyvTmecePxBvt6HFqQ/OUPQL0FlAYmANBQIRW4hkFVhTJz0NYnm 9IGjzr07izx2EEeu9yaaou1Hdcf2Yjf66yFR9wHRhidRj1zEsNhBx4xt978ZwJ9TkCHk AQqokV9YlbxRiODcsnLre0X/axT7yMDPpRabnA61IZCbEhcOqvlZQOuK7HiAGgQp8eU7 wp9ybu6zAayqNvJunKqdQta7cuylarcB43sAuY9VyQywRgdWNqQS6VaW58xGXL0jS+bj Bphm1MLMTvLiI1nEizb3mUcKRfhmktTMJdXchBwrsGJ23sdfzky/Oj7xq9XRgNyJrNvw vHLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=TudiBAwlV8vL/G6pFMlMl4VlW+7MiYN30xZzToiA+nQ=; fh=mM1ERsVQwgcKb3yo7TgbYZeCYb5iRr8ycQ/rB4WqrWI=; b=lCIXDF7w8yCFXMmMdARJhtasSG0PfSF7tk2ieozsHPH7MUS4LJ/nsd4X8m0Js+I0Wl jo5jJfa09d7EerjFdsi47ziDvLFm4p9rJj1IogXxW3Oy8r2EbanRdS5nJ6p2Lb+Gu6e5 Pyn8CDrmNuNifFCVAKqnWxYjBuKkhmnMDzhwphtqpn4eS/5ZgB7A3PWDp3Pt3LbeKwAW kjDtyiXJLg2KBuKCTTcaS7Tk9FeG0YwIIu9cy7LeQc3OQKiDZz/CQQ61LGpn6ClaH7h8 bpzFt4VlY+3rIBL4BLQp0VZ++klNwHzTAXcPTl+BaXIGL5D5SL8ApISAyq2cGPoCzVLM hjEQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EFjD8NxE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dd0d3120fsm8787916f8f.70.2025.02.10.13.29.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 13:29:47 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 03/10] target/arm: Set disassemble_info::endian value in disas_set_info() Date: Mon, 10 Feb 2025 22:29:23 +0100 Message-ID: <20250210212931.62401-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250210212931.62401-1-philmd@linaro.org> References: <20250210212931.62401-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/cpu.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 94f1c55622b..68b3a9d3ab0 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1188,7 +1188,7 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info) { ARMCPU *ac = ARM_CPU(cpu); CPUARMState *env = &ac->env; - bool sctlr_b; + bool sctlr_b = arm_sctlr_b(env); if (is_a64(env)) { info->cap_arch = CS_ARCH_ARM64; @@ -1215,13 +1215,9 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info) info->cap_mode = cap_mode; } - sctlr_b = arm_sctlr_b(env); + info->endian = BFD_ENDIAN_LITTLE; if (bswap_code(sctlr_b)) { -#if TARGET_BIG_ENDIAN - info->endian = BFD_ENDIAN_LITTLE; -#else - info->endian = BFD_ENDIAN_BIG; -#endif + info->endian = TARGET_BIG_ENDIAN ? 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4394127afcbsm54084965e9.23.2025.02.10.13.29.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 13:29:52 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 04/10] target/microblaze: Set disassemble_info::endian value in disas_set_info Date: Mon, 10 Feb 2025 22:29:24 +0100 Message-ID: <20250210212931.62401-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250210212931.62401-1-philmd@linaro.org> References: <20250210212931.62401-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson --- target/microblaze/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 13d194cef88..27089e3c579 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -224,6 +224,7 @@ static void mb_disas_set_info(CPUState *cpu, disassemble_info *info) { info->mach = bfd_arch_microblaze; info->print_insn = print_insn_microblaze; + info->endian = TARGET_BIG_ENDIAN ? BFD_ENDIAN_BIG : BFD_ENDIAN_LITTLE; } static void mb_cpu_realizefn(DeviceState *dev, Error **errp) From patchwork Mon Feb 10 21:29:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 863857 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e42:0:b0:385:e875:8a9e with SMTP id r2csp1807599wrt; Mon, 10 Feb 2025 13:31:10 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVbNmvXexXHmp3QrANGnU5/BzIFSIBfRE2JmRe/gGw3kQpObgfo+jkv95nMAaUGqSVs1zAYcg==@linaro.org X-Google-Smtp-Source: AGHT+IHHh0vZ/eGudPTw2hD2yFC0CuEfHryayXrqLKbewRHpakCFbJZ1MWVtJSZdlOw5z/t8JTxa X-Received: by 2002:a05:622a:1cca:b0:471:90d1:2344 with SMTP id d75a77b69052e-47190d12646mr94739131cf.4.1739223070768; Mon, 10 Feb 2025 13:31:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1739223070; cv=none; d=google.com; s=arc-20240605; b=aVq0QZU0bo09es3kpB0+kzPzjxXMmlHilMzJaf821COjTtyCYN0GxobxvwBiP0/u3i LkUDhF9XLjw1fTci8hS0qNCKUvHo7/9tK1VL2Kw6r/5WjW2HUIZGrHCPGjraswPEqsQx GKVg2tvd2KijVz/zPEnqeLWmdZnf657ExY5z9HyqC3f1AL+/YVU/R6JyXi9HGpE6IFcO TAsLUJ4Il1Cw33DmDN8bpcHRaL1oa+WnTWBuAubwYhKVHLPiQPiS/L3eKKoNf7BDeGC/ 3YzUB3pSAjzqG8X5HjCo745PzD8qQlkmW1jJ7ORPLfpWSqP3sYoGTxzIGlsk45eyJX/A 3yWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=+JtBiYKMI/Sj3oIOkec3F7FVIT/FlOHh9WNs4yErZgw=; fh=mM1ERsVQwgcKb3yo7TgbYZeCYb5iRr8ycQ/rB4WqrWI=; b=BK+8Pd+VDT9LkzVkgvDAe+jWLYxJqi3BF9KrtNpSwQtK65aUjK+2KJ5gECY9rVyDmt A8iaQu0kqJnL1aMeMwSNMVOCHP3TDP3RnaQaUbdw422rXj50+TIBw7mBOAJCeqlHQpcx 58kaAL6n5daRG29nllvoTqH9/B7CdEr5WZ1FjcSw0tEznS4qCaPjeafsoAfhQWDRzNCL mPTKlBwc4KucoPoxUGrojclxHU4FzU5oTnHenHjFc96kBi9qdv3yaLfvOs7b/0Fa0ska sAwuOAT+2XcHzloeIFCsmIq+FAOvajHu4dtF3MQ61wsCHlw5lx/1Xifrkf9S+/ApwzgC QjAQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ddd0eL4v; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dccc1f531sm9947450f8f.87.2025.02.10.13.29.57 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 13:29:58 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 05/10] target/mips: Set disassemble_info::endian value in disas_set_info() Date: Mon, 10 Feb 2025 22:29:25 +0100 Message-ID: <20250210212931.62401-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250210212931.62401-1-philmd@linaro.org> References: <20250210212931.62401-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson --- target/mips/cpu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 0b267d2e507..f6d247b530f 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -429,12 +429,15 @@ static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) { if (!(cpu_env(s)->insn_flags & ISA_NANOMIPS32)) { #if TARGET_BIG_ENDIAN + info->endian = BFD_ENDIAN_BIG; info->print_insn = print_insn_big_mips; #else + info->endian = BFD_ENDIAN_LITTLE; info->print_insn = print_insn_little_mips; #endif } else { info->print_insn = print_insn_nanomips; + info->endian = BFD_ENDIAN_LITTLE; } } From patchwork Mon Feb 10 21:29:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 863862 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e42:0:b0:385:e875:8a9e with SMTP id r2csp1808333wrt; Mon, 10 Feb 2025 13:33:09 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVMu67wK3NNx256T3FZdYCesN60jAatBJ/gCoZT5zSk8SOHIAxCP9uIqBNSSa0Xo75182/eyA==@linaro.org X-Google-Smtp-Source: AGHT+IGbhiXn/4RG2ObCiHaRIzf/gUOq02u52q7rnrnrBSBi901tzEDz6L3YUwpRR0sMNYtHog4Q X-Received: by 2002:ac8:5f87:0:b0:461:43d4:fcb4 with SMTP id d75a77b69052e-47167a2a0d4mr189348721cf.26.1739223189673; Mon, 10 Feb 2025 13:33:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1739223189; cv=none; d=google.com; s=arc-20240605; b=IOE+xNpKbksAj4uFYbTZ2Kluj9IEeAzQB1t7hffjs8YFBEWInKyMboWJDAaWaSMq/y shgyXmOwetPBR+lstpQhIL0IDKqK0KFvD2JmnKRZayud2Ou6inHB5QFFNhQlZNVSRQui OBQZWnAwnP/WQcJZY0+B6BCGp7N8GINrxVMDEIVqdpLhMKPqQVyBq1jWwdGdWbrS5vtm AgbbKKWYffRcO6V0hbEZo3LTWAtHUbhibNEO+aWOBvRItG9IMjLNRPN83jxNE6T0oImS tGtrioG4mN3LKZsq/9XMFdvgD4x5E6xqageTVotJmvN+cG1jE6VCo8y74gM6t8tOvEh2 eisQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=6TcZHkuWys2mgVq8GL0a6AId6axol/O+ywSBYt05fm4=; fh=mM1ERsVQwgcKb3yo7TgbYZeCYb5iRr8ycQ/rB4WqrWI=; b=CA2y3KWdB6OSluuHACOOX7CfBRC81tWp074uYkdtHRQHOQsjvltBCtaxaFjy6Evo8z YLor8lc6ASaYgJfq02oPidgsN96canVbYO/LckNTCILjSxlFXWGHRECLqLZSOa25bJhY tikbeSNFpsDB77Z0L8mesz6BD99NqKAc53GWqiR4NLSkFmfZrkPNd0ecIDNyGcmtsgNU VKPQ6wEVreBmhuTvkVCoT2dC3Lx5s/8JJkRq7Teo+Pd9JG7dUQlFvu0/THqryl6AD7wQ 4bv4a05j57rC2MTIVFGHP9qaScIgkJzj1aZ++g3WtX6v4FjDDJSoGlw2KsAH0I8EkN95 eiyg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x3rQpBQ0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dcd34a39esm10092759f8f.30.2025.02.10.13.30.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 13:30:02 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 06/10] target/ppc: Set disassemble_info::endian value in disas_set_info() Date: Mon, 10 Feb 2025 22:29:26 +0100 Message-ID: <20250210212931.62401-7-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250210212931.62401-1-philmd@linaro.org> References: <20250210212931.62401-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback always set\ the disassemble_info::endian field. Reviewed-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/ppc/cpu_init.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 25e835d65e7..e816d30114b 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7398,6 +7398,8 @@ static void ppc_disas_set_info(CPUState *cs, disassemble_info *info) if ((env->hflags >> MSR_LE) & 1) { info->endian = BFD_ENDIAN_LITTLE; + } else { + info->endian = BFD_ENDIAN_BIG; } info->mach = env->bfd_mach; if (!env->bfd_mach) { From patchwork Mon Feb 10 21:29:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 863856 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e42:0:b0:385:e875:8a9e with SMTP id r2csp1807598wrt; Mon, 10 Feb 2025 13:31:10 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXOSQmnFcwxjbqghzeiEe2KKVtgl5TGxp8j+KGLHEneyTN6siAknw6pdfWMgDeLK9g1miXHeg==@linaro.org X-Google-Smtp-Source: AGHT+IEjCPr0EUQTLd6TbXBi9liCDmLu9Gvd2RIiCDEJFM0XrcNPncLjJ/RacQEWAHTFi0Yq3CdD X-Received: by 2002:a05:620a:f14:b0:7b1:5763:4ba2 with SMTP id af79cd13be357-7c047c7504dmr2792047685a.40.1739223070694; Mon, 10 Feb 2025 13:31:10 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1739223070; cv=none; d=google.com; s=arc-20240605; b=SSkS2hL2/0kzoG0VQdeDxa1kvWXA4O188mqSmejn9PovewBzOOKqaA69cASRz7TEMl P73mk5Glqccad1r6q8gK1Gr2dG+UypqsvkpLjje1RQWqfRLPkSv4GNMt0MMS2yVFUfg1 uGFqwQtoXd7fegLhv2Zl+INThypu6BnC9slelGQpPPCw+M3PlCl+kTh5P+sYBOQquvgB Azu4er3dh74LG3KlETnyWQClqv0BFhTWgzwMtLcOR74YYdNmLm4UJjF7aSaWt+CIlN3X EuKqq9G4yWfCtDJ4plmHWKfdxLExzrZionhEeEUYs/IAhioPokmOP1RpE669f5KQsUsG myhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=cigMHRTzJ2sIEBBFkwClq9YrVsopCKNGdfUt+g5JjJY=; fh=mM1ERsVQwgcKb3yo7TgbYZeCYb5iRr8ycQ/rB4WqrWI=; b=Go4jnM4/tJADXKdHKYXRTsqKXz0L+Po6COpvY3QhYRzP7k0En45ZFODeACp8rtoonN 9PkYRshDIwTfPfhGxOqxh6Dc5IJDvKB9ZS7ovxs1t0Kyn/WrA3FQ2IoNjsD6QgAHMXu7 JydpsEgVDgHmtwznsL2E1dGifp/mC1phW5uILSXq/2t7yPcxgmtiaTxkhDAQCJs2zTTo Ae0cKpPNIrWLmVv/qCH4xsJJ/PBPncTQvz2m+0PxvdMmxnfdpDLJrHjbPPiq8ycTDQPw cEnwGTftD2mSaqTUZEcfJsgmsKC1lMaArj+or10kt7xILlafTvusuOf7875eVWr887eo +W9g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gQusJsGi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dc33939f3sm12377912f8f.17.2025.02.10.13.30.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 13:30:09 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 07/10] target/riscv: Set disassemble_info::endian value in disas_set_info() Date: Mon, 10 Feb 2025 22:29:27 +0100 Message-ID: <20250210212931.62401-8-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250210212931.62401-1-philmd@linaro.org> References: <20250210212931.62401-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson --- target/riscv/cpu.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 3d4bd157d2c..b39a701d751 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1156,6 +1156,15 @@ static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info) CPURISCVState *env = &cpu->env; info->target_info = &cpu->cfg; + /* + * A couple of bits in MSTATUS set the endianness: + * - MSTATUS_UBE (User-mode), + * - MSTATUS_SBE (Supervisor-mode), + * - MSTATUS_MBE (Machine-mode) + * but we don't implement that yet. + */ + info->endian = BFD_ENDIAN_LITTLE; + switch (env->xl) { case MXL_RV32: info->print_insn = print_insn_riscv32; From patchwork Mon Feb 10 21:29:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 863859 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e42:0:b0:385:e875:8a9e with SMTP id r2csp1807738wrt; Mon, 10 Feb 2025 13:31:30 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCVTAzZpzbwzQ+GxRTsPj46r6RldKaurKMqajZHutD9exST1HDktEXHBWVlFYf7SmJFM+Kd8ww==@linaro.org X-Google-Smtp-Source: AGHT+IHgkgeHAQDA8ljAWGMeSQtg399eAwtdCHEGXYC3MUCv3sfVCL9dsx7Fm0o2LoYaNpD5b6fd X-Received: by 2002:a05:6122:794:b0:51c:c23e:8cd6 with SMTP id 71dfb90a1353d-51f2e1d9b57mr10822789e0c.6.1739223090061; Mon, 10 Feb 2025 13:31:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1739223090; cv=none; d=google.com; s=arc-20240605; b=AQzF8FvcnyBjhfDJlQrUoXQ/tsnEYsz/xQ77acaxJVH/xLUhK45IE/6KG6heEJsxBS tykvpLK6F9XdjHfwoEbTwIjNN5TGiEkKvnqWLtDR5q14nqkDc2m9BsFAlVG+N3lEBIZF wwJrXIWIVaCl+hqFilqaTpABLD2rs5LhKMtyg3JE5I47ZIiTsJTahuoI7MXoMrapHBL9 riTlOHKeh1/0hIyaTxgpk+EdPT3oOVo/P+J2WsLRv3pxX7sWWe8EHeU8Mp5WqYcb8aMF io1UOAvZuXeR9M2ZKRwmDThdP794TZain4eGf9jE08VGs/JC1OPU97MTmiaP1N2F5kG2 AXnw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=W3TRvMCsTOKayhPJBtpLWMZ5XRU7il83OMKb5CXGBDk=; fh=mM1ERsVQwgcKb3yo7TgbYZeCYb5iRr8ycQ/rB4WqrWI=; b=k04eLLx+1+pWv46mUwW/kGDLSfhVyo8We+/GcMN+Jcnhb0Tk4+kOWTd8//cfxMQnCv 5UP4Olj3RucoLmlYpiBky5g64Oqzh9U9z/G6/zggjMT053G/Q3oXCJILU3zP/etwOmwJ pf5B4XdzfrXTdqK+hLpUyLhHu1SrCEwNKcTBIfyI3DOFRigvwfU/lVNeYUP21faEjd5R P4+7L2/tAd0Fc9VBp+jKKaHVmCJSyXelQJ4Fk9XoUWCglbH6DUaXrEaMgR1u2yZ/aSy9 NH2/dgblmtsPkguTD5tVj5SV3EMLVcnJHw1mvHN9gJ86GjlXZWDUZZsKd/99W7FQsbkq WKKg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P1sgswSz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38dcb22f737sm10243442f8f.24.2025.02.10.13.30.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 13:30:14 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 08/10] target/sh4: Set disassemble_info::endian value in disas_set_info() Date: Mon, 10 Feb 2025 22:29:28 +0100 Message-ID: <20250210212931.62401-9-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250210212931.62401-1-philmd@linaro.org> References: <20250210212931.62401-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson --- target/sh4/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index e3c2aea1a64..9d3e6cb2fd7 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -134,6 +134,11 @@ static void superh_cpu_reset_hold(Object *obj, ResetType type) static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) { +#if TARGET_BIG_ENDIAN + info->endian = BFD_ENDIAN_BIG; +#else + info->endian = BFD_ENDIAN_LITTLE; +#endif info->mach = bfd_mach_sh4; info->print_insn = print_insn_sh; } From patchwork Mon Feb 10 21:29:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 863864 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e42:0:b0:385:e875:8a9e with SMTP id r2csp1808351wrt; Mon, 10 Feb 2025 13:33:12 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUOZGDUxG5zPfKj3q3JMxv4DLyOmAn8bHHK0gK11mzhFqIdZj6VryCQZvvU1WfJfjulg7Os+Q==@linaro.org X-Google-Smtp-Source: AGHT+IH2e79Z23xt7kKea9hYCYMory1pN4YZuVe4+W5ZY+d5BwGkR8ieMwivrZN+HWXwQq3KK9ZD X-Received: by 2002:a05:622a:18a7:b0:466:a3bf:41a7 with SMTP id d75a77b69052e-47167b24ac2mr178229851cf.51.1739223191830; Mon, 10 Feb 2025 13:33:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1739223191; cv=none; d=google.com; s=arc-20240605; b=CLNWn220L5c/a0bYPMI4LoohG/CSgjopgQNy3IJ4kay0SnwCsDIJnmWMCthr6O/UhL 5X5ACb70i2K48++MOlg6L8xMnZs7lpmon6EcP/AYZ3XFqFD1MJ4MJ40/uFZ9NGBrsqk/ MEq6sfPEb6fVqDFiXg3V1LeJ/HiDj9eBi/Fqyyz3uRxPncU9kAAZ+vHRKrk6rVwyAYKC j+UsS3n9630gCZDqAaosK+7PRQquvyjWGx6TwXCH4mO6JVxTQm1aS3kjI68O6x+yw+GZ LdYz0l4/ImBr4M1I8zVmegGtUVyaNED+r5r4J337PD6dXZrIa3o6OGfNrvAsuTEZGyEr qzWw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=LstW3Dp8wkhRDMPLlcZPAPERKl2k3gDe4YnYzMJVkXE=; fh=mM1ERsVQwgcKb3yo7TgbYZeCYb5iRr8ycQ/rB4WqrWI=; b=RMHNJsg8JX5bR07ldHlzwNXX/hw/ziM/GGcf0Cusi13FBTgE9oGrJwQsj+dUs3RcrJ 8TVHLwU170n5o+ycL1XP/WPk9abVMJtcQ6fYTndbL5YppiaTYOEtdH54GvmmxdyVnDDn Wv+A+t5QjNuNhaO4x3Kn8cosJbhN5HRY1/y3rCtka+YtEPaxpqmg9xYUdina3eEm9U9j Ib7wPpaKdwFPXQ8FNivcdw7Dv+k3gZ7fAFLYwgwxyGH7WYllBpBNYMJIoaXA45aXHp4q +c6RufJwpDjAXjNYxf3PbK9A5K14OAVIvpYVBWZvwParRrYLE5BI3OSThiSZE7jt0R4t AA+Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AHuujSzT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4390daf7dbcsm193931685e9.30.2025.02.10.13.30.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 13:30:21 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 09/10] target/xtensa: Set disassemble_info::endian value in disas_set_info() Date: Mon, 10 Feb 2025 22:29:29 +0100 Message-ID: <20250210212931.62401-10-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250210212931.62401-1-philmd@linaro.org> References: <20250210212931.62401-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson --- target/xtensa/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index efbfe73fcfb..bc170dbb5cc 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -159,6 +159,11 @@ static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info) info->private_data = cpu->env.config->isa; info->print_insn = print_insn_xtensa; +#if TARGET_BIG_ENDIAN + info->endian = BFD_ENDIAN_BIG; +#else + info->endian = BFD_ENDIAN_LITTLE; +#endif } static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) From patchwork Mon Feb 10 21:29:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 863865 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e42:0:b0:385:e875:8a9e with SMTP id r2csp1808378wrt; Mon, 10 Feb 2025 13:33:16 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUUd4TbvVPAb907wGWFr97fZgPr7boqcVccEIYY/at4q2U0iUh6hN5ENhJQV68Eg/7hpSMhBA==@linaro.org X-Google-Smtp-Source: AGHT+IFXehiUOc3voxPv8qzY13+VExXfWn7ZUM5ih3H79mCdQT+FiY1pmJE3aAfh+z00VciBHLHU X-Received: by 2002:ac8:5942:0:b0:471:a197:a161 with SMTP id d75a77b69052e-471a197a332mr11983841cf.38.1739223196049; Mon, 10 Feb 2025 13:33:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1739223196; cv=none; d=google.com; s=arc-20240605; b=WdVfLoT3rILkUR1K3GgdF0JHQzWd47Jl6Pd7oKJn08YnfN/oIPqk0iIAP0RCiR/T3r XMpx2vwQAkY5Vqq/pcjYn1ROsPAa974bksxXYdB2tfsr9A7wESE+sEOtCjjheYsqpuf7 9M+FL2fGhdvMlAqyJ9EL/7L+FUSkbIJcraucw9p5v9umaTY2OagijcTc5wTsNmszJX9p OgQ+hE+EzTUiJr5YUHuvtoa7jIBJp09QgWbDZ6L7ZBzLFeND6gwfUg/GUxkrvxuE2PMU nBotqGzj7V95fvzranMUAiqy54YllxK0kzPq9O/4zejR7r3FLYjTnXlTkm1IZHJcd0Ay tHNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=EXKigwduHuX/BpQHRjwL+FaxSAFhm5Nedm/bXWe5Qys=; fh=mM1ERsVQwgcKb3yo7TgbYZeCYb5iRr8ycQ/rB4WqrWI=; b=XPSsxj/YFXyBsnyZPV9RZPuioofLWR50Ym/zAtrQIsdhrMkroD0wQqEYrWrxZP7ecl 919XhWH46vN7LwSvY1D7hn2ndlMtW6XnEPPY/NOjJluNaFASDnL24pH/vTPJeVwVw+13 qy0aTxz57UvOH2tOOTopQaZD1/IcHWVlY2NOYsgLNQlsGX9p7G5z1vukLg4K4alzLbPX wqkZI9LEjmotudbWlSnR4QeW39ncAlH1KObJbyO5o2bn5sS+l9Xij7jIupvDYdQMXaBu gnNxueVjC90DwYv0WSckOsyU3o6Mb25XJx9wo51zfIPXfUfFupQ6rSehqQXt999DQMeE SUVQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qtawM0MH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4390d933523sm194697495e9.1.2025.02.10.13.30.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 10 Feb 2025 13:30:26 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Thomas Huth , qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 10/10] disas: Remove target_words_bigendian() call in initialize_debug_target() Date: Mon, 10 Feb 2025 22:29:30 +0100 Message-ID: <20250210212931.62401-11-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250210212931.62401-1-philmd@linaro.org> References: <20250210212931.62401-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All CPUClass implementations must implement disas_set_info() which sets the disassemble_info::endian value. Ensure that by: 1/ assert disas_set_info() handler is not NULL 2/ set %endian to BFD_ENDIAN_UNKNOWN before calling the CPUClass::disas_set_info() handler, then assert %endian is not BFD_ENDIAN_UNKNOWN after the call. This allows removing the target_words_bigendian() call in disas/. Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson --- disas/disas-common.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/disas/disas-common.c b/disas/disas-common.c index 57505823cb7..42e911e36be 100644 --- a/disas/disas-common.c +++ b/disas/disas-common.c @@ -7,7 +7,6 @@ #include "disas/disas.h" #include "disas/capstone.h" #include "hw/core/cpu.h" -#include "exec/tswap.h" #include "disas-internal.h" @@ -61,15 +60,11 @@ void disas_initialize_debug_target(CPUDebug *s, CPUState *cpu) s->cpu = cpu; s->info.print_address_func = print_address; - if (target_words_bigendian()) { - s->info.endian = BFD_ENDIAN_BIG; - } else { - s->info.endian = BFD_ENDIAN_LITTLE; - } + s->info.endian = BFD_ENDIAN_UNKNOWN; - if (cpu->cc->disas_set_info) { - cpu->cc->disas_set_info(cpu, &s->info); - } + g_assert(cpu->cc->disas_set_info); + cpu->cc->disas_set_info(cpu, &s->info); + g_assert(s->info.endian != BFD_ENDIAN_UNKNOWN); } int disas_gstring_printf(FILE *stream, const char *fmt, ...)