From patchwork Fri Feb 7 13:19:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 183149 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp733599ile; Fri, 7 Feb 2020 05:19:46 -0800 (PST) X-Google-Smtp-Source: APXvYqxvMBC/8Zw/CQujJ4F1zsuJNge6i1Xg3JZvImXVjoV2OTtYs8muY+UpzEWIPL9GmTyIdHk+ X-Received: by 2002:aca:bb54:: with SMTP id l81mr1956775oif.175.1581081586458; Fri, 07 Feb 2020 05:19:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1581081586; cv=none; d=google.com; s=arc-20160816; b=iuc6rSLyceFlUpFAraaegutm8kTOkmNpFh+Y0kVKMUogOR6ByQuG3tZooLXfPFgC7u l0KHwo3H489iCN6r6jsyWhsVGzLYVe+4k60fy1LwzDcOMbjCPe6GK7acJEj98weOUUG9 OmzQlD9AB+MKYe347jLnLSIK9UxqmftMVwgP0NuB8Qw1zGGyl096exVEsZfDpVdQa/l7 W1qJIu+TA1Vrtnu3QfzzYpklDkezBWShb/2W2mxEhSSTvXkoeQ6qnAkRg1jQrNlaMMmq alk4ojp32Eyn9Ik6YSWiAW8qK0iP6DI0DxSEMc3zVrynBDmbMB10jiTNOveYeEESnNY8 ljtA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=to:subject:message-id:date:from:mime-version:dkim-signature :delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature; bh=NuJHhKe07ZkMcV082ZX6pxwb2Y/wfHfsx1YkyKClnc0=; b=HerRrNbLU3vC4biMWHGWF9RrJKx2kP9LRVOiJE5B7u4keCre6XzmCIg+kkOByk855I 4SPKAFEzPNg8B1UgX7/oKcZgcpIn5lo8sUtF9fO5dLhbCXh2zaUmYBDoSAo9nP3VnTB1 KrnLnFwB7A0w8iHbGJTstd5hFNneoFVresJ/sNFe7jhlfQpYD6GAXqXAifRsxf8tIi/A ckMeIebzP45gpVtqarAY29ymLFxOhdlt3EHZsqUfe+d5f+dKzCI5E9sLO1Y27uElVOzw sAB4Umwkum9SEriGHWEVfhx2CbiLRAswNGkgN3fJ4mXXanX2f9y/2x8dF6+6rZdbTcDt sJ/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=WL28duhp; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=KPJYwMCp; spf=pass (google.com: domain of gcc-patches-return-519125-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-519125-patch=linaro.org@gcc.gnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id d23si4044560oij.270.2020.02.07.05.19.46 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Feb 2020 05:19:46 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-519125-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=WL28duhp; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=KPJYwMCp; spf=pass (google.com: domain of gcc-patches-return-519125-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-519125-patch=linaro.org@gcc.gnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; q= dns; s=default; b=yxzGOUcixnN1yTBWUposSJyOgmVJibsykcGVEib5sK3kfa VM/kNspXir2BSxcym+nB9Lb7bCuIBFoJfA979TPR+k6Ro8bQOx/0qErHEH/n5hKo QpXdIijOnxSrDo3Va9hL9E9pNe8LLSRtheGeIqtm8NqP+k8+DmUESNq4c2loI= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; s= default; bh=5eJN2XHUWnA0TOnabLTfmR56PDU=; b=WL28duhpw3dAznWbvDfk jSQjvAP6FVEvPJcl5zDcjUw122As7J5TUXM+K1bQQuaHoA5+WUuFx3TzmaKjzfZv c20tvGjeq/MO6RurEHobmjUoe6OWbS3zJgLthVqYFtIUMtgpNK0V+rIiJTSmssKj YSjOwnEcfLF7nfm0h8HksqU= Received: (qmail 128524 invoked by alias); 7 Feb 2020 13:19:35 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 128512 invoked by uid 89); 7 Feb 2020 13:19:34 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-16.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=HX-Received:7607 X-HELO: mail-ua1-f54.google.com Received: from mail-ua1-f54.google.com (HELO mail-ua1-f54.google.com) (209.85.222.54) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 07 Feb 2020 13:19:33 +0000 Received: by mail-ua1-f54.google.com with SMTP id l6so848145uap.13 for ; Fri, 07 Feb 2020 05:19:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:from:date:message-id:subject:to; bh=mfmnSgcrLRxM9LhiJ1EsYEk1+EVGK+R6/7OzQXxVYHQ=; b=KPJYwMCpPpRK0WUkrQbn6g5RQ+Lp1OykBCvUVZ+rDnXRSs9zo2j8M+Baatbz5N2y/O /zl1OMW+ZiQQnP6dyhkhqN4vXcuH95jeoS64Ba65uVg+JgMR6SsgtdfvkSxLX792HIce 1DW3VkZ7gG60nx/DJtMsGoo0MXOUT1VkZpGpwD2WWGBnZeL+hec0QKScR2RNeYwal0Yu qpJLTHYKn48b1sv4DxzbpNuXmd7dxrnFqSdLA8aJVivhuXwd0+sjepviOQyW7qTu2urc 6KcplVQ1YqoAPUUmdx0GA7ubBUoNxqenSHqB/SWrAbKyPaFH0utuuyZZys7TTZYIezI4 3Guw== MIME-Version: 1.0 From: Christophe Lyon Date: Fri, 7 Feb 2020 14:19:20 +0100 Message-ID: Subject: [ARM] Fix -mpure-code for v6m To: gcc Patches X-IsSubscribed: yes When running the testsuite with -fdisable-rtl-fwprop2 and -mpure-code for cortex-m0, I noticed that some testcases were failing because we still generate "ldr rX, .LCY", which is what we want to avoid with -mpure-code. This is latent since a recent improvement in fwprop (PR88833). In this patch I change the thumb1_movsi_insn pattern so that it emits the desired instruction sequence when arm_disable_literal_pool is set. I tried to add a define_split instead, but couldn't make it work: the compiler then complains it cannot split the instruction, while my new define_split accepts the same operand types as thumb1_movsi_insn: c-c++-common/torture/complex-sign-mixed-add.c:41:1: error: could not split insn (insn 2989 425 4844 (set (reg/f:SI 3 r3 [1342]) (symbol_ref/u:SI ("*.LC6") [flags 0x2])) 836 {*thumb1_movsi_insn} (expr_list:REG_EQUIV (symbol_ref/u:SI ("*.LC6") [flags 0x2]) (nil))) during RTL pass: final (define_split [(set (match_operand:SI 0 "register_operand" "") (match_operand:SI 1 "general_operand" ""))] "TARGET_THUMB1 && arm_disable_literal_pool && GET_CODE (operands[1]) == SYMBOL_REF" [(clobber (const_int 0))] " gen_thumb1_movsi_symbol_ref(operands[0], operands[1]); DONE; " ) and I put this in thumb1_movsi_insn: if (GET_CODE (operands[1]) == SYMBOL_REF && arm_disable_literal_pool) { return \"#\"; } return \"ldr\\t%0, %1\"; 2020-02-07 Christophe Lyon * config/arm/thumb1.md (thumb1_movsi_insn): Fix ldr alternative to work with -mpure-code. diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md index 613cf9c..a722194 100644 --- a/gcc/config/arm/thumb1.md +++ b/gcc/config/arm/thumb1.md @@ -696,17 +696,43 @@ "TARGET_THUMB1 && ( register_operand (operands[0], SImode) || register_operand (operands[1], SImode))" - "@ - movs %0, %1 - movs %0, %1 - movw %0, %1 - # - # - ldmia\\t%1, {%0} - stmia\\t%0, {%1} - ldr\\t%0, %1 - str\\t%1, %0 - mov\\t%0, %1" + "* + switch (which_alternative) + { + case 0: + case 1: + return \"movs %0, %1\"; + case 2: + return \"movw %0, %1\"; + case 3: + case 4: + return \"#\"; + case 5: + return \"ldmia\\t%1, {%0}\"; + case 6: + return \"stmia\\t%0, {%1}\"; + case 7: + /* Cannot load it directly, split to build it via MOV / LSLS / ADDS. */ + if (GET_CODE (operands[1]) == SYMBOL_REF && arm_disable_literal_pool) + { + output_asm_insn (\"movs\\t%0, #:upper8_15:%1\", operands); + output_asm_insn (\"lsls\\t%0, #8\", operands); + output_asm_insn (\"adds\\t%0, #:upper0_7:%1\", operands); + output_asm_insn (\"lsls\\t%0, #8\", operands); + output_asm_insn (\"adds\\t%0, #:lower8_15:%1\", operands); + output_asm_insn (\"lsls\\t%0, #8\", operands); + output_asm_insn (\"adds\\t%0, #:lower0_7:%1\", operands); + return \"\"; + } + else + return \"ldr\\t%0, %1\"; + case 8: + return \"str\\t%1, %0\"; + case 9: + return \"mov\\t%0, %1\"; + default: + gcc_unreachable (); + }" [(set_attr "length" "2,2,4,4,4,2,2,2,2,2") (set_attr "type" "mov_reg,mov_imm,mov_imm,multiple,multiple,load_4,store_4,load_4,store_4,mov_reg") (set_attr "pool_range" "*,*,*,*,*,*,*,1018,*,*")