From patchwork Sun Mar 9 05:53:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 872370 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E03B933F9; Sun, 9 Mar 2025 05:54:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741499671; cv=none; b=LJrsbgJJHjdQzOZ6mw7fVxXRpVBnO0Rbip+KdvkwU2ltcGJb/dZucLWK5YFCNCSs9QFRh1hITxI2ZR0d2DEce0XYmzCngSVc3wPAOsPaJoaTaFvjujZy6G4IFPEIjIzHWinidAA8TUl3SDi5EwvFHDsq2Oi0ltlqApd+DPc6/GA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741499671; c=relaxed/simple; bh=+LUmQPB+tURq91r5Yr6zdu4bs85M0PK3opWSYhnifBY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sOhDU5+QQ8aChqwEXsJh9B2JaL5afXDadOLKuTg8AxWM2m8gnE+8HpnP1Uh18Vnkwqc+nTMniCVPuxJByg+jA/gd2LT1CNIYtkdfy+PJIP0C+2++Pz29Tscwzk33EIytLIUs9UXLEJau1wvIPiGt1sOxQsXuQ2ktILPOQCwlrb4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org; spf=pass smtp.mailfrom=disroot.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b=Y4dQ0MC1; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="Y4dQ0MC1" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 244DF25E18; Sun, 9 Mar 2025 06:54:24 +0100 (CET) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id nYC5q1AZTQE1; Sun, 9 Mar 2025 06:54:23 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1741499663; bh=+LUmQPB+tURq91r5Yr6zdu4bs85M0PK3opWSYhnifBY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Y4dQ0MC1iW5vwk4PZITQHYD7bb6cinpFFPTeJAu29CNLRgt0Gm/XHTTqJNyr6zKPU MCsmxEFVH9KXsIdubaojSyKEZVR4zvtCaeXq6a9FR2zj2AgibOWz7FZ+UYdhZEhoyN 5pUZUhxhgH6lgETzR436fN0vzbS5BAzFIow5HYIhD+Gb12S9yil9QxzrvszbB+VrVy 4IZxspKhM7yJW7mNMP7oqahmBQobzxoeITDjmAwXDPKUODqTwyVgzypgQ6wKjj3AGO Hnn1k48TC9HOzBoiKfzpZwkyDgYiCmva2QS78L1geR1tokX/TGHJaDOl1UsBF/QKtb Ku1wTUzT9uuow== From: Yao Zi To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Turquette , Stephen Boyd , Shresth Prasad , Cristian Ciocaltea , Detlev Casanova , Jonas Karlman , Chukun Pan Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yao Zi Subject: [PATCH v3 1/6] dt-bindings: mmc: rockchip-dw-mshc: Add compatible string for RK3528 Date: Sun, 9 Mar 2025 05:53:43 +0000 Message-ID: <20250309055348.9299-2-ziyao@disroot.org> In-Reply-To: <20250309055348.9299-1-ziyao@disroot.org> References: <20250309055348.9299-1-ziyao@disroot.org> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add RK3528 compatible string for SD/SDIO interface. Signed-off-by: Yao Zi Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml index 06df1269f247..ea0feb733e32 100644 --- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml @@ -38,6 +38,7 @@ properties: - rockchip,rk3328-dw-mshc - rockchip,rk3368-dw-mshc - rockchip,rk3399-dw-mshc + - rockchip,rk3528-dw-mshc - rockchip,rk3568-dw-mshc - rockchip,rk3588-dw-mshc - rockchip,rv1108-dw-mshc From patchwork Sun Mar 9 05:53:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 872066 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 091C214A09E; Sun, 9 Mar 2025 05:54:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741499691; cv=none; b=qn1G0uDnCQvjyHYXK91Ja8jYgnFLyyMsdS2RSSZavI+OmCUOg5XvCVPIJ9iEMuNidEV0KFD7MaB4JmxfjZTibLrp/mjVIgx//IdpuxlUQJCBH8b8/l9V/4Ru++MhTiRvxLZDlOa6KFMgY7j2dUB4rc9vlPX0GT14vPFk/ktpn/A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741499691; c=relaxed/simple; bh=hoZkBR56sD6NFx4a8yX3ETRtAM+INGPus9jC5Fe/z+o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YFNLIuXIxpyEp4hqdE61Yfuio1iDv7HVZWdCE6bsksSS1fgepBtAqdTtqhtvnYTF0BCtQMa8OGHrA4uyUTpBImxOeGDZn+dwSRG8NY2psHAJ3ivKrzfXpXrBzLNqkXH5g33CEcMCVDatOdxb07+MO7bRCkcHutPZmVB5wYdhReo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org; spf=pass smtp.mailfrom=disroot.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b=ilixXpBt; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="ilixXpBt" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 828F325DB4; Sun, 9 Mar 2025 06:54:47 +0100 (CET) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id 6Q0W_tnWplUN; Sun, 9 Mar 2025 06:54:47 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1741499686; bh=hoZkBR56sD6NFx4a8yX3ETRtAM+INGPus9jC5Fe/z+o=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=ilixXpBtHHCKnyjWHRbhaNVWJGAavEiuU+qNmZ5wvKdvvhOsRy9sSKJyb0Ix79XIY pg2RUPOMayMomKz4ZdICAf8JZkND6WBZQ6WJJlikvklAi/hw3gfx8PXIgrQNsGq9Ov bm48DXzDwCvkecXp/Tk2ZyPM1rYIQYAnmiNiyFrnbwUxmF60h+3Va/e2x88ETziP7S Za7GyUY75gPww3EGEDLM1j73umJ0AcHiI7s1kCr/eD5RRIO/ln87rKFhwUOjIjZqtC UcTvXWPaZFNd5g1Nz/C5dJcjPL7nWcKxmzISJzO5CTXHe7Wew3G5WEjzW08mojo2ee L1s1/tr4YhEgw== From: Yao Zi To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Turquette , Stephen Boyd , Shresth Prasad , Cristian Ciocaltea , Detlev Casanova , Jonas Karlman , Chukun Pan Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yao Zi , Krzysztof Kozlowski Subject: [PATCH v3 2/6] dt-bindings: clock: Add GRF clock definition for RK3528 Date: Sun, 9 Mar 2025 05:53:44 +0000 Message-ID: <20250309055348.9299-3-ziyao@disroot.org> In-Reply-To: <20250309055348.9299-1-ziyao@disroot.org> References: <20250309055348.9299-1-ziyao@disroot.org> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 These clocks are for SD/SDIO tuning purpose and come with registers in GRF syscon. Signed-off-by: Yao Zi Acked-by: Krzysztof Kozlowski --- include/dt-bindings/clock/rockchip,rk3528-cru.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/dt-bindings/clock/rockchip,rk3528-cru.h b/include/dt-bindings/clock/rockchip,rk3528-cru.h index 55a448f5ed6d..0245a53fc334 100644 --- a/include/dt-bindings/clock/rockchip,rk3528-cru.h +++ b/include/dt-bindings/clock/rockchip,rk3528-cru.h @@ -414,6 +414,12 @@ #define MCLK_I2S2_2CH_SAI_SRC_PRE 402 #define MCLK_I2S3_8CH_SAI_SRC_PRE 403 #define MCLK_SDPDIF_SRC_PRE 404 +#define SCLK_SDMMC_DRV 405 +#define SCLK_SDMMC_SAMPLE 406 +#define SCLK_SDIO0_DRV 407 +#define SCLK_SDIO0_SAMPLE 408 +#define SCLK_SDIO1_DRV 409 +#define SCLK_SDIO1_SAMPLE 410 /* scmi-clocks indices */ #define SCMI_PCLK_KEYREADER 0 From patchwork Sun Mar 9 05:53:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 872369 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB84E83CC7; Sun, 9 Mar 2025 05:54:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741499699; cv=none; b=TXlk4kxYdZZuB1HBDnamtlp9/Z2bTrauATwiCASVPmglLlsJ6xequbZSn8B2B4gtUgtCecUShiQfePdDvYhqZcMRK8ZjgxXQmm+jrt6kNzH7RZBp3PPADEw/29lVIk6M961H29eFhkCnjwpNauw6UkjK0vu1HBpzgMNg8YO/RCY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741499699; c=relaxed/simple; bh=bL/x2ys+EM9SZYaqL9CiNuhB4mRB/IyUdJVwcVX0rig=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=F3iGj6+obXW2mVuLLirPqfVDQfIm47P9TIF/EmUL+lyKXpREvtYoS8xihcde0LqLWUn2rYPIOxAQy5XRG9nIgv9aARmWAnEasc3IwHUVyeQErHHdQDGAulArL3aeg9N30/W2oDO0RYUTGXSYhnojk0BYbvUronIGWFWdu758qCY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org; spf=pass smtp.mailfrom=disroot.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b=Ix/hadYl; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="Ix/hadYl" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 4EF6325DB4; Sun, 9 Mar 2025 06:54:55 +0100 (CET) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id d0CfSGvB03gT; Sun, 9 Mar 2025 06:54:54 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1741499694; bh=bL/x2ys+EM9SZYaqL9CiNuhB4mRB/IyUdJVwcVX0rig=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Ix/hadYlG9xn3S8jZCWOG6CCYQMUnJWWvSM1h+DYt9UlRnNQGQeXCWU4gh+MC3XTC ajzFcYbYkjt9ILxaDZOrLIWhkggcHTYVY7m6U4rKUnviwxwoG067miUlMuC6BX9NsV p9WF3PSdYRk1OZYhpUakKqOitHiNAaqiyoXB0oAIuETXmqltDApsT1yW1XvqOq0Pbo tzu5Qkr6tgxXo/RlWCqMYXechHsqipHm/FS4t2WesJA//1XNdg3nhBChfi8iOd5eHW 2mqio5cYp6KDhhS6dxN12RZvUmRAwgkUbMxcM4jm5RLAKfAuR2Td71Lj8hmEVgcwZ5 /mmKjZ8KMnGEA== From: Yao Zi To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Turquette , Stephen Boyd , Shresth Prasad , Cristian Ciocaltea , Detlev Casanova , Jonas Karlman , Chukun Pan Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yao Zi Subject: [PATCH v3 3/6] clk: rockchip: Support MMC clocks in GRF region Date: Sun, 9 Mar 2025 05:53:45 +0000 Message-ID: <20250309055348.9299-4-ziyao@disroot.org> In-Reply-To: <20250309055348.9299-1-ziyao@disroot.org> References: <20250309055348.9299-1-ziyao@disroot.org> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Registers of MMC drive/sample clocks in Rockchip RV1106 and RK3528 locate in GRF regions. Adjust MMC clock code to support register operations through regmap. Also add a helper to ease registration of GRF clocks. Signed-off-by: Yao Zi --- drivers/clk/rockchip/clk-mmc-phase.c | 24 +++++++++++++--- drivers/clk/rockchip/clk.c | 42 ++++++++++++++++++++++++++++ drivers/clk/rockchip/clk.h | 20 ++++++++++++- 3 files changed, 81 insertions(+), 5 deletions(-) diff --git a/drivers/clk/rockchip/clk-mmc-phase.c b/drivers/clk/rockchip/clk-mmc-phase.c index 91012078681b..b3ed8e7523e5 100644 --- a/drivers/clk/rockchip/clk-mmc-phase.c +++ b/drivers/clk/rockchip/clk-mmc-phase.c @@ -9,11 +9,14 @@ #include #include #include +#include #include "clk.h" struct rockchip_mmc_clock { struct clk_hw hw; void __iomem *reg; + struct regmap *grf; + int grf_reg; int shift; int cached_phase; struct notifier_block clk_rate_change_nb; @@ -54,7 +57,12 @@ static int rockchip_mmc_get_phase(struct clk_hw *hw) if (!rate) return 0; - raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); + if (mmc_clock->grf) + regmap_read(mmc_clock->grf, mmc_clock->grf_reg, &raw_value); + else + raw_value = readl(mmc_clock->reg); + + raw_value >>= mmc_clock->shift; degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; @@ -134,8 +142,12 @@ static int rockchip_mmc_set_phase(struct clk_hw *hw, int degrees) raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; raw_value |= nineties; - writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift), - mmc_clock->reg); + raw_value = HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift); + + if (mmc_clock->grf) + regmap_write(mmc_clock->grf, mmc_clock->grf_reg, raw_value); + else + writel(raw_value, mmc_clock->reg); pr_debug("%s->set_phase(%d) delay_nums=%u reg[0x%p]=0x%03x actual_degrees=%d\n", clk_hw_get_name(hw), degrees, delay_num, @@ -189,7 +201,9 @@ static int rockchip_mmc_clk_rate_notify(struct notifier_block *nb, struct clk *rockchip_clk_register_mmc(const char *name, const char *const *parent_names, u8 num_parents, - void __iomem *reg, int shift) + void __iomem *reg, + struct regmap *grf, int grf_reg, + int shift) { struct clk_init_data init; struct rockchip_mmc_clock *mmc_clock; @@ -208,6 +222,8 @@ struct clk *rockchip_clk_register_mmc(const char *name, mmc_clock->hw.init = &init; mmc_clock->reg = reg; + mmc_clock->grf = grf; + mmc_clock->grf_reg = grf_reg; mmc_clock->shift = shift; clk = clk_register(NULL, &mmc_clock->hw); diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c index cbf93ea119a9..ce2f3323d84e 100644 --- a/drivers/clk/rockchip/clk.c +++ b/drivers/clk/rockchip/clk.c @@ -590,6 +590,7 @@ void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx, list->name, list->parent_names, list->num_parents, ctx->reg_base + list->muxdiv_offset, + NULL, 0, list->div_shift ); break; @@ -619,6 +620,11 @@ void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx, break; case branch_linked_gate: /* must be registered late, fall-through for error message */ + case branch_mmc_grf: + /* + * must be registered through rockchip_clk_register_grf_branches, + * fall-through for error message + */ break; } @@ -665,6 +671,42 @@ void rockchip_clk_register_late_branches(struct device *dev, } EXPORT_SYMBOL_GPL(rockchip_clk_register_late_branches); +void rockchip_clk_register_grf_branches(struct rockchip_clk_provider *ctx, + struct rockchip_clk_branch *list, + struct regmap *grf, + unsigned int nr_clk) +{ + unsigned int idx; + struct clk *clk; + + for (idx = 0; idx < nr_clk; idx++, list++) { + clk = NULL; + + switch (list->branch_type) { + case branch_mmc_grf: + clk = rockchip_clk_register_mmc( + list->name, + list->parent_names, list->num_parents, + NULL, + grf, list->muxdiv_offset, + list->div_shift + ); + break; + default: + pr_err("%s: unknown clock type %d\n", + __func__, list->branch_type); + break; + } + + if (!clk) + pr_err("%s: failed to register clock %s: %ld\n", + __func__, list->name, PTR_ERR(clk)); + else + rockchip_clk_set_lookup(ctx, clk, list->id); + } +} +EXPORT_SYMBOL_GPL(rockchip_clk_register_grf_branches); + void rockchip_clk_register_armclk(struct rockchip_clk_provider *ctx, unsigned int lookup_id, const char *name, const char *const *parent_names, diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index df2b2d706450..ec86ba1dd38c 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -594,7 +594,9 @@ struct clk *rockchip_clk_register_cpuclk(const char *name, struct clk *rockchip_clk_register_mmc(const char *name, const char *const *parent_names, u8 num_parents, - void __iomem *reg, int shift); + void __iomem *reg, + struct regmap *grf, int grf_reg, + int shift); /* * DDRCLK flags, including method of setting the rate @@ -633,6 +635,7 @@ enum rockchip_clk_branch_type { branch_gate, branch_linked_gate, branch_mmc, + branch_mmc_grf, branch_inverter, branch_factor, branch_ddrclk, @@ -983,6 +986,17 @@ struct rockchip_clk_branch { .div_shift = shift, \ } +#define MMC_GRF(_id, cname, pname, offset, shift) \ + { \ + .id = _id, \ + .branch_type = branch_mmc_grf, \ + .name = cname, \ + .parent_names = (const char *[]){ pname }, \ + .num_parents = 1, \ + .muxdiv_offset = offset, \ + .div_shift = shift, \ + } + #define INVERTER(_id, cname, pname, io, is, if) \ { \ .id = _id, \ @@ -1132,6 +1146,10 @@ void rockchip_clk_register_late_branches(struct device *dev, struct rockchip_clk_provider *ctx, struct rockchip_clk_branch *list, unsigned int nr_clk); +void rockchip_clk_register_grf_branches(struct rockchip_clk_provider *ctx, + struct rockchip_clk_branch *list, + struct regmap *grf, + unsigned int nr_clk); void rockchip_clk_register_plls(struct rockchip_clk_provider *ctx, struct rockchip_pll_clock *pll_list, unsigned int nr_pll, int grf_lock_offset); From patchwork Sun Mar 9 05:53:46 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 872065 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 45EEB61FF2; Sun, 9 Mar 2025 05:55:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741499724; cv=none; b=BHujo2avPuAnSJ5zchAEKrZAmTN9ECGQZbCzIF/cc6eZvKF6sKtM/VuZN23SnXMmiZcB73Z3+vDhUZfGiBC9qvZ58gIgYifhZwo35lLfj9fZRsohMJAfQmFPxAE0ttrG+NUJRTIvlMZPfylrjlJMOnaHHQz08L3kFomda4lPx+Q= ARC-Message-Signature: i=1; a=rsa-sha256; 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Sun, 9 Mar 2025 06:55:20 +0100 (CET) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id 1Y8mSd15GfkG; Sun, 9 Mar 2025 06:55:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1741499719; bh=R4aIj3VtgP3nzRQODwLmtHA8je9xAP+QLEm/30cUmmY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=DF6/pDPGL9/Dqg9k6/Ntg7GtkAuL10bRgpgVqfi99hyHflqazeI9UfsaZK3ivrfTp aaWiScBRvqI9+jhQ1E6Ti8dOFZQR77aGMlQ9YzgVUqFG7E5EmFt9bbWVJYyodCANaB MUAPfUneMCW65lK91DDMRD5/hzdgfX9tA1dZMtBqdKk+9YMr5e8ipa7tRqn4UI/UCD q8h6mViCDaugyyS+u+Z0wsyjCM2sNy53MfSQVvKEmQdWbBnWdfV0GTViCHL+X7CrhD o9edGljdzDsemEttrn7igRBIR0RFU+ZBQ3SGJzuf/IK1U4vb8mWsg1Myu5hJjwCH+K dfojC8XRrs2Ow== From: Yao Zi To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Turquette , Stephen Boyd , Shresth Prasad , Cristian Ciocaltea , Detlev Casanova , Jonas Karlman , Chukun Pan Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yao Zi Subject: [PATCH v3 4/6] clk: rockchip: rk3528: Add SD/SDIO tuning clocks in GRF region Date: Sun, 9 Mar 2025 05:53:46 +0000 Message-ID: <20250309055348.9299-5-ziyao@disroot.org> In-Reply-To: <20250309055348.9299-1-ziyao@disroot.org> References: <20250309055348.9299-1-ziyao@disroot.org> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 These clocks locate in VO and VPU GRF, serving for SD/SDIO controller tuning purpose. Add their definitions and register them in driver if corresponding GRF is available. GRFs are looked up by compatible to simplify devicetree binding. Signed-off-by: Yao Zi --- drivers/clk/rockchip/clk-rk3528.c | 61 ++++++++++++++++++++++++++++--- drivers/clk/rockchip/clk.h | 3 ++ 2 files changed, 58 insertions(+), 6 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3528.c b/drivers/clk/rockchip/clk-rk3528.c index b8b577b902a0..5c133a642ff9 100644 --- a/drivers/clk/rockchip/clk-rk3528.c +++ b/drivers/clk/rockchip/clk-rk3528.c @@ -10,6 +10,8 @@ #include #include #include +#include +#include #include @@ -1061,23 +1063,64 @@ static struct rockchip_clk_branch rk3528_clk_branches[] __initdata = { 0, 1, 1), }; +static struct rockchip_clk_branch rk3528_vo_clk_branches[] __initdata = { + MMC_GRF(SCLK_SDMMC_DRV, "sdmmc_drv", "cclk_src_sdmmc0", + RK3528_SDMMC_CON(0), 1), + MMC_GRF(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "cclk_src_sdmmc0", + RK3528_SDMMC_CON(1), 1), +}; + +static struct rockchip_clk_branch rk3528_vpu_clk_branches[] __initdata = { + MMC_GRF(SCLK_SDIO0_DRV, "sdio0_drv", "cclk_src_sdio0", + RK3528_SDIO0_CON(0), 1), + MMC_GRF(SCLK_SDIO0_SAMPLE, "sdio0_sample", "cclk_src_sdio0", + RK3528_SDIO0_CON(1), 1), + MMC_GRF(SCLK_SDIO1_DRV, "sdio1_drv", "cclk_src_sdio1", + RK3528_SDIO1_CON(0), 1), + MMC_GRF(SCLK_SDIO1_SAMPLE, "sdio1_sample", "cclk_src_sdio1", + RK3528_SDIO1_CON(1), 1), +}; + static int __init clk_rk3528_probe(struct platform_device *pdev) { - struct rockchip_clk_provider *ctx; + unsigned long nr_vpu_branches = ARRAY_SIZE(rk3528_vpu_clk_branches); + unsigned long nr_vo_branches = ARRAY_SIZE(rk3528_vo_clk_branches); + unsigned long nr_branches = ARRAY_SIZE(rk3528_clk_branches); + unsigned long nr_clks, nr_vo_clks, nr_vpu_clks; struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; - unsigned long nr_branches = ARRAY_SIZE(rk3528_clk_branches); - unsigned long nr_clks; + struct rockchip_clk_provider *ctx; + struct regmap *vo_grf, *vpu_grf; void __iomem *reg_base; - nr_clks = rockchip_clk_find_max_clk_id(rk3528_clk_branches, - nr_branches) + 1; - reg_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(reg_base)) return dev_err_probe(dev, PTR_ERR(reg_base), "could not map cru region"); + nr_clks = rockchip_clk_find_max_clk_id(rk3528_clk_branches, + nr_branches) + 1; + + vo_grf = syscon_regmap_lookup_by_compatible("rockchip,rk3528-vo-grf"); + if (!IS_ERR(vo_grf)) { + nr_vo_clks = rockchip_clk_find_max_clk_id(rk3528_vo_clk_branches, + nr_vo_branches) + 1; + nr_clks = max(nr_clks, nr_vo_clks); + } else if (PTR_ERR(vo_grf) != -ENODEV) { + return dev_err_probe(dev, PTR_ERR(vo_grf), + "failed to look up VO GRF\n"); + } + + vpu_grf = syscon_regmap_lookup_by_compatible("rockchip,rk3528-vpu-grf"); + if (!IS_ERR(vpu_grf)) { + nr_vpu_clks = rockchip_clk_find_max_clk_id(rk3528_vpu_clk_branches, + nr_vpu_branches) + 1; + nr_clks = max(nr_clks, nr_vpu_clks); + } else if (PTR_ERR(vpu_grf) != -ENODEV) { + return dev_err_probe(dev, PTR_ERR(vpu_grf), + "failed to look up VPU GRF\n"); + } + ctx = rockchip_clk_init(np, reg_base, nr_clks); if (IS_ERR(ctx)) return dev_err_probe(dev, PTR_ERR(ctx), @@ -1091,6 +1134,12 @@ static int __init clk_rk3528_probe(struct platform_device *pdev) &rk3528_cpuclk_data, rk3528_cpuclk_rates, ARRAY_SIZE(rk3528_cpuclk_rates)); rockchip_clk_register_branches(ctx, rk3528_clk_branches, nr_branches); + if (!IS_ERR(vo_grf)) + rockchip_clk_register_grf_branches(ctx, rk3528_vo_clk_branches, + vo_grf, nr_vo_branches); + if (!IS_ERR(vpu_grf)) + rockchip_clk_register_grf_branches(ctx, rk3528_vpu_clk_branches, + vpu_grf, nr_vpu_branches); rk3528_rst_init(np, reg_base); diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index ec86ba1dd38c..f07cd1bb8952 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -217,6 +217,9 @@ struct clk; #define RK3528_CLKSEL_CON(x) ((x) * 0x4 + 0x300) #define RK3528_CLKGATE_CON(x) ((x) * 0x4 + 0x800) #define RK3528_SOFTRST_CON(x) ((x) * 0x4 + 0xa00) +#define RK3528_SDMMC_CON(x) ((x) * 0x4 + 0x24) +#define RK3528_SDIO0_CON(x) ((x) * 0x4 + 0x4) +#define RK3528_SDIO1_CON(x) ((x) * 0x4 + 0xc) #define RK3528_PMU_CLKSEL_CON(x) ((x) * 0x4 + 0x300 + RK3528_PMU_CRU_BASE) #define RK3528_PMU_CLKGATE_CON(x) ((x) * 0x4 + 0x800 + RK3528_PMU_CRU_BASE) #define RK3528_PCIE_CLKSEL_CON(x) ((x) * 0x4 + 0x300 + RK3528_PCIE_CRU_BASE) From patchwork Sun Mar 9 05:53:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 872368 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C5D8126C02; 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arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="ZwI+2n1X" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 03CAA25984; Sun, 9 Mar 2025 06:55:30 +0100 (CET) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id kG-bdOTiKFOl; Sun, 9 Mar 2025 06:55:25 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1741499725; bh=txtgvCyVbTCcdPGfG+8cSd9zAfYuSNsflYj4tJgx2Ao=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=ZwI+2n1XdJ/Bn1htpW4EPh8cqXkz7wWfZDuiv8DwlRxReiqUxRkEK0UYyF1lqkaZH LD8DLhDSqdSxvG/+YRpjRVuEtv2kJJQJ47ZqaJmQ+W0vBeMKoYo7xg4U/nW6lpS3Ac kSXUwstqio6QKzG5uhYCczjJ9gkHb/8QpOybXi3Sa2IdF+HRU4PE9fqF0S0VjdhIFQ aoFd3shXOffqVzIuWNReU83QuN/ZkfxGJJafrzeHqolwpukR4+pIkF1wzhHK1qtXRs 4mLGa7SIYg2IyqY58gXc7YcUgTJ912pgcP669KKt2O572+/ZqFIyJ3FM3usH8ydsab ex+Bf+lMHWn7Q== From: Yao Zi To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Turquette , Stephen Boyd , Shresth Prasad , Cristian Ciocaltea , Detlev Casanova , Jonas Karlman , Chukun Pan Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yao Zi Subject: [PATCH v3 5/6] arm64: dts: rockchip: Add SDMMC/SDIO controllers for RK3528 Date: Sun, 9 Mar 2025 05:53:47 +0000 Message-ID: <20250309055348.9299-6-ziyao@disroot.org> In-Reply-To: <20250309055348.9299-1-ziyao@disroot.org> References: <20250309055348.9299-1-ziyao@disroot.org> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 RK3528 features two SDIO controllers and one SD/MMC controller, describe them in devicetree. Since their sample and drive clocks are located in the VO and VPU GRFs, corresponding syscons are added to make these clocks available. Signed-off-by: Yao Zi --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 69 ++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index c2eaa0c6ea90..04ca2e2b3e9b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -321,6 +321,16 @@ qos_vpu: qos@ff280400 { reg = <0x0 0xff280400 0x0 0x20>; }; + vpu_grf: syscon@ff340000 { + compatible = "rockchip,rk3528-vpu-grf", "syscon"; + reg = <0x0 0xff340000 0x0 0x8000>; + }; + + vo_grf: syscon@ff360000 { + compatible = "rockchip,rk3528-vo-grf", "syscon"; + reg = <0x0 0xff360000 0x0 0x10000>; + }; + cru: clock-controller@ff4a0000 { compatible = "rockchip,rk3528-cru"; reg = <0x0 0xff4a0000 0x0 0x30000>; @@ -468,6 +478,65 @@ saradc: adc@ffae0000 { status = "disabled"; }; + sdio0: mmc@ffc10000 { + compatible = "rockchip,rk3528-dw-mshc", + "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xffc10000 0x0 0x4000>; + clocks = <&cru HCLK_SDIO0>, + <&cru CCLK_SRC_SDIO0>, + <&cru SCLK_SDIO0_DRV>, + <&cru SCLK_SDIO0_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + max-frequency = <200000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4>, <&sdio0_clk>, <&sdio0_cmd>; + resets = <&cru SRST_H_SDIO0>; + reset-names = "reset"; + status = "disabled"; + }; + + sdio1: mmc@ffc20000 { + compatible = "rockchip,rk3528-dw-mshc", + "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xffc20000 0x0 0x4000>; + clocks = <&cru HCLK_SDIO1>, + <&cru CCLK_SRC_SDIO1>, + <&cru SCLK_SDIO1_DRV>, + <&cru SCLK_SDIO1_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + max-frequency = <200000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdio1_bus4>, <&sdio1_clk>, <&sdio1_cmd>; + resets = <&cru SRST_H_SDIO1>; + reset-names = "reset"; + status = "disabled"; + }; + + sdmmc: mmc@ffc30000 { + compatible = "rockchip,rk3528-dw-mshc", + "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xffc30000 0x0 0x4000>; + clocks = <&cru HCLK_SDMMC0>, + <&cru CCLK_SRC_SDMMC0>, + <&cru SCLK_SDMMC_DRV>, + <&cru SCLK_SDMMC_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>, + <&sdmmc_det>; + resets = <&cru SRST_H_SDMMC0>; + reset-names = "reset"; + rockchip,default-sample-phase = <90>; + status = "disabled"; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3528-pinctrl"; rockchip,grf = <&ioc_grf>; From patchwork Sun Mar 9 05:53:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 872064 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBBEE14D43D; Sun, 9 Mar 2025 05:55:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; 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spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="PfAKY4VH" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 2527C25984; Sun, 9 Mar 2025 06:55:53 +0100 (CET) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id P3wYOcYVPzHa; Sun, 9 Mar 2025 06:55:48 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1741499748; bh=3qTQkAzeUoh3oNqUFdtbtTzzFSJJIvUXF74/y5YGolM=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=PfAKY4VHipG6G6gka230q/QsrnX0i7Q4UoW7rjOa8VcWVp3mv0r8IsB3QIQOdBd5r 2AQOeXyqj/C/gsVjfFQZDRN5lXe3tTIijjFMabK/ZVrEYIA7mxFkyzurwoco+d21Yh cHFexQaURxMNWqDuD/cw4IyIHDj934FBzdaatpnJihmOeKRNKJu+lyOLrQNR75OMQ3 XXg3p+PbnQPkkUJned7eoon4KWExCcF8mwWMExADcSqI5T+7CCuGVVI5wqjYEVgHs9 o3zg/esH3WeWIIbaHdGU//TP/SoTPKLu5k4h0jlgqpEGWqpuAHbDkjWILqHWyFyPHw UucodzMqZB0PA== From: Yao Zi To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Turquette , Stephen Boyd , Shresth Prasad , Cristian Ciocaltea , Detlev Casanova , Jonas Karlman , Chukun Pan Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yao Zi Subject: [PATCH v3 6/6] arm64: dts: rockchip: Enable SD-card interface on Radxa E20C Date: Sun, 9 Mar 2025 05:53:48 +0000 Message-ID: <20250309055348.9299-7-ziyao@disroot.org> In-Reply-To: <20250309055348.9299-1-ziyao@disroot.org> References: <20250309055348.9299-1-ziyao@disroot.org> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SD-card is available on Radxa E20C board. Signed-off-by: Yao Zi --- .../boot/dts/rockchip/rk3528-radxa-e20c.dts | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts index 5346ef457c2a..b74e605a5a82 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts @@ -15,6 +15,10 @@ / { model = "Radxa E20C"; compatible = "radxa,e20c", "rockchip,rk3528"; + aliases { + mmc1 = &sdmmc; + }; + chosen { stdout-path = "serial0:1500000n8"; }; @@ -104,6 +108,18 @@ vcc5v0_sys: regulator-5v0-vcc-sys { regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; + + vccio_sd: regulator-vccio-sd { + compatible = "regulator-gpio"; + gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_vol_ctrl_h>; + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + states = <1800000 0x0>, <3300000 0x1>; + vin-supply = <&vcc5v0_sys>; + }; }; &pinctrl { @@ -126,6 +142,12 @@ wan_led_g: wan-led-g { rockchip,pins = <4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + sdmmc { + sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { + rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &saradc { @@ -133,6 +155,17 @@ &saradc { status = "okay"; }; +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0m0_xfer>;