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[8.43.85.97]) by mx.google.com with ESMTPS id cc27si8620529edb.295.2020.03.09.11.32.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2020 11:32:45 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-bounces@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aZjrebzF; spf=pass (google.com: domain of libc-alpha-bounces@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom=libc-alpha-bounces@sourceware.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E79D93942005; Mon, 9 Mar 2020 18:32:43 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-qt1-x82a.google.com (mail-qt1-x82a.google.com [IPv6:2607:f8b0:4864:20::82a]) by sourceware.org (Postfix) with ESMTPS id E5FCC3875DFD for ; Mon, 9 Mar 2020 18:32:40 +0000 (GMT) Received: by mail-qt1-x82a.google.com with SMTP id l21so7753857qtr.8 for ; Mon, 09 Mar 2020 11:32:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id; bh=n/w/iL8VgWfY3vp0CXHJSI3pnNbrMw1rmcDTDlDB3Dg=; b=aZjrebzFZFHuD3/Uf3eGvL3CJe0h/IX+3DU5EI3gUqMKDth4vDbJ6ZYlTL0LmQ5fWH YJs5x0eBSfOItIwT9oyRBp+Jgdc+ePcZYY4Du7TsnxorlCtMA1HCE4mZLUd6UqaFR98x rvLjdBxcOKb4R5bv8XSaGW/9gi8vjSgXsEY4UqgnNnXfq7FsPVs5hwAq7F0FyB/uvq33 rG6WIACsuHWZHCd7tlxy4+nmNq+eBx6XdKXruMtVB6ya/9D0MBRFI2LOZ0wnLaMPHxwj 5qlAPavnVJh45oZMed/t59vrLH/7sXieIR5JyhcaKp0noKG3JHzyawjYiRrvXVuqCFMy QOJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id; bh=n/w/iL8VgWfY3vp0CXHJSI3pnNbrMw1rmcDTDlDB3Dg=; b=d2ZWH7ziT0kQQGL7hcgEM7UYOqbWAQa9C51VC79gLTQV3qlsaJRNkeA4AZ8A7mQsQO D/avP8AnGl0PPvnKONFvfvvPLmQZC4WBscQKmUVIdDjp7CYyyWijWNq/jWn293zuteBu /bvSdYCyfeuHQ1QqR9/rGxkXTxAxzBWD2XbQtOyKvHbsatPgzM9umDRFJNjbcDKRAcfx +uOXp8ia+n29SHsGv4X0zm0bXt9ohNx5x8JbjpyFcykSeeAPSVjfZ6sDRuKVyNFmy34K EZDHRHvdVVRUN6h5Dx7nlvAC9DcCMc+PNARumavEjbiZdnZrGxXKqwG4rACsA4BqHF9f jIbg== X-Gm-Message-State: ANhLgQ3zh7/i2pcGZcWxE0RcJ/71dgJeyYKYsu9q8PXRhVv41Lsoh4hk Sj0bZt1yKwdgGdIr1vomtZVK8g8FIp8= X-Received: by 2002:ac8:4994:: with SMTP id f20mr744480qtq.2.1583778759799; Mon, 09 Mar 2020 11:32:39 -0700 (PDT) Received: from localhost.localdomain ([177.194.48.209]) by smtp.googlemail.com with ESMTPSA id e7sm13922960qtp.0.2020.03.09.11.32.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2020 11:32:39 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH v2 1/3] math: Remove fenvinline.h Date: Mon, 9 Mar 2020 15:32:32 -0300 Message-Id: <20200309183234.11891-1-adhemerval.zanella@linaro.org> X-Mailer: git-send-email 2.17.1 X-Spam-Status: No, score=-27.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" Changes from previous version: - Mention on commit message x86 also exports a similar optimization, but on a different header. -- Similar to string2.h (18b10de7ce) and string3.h (09a596cc2c) this patch removes the fenvinline.h on all architectures. Currently only powerpc implements some optimizations. This kind of optimization is better implemented by the compiler (which handles the architecture ISA transparently). Also, for the specific optimized powerpc implementation the code is becoming convoluted and these micro-optimization are hardly wildly used, even more being a possible hotspot in realword cases (non-default rounding are used only on specific cases and exception handling are done most likely only on errors path). Only x86 implements similar optimization (on fenv.h) also indicates that these should no be on libc. The math/test-fenv already covers all math/test-fenvinline tests, so it is safe to remove it. Checked on x86_64-linux-gnu and powerpc64le-linux-gnu. --- bits/fenvinline.h | 8 - math/Makefile | 4 +- math/fenv.h | 4 - math/test-fenvinline.c | 354 ------------------------------ sysdeps/powerpc/bits/fenvinline.h | 108 --------- 5 files changed, 2 insertions(+), 476 deletions(-) delete mode 100644 bits/fenvinline.h delete mode 100644 math/test-fenvinline.c delete mode 100644 sysdeps/powerpc/bits/fenvinline.h -- 2.17.1 diff --git a/bits/fenvinline.h b/bits/fenvinline.h deleted file mode 100644 index 42f77b5618..0000000000 --- a/bits/fenvinline.h +++ /dev/null @@ -1,8 +0,0 @@ -/* This file provides inline versions of floating-pint environment - handling functions. If there were any. */ - -#ifndef __NO_MATH_INLINES - -/* Here is where the code would go. */ - -#endif diff --git a/math/Makefile b/math/Makefile index 84a8b94c74..f916594a51 100644 --- a/math/Makefile +++ b/math/Makefile @@ -24,7 +24,7 @@ include ../Makeconfig # Installed header files. headers := math.h bits/mathcalls.h bits/mathinline.h \ fpu_control.h complex.h bits/cmathcalls.h fenv.h \ - bits/fenv.h bits/fenvinline.h bits/mathdef.h tgmath.h \ + bits/fenv.h bits/mathdef.h tgmath.h \ bits/math-vector.h finclude/math-vector-fortran.h \ bits/libm-simd-decl-stubs.h bits/iscanonical.h \ bits/flt-eval-method.h bits/fp-fast.h bits/fp-logb.h \ @@ -233,7 +233,7 @@ tests = test-matherr-3 test-fenv basic-test \ test-misc test-fpucw test-fpucw-ieee tst-definitions test-tgmath \ test-tgmath-ret bug-nextafter bug-nexttoward bug-tgmath1 \ test-tgmath-int test-tgmath2 test-powl tst-CMPLX tst-CMPLX2 test-snan \ - test-fenv-tls test-fenv-preserve test-fenv-return test-fenvinline \ + test-fenv-tls test-fenv-preserve test-fenv-return \ test-nearbyint-except test-fenv-clear \ test-nearbyint-except-2 test-signgam-uchar test-signgam-uchar-init \ test-signgam-uint test-signgam-uint-init test-signgam-ullong \ diff --git a/math/fenv.h b/math/fenv.h index 6cad1d3575..e6b9578d6c 100644 --- a/math/fenv.h +++ b/math/fenv.h @@ -140,10 +140,6 @@ extern int fegetmode (femode_t *__modep) __THROW; extern int fesetmode (const femode_t *__modep) __THROW; #endif -/* Include optimization. */ -#ifdef __OPTIMIZE__ -# include -#endif /* NaN support. */ diff --git a/math/test-fenvinline.c b/math/test-fenvinline.c deleted file mode 100644 index 0e5d361fff..0000000000 --- a/math/test-fenvinline.c +++ /dev/null @@ -1,354 +0,0 @@ -/* Test for fenv inline implementations. - Copyright (C) 2015-2020 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#ifndef _GNU_SOURCE -# define _GNU_SOURCE -#endif - -/* To make sure the fenv inline function are used. */ -#undef __NO_MATH_INLINES - -#include -#include -#include - -/* - Since not all architectures might define all exceptions, we define - a private set and map accordingly. -*/ -#define NO_EXC 0 -#define INEXACT_EXC 0x1 -#define DIVBYZERO_EXC 0x2 -#define UNDERFLOW_EXC 0x04 -#define OVERFLOW_EXC 0x08 -#define INVALID_EXC 0x10 -#define ALL_EXC \ - (INEXACT_EXC | DIVBYZERO_EXC | UNDERFLOW_EXC | OVERFLOW_EXC \ - | INVALID_EXC) -static int count_errors; - -#if FE_ALL_EXCEPT -static void -test_single_exception_fp_int (int exception, - int exc_flag, - int fe_flag, - const char *flag_name) -{ - if (exception & exc_flag) - { - if (fetestexcept (fe_flag)) - printf (" Pass: Exception \"%s\" is set\n", flag_name); - else - { - printf (" Fail: Exception \"%s\" is not set\n", flag_name); - ++count_errors; - } - } - else - { - if (fetestexcept (fe_flag)) - { - printf (" Fail: Exception \"%s\" is set\n", flag_name); - ++count_errors; - } - else - printf (" Pass: Exception \"%s\" is not set\n", flag_name); - } -} -/* Test whether a given exception was raised. */ -static void -test_single_exception_fp_double (int exception, - int exc_flag, - double fe_flag, - const char *flag_name) -{ - if (exception & exc_flag) - { - if (fetestexcept (fe_flag)) - printf (" Pass: Exception \"%s\" is set\n", flag_name); - else - { - printf (" Fail: Exception \"%s\" is not set\n", flag_name); - ++count_errors; - } - } - else - { - if (fetestexcept (fe_flag)) - { - printf (" Fail: Exception \"%s\" is set\n", flag_name); - ++count_errors; - } - else - printf (" Pass: Exception \"%s\" is not set\n", flag_name); - } -} -#endif - -static void -test_exceptions (const char *test_name, int exception) -{ - printf ("Test: %s\n", test_name); -#ifdef FE_DIVBYZERO - test_single_exception_fp_double (exception, DIVBYZERO_EXC, FE_DIVBYZERO, - "DIVBYZERO"); -#endif -#ifdef FE_INVALID - test_single_exception_fp_double (exception, INVALID_EXC, FE_INVALID, - "INVALID"); -#endif -#ifdef FE_INEXACT - test_single_exception_fp_double (exception, INEXACT_EXC, FE_INEXACT, - "INEXACT"); -#endif -#ifdef FE_UNDERFLOW - test_single_exception_fp_double (exception, UNDERFLOW_EXC, FE_UNDERFLOW, - "UNDERFLOW"); -#endif -#ifdef FE_OVERFLOW - test_single_exception_fp_double (exception, OVERFLOW_EXC, FE_OVERFLOW, - "OVERFLOW"); -#endif -} - -static void -test_exceptionflag (void) -{ - printf ("Test: fegetexceptionflag (FE_ALL_EXCEPT)\n"); -#if FE_ALL_EXCEPT - fexcept_t excepts; - - feclearexcept (FE_ALL_EXCEPT); - - feraiseexcept (FE_INVALID); - fegetexceptflag (&excepts, FE_ALL_EXCEPT); - - feclearexcept (FE_ALL_EXCEPT); - feraiseexcept (FE_OVERFLOW | FE_INEXACT); - - fesetexceptflag (&excepts, FE_ALL_EXCEPT); - - test_single_exception_fp_int (INVALID_EXC, INVALID_EXC, FE_INVALID, - "INVALID (int)"); - test_single_exception_fp_int (INVALID_EXC, OVERFLOW_EXC, FE_OVERFLOW, - "OVERFLOW (int)"); - test_single_exception_fp_int (INVALID_EXC, INEXACT_EXC, FE_INEXACT, - "INEXACT (int)"); - - /* Same test, but using double as argument */ - feclearexcept (FE_ALL_EXCEPT); - - feraiseexcept (FE_INVALID); - fegetexceptflag (&excepts, (double)FE_ALL_EXCEPT); - - feclearexcept (FE_ALL_EXCEPT); - feraiseexcept (FE_OVERFLOW | FE_INEXACT); - - fesetexceptflag (&excepts, (double)FE_ALL_EXCEPT); - - test_single_exception_fp_double (INVALID_EXC, INVALID_EXC, FE_INVALID, - "INVALID (double)"); - test_single_exception_fp_double (INVALID_EXC, OVERFLOW_EXC, FE_OVERFLOW, - "OVERFLOW (double)"); - test_single_exception_fp_double (INVALID_EXC, INEXACT_EXC, FE_INEXACT, - "INEXACT (double)"); -#endif -} - -static void -test_fesetround (void) -{ -#if defined FE_TONEAREST && defined FE_TOWARDZERO - int res1; - int res2; - - printf ("Tests for fesetround\n"); - - /* The fesetround should not itself cause the test to fail, however it - should either succeed for both 'int' and 'double' argument, or fail - for both. */ - res1 = fesetround ((int) FE_TOWARDZERO); - res2 = fesetround ((double) FE_TOWARDZERO); - if (res1 != res2) - { - printf ("fesetround (FE_TOWARDZERO) failed: %d, %d\n", res1, res2); - ++count_errors; - } - - res1 = fesetround ((int) FE_TONEAREST); - res2 = fesetround ((double) FE_TONEAREST); - if (res1 != res2) - { - printf ("fesetround (FE_TONEAREST) failed: %d, %d\n", res1, res2); - ++count_errors; - } -#endif -} - -#if FE_ALL_EXCEPT -/* Tests for feenableexcept/fedisableexcept. */ -static void -feenable_test (const char *flag_name, fexcept_t fe_exc) -{ - int fe_exci = fe_exc; - double fe_excd = fe_exc; - int excepts; - - /* First disable all exceptions. */ - if (fedisableexcept (FE_ALL_EXCEPT) == -1) - { - printf ("Test: fedisableexcept (FE_ALL_EXCEPT) failed\n"); - ++count_errors; - /* If this fails, the other tests don't make sense. */ - return; - } - - /* Test for inline macros using integer argument. */ - excepts = feenableexcept (fe_exci); - if (!EXCEPTION_ENABLE_SUPPORTED (fe_exci) && excepts == -1) - { - printf ("Test: not testing feenableexcept, it isn't implemented.\n"); - return; - } - if (excepts == -1) - { - printf ("Test: feenableexcept (%s) failed\n", flag_name); - ++count_errors; - return; - } - if (excepts != 0) - { - printf ("Test: feenableexcept (%s) failed, return should be 0, is %x\n", - flag_name, excepts); - ++count_errors; - } - - /* And now disable the exception again. */ - excepts = fedisableexcept (fe_exc); - if (excepts == -1) - { - printf ("Test: fedisableexcept (%s) failed\n", flag_name); - ++count_errors; - return; - } - if (excepts != fe_exc) - { - printf ("Test: fedisableexcept (%s) failed, return should be 0x%x, is 0x%x\n", - flag_name, (unsigned int)fe_exc, excepts); - ++count_errors; - } - - /* Test for inline macros using double argument. */ - excepts = feenableexcept (fe_excd); - if (!EXCEPTION_ENABLE_SUPPORTED (fe_excd) && excepts == -1) - { - printf ("Test: not testing feenableexcept, it isn't implemented.\n"); - return; - } - if (excepts == -1) - { - printf ("Test: feenableexcept (%s) failed\n", flag_name); - ++count_errors; - return; - } - if (excepts != 0) - { - printf ("Test: feenableexcept (%s) failed, return should be 0, is %x\n", - flag_name, excepts); - ++count_errors; - } - - /* And now disable the exception again. */ - excepts = fedisableexcept (fe_exc); - if (excepts == -1) - { - printf ("Test: fedisableexcept (%s) failed\n", flag_name); - ++count_errors; - return; - } - if (excepts != fe_exc) - { - printf ("Test: fedisableexcept (%s) failed, return should be 0x%x, is 0x%x\n", - flag_name, (unsigned int)fe_exc, excepts); - ++count_errors; - } -} -#endif - -static void -test_feenabledisable (void) -{ - printf ("Tests for feenableexcepts/fedisableexcept\n"); - - /* We might have some exceptions still set. */ - feclearexcept (FE_ALL_EXCEPT); - -#ifdef FE_DIVBYZERO - feenable_test ("FE_DIVBYZERO", FE_DIVBYZERO); -#endif -#ifdef FE_INVALID - feenable_test ("FE_INVALID", FE_INVALID); -#endif -#ifdef FE_INEXACT - feenable_test ("FE_INEXACT", FE_INEXACT); -#endif -#ifdef FE_UNDERFLOW - feenable_test ("FE_UNDERFLOW", FE_UNDERFLOW); -#endif -#ifdef FE_OVERFLOW - feenable_test ("FE_OVERFLOW", FE_OVERFLOW); -#endif - fesetenv (FE_DFL_ENV); -} - -static int -do_test (void) -{ - /* clear all exceptions and test if all are cleared */ - feclearexcept (FE_ALL_EXCEPT); - test_exceptions ("feclearexcept (FE_ALL_EXCEPT) clears all exceptions", - NO_EXC); - - /* raise all exceptions and test if all are raised */ - feraiseexcept (FE_ALL_EXCEPT); - if (EXCEPTION_TESTS (float)) - test_exceptions ("feraiseexcept (FE_ALL_EXCEPT) raises all exceptions", - ALL_EXC); - - /* Same test, but using double as argument */ - feclearexcept ((double)FE_ALL_EXCEPT); - test_exceptions ("feclearexcept ((double)FE_ALL_EXCEPT) clears all exceptions", - NO_EXC); - - feraiseexcept ((double)FE_ALL_EXCEPT); - if (EXCEPTION_TESTS (float)) - test_exceptions ("feraiseexcept ((double)FE_ALL_EXCEPT) raises all exceptions", - ALL_EXC); - - if (EXCEPTION_TESTS (float)) - test_exceptionflag (); - - test_fesetround (); - - test_feenabledisable (); - - return count_errors; -} - -#define TEST_FUNCTION do_test () -#include "../test-skeleton.c" diff --git a/sysdeps/powerpc/bits/fenvinline.h b/sysdeps/powerpc/bits/fenvinline.h deleted file mode 100644 index f2d095a72f..0000000000 --- a/sysdeps/powerpc/bits/fenvinline.h +++ /dev/null @@ -1,108 +0,0 @@ -/* Inline floating-point environment handling functions for powerpc. - Copyright (C) 1995-2020 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#if defined __GNUC__ && !defined _SOFT_FLOAT && !defined __NO_FPRS__ - -/* Inline definitions for fegetround. */ -# define __fegetround_ISA300() \ - (__extension__ ({ \ - union { double __d; unsigned long long __ll; } __u; \ - __asm__ __volatile__ ( \ - ".machine push; .machine \"power9\"; mffsl %0; .machine pop" \ - : "=f" (__u.__d)); \ - __u.__ll & 0x0000000000000003LL; \ - })) - -# define __fegetround_ISA2() \ - (__extension__ ({ \ - int __fegetround_result; \ - __asm__ __volatile__ ("mcrfs 7,7 ; mfcr %0" \ - : "=r"(__fegetround_result) : : "cr7"); \ - __fegetround_result & 3; \ - })) - -# ifdef _ARCH_PWR9 -# define __fegetround() __fegetround_ISA300() -# elif defined __BUILTIN_CPU_SUPPORTS__ -# define __fegetround() \ - (__glibc_likely (__builtin_cpu_supports ("arch_3_00")) \ - ? __fegetround_ISA300() \ - : __fegetround_ISA2() \ - ) -# else -# define __fegetround() __fegetround_ISA2() -# endif - -# define fegetround() __fegetround () - -# ifndef __NO_MATH_INLINES - -/* Builtins to mtfsb0 and mtfsb1 was introduced on GCC 9. */ -# if !__GNUC_PREREQ(9, 0) -/* The weird 'i#*X' constraints on the following suppress a gcc - warning when __excepts is not a constant. Otherwise, they mean the - same as just plain 'i'. This warning only happens in old GCC - versions (gcc 3 or less). Otherwise plain 'i' works fine. */ -# define __MTFSB0(__b) __asm__ __volatile__ ("mtfsb0 %0" : : "i#*X" (__b)) -# define __MTFSB1(__b) __asm__ __volatile__ ("mtfsb1 %0" : : "i#*X" (__b)) -# else -# define __MTFSB0(__b) __builtin_mtfsb0 (__b) -# define __MTFSB1(__b) __builtin_mtfsb1 (__b) -# endif - -# if __GNUC_PREREQ(3, 4) - -#include - -/* Inline definition for feraiseexcept. */ -# define feraiseexcept(__excepts) \ - (__extension__ ({ \ - int __e = __excepts; \ - int __ret = 0; \ - if (__builtin_constant_p (__e) \ - && __builtin_popcount (__e) == 1 \ - && __e != FE_INVALID) \ - { \ - __MTFSB1 ((__builtin_clz (__e))); \ - } \ - else \ - __ret = feraiseexcept (__e); \ - __ret; \ - })) - -/* Inline definition for feclearexcept. */ -# define feclearexcept(__excepts) \ - (__extension__ ({ \ - int __e = __excepts; \ - int __ret = 0; \ - if (__builtin_constant_p (__e) \ - && __builtin_popcount (__e) == 1 \ - && __e != FE_INVALID) \ - { \ - __MTFSB0 ((__builtin_clz (__e))); \ - } \ - else \ - __ret = feclearexcept (__e); \ - __ret; \ - })) - -# endif /* __GNUC_PREREQ(3, 4). */ - -# endif /* !__NO_MATH_INLINES. */ - -#endif /* __GNUC__ && !_SOFT_FLOAT && !__NO_FPRS__ */ From patchwork Mon Mar 9 18:32:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella Netto X-Patchwork-Id: 184326 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp10927672ile; Mon, 9 Mar 2020 11:32:51 -0700 (PDT) X-Google-Smtp-Source: ADFU+vuCUL+elcxNixRayqOc64ujjAx4WFGbhzqR6jlccRWEOm0fD6MfOSd8hn12jq2IfAsfTcmf X-Received: by 2002:aa7:dac5:: with SMTP id x5mr18410925eds.76.1583778771049; Mon, 09 Mar 2020 11:32:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1583778771; cv=none; d=google.com; s=arc-20160816; b=NkQEUKbalnTT7bJK0M/IimJBdvMYxgFdHRx/fJ2efBhddTa0AzV3wGdpR2B3ba4zZe dGELS6Ysi9lvfMnNQwwHAqpehswHtmRb/NpoXiY6xgnMxjaJTOYvIRLzqVscbnEyIeyI DZWgA0lcP0Ax94UaHqft3BMrzWNIpXt/i7UxOOpQuOrIq+k8SsWInBrfvxtbQCKJ4UMu s08zHEELhISedfIjicLEjcMxl8Ui3i+OZH5g/Uy6re6czTb0wMWBgzqMIJ94FFWHTvDP flfXoL7VsnKC96K/XHrB4Rs1UQG8vxSheh5Xlt4kVpwisqCRWBoZTlztmQ8Ax2Yn8UBo ER6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature:delivered-to; bh=l0D0i05zXtZZ6CpI4m1UU9fNh8iVVQv67P2B8kuBZiQ=; b=hAnOWQLCYl7jE0Xst1EWKHcue3uzdA3zZ2O7Ykt7mTL+K9yVuSjxhbSltfeeXiXxVk YXcxGRnVQYR1pxMOQiUHd2uHpSaNjjmsgAPttDUMlNtFD7zoyhL3ib+/rkUX7g9K5Y5b PR2VT7oHfzxNfZzeiQzWAhr7vgs/eaxRUGUAr0d7b3rJy6tlUJL4WKHTFYas9rer+WYN 5BjopQ7JFYKbXKo6TTixawrSRuqyLh3gv0/bpbNq4e272qCp8le6ui6ti06uvpLxaYJb ok2da9fLPZJavEjLs3MijIaQVkesLAXLEQhlGGWEQ949nAcsoaovUyY61yR0D7iy+3mN ohDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tFYETSDM; spf=pass (google.com: domain of libc-alpha-bounces@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom=libc-alpha-bounces@sourceware.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id y59si486700eda.270.2020.03.09.11.32.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2020 11:32:51 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-bounces@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tFYETSDM; spf=pass (google.com: domain of libc-alpha-bounces@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom=libc-alpha-bounces@sourceware.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 4EBEF394B039; Mon, 9 Mar 2020 18:32:44 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-qv1-xf43.google.com (mail-qv1-xf43.google.com [IPv6:2607:f8b0:4864:20::f43]) by sourceware.org (Postfix) with ESMTPS id DD64E3877031 for ; Mon, 9 Mar 2020 18:32:41 +0000 (GMT) Received: by mail-qv1-xf43.google.com with SMTP id c28so1389357qvb.10 for ; Mon, 09 Mar 2020 11:32:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=l0D0i05zXtZZ6CpI4m1UU9fNh8iVVQv67P2B8kuBZiQ=; b=tFYETSDMV92Rte771EaSduiozPzoHa6CfG0oxHrtGq4M3SvHTAdTKouHICOFFwJ2g5 boEFjjBXcTpH/1I0+HVty85PMb/wT9WgCDfnpSxDs5k0hSMdlm8mZQUJzaZ3q6XLSDcp Arab/FBgtfhvs95TMPLVY7caD2IsnCTQRlAm6C3+ZXdRNDFQsoslDnhDdq6iE6My/IZ8 taL3K4bIJxp5LObTyBi7cSTQX+pqovwylgGZ1MHuOCzU6+151zf/HHGbCmD62DOcyD9I OBMdxC5D1yEvGeVKJe8e5tmEZTS+JiyUJQjqd5Wb+4XepEW+SdEpWpMspe6dn/ZqaaGF rw2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=l0D0i05zXtZZ6CpI4m1UU9fNh8iVVQv67P2B8kuBZiQ=; b=l/ei4Nhi2FI/qqosmUcECw0bAz4uByH86fIzTlOmGKyJPLtdkiCtof70+B2Wk56Iuv bLm5kz6EFMkyFmrZDiwdAiX5fcKiVjuhS+Kw6sbd7MlX9qiboV6bGYqV0BekCdC/qfgD 9Y7eqvErDsffJdi2PDB1F5Znj2xwvTNbN7cmosePFj8ZkPE8c4JsXk6ncI9GSaDwXz4c DgJ7EVz8/UYGui1BvhnVkTIRZeW2OSA0oV/Spqx+h/0jV3GyYnizfegQjM73y1xCNy1K kA4vGcjkp2nZ4Ke2lmuHsPC8nDM52LmUPeVTGYc9emgkkK5c/sL0afEnzuymumMtwegh nVdg== X-Gm-Message-State: ANhLgQ2BNV2ytDvRhdKLmyddzhWxbMN0bUtn2Aw+wRgHhCWLd4hnCUiX B/f5ftTpzMzTREMT1W+Ub4guWSDuOEY= X-Received: by 2002:a0c:fde7:: with SMTP id m7mr15691449qvu.53.1583778761138; Mon, 09 Mar 2020 11:32:41 -0700 (PDT) Received: from localhost.localdomain ([177.194.48.209]) by smtp.googlemail.com with ESMTPSA id e7sm13922960qtp.0.2020.03.09.11.32.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2020 11:32:40 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 2/3] x86: Remove feraiseexcept optimization Date: Mon, 9 Mar 2020 15:32:33 -0300 Message-Id: <20200309183234.11891-2-adhemerval.zanella@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200309183234.11891-1-adhemerval.zanella@linaro.org> References: <20200309183234.11891-1-adhemerval.zanella@linaro.org> X-Spam-Status: No, score=-27.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" Similar to fenvinline.h removal, this kind of optimization is better implemented by the compiler. Also newer code avoid setting exceptions directly (for instance the code to make new logf, log2f and powf implementatation to now support SVID compat). Checked on x86_64-linux-gnu and i686-linux-gnu. --- sysdeps/x86/fpu/bits/fenv.h | 54 --------------------------- sysdeps/x86/fpu/include/bits/fenv.h | 57 ----------------------------- 2 files changed, 111 deletions(-) delete mode 100644 sysdeps/x86/fpu/include/bits/fenv.h -- 2.17.1 diff --git a/sysdeps/x86/fpu/bits/fenv.h b/sysdeps/x86/fpu/bits/fenv.h index eb78eb4b2d..6cfa5678eb 100644 --- a/sysdeps/x86/fpu/bits/fenv.h +++ b/sysdeps/x86/fpu/bits/fenv.h @@ -114,57 +114,3 @@ femode_t; /* Default floating-point control modes. */ # define FE_DFL_MODE ((const femode_t *) -1L) #endif - - -#ifdef __USE_EXTERN_INLINES -__BEGIN_DECLS - -/* Optimized versions. */ -#ifndef _LIBC -extern int __REDIRECT_NTH (__feraiseexcept_renamed, (int), feraiseexcept); -#endif -__extern_always_inline void -__NTH (__feraiseexcept_invalid_divbyzero (int __excepts)) -{ - if ((FE_INVALID & __excepts) != 0) - { - /* One example of an invalid operation is 0.0 / 0.0. */ - float __f = 0.0; - -# ifdef __SSE_MATH__ - __asm__ __volatile__ ("divss %0, %0 " : : "x" (__f)); -# else - __asm__ __volatile__ ("fdiv %%st, %%st(0); fwait" - : "=t" (__f) : "0" (__f)); -# endif - (void) &__f; - } - if ((FE_DIVBYZERO & __excepts) != 0) - { - float __f = 1.0; - float __g = 0.0; - -# ifdef __SSE_MATH__ - __asm__ __volatile__ ("divss %1, %0" : : "x" (__f), "x" (__g)); -# else - __asm__ __volatile__ ("fdivp %%st, %%st(1); fwait" - : "=t" (__f) : "0" (__f), "u" (__g) : "st(1)"); -# endif - (void) &__f; - } -} -__extern_inline int -__NTH (feraiseexcept (int __excepts)) -{ - if (__builtin_constant_p (__excepts) - && (__excepts & ~(FE_INVALID | FE_DIVBYZERO)) == 0) - { - __feraiseexcept_invalid_divbyzero (__excepts); - return 0; - } - - return __feraiseexcept_renamed (__excepts); -} - -__END_DECLS -#endif diff --git a/sysdeps/x86/fpu/include/bits/fenv.h b/sysdeps/x86/fpu/include/bits/fenv.h deleted file mode 100644 index dd3f61e9f3..0000000000 --- a/sysdeps/x86/fpu/include/bits/fenv.h +++ /dev/null @@ -1,57 +0,0 @@ -/* Wrapper for x86 bits/fenv.h for use when building glibc. - Copyright (C) 1997-2020 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#ifndef _BITS_FENV_H - -#if defined _LIBC && defined __USE_EXTERN_INLINES -# if defined SHARED && !defined NO_HIDDEN && IS_IN (libm) -extern int __REDIRECT_NTH (__feraiseexcept_renamed, (int), __GI_feraiseexcept); -# else -extern int __REDIRECT_NTH (__feraiseexcept_renamed, (int), feraiseexcept); -# endif -#endif - -#include_next - -# ifndef _ISOMAC - -/* Ensure __feraiseexcept calls in glibc are optimized the same as - feraiseexcept calls. */ - -#ifdef __USE_EXTERN_INLINES -__BEGIN_DECLS - -extern int __REDIRECT_NTH (____feraiseexcept_renamed, (int), __feraiseexcept); -__extern_inline int -__NTH (__feraiseexcept (int __excepts)) -{ - if (__builtin_constant_p (__excepts) - && (__excepts & ~(FE_INVALID | FE_DIVBYZERO)) == 0) - { - __feraiseexcept_invalid_divbyzero (__excepts); - return 0; - } - - return ____feraiseexcept_renamed (__excepts); -} - -__END_DECLS -#endif - -# endif /* _ISOMAC */ -#endif /* bits/fenv.h */ From patchwork Mon Mar 9 18:32:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella Netto X-Patchwork-Id: 184327 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp10927754ile; Mon, 9 Mar 2020 11:32:55 -0700 (PDT) X-Google-Smtp-Source: ADFU+vtxOua1PaOhNwGHSjwwk/5FceNbNdcJXfnCoGARIB8ayDdvC4fiRrTpn9ll6TwkNiPLzILM X-Received: by 2002:a17:906:2f11:: with SMTP id v17mr2508009eji.223.1583778775542; Mon, 09 Mar 2020 11:32:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1583778775; cv=none; d=google.com; s=arc-20160816; b=0g8lnX+YY3vMVth8prAGDoGFHJ95JcgVmUFHXWj+jLuLvXq3Zo0qWiVs8hiLmxgQ4y 8+p0ItOekIYSLqtsvUC5t98Fa9SmekzPD8IgTcqsEGceExQ0l1/dx+AmyM9tMXke68/D nTbNHB76lkfxuBOShtMsAuS9Irqp300SqJK43uvIfnUPN5HNiWUIRKla1mDB+ljXxs03 Xdb8ZSWRoIfg6JM3LfZcolARE+bdx79TduLc9PWnWVTaICDMwDhYFmI2/9znVIaX/VSt KD1Mt7k6q1giD60fv4Fn6MVJeGp59d96hlFo0pkfQ88tN2VKL4vEFlwhAi/pM6BsJC5W THNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature:delivered-to; bh=fuxnb9YdodBLhJi6IqZS9p+qT2H7oEd7L+K/eVhuxW4=; b=Q9S9tJ5CL+3IUUfVPb1kEiSq37cr08UAmzFaGfUxeFnrU2c1k7gmgPZ3UDuSJql8L8 pQPr9/dAhzhOGz+6NGpGp01bU8IRDqKs+FJXVYGrVJi63PRTZnars754ZjkRIi6QhDQj zmH6tKy3xoLoJulcsnf4SJDMEDQwNyhvHJRrg3hABQf7ICpW8Dv9CutHhKgtso8IgSSp 9uqQXdr9NEJa4t2YFigJFFj08kPL5aUhzb86XhRr6k3cUbYdLY2lVPQkrWZmuMsBYqBK 3a2otJU5L8puSvIPGAYhvuAuKuLXAaKngT95z/Ca3xm2r7Rn88xlL+m+PTgoECAF7ANq SCrg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wKlUJETl; spf=pass (google.com: domain of libc-alpha-bounces@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom=libc-alpha-bounces@sourceware.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id n4si6653396ejc.351.2020.03.09.11.32.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2020 11:32:55 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-bounces@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wKlUJETl; spf=pass (google.com: domain of libc-alpha-bounces@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom=libc-alpha-bounces@sourceware.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AC3DB39524A6; Mon, 9 Mar 2020 18:32:45 +0000 (GMT) X-Original-To: libc-alpha@sourceware.org Delivered-To: libc-alpha@sourceware.org Received: from mail-qt1-x844.google.com (mail-qt1-x844.google.com [IPv6:2607:f8b0:4864:20::844]) by sourceware.org (Postfix) with ESMTPS id 31DAE3875DFD for ; Mon, 9 Mar 2020 18:32:43 +0000 (GMT) Received: by mail-qt1-x844.google.com with SMTP id m33so7787324qtb.3 for ; Mon, 09 Mar 2020 11:32:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=fuxnb9YdodBLhJi6IqZS9p+qT2H7oEd7L+K/eVhuxW4=; b=wKlUJETlsPC9M4AL1itMaTM/5AycsST686xPAAPbIAJxFIuD+qEezFk4caUqY/uuZJ cthtWeA8s/1n/AWG8Nst0brOEJZVzTP1HajiWzbGuSqFCN+CuCXokjMKrzyRNV2NvBW7 gtG38rEVKIMCWKzc0QAusYVESeIwnQqKLz6BZlQlPq6I4ulR83eR6Hy2V9IjLQMUHKB/ N7kkYGXeta0irngfMdz2PQGBG3VwL9JjbD6A4E46OiaZBEl9vpcvEJc/QihPpYz2OW0D Vv8lv0hJojLyk0e4l0xvvjLXDaR+xlcV0CbSrXkptYJmPgQH/bsXUQraAGv1cnxlaK3u tk1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=fuxnb9YdodBLhJi6IqZS9p+qT2H7oEd7L+K/eVhuxW4=; b=G1RG2byEQaq1gAmvTkWdBLcvej4dqdB56W3PKrKgEaXNm22dysB9ah8qlNQEL50s5k rVGkobxt7A+qua/s5fdP3Pegnk1GXXlXlDc87EBZZETjSc4OZrrgOi8OUIdFlCvDDOn2 YEUKYDNxHmeVl/5zVxkdbCuj8ScHjQ4+hR3/iimDf2NVKXhgY23ih9TUalmBis/bueWy brojtbaGJGPT40KzNiWnzHviCS7tO87eEhkR2g5kDmk1YVsFFrNM1OkIDOAA7A0KZmpM GpBW2O7G7EzTzsDw6YAQvoTjRnS0GRIiHU0TAc3DZ6N/B1487p+kyVEKuSCeg3M1mocy ciIg== X-Gm-Message-State: ANhLgQ3V3lWGtwdP1Oi81c7XkdUy9B3NdaTUv+jaskT1rQjEjeWPVgC6 l3tymeqbU3rP1KMCX9zzeW8s2Hr9GTc= X-Received: by 2002:ac8:b8d:: with SMTP id h13mr15752236qti.298.1583778762389; Mon, 09 Mar 2020 11:32:42 -0700 (PDT) Received: from localhost.localdomain ([177.194.48.209]) by smtp.googlemail.com with ESMTPSA id e7sm13922960qtp.0.2020.03.09.11.32.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Mar 2020 11:32:42 -0700 (PDT) From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 3/3] sparc: Move __fenv_{ld,st}fsr to fenv-private.h Date: Mon, 9 Mar 2020 15:32:34 -0300 Message-Id: <20200309183234.11891-3-adhemerval.zanella@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200309183234.11891-1-adhemerval.zanella@linaro.org> References: <20200309183234.11891-1-adhemerval.zanella@linaro.org> X-Spam-Status: No, score=-27.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces@sourceware.org Sender: "Libc-alpha" These should not be exported on installed headers. Checked on sparc64-linux-gnu and sparcv9-linux-gnu. --- sysdeps/sparc/fpu/bits/fenv.h | 9 --------- sysdeps/sparc/fpu/fclrexcpt.c | 1 + sysdeps/sparc/fpu/fedisblxcpt.c | 1 + sysdeps/sparc/fpu/feenablxcpt.c | 1 + sysdeps/sparc/fpu/fegetenv.c | 1 + sysdeps/sparc/fpu/fegetexcept.c | 1 + sysdeps/sparc/fpu/fegetmode.c | 1 + sysdeps/sparc/fpu/fegetround.c | 1 + sysdeps/sparc/fpu/feholdexcpt.c | 1 + sysdeps/sparc/fpu/fenv_private.h | 9 +++++++++ sysdeps/sparc/fpu/fesetenv.c | 1 + sysdeps/sparc/fpu/fesetexcept.c | 1 + sysdeps/sparc/fpu/fesetmode.c | 1 + sysdeps/sparc/fpu/fesetround.c | 1 + sysdeps/sparc/fpu/feupdateenv.c | 1 + sysdeps/sparc/fpu/fgetexcptflg.c | 1 + sysdeps/sparc/fpu/fsetexcptflg.c | 1 + sysdeps/sparc/fpu/ftestexcept.c | 1 + 18 files changed, 25 insertions(+), 9 deletions(-) -- 2.17.1 diff --git a/sysdeps/sparc/fpu/bits/fenv.h b/sysdeps/sparc/fpu/bits/fenv.h index 4935208a41..d34fcac4c5 100644 --- a/sysdeps/sparc/fpu/bits/fenv.h +++ b/sysdeps/sparc/fpu/bits/fenv.h @@ -83,15 +83,6 @@ typedef unsigned long int fenv_t; # define FE_NOMASK_ENV ((const fenv_t *) -2) #endif -/* For internal use only: access the fp state register. */ -#if __WORDSIZE == 64 -# define __fenv_stfsr(X) __asm__ __volatile__ ("stx %%fsr,%0" : "=m" (X)) -# define __fenv_ldfsr(X) __asm__ __volatile__ ("ldx %0,%%fsr" : : "m" (X)) -#else -# define __fenv_stfsr(X) __asm__ __volatile__ ("st %%fsr,%0" : "=m" (X)) -# define __fenv_ldfsr(X) __asm__ __volatile__ ("ld %0,%%fsr" : : "m" (X)) -#endif - #if __GLIBC_USE (IEC_60559_BFP_EXT_C2X) /* Type representing floating-point control modes. */ typedef unsigned long int femode_t; diff --git a/sysdeps/sparc/fpu/fclrexcpt.c b/sysdeps/sparc/fpu/fclrexcpt.c index b11734f057..5af20d1f7a 100644 --- a/sysdeps/sparc/fpu/fclrexcpt.c +++ b/sysdeps/sparc/fpu/fclrexcpt.c @@ -17,6 +17,7 @@ . */ #include +#include #include int diff --git a/sysdeps/sparc/fpu/fedisblxcpt.c b/sysdeps/sparc/fpu/fedisblxcpt.c index 86688ab533..9b832a82ce 100644 --- a/sysdeps/sparc/fpu/fedisblxcpt.c +++ b/sysdeps/sparc/fpu/fedisblxcpt.c @@ -18,6 +18,7 @@ . */ #include +#include int fedisableexcept (int excepts) diff --git a/sysdeps/sparc/fpu/feenablxcpt.c b/sysdeps/sparc/fpu/feenablxcpt.c index 647093cebc..06ec14cee5 100644 --- a/sysdeps/sparc/fpu/feenablxcpt.c +++ b/sysdeps/sparc/fpu/feenablxcpt.c @@ -18,6 +18,7 @@ . */ #include +#include int feenableexcept (int excepts) diff --git a/sysdeps/sparc/fpu/fegetenv.c b/sysdeps/sparc/fpu/fegetenv.c index edde6ae5b2..00c0bc72b5 100644 --- a/sysdeps/sparc/fpu/fegetenv.c +++ b/sysdeps/sparc/fpu/fegetenv.c @@ -17,6 +17,7 @@ . */ #include +#include #include int diff --git a/sysdeps/sparc/fpu/fegetexcept.c b/sysdeps/sparc/fpu/fegetexcept.c index f549a90190..4d9746dd57 100644 --- a/sysdeps/sparc/fpu/fegetexcept.c +++ b/sysdeps/sparc/fpu/fegetexcept.c @@ -18,6 +18,7 @@ . */ #include +#include int fegetexcept (void) diff --git a/sysdeps/sparc/fpu/fegetmode.c b/sysdeps/sparc/fpu/fegetmode.c index 18c932d520..aa160bd19a 100644 --- a/sysdeps/sparc/fpu/fegetmode.c +++ b/sysdeps/sparc/fpu/fegetmode.c @@ -17,6 +17,7 @@ . */ #include +#include int fegetmode (femode_t *modep) diff --git a/sysdeps/sparc/fpu/fegetround.c b/sysdeps/sparc/fpu/fegetround.c index 1eae341fc4..6ca7d5c0dc 100644 --- a/sysdeps/sparc/fpu/fegetround.c +++ b/sysdeps/sparc/fpu/fegetround.c @@ -17,6 +17,7 @@ . */ #include +#include int __fegetround (void) diff --git a/sysdeps/sparc/fpu/feholdexcpt.c b/sysdeps/sparc/fpu/feholdexcpt.c index 7a1a3e33ed..bb612402f0 100644 --- a/sysdeps/sparc/fpu/feholdexcpt.c +++ b/sysdeps/sparc/fpu/feholdexcpt.c @@ -17,6 +17,7 @@ . */ #include +#include int __feholdexcept (fenv_t *envp) diff --git a/sysdeps/sparc/fpu/fenv_private.h b/sysdeps/sparc/fpu/fenv_private.h index dbd1001ccb..da7c7fe332 100644 --- a/sysdeps/sparc/fpu/fenv_private.h +++ b/sysdeps/sparc/fpu/fenv_private.h @@ -3,6 +3,15 @@ #include +/* For internal use only: access the fp state register. */ +#if __WORDSIZE == 64 +# define __fenv_stfsr(X) __asm__ __volatile__ ("stx %%fsr,%0" : "=m" (X)) +# define __fenv_ldfsr(X) __asm__ __volatile__ ("ldx %0,%%fsr" : : "m" (X)) +#else +# define __fenv_stfsr(X) __asm__ __volatile__ ("st %%fsr,%0" : "=m" (X)) +# define __fenv_ldfsr(X) __asm__ __volatile__ ("ld %0,%%fsr" : : "m" (X)) +#endif + static __always_inline void libc_feholdexcept (fenv_t *e) { diff --git a/sysdeps/sparc/fpu/fesetenv.c b/sysdeps/sparc/fpu/fesetenv.c index 82c03c6760..d536abd344 100644 --- a/sysdeps/sparc/fpu/fesetenv.c +++ b/sysdeps/sparc/fpu/fesetenv.c @@ -17,6 +17,7 @@ . */ #include +#include #include int diff --git a/sysdeps/sparc/fpu/fesetexcept.c b/sysdeps/sparc/fpu/fesetexcept.c index 6740ece5b4..fbc21c0477 100644 --- a/sysdeps/sparc/fpu/fesetexcept.c +++ b/sysdeps/sparc/fpu/fesetexcept.c @@ -17,6 +17,7 @@ . */ #include +#include int fesetexcept (int excepts) diff --git a/sysdeps/sparc/fpu/fesetmode.c b/sysdeps/sparc/fpu/fesetmode.c index 6fe5d337ad..24148e0fd3 100644 --- a/sysdeps/sparc/fpu/fesetmode.c +++ b/sysdeps/sparc/fpu/fesetmode.c @@ -17,6 +17,7 @@ . */ #include +#include #include #define FPU_CONTROL_BITS 0xcfc00000UL diff --git a/sysdeps/sparc/fpu/fesetround.c b/sysdeps/sparc/fpu/fesetround.c index 9a944322d7..b259474d2c 100644 --- a/sysdeps/sparc/fpu/fesetround.c +++ b/sysdeps/sparc/fpu/fesetround.c @@ -17,6 +17,7 @@ . */ #include +#include int __fesetround (int round) diff --git a/sysdeps/sparc/fpu/feupdateenv.c b/sysdeps/sparc/fpu/feupdateenv.c index 7e2399bfa2..7721f822ea 100644 --- a/sysdeps/sparc/fpu/feupdateenv.c +++ b/sysdeps/sparc/fpu/feupdateenv.c @@ -17,6 +17,7 @@ . */ #include +#include #include int diff --git a/sysdeps/sparc/fpu/fgetexcptflg.c b/sysdeps/sparc/fpu/fgetexcptflg.c index f95d9bbf1b..ab8fa1bb76 100644 --- a/sysdeps/sparc/fpu/fgetexcptflg.c +++ b/sysdeps/sparc/fpu/fgetexcptflg.c @@ -17,6 +17,7 @@ . */ #include +#include #include int diff --git a/sysdeps/sparc/fpu/fsetexcptflg.c b/sysdeps/sparc/fpu/fsetexcptflg.c index 077dfc9953..34eb789a94 100644 --- a/sysdeps/sparc/fpu/fsetexcptflg.c +++ b/sysdeps/sparc/fpu/fsetexcptflg.c @@ -17,6 +17,7 @@ . */ #include +#include #include #include diff --git a/sysdeps/sparc/fpu/ftestexcept.c b/sysdeps/sparc/fpu/ftestexcept.c index a8c8e06ef6..44367ab4fd 100644 --- a/sysdeps/sparc/fpu/ftestexcept.c +++ b/sysdeps/sparc/fpu/ftestexcept.c @@ -17,6 +17,7 @@ . */ #include +#include int fetestexcept (int excepts)