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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b7a4346sm18302360f8f.95.2025.04.02.14.38.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 02 Apr 2025 14:38:01 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH-for-10.1] hw/intc: Build TYPE_M68K_IRQC with common system objects Date: Wed, 2 Apr 2025 23:38:00 +0200 Message-ID: <20250402213800.61803-1-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org m68k_set_irq_level() prototype doesn't use target-specific types, move its declaration from target-specific "cpu.h" to target-agnostic "cpu-qom.h". Doing so we can remove the "cpu.h" header in m68k_irqc.c, making it target-agnostic, which can be build as part of the system_ss[] source set. Signed-off-by: Philippe Mathieu-Daudé --- target/m68k/cpu-qom.h | 2 ++ target/m68k/cpu.h | 1 - hw/intc/m68k_irqc.c | 2 +- hw/intc/meson.build | 2 +- 4 files changed, 4 insertions(+), 3 deletions(-) diff --git a/target/m68k/cpu-qom.h b/target/m68k/cpu-qom.h index 273e8eae417..fa048c05a69 100644 --- a/target/m68k/cpu-qom.h +++ b/target/m68k/cpu-qom.h @@ -29,4 +29,6 @@ OBJECT_DECLARE_CPU_TYPE(M68kCPU, M68kCPUClass, M68K_CPU) #define M68K_CPU_TYPE_SUFFIX "-" TYPE_M68K_CPU #define M68K_CPU_TYPE_NAME(model) model M68K_CPU_TYPE_SUFFIX +void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector); + #endif diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 39d0b9d6d73..f35db0afd05 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -472,7 +472,6 @@ typedef enum { #define MACSR_V 0x002 #define MACSR_EV 0x001 -void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector); void m68k_switch_sp(CPUM68KState *env); void do_m68k_semihosting(CPUM68KState *env, int nr); diff --git a/hw/intc/m68k_irqc.c b/hw/intc/m68k_irqc.c index a82b80f5c6f..ab85bf7412b 100644 --- a/hw/intc/m68k_irqc.c +++ b/hw/intc/m68k_irqc.c @@ -8,12 +8,12 @@ */ #include "qemu/osdep.h" -#include "cpu.h" #include "migration/vmstate.h" #include "hw/qdev-properties.h" #include "hw/nmi.h" #include "hw/intc/intc.h" #include "hw/intc/m68k_irqc.h" +#include "target/m68k/cpu-qom.h" static bool m68k_irqc_get_statistics(InterruptStatsProvider *obj, diff --git a/hw/intc/meson.build b/hw/intc/meson.build index 602da304b02..92c4565c598 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -67,7 +67,7 @@ specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('xics_spapr.c', 'spapr_xi specific_ss.add(when: 'CONFIG_XIVE', if_true: files('xive.c')) specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'], if_true: files('spapr_xive_kvm.c')) -specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) +system_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c')) specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c'))