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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c301a76cesm2969306f8f.37.2025.04.03.16.49.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:49:24 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 01/19] qemu: Introduce TargetInfo API in 'target_info.h' Date: Fri, 4 Apr 2025 01:48:56 +0200 Message-ID: <20250403234914.9154-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- meson.build | 9 +++++++++ include/exec/poison.h | 1 + include/qemu/target_info-impl.h | 21 +++++++++++++++++++++ include/qemu/target_info.h | 18 ++++++++++++++++++ target_info-stub.c | 23 +++++++++++++++++++++++ target_info.c | 16 ++++++++++++++++ 6 files changed, 88 insertions(+) create mode 100644 include/qemu/target_info-impl.h create mode 100644 include/qemu/target_info.h create mode 100644 target_info-stub.c create mode 100644 target_info.c diff --git a/meson.build b/meson.build index bcb9d39a387..de9c9dacd35 100644 --- a/meson.build +++ b/meson.build @@ -3262,6 +3262,9 @@ host_kconfig = \ ignored = [ 'TARGET_XML_FILES', 'TARGET_ABI_DIR', 'TARGET_ARCH' ] +target_info = [ +] + default_targets = 'CONFIG_DEFAULT_TARGETS' in config_host actual_target_dirs = [] fdt_required = [] @@ -3368,6 +3371,9 @@ foreach target : target_dirs config_target_data.set(k, v) endif endforeach + if target not in target_info + config_target_data.set('TARGET_INFO_STUB_NEEDED', 1) + endif config_target_data.set('QEMU_ARCH', 'QEMU_ARCH_' + config_target['TARGET_BASE_ARCH'].to_upper()) config_target_h += {target: configure_file(output: target + '-config-target.h', @@ -3807,6 +3813,9 @@ endif common_ss.add(pagevary) specific_ss.add(files('page-target.c', 'page-vary-target.c')) +specific_ss.add(files('target_info-stub.c')) +common_ss.add(files('target_info.c')) + subdir('backends') subdir('disas') subdir('migration') diff --git a/include/exec/poison.h b/include/exec/poison.h index bc422719d80..00aedc41d82 100644 --- a/include/exec/poison.h +++ b/include/exec/poison.h @@ -38,6 +38,7 @@ #pragma GCC poison TARGET_BIG_ENDIAN #pragma GCC poison TCG_GUEST_DEFAULT_MO #pragma GCC poison TARGET_HAS_PRECISE_SMC +#pragma GCC poison TARGET_INFO_STUB_NEEDED #pragma GCC poison TARGET_LONG_BITS #pragma GCC poison TARGET_FMT_lx diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h new file mode 100644 index 00000000000..b340e192fce --- /dev/null +++ b/include/qemu/target_info-impl.h @@ -0,0 +1,21 @@ +/* + * QEMU binary helpers + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef QEMU_TARGET_INFO_IMPL_H +#define QEMU_TARGET_INFO_IMPL_H + +#include "qemu/target_info.h" + +struct BinaryTargetInfo { + + /* runtime equivalent of TARGET_INFO_STUB_NEEDED definition */ + bool is_stub; + +}; + +#endif diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h new file mode 100644 index 00000000000..fab3f3153ea --- /dev/null +++ b/include/qemu/target_info.h @@ -0,0 +1,18 @@ +/* + * QEMU binary helpers + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef QEMU_TARGET_INFO_H +#define QEMU_TARGET_INFO_H + +typedef struct BinaryTargetInfo BinaryTargetInfo; + +const BinaryTargetInfo *target_info(void); + +bool target_info_is_stub(void); + +#endif diff --git a/target_info-stub.c b/target_info-stub.c new file mode 100644 index 00000000000..d683a05977d --- /dev/null +++ b/target_info-stub.c @@ -0,0 +1,23 @@ +/* + * QEMU target info stubs + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/target_info-impl.h" + +#ifdef TARGET_INFO_STUB_NEEDED + +static const BinaryTargetInfo target_info_stub = { + .is_stub = true, +}; + +const BinaryTargetInfo *target_info(void) +{ + return &target_info_stub; +} + +#endif /* TARGET_INFO_STUB_NEEDED */ diff --git a/target_info.c b/target_info.c new file mode 100644 index 00000000000..cb17d29b86d --- /dev/null +++ b/target_info.c @@ -0,0 +1,16 @@ +/* + * QEMU legacy binary helpers + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/target_info-impl.h" +#include "qemu/target_info.h" + +bool target_info_is_stub(void) +{ + return target_info()->is_stub; +} From patchwork Thu Apr 3 23:48:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877977 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527218wrs; Thu, 3 Apr 2025 16:50:26 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVik0DIbfqu5Wg43saWQqBnQCScMf74dYaQdYsER2+J/jeQ/gVf9z4HnvPw9enEg27HdZdKrQ==@linaro.org X-Google-Smtp-Source: AGHT+IFNncqEVyltPhwnsegJdibOoZ76O5QPaYr+SPRsNbgXvnPdSKLoEXRAFCI68x4CC08OyAQm X-Received: by 2002:a05:620a:2685:b0:7c5:50ab:de07 with SMTP id af79cd13be357-7c774d53618mr170195885a.21.1743724226264; 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c30226bbfsm3015600f8f.90.2025.04.03.16.49.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:49:30 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 02/19] qemu: Convert target_name() to TargetInfo API Date: Fri, 4 Apr 2025 01:48:57 +0200 Message-ID: <20250403234914.9154-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/hw/core/cpu.h | 2 -- include/qemu/target_info-impl.h | 3 +++ include/qemu/target_info.h | 2 ++ cpu-target.c | 5 ----- hw/core/machine-qmp-cmds.c | 1 + plugins/loader.c | 2 +- system/vl.c | 2 +- target_info-stub.c | 1 + target_info.c | 5 +++++ 9 files changed, 14 insertions(+), 9 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 5b645df59f5..9d9448341d1 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1115,8 +1115,6 @@ bool cpu_exec_realizefn(CPUState *cpu, Error **errp); void cpu_exec_unrealizefn(CPUState *cpu); void cpu_exec_reset_hold(CPUState *cpu); -const char *target_name(void); - #ifdef COMPILING_PER_TARGET extern const VMStateDescription vmstate_cpu_common; diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h index b340e192fce..00bb746572b 100644 --- a/include/qemu/target_info-impl.h +++ b/include/qemu/target_info-impl.h @@ -16,6 +16,9 @@ struct BinaryTargetInfo { /* runtime equivalent of TARGET_INFO_STUB_NEEDED definition */ bool is_stub; + /* runtime equivalent of TARGET_NAME definition */ + const char *const name; + }; #endif diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h index fab3f3153ea..5b8f17a15a3 100644 --- a/include/qemu/target_info.h +++ b/include/qemu/target_info.h @@ -15,4 +15,6 @@ const BinaryTargetInfo *target_info(void); bool target_info_is_stub(void); +const char *target_name(void); + #endif diff --git a/cpu-target.c b/cpu-target.c index c99d208a7c4..3f82d3ea444 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -165,8 +165,3 @@ bool target_words_bigendian(void) { return TARGET_BIG_ENDIAN; } - -const char *target_name(void) -{ - return TARGET_NAME; -} diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c index 3130c5cd456..6701e210f54 100644 --- a/hw/core/machine-qmp-cmds.c +++ b/hw/core/machine-qmp-cmds.c @@ -19,6 +19,7 @@ #include "qapi/qobject-input-visitor.h" #include "qapi/type-helpers.h" #include "qemu/uuid.h" +#include "qemu/target_info.h" #include "qom/qom-qobject.h" #include "system/hostmem.h" #include "system/hw_accel.h" diff --git a/plugins/loader.c b/plugins/loader.c index 7523d554f03..36a4e88d4db 100644 --- a/plugins/loader.c +++ b/plugins/loader.c @@ -29,7 +29,7 @@ #include "qemu/xxhash.h" #include "qemu/plugin.h" #include "qemu/memalign.h" -#include "hw/core/cpu.h" +#include "qemu/target_info.h" #include "exec/tb-flush.h" #include "plugin.h" diff --git a/system/vl.c b/system/vl.c index c17945c4939..d8a0fe713c9 100644 --- a/system/vl.c +++ b/system/vl.c @@ -40,6 +40,7 @@ #include "qemu/help_option.h" #include "qemu/hw-version.h" #include "qemu/uuid.h" +#include "qemu/target_info.h" #include "system/reset.h" #include "system/runstate.h" #include "system/runstate-action.h" @@ -79,7 +80,6 @@ #include "hw/block/block.h" #include "hw/i386/x86.h" #include "hw/i386/pc.h" -#include "hw/core/cpu.h" #include "migration/cpr.h" #include "migration/misc.h" #include "migration/snapshot.h" diff --git a/target_info-stub.c b/target_info-stub.c index d683a05977d..db61a335908 100644 --- a/target_info-stub.c +++ b/target_info-stub.c @@ -13,6 +13,7 @@ static const BinaryTargetInfo target_info_stub = { .is_stub = true, + .name = TARGET_NAME, }; const BinaryTargetInfo *target_info(void) diff --git a/target_info.c b/target_info.c index cb17d29b86d..6b44ea9fc0e 100644 --- a/target_info.c +++ b/target_info.c @@ -14,3 +14,8 @@ bool target_info_is_stub(void) { return target_info()->is_stub; } + +const char *target_name(void) +{ + return target_info()->name; +} From patchwork Thu Apr 3 23:48:58 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877992 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527733wrs; Thu, 3 Apr 2025 16:52:16 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWms3wTVtajVUeGYsTGONj0LCe1OEV5GajdD16RR7r2z69W0iYrWmKSN+EC4CFq1A6UswaDPA==@linaro.org X-Google-Smtp-Source: AGHT+IEyyOiyAsmYSs4qbH//B9Ay3X+Aulofc7cVppTqc/pRXlZ7WBLlZmDbisU59ZJ+4hDLihQk X-Received: by 2002:a05:620a:19a6:b0:7c5:4eee:5409 with SMTP id af79cd13be357-7c774df958emr208365685a.48.1743724336317; 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c301a9da1sm2903124f8f.22.2025.04.03.16.49.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:49:36 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 03/19] qemu: Factor target_system_arch() out Date: Fri, 4 Apr 2025 01:48:58 +0200 Message-ID: <20250403234914.9154-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/target_info-impl.h | 4 ++++ include/qemu/target_info.h | 4 ++++ hw/core/machine-qmp-cmds.c | 6 ++---- target_info-stub.c | 1 + target_info.c | 12 ++++++++++++ 5 files changed, 23 insertions(+), 4 deletions(-) diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h index 00bb746572b..0cec211e362 100644 --- a/include/qemu/target_info-impl.h +++ b/include/qemu/target_info-impl.h @@ -10,6 +10,7 @@ #define QEMU_TARGET_INFO_IMPL_H #include "qemu/target_info.h" +#include "qapi/qapi-types-machine.h" struct BinaryTargetInfo { @@ -19,6 +20,9 @@ struct BinaryTargetInfo { /* runtime equivalent of TARGET_NAME definition */ const char *const name; + /* related to TARGET_ARCH definition */ + SysEmuTarget system_arch; + }; #endif diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h index 5b8f17a15a3..6ca36dae8a3 100644 --- a/include/qemu/target_info.h +++ b/include/qemu/target_info.h @@ -9,6 +9,8 @@ #ifndef QEMU_TARGET_INFO_H #define QEMU_TARGET_INFO_H +#include "qapi/qapi-types-machine.h" + typedef struct BinaryTargetInfo BinaryTargetInfo; const BinaryTargetInfo *target_info(void); @@ -17,4 +19,6 @@ bool target_info_is_stub(void); const char *target_name(void); +SysEmuTarget target_system_arch(void); + #endif diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c index 6701e210f54..9e2dd348c06 100644 --- a/hw/core/machine-qmp-cmds.c +++ b/hw/core/machine-qmp-cmds.c @@ -36,8 +36,7 @@ CpuInfoFastList *qmp_query_cpus_fast(Error **errp) MachineState *ms = MACHINE(qdev_get_machine()); MachineClass *mc = MACHINE_GET_CLASS(ms); CpuInfoFastList *head = NULL, **tail = &head; - SysEmuTarget target = qapi_enum_parse(&SysEmuTarget_lookup, target_name(), - -1, &error_abort); + SysEmuTarget target = target_system_arch(); CPUState *cpu; CPU_FOREACH(cpu) { @@ -137,8 +136,7 @@ TargetInfo *qmp_query_target(Error **errp) { TargetInfo *info = g_malloc0(sizeof(*info)); - info->arch = qapi_enum_parse(&SysEmuTarget_lookup, target_name(), -1, - &error_abort); + info->arch = target_system_arch(); return info; } diff --git a/target_info-stub.c b/target_info-stub.c index db61a335908..46a240ac66a 100644 --- a/target_info-stub.c +++ b/target_info-stub.c @@ -14,6 +14,7 @@ static const BinaryTargetInfo target_info_stub = { .is_stub = true, .name = TARGET_NAME, + .system_arch = -1, }; const BinaryTargetInfo *target_info(void) diff --git a/target_info.c b/target_info.c index 6b44ea9fc0e..be4f19009b3 100644 --- a/target_info.c +++ b/target_info.c @@ -9,6 +9,7 @@ #include "qemu/osdep.h" #include "qemu/target_info-impl.h" #include "qemu/target_info.h" +#include "qapi/error.h" bool target_info_is_stub(void) { @@ -19,3 +20,14 @@ const char *target_name(void) { return target_info()->name; } + +SysEmuTarget target_system_arch(void) +{ + SysEmuTarget system_arch = target_info()->system_arch; + + if (system_arch >= SYS_EMU_TARGET__MAX) { + system_arch = qapi_enum_parse(&SysEmuTarget_lookup, target_name(), -1, + &error_abort); + } + return system_arch; +} From patchwork Thu Apr 3 23:48:59 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877978 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527287wrs; Thu, 3 Apr 2025 16:50:37 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWipQKmQqx8mMJ2dv1wfShL0L8xKheywMEwU0bvpdC1iwqqEPjmkSOnb8hXAA8mtEnKEUg3Nw==@linaro.org X-Google-Smtp-Source: AGHT+IEDkSvm7pECe4fg90ffiBCJz54PELqiKY3npCO1POlGmv53JewaDfqTcCE/oSCHRZjqGjEt X-Received: by 2002:a05:6214:f27:b0:6d8:9be9:7d57 with SMTP id 6a1803df08f44-6f01e785736mr23616326d6.37.1743724237749; Thu, 03 Apr 2025 16:50:37 -0700 (PDT) ARC-Seal: i=1; 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c30226cf6sm2917081f8f.87.2025.04.03.16.49.41 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:49:42 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 04/19] qemu: Convert target_words_bigendian() to TargetInfo API Date: Fri, 4 Apr 2025 01:48:59 +0200 Message-ID: <20250403234914.9154-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/exec/tswap.h | 13 +------------ include/qemu/target_info-impl.h | 4 ++++ include/qemu/target_info.h | 11 +++++++++++ cpu-target.c | 6 ------ hw/core/cpu-system.c | 2 +- hw/display/vga.c | 2 +- hw/virtio/virtio.c | 2 +- system/qtest.c | 1 + target_info-stub.c | 1 + target_info.c | 5 +++++ 10 files changed, 26 insertions(+), 21 deletions(-) diff --git a/include/exec/tswap.h b/include/exec/tswap.h index 84060a49994..415781b2bcc 100644 --- a/include/exec/tswap.h +++ b/include/exec/tswap.h @@ -9,18 +9,7 @@ #define TSWAP_H #include "qemu/bswap.h" - -/** - * target_words_bigendian: - * Returns true if the (default) endianness of the target is big endian, - * false otherwise. Common code should normally never need to know about the - * endianness of the target, so please do *not* use this function unless you - * know very well what you are doing! - */ -bool target_words_bigendian(void); -#ifdef COMPILING_PER_TARGET -#define target_words_bigendian() TARGET_BIG_ENDIAN -#endif +#include "qemu/target_info.h" /* * If we're in target-specific code, we can hard-code the swapping diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h index 0cec211e362..14566e4a913 100644 --- a/include/qemu/target_info-impl.h +++ b/include/qemu/target_info-impl.h @@ -10,6 +10,7 @@ #define QEMU_TARGET_INFO_IMPL_H #include "qemu/target_info.h" +#include "qapi/qapi-types-common.h" #include "qapi/qapi-types-machine.h" struct BinaryTargetInfo { @@ -23,6 +24,9 @@ struct BinaryTargetInfo { /* related to TARGET_ARCH definition */ SysEmuTarget system_arch; + /* related to TARGET_BIG_ENDIAN definition */ + EndianMode endianness; + }; #endif diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h index 6ca36dae8a3..e84f16d1034 100644 --- a/include/qemu/target_info.h +++ b/include/qemu/target_info.h @@ -21,4 +21,15 @@ const char *target_name(void); SysEmuTarget target_system_arch(void); +/** + * target_words_bigendian: + * Returns true if the (default) endianness of the target is big endian, + * false otherwise. Note that in target-specific code, you can use + * TARGET_BIG_ENDIAN directly instead. On the other hand, common + * code should normally never need to know about the endianness of the + * target, so please do *not* use this function unless you know very well + * what you are doing! + */ +bool target_words_bigendian(void); + #endif diff --git a/cpu-target.c b/cpu-target.c index 3f82d3ea444..761c2d28645 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -159,9 +159,3 @@ void cpu_abort(CPUState *cpu, const char *fmt, ...) #endif abort(); } - -#undef target_words_bigendian -bool target_words_bigendian(void) -{ - return TARGET_BIG_ENDIAN; -} diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c index 82b68b8927d..32700c49b43 100644 --- a/hw/core/cpu-system.c +++ b/hw/core/cpu-system.c @@ -24,7 +24,7 @@ #include "exec/cputlb.h" #include "system/memory.h" #include "exec/tb-flush.h" -#include "exec/tswap.h" +#include "qemu/target_info.h" #include "hw/qdev-core.h" #include "hw/qdev-properties.h" #include "hw/core/sysemu-cpu-ops.h" diff --git a/hw/display/vga.c b/hw/display/vga.c index b01f67c65fb..1883e03d3d8 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -26,7 +26,7 @@ #include "qemu/units.h" #include "system/reset.h" #include "qapi/error.h" -#include "exec/tswap.h" +#include "qemu/target_info.h" #include "hw/display/vga.h" #include "hw/i386/x86.h" #include "hw/pci/pci.h" diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 85110bce374..4ef56c183b2 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -20,7 +20,7 @@ #include "qemu/log.h" #include "qemu/main-loop.h" #include "qemu/module.h" -#include "exec/tswap.h" +#include "qemu/target_info.h" #include "qom/object_interfaces.h" #include "hw/core/cpu.h" #include "hw/virtio/virtio.h" diff --git a/system/qtest.c b/system/qtest.c index 523a0479959..6146a7bfdc0 100644 --- a/system/qtest.c +++ b/system/qtest.c @@ -29,6 +29,7 @@ #include "qemu/error-report.h" #include "qemu/module.h" #include "qemu/cutils.h" +#include "qemu/target_info.h" #include "qom/object_interfaces.h" #define MAX_IRQ 256 diff --git a/target_info-stub.c b/target_info-stub.c index 46a240ac66a..c1a15f5cc12 100644 --- a/target_info-stub.c +++ b/target_info-stub.c @@ -15,6 +15,7 @@ static const BinaryTargetInfo target_info_stub = { .is_stub = true, .name = TARGET_NAME, .system_arch = -1, + .endianness = TARGET_BIG_ENDIAN ? ENDIAN_MODE_BIG : ENDIAN_MODE_LITTLE, }; const BinaryTargetInfo *target_info(void) diff --git a/target_info.c b/target_info.c index be4f19009b3..22796dda543 100644 --- a/target_info.c +++ b/target_info.c @@ -31,3 +31,8 @@ SysEmuTarget target_system_arch(void) } return system_arch; } + +bool target_words_bigendian(void) +{ + return target_info()->endianness == ENDIAN_MODE_BIG; +} From patchwork Thu Apr 3 23:49:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877986 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527605wrs; Thu, 3 Apr 2025 16:51:47 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVvgvqqgLQQRWDeZMLBh4x2TmOmf9mGPjc5eZZVbPIpYqNKVIQubZFrIKMAJwZm0X5Xnbg8oQ==@linaro.org X-Google-Smtp-Source: AGHT+IGIFj+x1j0Z+lkc1Xx084g8g6jRH65DiinKg6Ps5aLfkma6DfqacjE/4dgsNNWbDvnJIUx8 X-Received: by 2002:a05:620a:4621:b0:7c5:a575:75da with SMTP id af79cd13be357-7c774d0f170mr202422585a.6.1743724307156; Thu, 03 Apr 2025 16:51:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743724307; cv=none; d=google.com; s=arc-20240605; b=HEu8XShnbAO4WyjAbDDFdjLXjahY2GcNnaliOQZlw6ZYDnVSKR7obwvvPMZjk7VICh 1mHrOG9qsSM9IyoU95eAmwrOkLSy4mPslOWF/r2T+gry/5DKTjxBy0facsRiP9OZgaaJ r3h/Ei8fYhH0Yz4Wg9QbMFuM6tn7h68BL0kuV9DLe7U4sWZR3ogetv5fLGZHKlCPoUYJ c6bDswY5c/J4T2tlF3fL7Wh1Uyw/xgX7nUBBr2TrDBoeInAHyfQqD9BF7bEI/1p9bU+V RXgex+/DNKqMFD9MdwI2ZwjZTGqmWHskOs5E4SuFhQxcjOilq57bQmyNPSwImlFHJdHK AA6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=+PyUW7pUGtdQFg0mGJcdbddKSlIReGI4v2OUa97+DAA=; fh=ISslU+6AOAPvfm3mmMuq/p0l7xeUGlnJLjUVX+iCVao=; b=GUasjb9sURZLYhOKLBRtOgCRBsrn69lLL/FNCJ0aZ1f5AbIMZLKINYsJldKCAEeaQS xV33kgAWPObNbeaIaGxKhXWAhLU4xAncawwfIwOrC0g5WIKuHEJbQ+JUroGzcvxkkuiW kYxMG+N6B9YB0fcJHIr65s1FQs81IMTOdIZNBDUBecICwjUp/o2GcX5mo1wL2l0EY7u0 P7y8m0ZKEJsAyfqJm2sZVXcnUakLZbqMTR+6i8h09r18ym+VXWZB7S52ikZZbOT36obu UwojvYR3Nii8egEAJK7/GsSGOCFcud1IWytgy5XoDkJtIQdJr0/ODfdlXVlTMNYrAryQ uKZg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Z1bFKRhr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec1663046sm34887965e9.13.2025.04.03.16.49.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:49:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 05/19] qemu: Introduce target_long_bits() Date: Fri, 4 Apr 2025 01:49:00 +0200 Message-ID: <20250403234914.9154-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/qemu/target_info-impl.h | 3 +++ include/qemu/target_info.h | 2 ++ target_info-stub.c | 1 + target_info.c | 5 +++++ 4 files changed, 11 insertions(+) diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h index 14566e4a913..8fa585f8138 100644 --- a/include/qemu/target_info-impl.h +++ b/include/qemu/target_info-impl.h @@ -27,6 +27,9 @@ struct BinaryTargetInfo { /* related to TARGET_BIG_ENDIAN definition */ EndianMode endianness; + /* runtime equivalent of TARGET_LONG_BITS definition */ + unsigned long_bits; + }; #endif diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h index e84f16d1034..66c43b329cc 100644 --- a/include/qemu/target_info.h +++ b/include/qemu/target_info.h @@ -32,4 +32,6 @@ SysEmuTarget target_system_arch(void); */ bool target_words_bigendian(void); +unsigned target_long_bits(void); + #endif diff --git a/target_info-stub.c b/target_info-stub.c index c1a15f5cc12..a5374caed6c 100644 --- a/target_info-stub.c +++ b/target_info-stub.c @@ -16,6 +16,7 @@ static const BinaryTargetInfo target_info_stub = { .name = TARGET_NAME, .system_arch = -1, .endianness = TARGET_BIG_ENDIAN ? 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec147c9dbsm35295975e9.0.2025.04.03.16.49.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:49:55 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 06/19] target/tricore: Replace TARGET_LONG_BITS -> target_long_bits() Date: Fri, 4 Apr 2025 01:49:01 +0200 Message-ID: <20250403234914.9154-7-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/tricore/translate.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 7cd26d8eaba..ad959f3b0a1 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -24,6 +24,7 @@ #include "tcg/tcg-op.h" #include "accel/tcg/cpu-ldst.h" #include "qemu/qemu-print.h" +#include "qemu/target_info.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" @@ -5922,6 +5923,7 @@ static void decode_rr_logical_shift(DisasContext *ctx) { uint32_t op2; int r3, r2, r1; + unsigned long_bits = target_long_bits(); r3 = MASK_OP_RR_D(ctx->opcode); r2 = MASK_OP_RR_S2(ctx->opcode); @@ -5937,7 +5939,7 @@ static void decode_rr_logical_shift(DisasContext *ctx) break; case OPC2_32_RR_CLO: tcg_gen_not_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]); - tcg_gen_clzi_tl(cpu_gpr_d[r3], cpu_gpr_d[r3], TARGET_LONG_BITS); + tcg_gen_clzi_tl(cpu_gpr_d[r3], cpu_gpr_d[r3], long_bits); break; case OPC2_32_RR_CLO_H: gen_helper_clo_h(cpu_gpr_d[r3], cpu_gpr_d[r1]); @@ -5949,7 +5951,7 @@ static void decode_rr_logical_shift(DisasContext *ctx) gen_helper_cls_h(cpu_gpr_d[r3], cpu_gpr_d[r1]); break; case OPC2_32_RR_CLZ: - tcg_gen_clzi_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], TARGET_LONG_BITS); + tcg_gen_clzi_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], long_bits); break; case OPC2_32_RR_CLZ_H: gen_helper_clz_h(cpu_gpr_d[r3], cpu_gpr_d[r1]); From patchwork Thu Apr 3 23:49:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877980 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527426wrs; 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec3174cf0sm32222245e9.0.2025.04.03.16.50.00 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:50:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 07/19] target/hppa: Replace TARGET_LONG_BITS -> target_long_bits() Date: Fri, 4 Apr 2025 01:49:02 +0200 Message-ID: <20250403234914.9154-8-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/mem_helper.c | 3 ++- target/hppa/translate.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index 554d7bf4d14..03cd103f284 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" +#include "qemu/target_info.h" #include "cpu.h" #include "exec/exec-all.h" #include "exec/cputlb.h" @@ -101,7 +102,7 @@ static void hppa_flush_tlb_ent(CPUHPPAState *env, HPPATLBEntry *ent, tlb_flush_range_by_mmuidx(cs, ent->itree.start, ent->itree.last - ent->itree.start + 1, - HPPA_MMU_FLUSH_MASK, TARGET_LONG_BITS); + HPPA_MMU_FLUSH_MASK, target_long_bits()); /* Never clear BTLBs, unless forced to do so. */ is_btlb = ent < &env->tlb[HPPA_BTLB_ENTRIES(env)]; diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 14f38333222..81f535589cf 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" +#include "qemu/target_info.h" #include "cpu.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" @@ -3731,7 +3732,7 @@ static bool trans_shrp_imm(DisasContext *ctx, arg_shrp_imm *a) t2 = load_gpr(ctx, a->r2); if (a->r1 == 0) { tcg_gen_extract_i64(dest, t2, sa, width - sa); - } else if (width == TARGET_LONG_BITS) { + } else if (width == target_long_bits()) { tcg_gen_extract2_i64(dest, t2, cpu_gr[a->r1], sa); } else { assert(!a->d); From patchwork Thu Apr 3 23:49:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877984 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527540wrs; 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c301b816csm2968052f8f.57.2025.04.03.16.50.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:50:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 08/19] target/riscv: Replace TARGET_LONG_BITS -> target_long_bits() Date: Fri, 4 Apr 2025 01:49:03 +0200 Message-ID: <20250403234914.9154-9-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- hw/riscv/riscv-iommu.c | 3 ++- hw/riscv/riscv_hart.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c index 65411b3e4c0..37563b2102f 100644 --- a/hw/riscv/riscv-iommu.c +++ b/hw/riscv/riscv-iommu.c @@ -26,6 +26,7 @@ #include "migration/vmstate.h" #include "qapi/error.h" #include "qemu/timer.h" +#include "qemu/target_info.h" #include "cpu_bits.h" #include "riscv-iommu.h" @@ -393,7 +394,7 @@ static int riscv_iommu_spa_fetch(RISCVIOMMUState *s, RISCVIOMMUContext *ctx, if (pass == S_STAGE && va_len > 32) { target_ulong mask, masked_msbs; - mask = (1L << (TARGET_LONG_BITS - (va_len - 1))) - 1; + mask = (1L << (target_long_bits() - (va_len - 1))) - 1; masked_msbs = (addr >> (va_len - 1)) & mask; if (masked_msbs != 0 && masked_msbs != mask) { diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index a55d1566687..667d3b0a507 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qemu/target_info.h" #include "system/reset.h" #include "system/qtest.h" #include "qemu/cutils.h" @@ -72,7 +73,7 @@ static void csr_call(char *cmd, uint64_t cpu_num, int csrno, uint64_t *val) ret = riscv_csrr(env, csrno, (target_ulong *)val); } else if (strcmp(cmd, "set_csr") == 0) { ret = riscv_csrrw(env, csrno, NULL, *(target_ulong *)val, - MAKE_64BIT_MASK(0, TARGET_LONG_BITS)); + MAKE_64BIT_MASK(0, target_long_bits())); } g_assert(ret == RISCV_EXCP_NONE); From patchwork Thu Apr 3 23:49:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877979 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527369wrs; 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c30226f2bsm2980657f8f.96.2025.04.03.16.50.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:50:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 09/19] qemu: Introduce target_cpu_type() Date: Fri, 4 Apr 2025 01:49:04 +0200 Message-ID: <20250403234914.9154-10-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/qemu/target_info-impl.h | 3 +++ include/qemu/target_info.h | 2 ++ target_info-stub.c | 2 ++ target_info.c | 5 +++++ 4 files changed, 12 insertions(+) diff --git a/include/qemu/target_info-impl.h b/include/qemu/target_info-impl.h index 8fa585f8138..d6d671a03c0 100644 --- a/include/qemu/target_info-impl.h +++ b/include/qemu/target_info-impl.h @@ -30,6 +30,9 @@ struct BinaryTargetInfo { /* runtime equivalent of TARGET_LONG_BITS definition */ unsigned long_bits; + /* runtime equivalent of CPU_RESOLVING_TYPE definition */ + const char *const cpu_resolving_type; + }; #endif diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h index 66c43b329cc..407ce328e85 100644 --- a/include/qemu/target_info.h +++ b/include/qemu/target_info.h @@ -34,4 +34,6 @@ bool target_words_bigendian(void); unsigned target_long_bits(void); +const char *target_cpu_type(void); + #endif diff --git a/target_info-stub.c b/target_info-stub.c index a5374caed6c..7d21675d4c0 100644 --- a/target_info-stub.c +++ b/target_info-stub.c @@ -8,6 +8,7 @@ #include "qemu/osdep.h" #include "qemu/target_info-impl.h" +#include "cpu.h" #ifdef TARGET_INFO_STUB_NEEDED @@ -17,6 +18,7 @@ static const BinaryTargetInfo target_info_stub = { .system_arch = -1, .endianness = TARGET_BIG_ENDIAN ? ENDIAN_MODE_BIG : ENDIAN_MODE_LITTLE, .long_bits = TARGET_LONG_BITS, + .cpu_resolving_type = CPU_RESOLVING_TYPE, }; const BinaryTargetInfo *target_info(void) diff --git a/target_info.c b/target_info.c index 2fd32931e13..4ad205636c2 100644 --- a/target_info.c +++ b/target_info.c @@ -41,3 +41,8 @@ unsigned target_long_bits(void) { return target_info()->long_bits; } + +const char *target_cpu_type(void) +{ + return target_info()->cpu_resolving_type; +} From patchwork Thu Apr 3 23:49:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877990 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527713wrs; Thu, 3 Apr 2025 16:52:11 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVxtg9fwyy3v0VDipz17vJBBX7zzCVI1ZXfHU2/B8fa+ZwNWEeVDUVSOmQvHuPKKmAGpwE8hQ==@linaro.org X-Google-Smtp-Source: AGHT+IGq1jYouZx9GDRzQYr4FCMdKcUTHPPbdN+ljJVX/fu7Ewl46s9jKgHbIvGJ0HWC+0aAK02d X-Received: by 2002:a05:620a:2550:b0:7c5:61bc:70ee with SMTP id af79cd13be357-7c775aebce5mr91708985a.52.1743724331102; Thu, 03 Apr 2025 16:52:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743724331; cv=none; d=google.com; s=arc-20240605; b=EK+Q17uyTclu6xgRrwwHOATEXwpGpQ5/T5iYT0zhcI/ZxkzRI9sPOAtJZ5KKCZV3Hd NkNEhnk6luFA6aNYVoaeQbqDg/u0fVjQ7qNrhag3Ad+4UAKtCluFDzAIjlNfOiix0l7f QZLQK7J1RoLfDRPHF3nHx/uTPzrki3Zqvgn7c7iVbhfyGlg5jLcgCmG0fb/3LFvqACsc agZzV8cuNwFVI4t5/uSiFbbStjmhtFXiF6BukdMHiWTON2krM0GsXhY7Oy1x/kocF4FG VTeBjMG4v94hpmmeKrwWTgw2mWBKXPESv7KLrORSgJzhvthASQDJyi0wf7T7A2/1qLtg DuDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=rr+hpT8SboGgKuB5nhv/jFygpXGU6aBbobklx4SUFWw=; fh=ISslU+6AOAPvfm3mmMuq/p0l7xeUGlnJLjUVX+iCVao=; b=S0Xqm98c49XrYOrjkpXGT6SAshbN112INL/mq9fRI1/szYBGgqvHwlMjhE4SmWFG4Q 606uOYmAxVsopLlaQiGnNACCJN6JVeGlddc1dfNlHq30CHNckQ00AET4I11g2bzoQH2M IcW677n8CuaSLdtuFEAadY85nUN9QiWiwAM/Kd52BAOKYZPinXr9EoRHy8J8lhn7zyqU ZYO0cYaRDJ+Cr91nW17gdCIsZSiSsheQwBXPh1/gvgD0LbU4irD2bttExbahtK8ylNIm bfsuc+9akeg0ru5PaSYNHolmYADI6c7YlY+XMuWnlERTrWEyY6HoA0sj2VW/sfWFUKsO S6Og==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GBPdCz47; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c301b6778sm2882577f8f.46.2025.04.03.16.50.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:50:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 10/19] cpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type() Date: Fri, 4 Apr 2025 01:49:05 +0200 Message-ID: <20250403234914.9154-11-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- cpu-target.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/cpu-target.c b/cpu-target.c index 761c2d28645..01b0064b91f 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -22,6 +22,7 @@ #include "qapi/error.h" #include "qemu/error-report.h" #include "qemu/qemu-print.h" +#include "qemu/target_info.h" #include "system/accel-ops.h" #include "system/cpus.h" #include "exec/cpu-common.h" @@ -37,7 +38,7 @@ QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState)); char *cpu_model_from_type(const char *typename) { - const char *suffix = "-" CPU_RESOLVING_TYPE; + g_autofree char *suffix = g_strdup_printf("-%s", target_cpu_type()); if (!object_class_by_name(typename)) { return NULL; @@ -63,7 +64,7 @@ const char *parse_cpu_option(const char *cpu_option) exit(1); } - oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]); + oc = cpu_class_by_name(target_cpu_type(), model_pieces[0]); if (oc == NULL) { error_report("unable to find CPU model '%s'", model_pieces[0]); g_strfreev(model_pieces); @@ -92,7 +93,7 @@ static void cpu_list_entry(gpointer data, gpointer user_data) void list_cpus(void) { - CPUClass *cc = CPU_CLASS(object_class_by_name(CPU_RESOLVING_TYPE)); + CPUClass *cc = CPU_CLASS(object_class_by_name(target_cpu_type())); if (cc->list_cpus) { cc->list_cpus(); From patchwork Thu Apr 3 23:49:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877994 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527741wrs; 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c2fe9875dsm2952781f8f.0.2025.04.03.16.50.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:50:25 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 11/19] accel/tcg: Replace CPU_RESOLVING_TYPE -> target_cpu_type() Date: Fri, 4 Apr 2025 01:49:06 +0200 Message-ID: <20250403234914.9154-12-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- accel/tcg/tcg-all.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index bf27c5c0fb3..a13cb39644f 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -35,6 +35,7 @@ #include "qapi/qapi-types-common.h" #include "qapi/qapi-builtin-visit.h" #include "qemu/units.h" +#include "qemu/target_info.h" #if defined(CONFIG_USER_ONLY) #include "hw/qdev-core.h" #else @@ -44,7 +45,6 @@ #include "accel/tcg/cpu-ops.h" #include "internal-common.h" #include "cpu-param.h" -#include "cpu.h" struct TCGState { @@ -73,7 +73,7 @@ bool qemu_tcg_mttcg_enabled(void) static void mttcg_init(TCGState *s) { - CPUClass *cc = CPU_CLASS(object_class_by_name(CPU_RESOLVING_TYPE)); + CPUClass *cc = CPU_CLASS(object_class_by_name(target_cpu_type())); bool mttcg_supported = cc->tcg_ops->mttcg_supported; if (s->mttcg_enabled == ON_OFF_AUTO_AUTO) { From patchwork Thu Apr 3 23:49:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877982 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527468wrs; Thu, 3 Apr 2025 16:51:14 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUY2Ft0wMhPqvTAcWrFE2EQzJOeRDI2AZIi33oiYiNpfI37xMRk25dq288zHp+ZNGbbX2jFLg==@linaro.org X-Google-Smtp-Source: AGHT+IEE0d4yEYHHLa1eiciYDsiXcarojghnVmXPyJcLchePp/MGEM+sRWm3BHSUG5lUxqfHfi57 X-Received: by 2002:a05:620a:4151:b0:7c5:46e4:47f5 with SMTP id af79cd13be357-7c774d520a1mr151387285a.20.1743724274472; Thu, 03 Apr 2025 16:51:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743724274; cv=none; d=google.com; s=arc-20240605; b=d+3p4KKfRmGK58ICs2/+2OgXkP/wWWOiujI6sNN4jWpD6ZUhBKGUkeovoLkIDmtIVA crvd1+iAF0PjFuFui0iuGbdDzKJYVme702hMHDITz0a4+GGgv6hriG/QVIUXmjkD80gm 84MFHRPvQFr7lyR0szV93M5ib3O/uQy16PzcsUflxq5xcPz/YzWTfbHkZJXmlAYNYThj lTDPHXO7R8Si/o/A5K8227RYX9aBin3ye4KJzQJqkH3bYhtC7R69heVw7G1K6NYXZegK PUP0AmV8jJn/2vOTolgIP1l6md1bqP+FnPDrg6LKg/8qhihKConYaJmFA33hlk+z7U+I np7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=PjLhp4LZOvkpDq4jQIYUOR+57wmLdvndO6f3N6bUc2k=; fh=ISslU+6AOAPvfm3mmMuq/p0l7xeUGlnJLjUVX+iCVao=; b=HSd+41chfr501aYwQiGgUq6MPNGYWlRfG4Pz4QW248tzv0tfDbNgJswf/+VVSUdfiC OF/BWDqz3WQ+I8s0orw4QbIQ8zGlK7e2dHc3C7Bn5dUeYLSEnT3FojpjXIiBnoKh9ViC xA0FyE8c6vNu8SUgZV5MMszjH17blI3HwstYNqkFP0HGZFL+gOBd/3EW05hlj+bw8KKY ndzQ0nq4voRpUx+80h/cPlT//7ZH9ivVXx5s2VEIiEpLwYGfHtVODEwugdD/FetPhTmN 43RZthAPQKZ7GHNDj49gi0SDnhVW2QFzzduZqUEfvC/AOBaPbwrD/wOi5Z8As8ufXntn qp2w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=T3N3FYBC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c301a7225sm2963060f8f.26.2025.04.03.16.50.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:50:31 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 12/19] cpus: Move target-agnostic methods out of cpu-target.c Date: Fri, 4 Apr 2025 01:49:07 +0200 Message-ID: <20250403234914.9154-13-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- cpu-target.c | 78 +------------------------------------------- hw/core/cpu-common.c | 74 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 75 insertions(+), 77 deletions(-) diff --git a/cpu-target.c b/cpu-target.c index 01b0064b91f..20db5ff3108 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -19,94 +19,18 @@ #include "qemu/osdep.h" #include "cpu.h" -#include "qapi/error.h" -#include "qemu/error-report.h" -#include "qemu/qemu-print.h" -#include "qemu/target_info.h" #include "system/accel-ops.h" #include "system/cpus.h" #include "exec/cpu-common.h" -#include "exec/tswap.h" #include "exec/replay-core.h" #include "exec/log.h" -#include "accel/accel-cpu-target.h" +#include "hw/core/cpu.h" #include "trace/trace-root.h" /* Validate correct placement of CPUArchState. */ QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0); QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState)); -char *cpu_model_from_type(const char *typename) -{ - g_autofree char *suffix = g_strdup_printf("-%s", target_cpu_type()); - - if (!object_class_by_name(typename)) { - return NULL; - } - - if (g_str_has_suffix(typename, suffix)) { - return g_strndup(typename, strlen(typename) - strlen(suffix)); - } - - return g_strdup(typename); -} - -const char *parse_cpu_option(const char *cpu_option) -{ - ObjectClass *oc; - CPUClass *cc; - gchar **model_pieces; - const char *cpu_type; - - model_pieces = g_strsplit(cpu_option, ",", 2); - if (!model_pieces[0]) { - error_report("-cpu option cannot be empty"); - exit(1); - } - - oc = cpu_class_by_name(target_cpu_type(), model_pieces[0]); - if (oc == NULL) { - error_report("unable to find CPU model '%s'", model_pieces[0]); - g_strfreev(model_pieces); - exit(EXIT_FAILURE); - } - - cpu_type = object_class_get_name(oc); - cc = CPU_CLASS(oc); - cc->parse_features(cpu_type, model_pieces[1], &error_fatal); - g_strfreev(model_pieces); - return cpu_type; -} - -static void cpu_list_entry(gpointer data, gpointer user_data) -{ - CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data)); - const char *typename = object_class_get_name(OBJECT_CLASS(data)); - g_autofree char *model = cpu_model_from_type(typename); - - if (cc->deprecation_note) { - qemu_printf(" %s (deprecated)\n", model); - } else { - qemu_printf(" %s\n", model); - } -} - -void list_cpus(void) -{ - CPUClass *cc = CPU_CLASS(object_class_by_name(target_cpu_type())); - - if (cc->list_cpus) { - cc->list_cpus(); - } else { - GSList *list; - - list = object_class_get_list_sorted(TYPE_CPU, false); - qemu_printf("Available CPUs:\n"); - g_slist_foreach(list, cpu_list_entry, NULL); - g_slist_free(list); - } -} - /* enable or disable single step mode. EXCP_DEBUG is returned by the CPU loop after each instruction */ void cpu_single_step(CPUState *cpu, int enabled) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 9064dd24f82..6d0788331c7 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -25,6 +25,9 @@ #include "qemu/log.h" #include "qemu/main-loop.h" #include "qemu/lockcnt.h" +#include "qemu/error-report.h" +#include "qemu/qemu-print.h" +#include "qemu/target_info.h" #include "exec/log.h" #include "exec/gdbstub.h" #include "system/tcg.h" @@ -152,6 +155,21 @@ ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) return NULL; } +char *cpu_model_from_type(const char *typename) +{ + g_autofree char *suffix = g_strdup_printf("-%s", target_cpu_type()); + + if (!object_class_by_name(typename)) { + return NULL; + } + + if (g_str_has_suffix(typename, suffix)) { + return g_strndup(typename, strlen(typename) - strlen(suffix)); + } + + return g_strdup(typename); +} + static void cpu_common_parse_features(const char *typename, char *features, Error **errp) { @@ -183,6 +201,33 @@ static void cpu_common_parse_features(const char *typename, char *features, } } +const char *parse_cpu_option(const char *cpu_option) +{ + ObjectClass *oc; + CPUClass *cc; + gchar **model_pieces; + const char *cpu_type; + + model_pieces = g_strsplit(cpu_option, ",", 2); + if (!model_pieces[0]) { + error_report("-cpu option cannot be empty"); + exit(1); + } + + oc = cpu_class_by_name(target_cpu_type(), model_pieces[0]); + if (oc == NULL) { + error_report("unable to find CPU model '%s'", model_pieces[0]); + g_strfreev(model_pieces); + exit(EXIT_FAILURE); + } + + cpu_type = object_class_get_name(oc); + cc = CPU_CLASS(oc); + cc->parse_features(cpu_type, model_pieces[1], &error_fatal); + g_strfreev(model_pieces); + return cpu_type; +} + bool cpu_exec_realizefn(CPUState *cpu, Error **errp) { if (!accel_cpu_common_realize(cpu, errp)) { @@ -359,3 +404,32 @@ static void cpu_register_types(void) } type_init(cpu_register_types) + +static void cpu_list_entry(gpointer data, gpointer user_data) +{ + CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data)); + const char *typename = object_class_get_name(OBJECT_CLASS(data)); + g_autofree char *model = cpu_model_from_type(typename); + + if (cc->deprecation_note) { + qemu_printf(" %s (deprecated)\n", model); + } else { + qemu_printf(" %s\n", model); + } +} + +void list_cpus(void) +{ + CPUClass *cc = CPU_CLASS(object_class_by_name(target_cpu_type())); + + if (cc->list_cpus) { + cc->list_cpus(); + } else { + GSList *list; + + list = object_class_get_list_sorted(TYPE_CPU, false); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, cpu_list_entry, NULL); + g_slist_free(list); + } +} From patchwork Thu Apr 3 23:49:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877988 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527626wrs; Thu, 3 Apr 2025 16:51:54 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWs6VGUbw5tCzZM9u2MP4UmCM+k07E4NgpJvHUqZRAxsuvjg7rGnPJCttTy9iJSk5lRhncBXw==@linaro.org X-Google-Smtp-Source: AGHT+IG7HZTzKPKDT8KWWoVjkSNIYrEzQL3codqcCoA/FkH3RNzvtU+YlY7WM8LKbcC9bbg1veL+ X-Received: by 2002:a05:622a:1920:b0:477:6f28:8c16 with SMTP id d75a77b69052e-4792490da45mr22919131cf.6.1743724314372; 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c300968cfsm3012407f8f.16.2025.04.03.16.50.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:50:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 13/19] accel: Replace CPU_RESOLVING_TYPE -> target_cpu_type() Date: Fri, 4 Apr 2025 01:49:08 +0200 Message-ID: <20250403234914.9154-14-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- accel/accel-target.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/accel/accel-target.c b/accel/accel-target.c index 33a539b4cbb..9e9e70be876 100644 --- a/accel/accel-target.c +++ b/accel/accel-target.c @@ -25,6 +25,7 @@ #include "qemu/osdep.h" #include "qemu/accel.h" +#include "qemu/target_info.h" #include "cpu.h" #include "accel/accel-cpu-target.h" @@ -88,17 +89,18 @@ static void accel_init_cpu_interfaces(AccelClass *ac) const char *ac_name; /* AccelClass name */ char *acc_name; /* AccelCPUClass name */ ObjectClass *acc; /* AccelCPUClass */ + const char *cpu_resolving_type = target_cpu_type(); ac_name = object_class_get_name(OBJECT_CLASS(ac)); g_assert(ac_name != NULL); - acc_name = g_strdup_printf("%s-%s", ac_name, CPU_RESOLVING_TYPE); + acc_name = g_strdup_printf("%s-%s", ac_name, cpu_resolving_type); acc = object_class_by_name(acc_name); g_free(acc_name); if (acc) { object_class_foreach(accel_init_cpu_int_aux, - CPU_RESOLVING_TYPE, false, acc); + cpu_resolving_type, false, acc); } } From patchwork Thu Apr 3 23:49:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877989 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527652wrs; Thu, 3 Apr 2025 16:51:59 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV1DFT6wD85f3USPUhn5KZ7HQDPIcc9PUOeUrn4wTsq4PhG7lG0SsPVIinsINtQsXUJvQwTdw==@linaro.org X-Google-Smtp-Source: AGHT+IGt70geGdWUIj1BvrwnyQZJkl+UFcKjssbqh0ezd2NVdefsrhcob9lAuFjwRlhQf7uAw8EQ X-Received: by 2002:a05:6214:2028:b0:6e6:6c10:76fb with SMTP id 6a1803df08f44-6f0584d2cedmr19378646d6.25.1743724319745; Thu, 03 Apr 2025 16:51:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743724319; cv=none; d=google.com; s=arc-20240605; b=cPDOI9jM/6aoMjrEKKrk+9y6PHejKDg0tt08n4pm+ZO8XPZIRueydSLM+ScQiD3l71 fl9dRNoIOecEbgt3XYHWihfQU+pywFvgdgSier7diNmYSe5Vlb6LZwdaEpJZmjcbdAKc IMV9fV7ys/jCImTFKvxRt+wAkDAGaK09AWeJsX99/8iHYo0F6HpPA1qHDvKV9WZHciER PuyRcS9Jug91UlgjZjslZWSJCXQDQCGpN5GlgavC6Ds+7LiAhCgHh/gtYksGqMQaGCPv AJoJ+wJRA7GEQMwDb3iHkE389DVgmOyXOE6/ABxPPZPb8g8FCCXJZNwcertvndwVPLCb AOFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=+2uao2k1sdjL3VI7mV563IZyOj/L1mksZ9hBUjnLJkk=; fh=ISslU+6AOAPvfm3mmMuq/p0l7xeUGlnJLjUVX+iCVao=; b=TfapCK9GD4kVGODPaalySk1s7tofHs8cfRstjyZQpHQqMX5YZYUUAjd2AqthsVAvQE RNw/fuX0jxEoYh1jr+kw8OEtTFBrEdr69OhnIA26CPkMKJbQV3xoKSz2CmqR00McrlL0 RtAI47vMIul6lZqnYZRCFs8HOuT/W95rGa7+EZGQYzEAGfVIFms1DL6uCGHZW7shs9Uy ZzpO+NEc+yj+5jbDu5o0HXCGBzEv0o8To5CgnrSBOpPyvvrdBkngWBsEW9tuy02iKB4n rYmGT9xjWEgbk66RjthbXhHVRY94rik5/US+hMXceF6RspECyWTYby2yLpmenfSdbVh+ A/qA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Je9PHBBd; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec3429f67sm31959885e9.7.2025.04.03.16.50.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:50:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 14/19] accel: Implement accel_init_ops_interfaces() for both system/user mode Date: Fri, 4 Apr 2025 01:49:09 +0200 Message-ID: <20250403234914.9154-15-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- accel/{accel-system.h => accel-internal.h} | 8 ++++---- accel/accel-system.c | 4 ++-- accel/accel-target.c | 10 ++-------- accel/accel-user.c | 6 ++++++ 4 files changed, 14 insertions(+), 14 deletions(-) rename accel/{accel-system.h => accel-internal.h} (56%) diff --git a/accel/accel-system.h b/accel/accel-internal.h similarity index 56% rename from accel/accel-system.h rename to accel/accel-internal.h index 2d37c73c97b..03426aa21ee 100644 --- a/accel/accel-system.h +++ b/accel/accel-internal.h @@ -1,5 +1,5 @@ /* - * QEMU System Emulation accel internal functions + * QEMU accel internal functions * * Copyright 2021 SUSE LLC * @@ -7,9 +7,9 @@ * See the COPYING file in the top-level directory. */ -#ifndef ACCEL_SYSTEM_H -#define ACCEL_SYSTEM_H +#ifndef ACCEL_INTERNAL_H +#define ACCEL_INTERNAL_H -void accel_system_init_ops_interfaces(AccelClass *ac); +void accel_init_ops_interfaces(AccelClass *ac); #endif /* ACCEL_SYSTEM_H */ diff --git a/accel/accel-system.c b/accel/accel-system.c index 5df49fbe831..a0f562ae9ff 100644 --- a/accel/accel-system.c +++ b/accel/accel-system.c @@ -29,7 +29,7 @@ #include "system/accel-ops.h" #include "system/cpus.h" #include "qemu/error-report.h" -#include "accel-system.h" +#include "accel-internal.h" int accel_init_machine(AccelState *accel, MachineState *ms) { @@ -63,7 +63,7 @@ void accel_setup_post(MachineState *ms) } /* initialize the arch-independent accel operation interfaces */ -void accel_system_init_ops_interfaces(AccelClass *ac) +void accel_init_ops_interfaces(AccelClass *ac) { const char *ac_name; char *ops_name; diff --git a/accel/accel-target.c b/accel/accel-target.c index 9e9e70be876..6fa5c3ef04e 100644 --- a/accel/accel-target.c +++ b/accel/accel-target.c @@ -29,10 +29,7 @@ #include "cpu.h" #include "accel/accel-cpu-target.h" - -#ifndef CONFIG_USER_ONLY -#include "accel-system.h" -#endif /* !CONFIG_USER_ONLY */ +#include "accel-internal.h" static const TypeInfo accel_type = { .name = TYPE_ACCEL, @@ -106,10 +103,7 @@ static void accel_init_cpu_interfaces(AccelClass *ac) void accel_init_interfaces(AccelClass *ac) { -#ifndef CONFIG_USER_ONLY - accel_system_init_ops_interfaces(ac); -#endif /* !CONFIG_USER_ONLY */ - + accel_init_ops_interfaces(ac); accel_init_cpu_interfaces(ac); } diff --git a/accel/accel-user.c b/accel/accel-user.c index 22b6a1a1a89..7d192306a65 100644 --- a/accel/accel-user.c +++ b/accel/accel-user.c @@ -9,6 +9,12 @@ #include "qemu/osdep.h" #include "qemu/accel.h" +#include "accel-internal.h" + +void accel_init_ops_interfaces(AccelClass *ac) +{ + /* nothing */ +} AccelState *current_accel(void) { From patchwork Thu Apr 3 23:49:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 878001 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527763wrs; Thu, 3 Apr 2025 16:52:24 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX75lxF8U8VhJdaP9nOZbob6VANtqKQ+ZO6I27yUR2wYpqHc7vN0gVeFQiLmGj/EzN5NNtksQ==@linaro.org X-Google-Smtp-Source: AGHT+IHLgPmgzjEium+jTFCtMPM9Rghjekpw67elPMZkd0qSJG7xf7GqN/rNBebiFMQxfzSqvxMQ X-Received: by 2002:a05:6214:c41:b0:6d8:f0ba:ea92 with SMTP id 6a1803df08f44-6f00deed72fmr19809776d6.21.1743724344050; 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c3020d980sm2999728f8f.61.2025.04.03.16.50.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:50:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 15/19] accel: Include missing 'qemu/accel.h' header in accel-internal.h Date: Fri, 4 Apr 2025 01:49:10 +0200 Message-ID: <20250403234914.9154-16-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In file included from ../../accel/accel-target.c:29: ../../accel/accel-internal.h:13:32: error: unknown type name 'AccelClass' 13 | void accel_init_ops_interfaces(AccelClass *ac); | ^ Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- accel/accel-internal.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/accel/accel-internal.h b/accel/accel-internal.h index 03426aa21ee..d3a4422cbf7 100644 --- a/accel/accel-internal.h +++ b/accel/accel-internal.h @@ -10,6 +10,8 @@ #ifndef ACCEL_INTERNAL_H #define ACCEL_INTERNAL_H +#include "qemu/accel.h" + void accel_init_ops_interfaces(AccelClass *ac); #endif /* ACCEL_SYSTEM_H */ From patchwork Thu Apr 3 23:49:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 878005 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527793wrs; Thu, 3 Apr 2025 16:52:32 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX1GqSUqZTiR/RRZgsuQyH+VHMopaj7LSG94XZREC+LC3xF0NaWu8Jy5zw0sPmw0PWZ3J7Lbg==@linaro.org X-Google-Smtp-Source: AGHT+IHxl8qftcDOtwww4gEMEgGYH8qXEnvyBS764RaVz+4ht7+l7xn8GCpu1O6DNguNihxSnFs3 X-Received: by 2002:a05:620a:2488:b0:7c5:71b4:3cc5 with SMTP id af79cd13be357-7c7759e9317mr118488885a.7.1743724352829; Thu, 03 Apr 2025 16:52:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743724352; cv=none; d=google.com; s=arc-20240605; b=WEyiqjDhwSR9gNYiZLpRlESqs7DtN4fAsYillKQONr2K3AM3dBJotTB3X5hAhQ6CyM 1TNJfo9obVM8Fjiw0skuTj3gRmTz2Dm2EgiDhdELm0USwlHq8EKJI7UT5q5UuXfGZbFx ohDhr5/Yxl1q6Vdvnn5FpfcXja2RZ8Wc5jyLddqVK55eT/cJ835H2Y9R+UR7qB+Oj0HZ UJpZi+1odQCx3Pnkk4lNSS4LXbbB2eJRFjyuHhhiU8kL/qMmVoWU8PbjPgHfwPfSqmDC KEfRCfETuN/MJrQ9tWoJ0nCBbmGpXE1saYImz+Psjvr5m6QUy2CGqd6BWYgJ0S7HWR0G eqtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=tt83rZuXJ2P2CGUhlOB2w3nk8Oq8J5HbWrTGgOM9cNo=; fh=ISslU+6AOAPvfm3mmMuq/p0l7xeUGlnJLjUVX+iCVao=; b=RF9f0DKhsyeK3y3h/LCSUNhKB2R055dQfmtbzIq/7n6FydDGUEJmN3oq+uQ/x/3XBR 9YIvfTwTnM+ehPNRW8i7sByFHzy1uGr7QDogNpd9LVRIGu6frlCM3A6ur8JFHuRMly0j VxL1BAgR1vJAQgHY1DH7lR1KvVi+RT1HdSlg1g+zzM1JlmkjqXUyzj5n4YXwVCKHZXR5 nDculf9DD311HmmZ7RKTm7d4ohPYXyRXUO0Phg6WcGg9iG52PBZIphD3NLkXse+X7c8N F/7l4/oGY6LrPaIr+pcd8/Sl8VIsaJp+D+sbhWbHInhvcmh23qcoXlqTrqz+EiyxrCbq GZIg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="zwr9tp/P"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c30096889sm2927727f8f.2.2025.04.03.16.50.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:50:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 16/19] accel: Make AccelCPUClass structure target-agnostic Date: Fri, 4 Apr 2025 01:49:11 +0200 Message-ID: <20250403234914.9154-17-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Include missing "hw/core/cpu.h" header in "accel/accel-cpu.h" to avoid: include/accel/accel-cpu-target.h:39:28: error: unknown type name 'CPUClass' 39 | void (*cpu_class_init)(CPUClass *cc); | ^ Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- include/accel/accel-cpu-target.h | 12 +----------- include/accel/accel-cpu.h | 23 +++++++++++++++++++++++ accel/accel-target.c | 1 - 3 files changed, 24 insertions(+), 12 deletions(-) create mode 100644 include/accel/accel-cpu.h diff --git a/include/accel/accel-cpu-target.h b/include/accel/accel-cpu-target.h index 37dde7fae3e..6feb344e29b 100644 --- a/include/accel/accel-cpu-target.h +++ b/include/accel/accel-cpu-target.h @@ -21,21 +21,11 @@ */ #include "qom/object.h" +#include "accel/accel-cpu.h" #include "cpu.h" #define TYPE_ACCEL_CPU "accel-" CPU_RESOLVING_TYPE #define ACCEL_CPU_NAME(name) (name "-" TYPE_ACCEL_CPU) -typedef struct AccelCPUClass AccelCPUClass; DECLARE_CLASS_CHECKERS(AccelCPUClass, ACCEL_CPU, TYPE_ACCEL_CPU) -typedef struct AccelCPUClass { - /*< private >*/ - ObjectClass parent_class; - /*< public >*/ - - void (*cpu_class_init)(CPUClass *cc); - void (*cpu_instance_init)(CPUState *cpu); - bool (*cpu_target_realize)(CPUState *cpu, Error **errp); -} AccelCPUClass; - #endif /* ACCEL_CPU_H */ diff --git a/include/accel/accel-cpu.h b/include/accel/accel-cpu.h new file mode 100644 index 00000000000..9e7eede7c3c --- /dev/null +++ b/include/accel/accel-cpu.h @@ -0,0 +1,23 @@ +/* + * Accelerator interface, specializes CPUClass + * + * Copyright 2021 SUSE LLC + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef ACCEL_CPU_H +#define ACCEL_CPU_H + +#include "qom/object.h" +#include "hw/core/cpu.h" + +typedef struct AccelCPUClass { + ObjectClass parent_class; + + void (*cpu_class_init)(CPUClass *cc); + void (*cpu_instance_init)(CPUState *cpu); + bool (*cpu_target_realize)(CPUState *cpu, Error **errp); +} AccelCPUClass; + +#endif /* ACCEL_CPU_H */ diff --git a/accel/accel-target.c b/accel/accel-target.c index 6fa5c3ef04e..769a90230bf 100644 --- a/accel/accel-target.c +++ b/accel/accel-target.c @@ -27,7 +27,6 @@ #include "qemu/accel.h" #include "qemu/target_info.h" -#include "cpu.h" #include "accel/accel-cpu-target.h" #include "accel-internal.h" From patchwork Thu Apr 3 23:49:12 2025 Content-Type: text/plain; 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c300968c4sm2999981f8f.9.2025.04.03.16.51.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:51:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 17/19] accel: Move target-agnostic code from accel-target.c -> accel-common.c Date: Fri, 4 Apr 2025 01:49:12 +0200 Message-ID: <20250403234914.9154-18-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- accel/accel-common.c | 142 +++++++++++++++++++++++++++++++++++++++++++ accel/accel-target.c | 129 --------------------------------------- accel/meson.build | 1 + 3 files changed, 143 insertions(+), 129 deletions(-) create mode 100644 accel/accel-common.c diff --git a/accel/accel-common.c b/accel/accel-common.c new file mode 100644 index 00000000000..f505461fc88 --- /dev/null +++ b/accel/accel-common.c @@ -0,0 +1,142 @@ +/* + * QEMU accel class, components common to system emulation and user mode + * + * Copyright (c) 2003-2008 Fabrice Bellard + * Copyright (c) 2014 Red Hat Inc. + * + * SPDX-License-Identifier: MIT + */ + +#include "qemu/osdep.h" +#include "qemu/accel.h" +#include "qemu/target_info.h" +#include "accel/accel-cpu.h" +#include "accel-internal.h" + +/* Lookup AccelClass from opt_name. Returns NULL if not found */ +AccelClass *accel_find(const char *opt_name) +{ + char *class_name = g_strdup_printf(ACCEL_CLASS_NAME("%s"), opt_name); + AccelClass *ac = ACCEL_CLASS(module_object_class_by_name(class_name)); + g_free(class_name); + return ac; +} + +/* Return the name of the current accelerator */ +const char *current_accel_name(void) +{ + AccelClass *ac = ACCEL_GET_CLASS(current_accel()); + + return ac->name; +} + +static void accel_init_cpu_int_aux(ObjectClass *klass, void *opaque) +{ + CPUClass *cc = CPU_CLASS(klass); + AccelCPUClass *accel_cpu = opaque; + + /* + * The first callback allows accel-cpu to run initializations + * for the CPU, customizing CPU behavior according to the accelerator. + * + * The second one allows the CPU to customize the accel-cpu + * behavior according to the CPU. + * + * The second is currently only used by TCG, to specialize the + * TCGCPUOps depending on the CPU type. + */ + cc->accel_cpu = accel_cpu; + if (accel_cpu->cpu_class_init) { + accel_cpu->cpu_class_init(cc); + } + if (cc->init_accel_cpu) { + cc->init_accel_cpu(accel_cpu, cc); + } +} + +/* initialize the arch-specific accel CpuClass interfaces */ +static void accel_init_cpu_interfaces(AccelClass *ac) +{ + const char *ac_name; /* AccelClass name */ + char *acc_name; /* AccelCPUClass name */ + ObjectClass *acc; /* AccelCPUClass */ + const char *cpu_resolving_type = target_cpu_type(); + + ac_name = object_class_get_name(OBJECT_CLASS(ac)); + g_assert(ac_name != NULL); + + acc_name = g_strdup_printf("%s-%s", ac_name, cpu_resolving_type); + acc = object_class_by_name(acc_name); + g_free(acc_name); + + if (acc) { + object_class_foreach(accel_init_cpu_int_aux, + cpu_resolving_type, false, acc); + } +} + +void accel_init_interfaces(AccelClass *ac) +{ + accel_init_ops_interfaces(ac); + accel_init_cpu_interfaces(ac); +} + +void accel_cpu_instance_init(CPUState *cpu) +{ + if (cpu->cc->accel_cpu && cpu->cc->accel_cpu->cpu_instance_init) { + cpu->cc->accel_cpu->cpu_instance_init(cpu); + } +} + +bool accel_cpu_common_realize(CPUState *cpu, Error **errp) +{ + AccelState *accel = current_accel(); + AccelClass *acc = ACCEL_GET_CLASS(accel); + + /* target specific realization */ + if (cpu->cc->accel_cpu + && cpu->cc->accel_cpu->cpu_target_realize + && !cpu->cc->accel_cpu->cpu_target_realize(cpu, errp)) { + return false; + } + + /* generic realization */ + if (acc->cpu_common_realize && !acc->cpu_common_realize(cpu, errp)) { + return false; + } + + return true; +} + +void accel_cpu_common_unrealize(CPUState *cpu) +{ + AccelState *accel = current_accel(); + AccelClass *acc = ACCEL_GET_CLASS(accel); + + /* generic unrealization */ + if (acc->cpu_common_unrealize) { + acc->cpu_common_unrealize(cpu); + } +} + +int accel_supported_gdbstub_sstep_flags(void) +{ + AccelState *accel = current_accel(); + AccelClass *acc = ACCEL_GET_CLASS(accel); + if (acc->gdbstub_supported_sstep_flags) { + return acc->gdbstub_supported_sstep_flags(); + } + return 0; +} + +static const TypeInfo accel_types[] = { + { + .name = TYPE_ACCEL, + .parent = TYPE_OBJECT, + .class_size = sizeof(AccelClass), + .instance_size = sizeof(AccelState), + .abstract = true, + }, +}; + +DEFINE_TYPES(accel_types) diff --git a/accel/accel-target.c b/accel/accel-target.c index 769a90230bf..7fd392fbc4a 100644 --- a/accel/accel-target.c +++ b/accel/accel-target.c @@ -24,135 +24,7 @@ */ #include "qemu/osdep.h" -#include "qemu/accel.h" -#include "qemu/target_info.h" - #include "accel/accel-cpu-target.h" -#include "accel-internal.h" - -static const TypeInfo accel_type = { - .name = TYPE_ACCEL, - .parent = TYPE_OBJECT, - .class_size = sizeof(AccelClass), - .instance_size = sizeof(AccelState), - .abstract = true, -}; - -/* Lookup AccelClass from opt_name. Returns NULL if not found */ -AccelClass *accel_find(const char *opt_name) -{ - char *class_name = g_strdup_printf(ACCEL_CLASS_NAME("%s"), opt_name); - AccelClass *ac = ACCEL_CLASS(module_object_class_by_name(class_name)); - g_free(class_name); - return ac; -} - -/* Return the name of the current accelerator */ -const char *current_accel_name(void) -{ - AccelClass *ac = ACCEL_GET_CLASS(current_accel()); - - return ac->name; -} - -static void accel_init_cpu_int_aux(ObjectClass *klass, void *opaque) -{ - CPUClass *cc = CPU_CLASS(klass); - AccelCPUClass *accel_cpu = opaque; - - /* - * The first callback allows accel-cpu to run initializations - * for the CPU, customizing CPU behavior according to the accelerator. - * - * The second one allows the CPU to customize the accel-cpu - * behavior according to the CPU. - * - * The second is currently only used by TCG, to specialize the - * TCGCPUOps depending on the CPU type. - */ - cc->accel_cpu = accel_cpu; - if (accel_cpu->cpu_class_init) { - accel_cpu->cpu_class_init(cc); - } - if (cc->init_accel_cpu) { - cc->init_accel_cpu(accel_cpu, cc); - } -} - -/* initialize the arch-specific accel CpuClass interfaces */ -static void accel_init_cpu_interfaces(AccelClass *ac) -{ - const char *ac_name; /* AccelClass name */ - char *acc_name; /* AccelCPUClass name */ - ObjectClass *acc; /* AccelCPUClass */ - const char *cpu_resolving_type = target_cpu_type(); - - ac_name = object_class_get_name(OBJECT_CLASS(ac)); - g_assert(ac_name != NULL); - - acc_name = g_strdup_printf("%s-%s", ac_name, cpu_resolving_type); - acc = object_class_by_name(acc_name); - g_free(acc_name); - - if (acc) { - object_class_foreach(accel_init_cpu_int_aux, - cpu_resolving_type, false, acc); - } -} - -void accel_init_interfaces(AccelClass *ac) -{ - accel_init_ops_interfaces(ac); - accel_init_cpu_interfaces(ac); -} - -void accel_cpu_instance_init(CPUState *cpu) -{ - if (cpu->cc->accel_cpu && cpu->cc->accel_cpu->cpu_instance_init) { - cpu->cc->accel_cpu->cpu_instance_init(cpu); - } -} - -bool accel_cpu_common_realize(CPUState *cpu, Error **errp) -{ - AccelState *accel = current_accel(); - AccelClass *acc = ACCEL_GET_CLASS(accel); - - /* target specific realization */ - if (cpu->cc->accel_cpu - && cpu->cc->accel_cpu->cpu_target_realize - && !cpu->cc->accel_cpu->cpu_target_realize(cpu, errp)) { - return false; - } - - /* generic realization */ - if (acc->cpu_common_realize && !acc->cpu_common_realize(cpu, errp)) { - return false; - } - - return true; -} - -void accel_cpu_common_unrealize(CPUState *cpu) -{ - AccelState *accel = current_accel(); - AccelClass *acc = ACCEL_GET_CLASS(accel); - - /* generic unrealization */ - if (acc->cpu_common_unrealize) { - acc->cpu_common_unrealize(cpu); - } -} - -int accel_supported_gdbstub_sstep_flags(void) -{ - AccelState *accel = current_accel(); - AccelClass *acc = ACCEL_GET_CLASS(accel); - if (acc->gdbstub_supported_sstep_flags) { - return acc->gdbstub_supported_sstep_flags(); - } - return 0; -} static const TypeInfo accel_cpu_type = { .name = TYPE_ACCEL_CPU, @@ -163,7 +35,6 @@ static const TypeInfo accel_cpu_type = { static void register_accel_types(void) { - type_register_static(&accel_type); type_register_static(&accel_cpu_type); } diff --git a/accel/meson.build b/accel/meson.build index 5eaeb683385..52909314bfa 100644 --- a/accel/meson.build +++ b/accel/meson.build @@ -1,3 +1,4 @@ +common_ss.add(files('accel-common.c')) specific_ss.add(files('accel-target.c')) system_ss.add(files('accel-system.c', 'accel-blocker.c')) user_ss.add(files('accel-user.c')) From patchwork Thu Apr 3 23:49:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877985 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3527578wrs; Thu, 3 Apr 2025 16:51:43 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWRuAWE73dmjRmvfRyfnkkaHFqf0F3wuMLoZ+dcCgeVQKQqCRZ+zH/peUNpvQUEocjCxKPAuw==@linaro.org X-Google-Smtp-Source: AGHT+IGwvd4j2mT+F64BC9uY9jPy10m6hwYVa2vQy36VE0ydSrhGy2x9VftHiUxUWGqF+EuinU6Y X-Received: by 2002:a05:622a:1aa8:b0:476:980c:10a9 with SMTP id d75a77b69052e-47924962769mr24462411cf.21.1743724302777; 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c3009680dsm2926099f8f.7.2025.04.03.16.51.09 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:51:10 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 18/19] qemu: Prepare per-binary QOM filter via TYPE_BINARY_PREFIX Date: Fri, 4 Apr 2025 01:49:13 +0200 Message-ID: <20250403234914.9154-19-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- meson.build | 1 + include/hw/boards.h | 1 + include/qemu/target_info-qom.h | 14 ++++++++++++++ target_info-qom.c | 15 +++++++++++++++ 4 files changed, 31 insertions(+) create mode 100644 include/qemu/target_info-qom.h create mode 100644 target_info-qom.c diff --git a/meson.build b/meson.build index de9c9dacd35..b93253166c8 100644 --- a/meson.build +++ b/meson.build @@ -3815,6 +3815,7 @@ specific_ss.add(files('page-target.c', 'page-vary-target.c')) specific_ss.add(files('target_info-stub.c')) common_ss.add(files('target_info.c')) +system_ss.add(files('target_info-qom.c')) subdir('backends') subdir('disas') diff --git a/include/hw/boards.h b/include/hw/boards.h index 02f43ac5d4d..b1bbf3c34d4 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -7,6 +7,7 @@ #include "system/hostmem.h" #include "system/blockdev.h" #include "qapi/qapi-types-machine.h" +#include "qemu/target_info-qom.h" #include "qemu/module.h" #include "qom/object.h" #include "hw/core/cpu.h" diff --git a/include/qemu/target_info-qom.h b/include/qemu/target_info-qom.h new file mode 100644 index 00000000000..c87d47acf66 --- /dev/null +++ b/include/qemu/target_info-qom.h @@ -0,0 +1,14 @@ +/* + * QEMU binary helpers + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef QEMU_TARGET_INFO_QOM_H +#define QEMU_TARGET_INFO_QOM_H + +#define TYPE_LEGACY_BINARY_PREFIX "legacy-binary-" + +#endif diff --git a/target_info-qom.c b/target_info-qom.c new file mode 100644 index 00000000000..6970b95ee0b --- /dev/null +++ b/target_info-qom.c @@ -0,0 +1,15 @@ +/* + * QEMU legacy binary helpers + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/target_info-qom.h" + +static const TypeInfo target_info_types[] = { +}; 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[92.88.170.184]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c301a67a1sm2918546f8f.24.2025.04.03.16.51.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 16:51:15 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Richard Henderson , Pierrick Bouvier Subject: [RFC PATCH-for-10.1 19/19] system/vl: Filter machine list for binary using machine_binary_filter() Date: Fri, 4 Apr 2025 01:49:14 +0200 Message-ID: <20250403234914.9154-20-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403234914.9154-1-philmd@linaro.org> References: <20250403234914.9154-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- system/vl.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/system/vl.c b/system/vl.c index d8a0fe713c9..554f5f2a467 100644 --- a/system/vl.c +++ b/system/vl.c @@ -27,6 +27,8 @@ #include "qemu/datadir.h" #include "qemu/units.h" #include "qemu/module.h" +#include "qemu/target_info.h" +#include "qemu/target_info-qom.h" #include "exec/cpu-common.h" #include "exec/page-vary.h" #include "hw/qdev-properties.h" @@ -833,14 +835,29 @@ static bool usb_parse(const char *cmdline, Error **errp) /***********************************************************/ /* machine registration */ +static char *machine_binary_filter(void) +{ + if (target_info_is_stub()) { + return NULL; + } + return g_strconcat(TYPE_LEGACY_BINARY_PREFIX, + "qemu-system-", target_name(), NULL); +} + static MachineClass *find_machine(const char *name, GSList *machines) { GSList *el; + g_autofree char *binary_filter = machine_binary_filter(); for (el = machines; el; el = el->next) { MachineClass *mc = el->data; if (!strcmp(mc->name, name) || !g_strcmp0(mc->alias, name)) { + if (binary_filter && !object_class_dynamic_cast(el->data, + binary_filter)) { + /* Machine is not for this binary: fail */ + return NULL; + } return mc; } } @@ -1563,6 +1580,7 @@ static void machine_help_func(const QDict *qdict) g_autoptr(GSList) machines = NULL; GSList *el; const char *type = qdict_get_try_str(qdict, "type"); + g_autofree char *binary_filter = machine_binary_filter(); machines = object_class_get_list(TYPE_MACHINE, false); if (type) { @@ -1577,6 +1595,12 @@ static void machine_help_func(const QDict *qdict) machines = g_slist_sort(machines, machine_class_cmp); for (el = machines; el; el = el->next) { MachineClass *mc = el->data; + + if (binary_filter && !object_class_dynamic_cast(el->data, + binary_filter)) { + /* Machine is not for this binary: skip */ + continue; + } if (mc->alias) { printf("%-20s %s (alias of %s)\n", mc->alias, mc->desc, mc->name); }