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Wysocki" , Praveen Talari , , , , , CC: , , , , , , , Nikunj Kela Subject: [PATCH v1 2/9] dt-bindings: serial: describe SA8255p Date: Thu, 10 Apr 2025 23:10:03 +0530 Message-ID: <20250410174010.31588-3-quic_ptalari@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250410174010.31588-1-quic_ptalari@quicinc.com> References: <20250410174010.31588-1-quic_ptalari@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: VA5DFFa_9IKVQs_lBtzx_u1ol7zKrsaF X-Proofpoint-ORIG-GUID: VA5DFFa_9IKVQs_lBtzx_u1ol7zKrsaF X-Authority-Analysis: v=2.4 cv=dbeA3WXe c=1 sm=1 tr=0 ts=67f802a5 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=XR8D0OoHHMoA:10 a=gEfo2CItAAAA:8 a=COk6AnOGAAAA:8 a=rjx3OjMNV77wTL7fGyAA:9 a=sptkURWiP4Gy88Gu7hUp:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-10_05,2025-04-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 mlxlogscore=999 phishscore=0 mlxscore=0 spamscore=0 malwarescore=0 clxscore=1011 adultscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504100127 From: Nikunj Kela SA8255p platform abstracts resources such as clocks, interconnect and GPIO pins configuration in Firmware. SCMI power and perf protocols are used to send request for resource configurations. Add DT bindings for the QUP GENI UART controller on sa8255p platform. Co-developed-by: Praveen Talari Signed-off-by: Praveen Talari Signed-off-by: Nikunj Kela Signed-off-by: Nikunj Kela Signed-off-by: Praveen Talari --- .../serial/qcom,sa8255p-geni-uart.yaml | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml diff --git a/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml new file mode 100644 index 000000000000..0dbfbfa1d504 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Geni based QUP UART interface + +maintainers: + - Praveen Talari + +allOf: + - $ref: /schemas/serial/serial.yaml# + +properties: + compatible: + enum: + - qcom,sa8255p-geni-uart + - qcom,sa8255p-geni-debug-uart + + interrupts: + minItems: 1 + items: + - description: UART core irq + - description: Wakeup irq (RX GPIO) + + power-domains: + minItems: 2 + maxItems: 2 + + power-domain-names: + items: + - const: power + - const: perf + + reg: + maxItems: 1 + +required: + - compatible + - interrupts + - reg + - power-domains + - power-domain-names + +unevaluatedProperties: false + +examples: + - | + #include + + serial@990000 { + compatible = "qcom,sa8255p-geni-uart"; + reg = <0x990000 0x4000>; + interrupts = ; + power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>; + power-domain-names = "power", "perf"; + }; +... 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Wysocki" , Praveen Talari , , , , , CC: , , , , , , Subject: [PATCH v1 4/9] soc: qcom: geni-se: Enable QUPs on SA8255p Qualcomm platforms Date: Thu, 10 Apr 2025 23:10:05 +0530 Message-ID: <20250410174010.31588-5-quic_ptalari@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250410174010.31588-1-quic_ptalari@quicinc.com> References: <20250410174010.31588-1-quic_ptalari@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: PgkW7RIMOdxFQMLho6VLk1ewC8U0ptug X-Proofpoint-GUID: PgkW7RIMOdxFQMLho6VLk1ewC8U0ptug X-Authority-Analysis: v=2.4 cv=NaLm13D4 c=1 sm=1 tr=0 ts=67f802b4 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=XR8D0OoHHMoA:10 a=COk6AnOGAAAA:8 a=-8ewQQW4l5uToJikuzQA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-10_05,2025-04-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 impostorscore=0 priorityscore=1501 adultscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 clxscore=1015 phishscore=0 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504100127 On the sa8255p platform, resources such as clocks,interconnects and TLMM (GPIO) configurations are managed by firmware. Introduce a platform data function callback to distinguish whether resource control is performed by firmware or directly by the driver in linux. The refactor ensures clear differentiation of resource management mechanisms, improving maintainability and flexibility in handling platform-specific configurations. Signed-off-by: Praveen Talari --- drivers/soc/qcom/qcom-geni-se.c | 78 +++++++++++++++++++++------------ 1 file changed, 50 insertions(+), 28 deletions(-) diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c index 4cb959106efa..5e2add1e04d3 100644 --- a/drivers/soc/qcom/qcom-geni-se.c +++ b/drivers/soc/qcom/qcom-geni-se.c @@ -105,6 +105,8 @@ struct geni_wrapper { struct geni_se_desc { unsigned int num_clks; const char * const *clks; + int (*geni_se_rsc_init)(struct geni_wrapper *wrapper, + const struct geni_se_desc *desc); }; static const char * const icc_path_names[] = {"qup-core", "qup-config", @@ -891,10 +893,44 @@ int geni_icc_disable(struct geni_se *se) } EXPORT_SYMBOL_GPL(geni_icc_disable); +static int geni_se_resource_init(struct geni_wrapper *wrapper, + const struct geni_se_desc *desc) +{ + struct device *dev = wrapper->dev; + int ret; + int i; + + wrapper->num_clks = min_t(unsigned int, desc->num_clks, MAX_CLKS); + + for (i = 0; i < wrapper->num_clks; ++i) + wrapper->clks[i].id = desc->clks[i]; + + ret = of_count_phandle_with_args(dev->of_node, "clocks", "#clock-cells"); + if (ret < 0) { + dev_err(dev, "invalid clocks property at %pOF\n", dev->of_node); + return ret; + } + + if (ret < wrapper->num_clks) { + dev_err(dev, "invalid clocks count at %pOF, expected %d entries\n", + dev->of_node, wrapper->num_clks); + return -EINVAL; + } + + ret = devm_clk_bulk_get(dev, wrapper->num_clks, wrapper->clks); + if (ret) { + dev_err(dev, "Err getting clks %d\n", ret); + return ret; + } + + return ret; +} + static int geni_se_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct geni_wrapper *wrapper; + const struct geni_se_desc *desc; int ret; wrapper = devm_kzalloc(dev, sizeof(*wrapper), GFP_KERNEL); @@ -906,38 +942,15 @@ static int geni_se_probe(struct platform_device *pdev) if (IS_ERR(wrapper->base)) return PTR_ERR(wrapper->base); - if (!has_acpi_companion(&pdev->dev)) { - const struct geni_se_desc *desc; - int i; - - desc = device_get_match_data(&pdev->dev); - if (!desc) - return -EINVAL; - - wrapper->num_clks = min_t(unsigned int, desc->num_clks, MAX_CLKS); - - for (i = 0; i < wrapper->num_clks; ++i) - wrapper->clks[i].id = desc->clks[i]; - - ret = of_count_phandle_with_args(dev->of_node, "clocks", "#clock-cells"); - if (ret < 0) { - dev_err(dev, "invalid clocks property at %pOF\n", dev->of_node); - return ret; - } + desc = device_get_match_data(&pdev->dev); - if (ret < wrapper->num_clks) { - dev_err(dev, "invalid clocks count at %pOF, expected %d entries\n", - dev->of_node, wrapper->num_clks); + if (!has_acpi_companion(&pdev->dev) && desc->geni_se_rsc_init) { + ret = desc->geni_se_rsc_init(wrapper, desc); + if (ret) return -EINVAL; - } - - ret = devm_clk_bulk_get(dev, wrapper->num_clks, wrapper->clks); - if (ret) { - dev_err(dev, "Err getting clks %d\n", ret); - return ret; - } } +out: dev_set_drvdata(dev, wrapper); dev_dbg(dev, "GENI SE Driver probed\n"); return devm_of_platform_populate(dev); @@ -951,6 +964,13 @@ static const char * const qup_clks[] = { static const struct geni_se_desc qup_desc = { .clks = qup_clks, .num_clks = ARRAY_SIZE(qup_clks), + .geni_se_rsc_init = geni_se_resource_init, +}; + +static const struct geni_se_desc sa8255p_qup_desc = { + .clks = NULL, + .num_clks = 0, + .geni_se_rsc_init = NULL, }; static const char * const i2c_master_hub_clks[] = { @@ -960,11 +980,13 @@ static const char * const i2c_master_hub_clks[] = { static const struct geni_se_desc i2c_master_hub_desc = { .clks = i2c_master_hub_clks, .num_clks = ARRAY_SIZE(i2c_master_hub_clks), + .geni_se_rsc_init = geni_se_resource_init, }; static const struct of_device_id geni_se_dt_match[] = { { .compatible = "qcom,geni-se-qup", .data = &qup_desc }, { .compatible = "qcom,geni-se-i2c-master-hub", .data = &i2c_master_hub_desc }, + { .compatible = "qcom,sa8255p-geni-se-qup", .data = &sa8255p_qup_desc }, {} }; MODULE_DEVICE_TABLE(of, geni_se_dt_match); From patchwork Thu Apr 10 17:40:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Praveen Talari X-Patchwork-Id: 880218 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 13F5B1EDA08; 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Wysocki" , Praveen Talari , , , , , CC: , , , , , , Subject: [PATCH v1 6/9] serial: qcom-geni: move resource control logic to separate functions Date: Thu, 10 Apr 2025 23:10:07 +0530 Message-ID: <20250410174010.31588-7-quic_ptalari@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250410174010.31588-1-quic_ptalari@quicinc.com> References: <20250410174010.31588-1-quic_ptalari@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Z9YyMHW8Em7HYVs6D1eZhFWmf1On43Wd X-Proofpoint-GUID: Z9YyMHW8Em7HYVs6D1eZhFWmf1On43Wd X-Authority-Analysis: v=2.4 cv=NaLm13D4 c=1 sm=1 tr=0 ts=67f802c3 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=XR8D0OoHHMoA:10 a=COk6AnOGAAAA:8 a=HYIVWE9JnHk2aDURxZAA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-10_05,2025-04-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 impostorscore=0 priorityscore=1501 adultscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 clxscore=1015 phishscore=0 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504100127 Supports use in PM system/runtime frameworks, helping to distinguish new resource control mechanisms and facilitate future modifications within the new API. The code that handles the actual enable or disable of resources like clock and ICC paths to a separate function (geni_serial_resources_on() and geni_serial_resources_off()) which enhances code readability. Signed-off-by: Praveen Talari --- drivers/tty/serial/qcom_geni_serial.c | 53 +++++++++++++++++++++------ 1 file changed, 42 insertions(+), 11 deletions(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index 889ce8961e0a..e341f5090ecc 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -1572,6 +1572,42 @@ static struct uart_driver qcom_geni_uart_driver = { .nr = GENI_UART_PORTS, }; +static int geni_serial_resources_off(struct uart_port *uport) +{ + struct qcom_geni_serial_port *port = to_dev_port(uport); + int ret; + + dev_pm_opp_set_rate(uport->dev, 0); + ret = geni_se_resources_off(&port->se); + if (ret) + return ret; + + geni_icc_disable(&port->se); + + return ret; +} + +static int geni_serial_resources_on(struct uart_port *uport) +{ + struct qcom_geni_serial_port *port = to_dev_port(uport); + int ret; + + ret = geni_icc_enable(&port->se); + if (ret) + return ret; + + ret = geni_se_resources_on(&port->se); + if (ret) { + geni_icc_disable(&port->se); + return ret; + } + + if (port->clk_rate) + dev_pm_opp_set_rate(uport->dev, port->clk_rate); + + return ret; +} + static int geni_serial_resource_init(struct qcom_geni_serial_port *port) { int ret; @@ -1617,17 +1653,12 @@ static void qcom_geni_serial_pm(struct uart_port *uport, if (old_state == UART_PM_STATE_UNDEFINED) old_state = UART_PM_STATE_OFF; - if (new_state == UART_PM_STATE_ON && old_state == UART_PM_STATE_OFF) { - geni_icc_enable(&port->se); - if (port->clk_rate) - dev_pm_opp_set_rate(uport->dev, port->clk_rate); - geni_se_resources_on(&port->se); - } else if (new_state == UART_PM_STATE_OFF && - old_state == UART_PM_STATE_ON) { - geni_se_resources_off(&port->se); - dev_pm_opp_set_rate(uport->dev, 0); - geni_icc_disable(&port->se); - } + if (new_state == UART_PM_STATE_ON && old_state == UART_PM_STATE_OFF) + geni_serial_resources_on(uport); + else if (new_state == UART_PM_STATE_OFF && + old_state == UART_PM_STATE_ON) + geni_serial_resources_off(uport); + } static const struct uart_ops qcom_geni_console_pops = { From patchwork Thu Apr 10 17:40:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Praveen Talari X-Patchwork-Id: 880217 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 381BD284B22; Thu, 10 Apr 2025 17:41:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744306908; cv=none; b=jJyLRrsySLIwrra6r1rcS3DM9DTEJWWg+smPwjUaV58PVpMmlUTg0kcfV3xIell4wl1c5n4Y/vJVq4cLF4ERi2Anjsz78CHr2orUHoJhXweC+hRVW/v86NtNUoaX79/2pm+Zh+CF0jmqtx7CZ/ZC8E1UTzeN9Jz3FkAtkjH8egg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744306908; 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Wysocki" , Praveen Talari , , , , , CC: , , , , , , Subject: [PATCH v1 8/9] serial: qcom-geni: Enable PM runtime for serial driver Date: Thu, 10 Apr 2025 23:10:09 +0530 Message-ID: <20250410174010.31588-9-quic_ptalari@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250410174010.31588-1-quic_ptalari@quicinc.com> References: <20250410174010.31588-1-quic_ptalari@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: SgJX610SjsQI99skK9Do0JskZVxvT7iS X-Authority-Analysis: v=2.4 cv=QuVe3Uyd c=1 sm=1 tr=0 ts=67f802d3 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=XR8D0OoHHMoA:10 a=COk6AnOGAAAA:8 a=NvXbtCnAfBVqmBDmsI8A:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: SgJX610SjsQI99skK9Do0JskZVxvT7iS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-10_05,2025-04-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 spamscore=0 malwarescore=0 mlxlogscore=999 bulkscore=0 priorityscore=1501 clxscore=1015 phishscore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504100127 Add Power Management (PM) runtime support to Qualcomm GENI serial driver. Introduce necessary callbacks and updates to ensure seamless transitions between power states, enhancing overall power efficiency. Signed-off-by: Praveen Talari --- drivers/tty/serial/qcom_geni_serial.c | 35 ++++++++++++++++++++++----- 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index 25d16ac3f406..9649297d4a9e 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -1663,17 +1663,15 @@ static int geni_serial_resource_init(struct qcom_geni_serial_port *port) static void qcom_geni_serial_pm(struct uart_port *uport, unsigned int new_state, unsigned int old_state) { - struct qcom_geni_serial_port *port = to_dev_port(uport); - /* If we've never been called, treat it as off */ if (old_state == UART_PM_STATE_UNDEFINED) old_state = UART_PM_STATE_OFF; if (new_state == UART_PM_STATE_ON && old_state == UART_PM_STATE_OFF) - geni_serial_resources_on(uport); + pm_runtime_resume_and_get(uport->dev); else if (new_state == UART_PM_STATE_OFF && old_state == UART_PM_STATE_ON) - geni_serial_resources_off(uport); + pm_runtime_put_sync(uport->dev); } @@ -1811,9 +1809,11 @@ static int qcom_geni_serial_probe(struct platform_device *pdev) return ret; } + pm_runtime_enable(port->se.dev); + ret = uart_add_one_port(drv, uport); if (ret) - return ret; + goto error; if (port->wakeup_irq > 0) { device_init_wakeup(&pdev->dev, true); @@ -1822,11 +1822,15 @@ static int qcom_geni_serial_probe(struct platform_device *pdev) if (ret) { device_init_wakeup(&pdev->dev, false); uart_remove_one_port(drv, uport); - return ret; + goto error; } } return 0; + +error: + pm_runtime_disable(port->se.dev); + return ret; } static void qcom_geni_serial_remove(struct platform_device *pdev) @@ -1836,9 +1840,26 @@ static void qcom_geni_serial_remove(struct platform_device *pdev) dev_pm_clear_wake_irq(&pdev->dev); device_init_wakeup(&pdev->dev, false); + pm_runtime_disable(port->se.dev); uart_remove_one_port(drv, &port->uport); } +static int qcom_geni_serial_runtime_suspend(struct device *dev) +{ + struct qcom_geni_serial_port *port = dev_get_drvdata(dev); + struct uart_port *uport = &port->uport; + + return geni_serial_resources_off(uport); +}; + +static int qcom_geni_serial_runtime_resume(struct device *dev) +{ + struct qcom_geni_serial_port *port = dev_get_drvdata(dev); + struct uart_port *uport = &port->uport; + + return geni_serial_resources_on(uport); +}; + static int qcom_geni_serial_suspend(struct device *dev) { struct qcom_geni_serial_port *port = dev_get_drvdata(dev); @@ -1882,6 +1903,8 @@ static const struct qcom_geni_device_data qcom_geni_uart_data = { }; static const struct dev_pm_ops qcom_geni_serial_pm_ops = { + SET_RUNTIME_PM_OPS(qcom_geni_serial_runtime_suspend, + qcom_geni_serial_runtime_resume, NULL) SYSTEM_SLEEP_PM_OPS(qcom_geni_serial_suspend, qcom_geni_serial_resume) };