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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-22c33fcee11sm8340125ad.191.2025.04.16.01.29.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Apr 2025 01:29:29 -0700 (PDT) From: Kathiravan Thirumoorthy Date: Wed, 16 Apr 2025 13:59:18 +0530 Subject: [PATCH v2 1/5] dt-bindings: sram: qcom,imem: Document IPQ5424 compatible Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250416-wdt_reset_reason-v2-1-c65bba312914@oss.qualcomm.com> References: <20250416-wdt_reset_reason-v2-0-c65bba312914@oss.qualcomm.com> In-Reply-To: <20250416-wdt_reset_reason-v2-0-c65bba312914@oss.qualcomm.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Wim Van Sebroeck , Guenter Roeck , Rajendra Nayak Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, Kathiravan Thirumoorthy X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1744792162; l=846; i=kathiravan.thirumoorthy@oss.qualcomm.com; s=20230906; h=from:subject:message-id; bh=SAyK9sJUeGV2KdHd8ZazsiTrrxo8/0P3PB/Buc6flu4=; b=mbNxlNeS9QipHP2Ao6yWsmbakQOC98yMhCWN30kr4omaRSzkfFDuyQxkTt0g3nr/kO9jTOdll 7zEBuZD9HlDB03IudL6c7bMcxpxKcRUw6zPujmfMVFKyHCWXQaf5AU1 X-Developer-Key: i=kathiravan.thirumoorthy@oss.qualcomm.com; a=ed25519; pk=xWsR7pL6ch+vdZ9MoFGEaP61JUaRf0XaZYWztbQsIiM= X-Proofpoint-GUID: AewzQf40itBo0u4Q1-V9PE-Xqpfi68Ld X-Proofpoint-ORIG-GUID: AewzQf40itBo0u4Q1-V9PE-Xqpfi68Ld X-Authority-Analysis: v=2.4 cv=Cve/cm4D c=1 sm=1 tr=0 ts=67ff6a6c cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=EUspDBNiAAAA:8 a=7sp3e_VSdAcdU5CosJ0A:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-16_03,2025-04-15_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 malwarescore=0 lowpriorityscore=0 bulkscore=0 spamscore=0 phishscore=0 suspectscore=0 impostorscore=0 mlxlogscore=897 mlxscore=0 priorityscore=1501 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504160068 Add compatible for Qualcomm's IPQ5424 IMEM. Signed-off-by: Kathiravan Thirumoorthy Acked-by: Rob Herring (Arm) --- Changes in v2: - No changes --- Documentation/devicetree/bindings/sram/qcom,imem.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml index 2711f90d9664b70fcd1e2f7e2dfd3386ed5c1952..dec1b1ee924cf1386f559eb262ea864f2788c165 100644 --- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml @@ -18,6 +18,7 @@ properties: items: - enum: - qcom,apq8064-imem + - qcom,ipq5424-imem - qcom,msm8226-imem - qcom,msm8974-imem - qcom,msm8976-imem From patchwork Wed Apr 16 08:29:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kathiravan Thirumoorthy X-Patchwork-Id: 881675 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E618230BC8 for ; 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Define the IMEM region to enable this functionality. As described, overall IMEM region is 112KB but only initial 4KB is accessible by all masters in the SoC. Signed-off-by: Kathiravan Thirumoorthy --- Changes in v2: - Describe the entire IMEM region in the node - Explicitly call out that initial 4K only accessible by all masters in the commit message --- arch/arm64/boot/dts/qcom/ipq5424.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi index 5d6ed2172b1bb0a57c593f121f387ec917f42419..4f18ea79502738c2b9cb4b13e8eb4ac4ddd89adf 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi @@ -486,6 +486,15 @@ ssphy_0: phy@7d000 { status = "disabled"; }; + sram@8600000 { + compatible = "qcom,ipq5424-imem", "syscon", "simple-mfd"; + reg = <0 0x08600000 0 0x1c000>; + ranges = <0 0 0x08600000 0x1c000>; + + #address-cells = <1>; + #size-cells = <1>; + }; + usb3: usb3@8a00000 { compatible = "qcom,ipq5424-dwc3", "qcom,dwc3"; reg = <0 0x08af8800 0 0x400>; From patchwork Wed Apr 16 08:29:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kathiravan Thirumoorthy X-Patchwork-Id: 881941 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4898722FF20 for ; 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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-22c33fcee11sm8340125ad.191.2025.04.16.01.29.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Apr 2025 01:29:37 -0700 (PDT) From: Kathiravan Thirumoorthy Date: Wed, 16 Apr 2025 13:59:20 +0530 Subject: [PATCH v2 3/5] dt-bindings: watchdog: separate out the IPQ5424 compatilble Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250416-wdt_reset_reason-v2-3-c65bba312914@oss.qualcomm.com> References: <20250416-wdt_reset_reason-v2-0-c65bba312914@oss.qualcomm.com> In-Reply-To: <20250416-wdt_reset_reason-v2-0-c65bba312914@oss.qualcomm.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Wim Van Sebroeck , Guenter Roeck , Rajendra Nayak Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, Kathiravan Thirumoorthy X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1744792162; l=1662; i=kathiravan.thirumoorthy@oss.qualcomm.com; s=20230906; h=from:subject:message-id; bh=u+Slyka3f+K5iPRwbFIc5bGO5YI+Q+BDcS1hNApu66I=; b=gLTH1Gf4Mgje14KDrgWv1TtP50ZpmbNYjQZ08AaafgTSpPZ+D6EmQDmjWzfkYtYvJnqVtb0Uv T1UpRfTUN44A7QtSaBfkbZcn6KWGlM2SBiQTEHHvS9wPMy1wKGdfZZI X-Developer-Key: i=kathiravan.thirumoorthy@oss.qualcomm.com; a=ed25519; pk=xWsR7pL6ch+vdZ9MoFGEaP61JUaRf0XaZYWztbQsIiM= X-Proofpoint-ORIG-GUID: WTEHI2vyBYg-QphJbxkOm3iJ57SwobUU X-Proofpoint-GUID: WTEHI2vyBYg-QphJbxkOm3iJ57SwobUU X-Authority-Analysis: v=2.4 cv=I+plRMgg c=1 sm=1 tr=0 ts=67ff6a73 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=EUspDBNiAAAA:8 a=saKzS3r9oGyBWaH7Fp4A:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-16_03,2025-04-15_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 phishscore=0 adultscore=0 priorityscore=1501 mlxscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=999 clxscore=1015 impostorscore=0 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504160068 To retrieve the system restart reason code from IMEM, need to define the certain device specific data. To achieve that, decouple the IPQ5424 compatible from the existing list and define along with 'qcom,kpss-wdt'. Signed-off-by: Kathiravan Thirumoorthy --- Changes in v2: - New patch --- Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml index 49e2b807db0bc9d3edfc93ec41ad0df0b74ed032..e800f53381ef5626787eff1029bc94177e2635a4 100644 --- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml @@ -20,7 +20,6 @@ properties: - qcom,kpss-wdt-ipq4019 - qcom,apss-wdt-ipq5018 - qcom,apss-wdt-ipq5332 - - qcom,apss-wdt-ipq5424 - qcom,apss-wdt-ipq9574 - qcom,apss-wdt-msm8226 - qcom,apss-wdt-msm8974 @@ -56,6 +55,8 @@ properties: - qcom,kpss-wdt-msm8960 - const: qcom,kpss-timer - const: qcom,msm-timer + - items: + - const: qcom,apss-wdt-ipq5424 reg: maxItems: 1 @@ -93,7 +94,9 @@ allOf: properties: compatible: contains: - const: qcom,kpss-wdt + enum: + - qcom,apss-wdt-ipq5424 + - qcom,kpss-wdt then: properties: clock-frequency: false From patchwork Wed Apr 16 08:29:21 2025 Content-Type: text/plain; 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To achieve that, drop the fallback compatible. Signed-off-by: Kathiravan Thirumoorthy --- Changes in v2: - New Patch --- arch/arm64/boot/dts/qcom/ipq5424.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi index 4f18ea79502738c2b9cb4b13e8eb4ac4ddd89adf..21252352b7328e4a1b7ba6ca7080f73722f097ad 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi @@ -376,7 +376,7 @@ intc: interrupt-controller@f200000 { }; watchdog@f410000 { - compatible = "qcom,apss-wdt-ipq5424", "qcom,kpss-wdt"; + compatible = "qcom,apss-wdt-ipq5424"; reg = <0 0x0f410000 0 0x1000>; interrupts = ; clocks = <&sleep_clk>; From patchwork Wed Apr 16 08:29:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kathiravan Thirumoorthy X-Patchwork-Id: 881940 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 42B82234987 for ; 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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-22c33fcee11sm8340125ad.191.2025.04.16.01.29.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Apr 2025 01:29:45 -0700 (PDT) From: Kathiravan Thirumoorthy Date: Wed, 16 Apr 2025 13:59:22 +0530 Subject: [PATCH v2 5/5] watchdog: qcom: add support to read the restart reason from IMEM Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250416-wdt_reset_reason-v2-5-c65bba312914@oss.qualcomm.com> References: <20250416-wdt_reset_reason-v2-0-c65bba312914@oss.qualcomm.com> In-Reply-To: <20250416-wdt_reset_reason-v2-0-c65bba312914@oss.qualcomm.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Wim Van Sebroeck , Guenter Roeck , Rajendra Nayak Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, Kathiravan Thirumoorthy X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1744792162; l=4047; i=kathiravan.thirumoorthy@oss.qualcomm.com; s=20230906; h=from:subject:message-id; bh=ytjddDlDLQ/8ZhINpkiVdnU51G61thVjIytF6cPUlJ0=; b=CQWcBTVynagdFkbqMrTFg6GZJlZnsJ34H8F1ZalZ6w/ATArdt5JN7t58rbtwnn1bZQTLOSlUX Y3EIlsYDicDDEWHuvPUAXe2tbVDIhKADp90LT/XPc6p7NoFSfUORP84 X-Developer-Key: i=kathiravan.thirumoorthy@oss.qualcomm.com; a=ed25519; pk=xWsR7pL6ch+vdZ9MoFGEaP61JUaRf0XaZYWztbQsIiM= X-Authority-Analysis: v=2.4 cv=E9TNpbdl c=1 sm=1 tr=0 ts=67ff6a7b cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=EUspDBNiAAAA:8 a=k9rVL4j6ehUBw9fbeBUA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-ORIG-GUID: jb4PyXc13C7rUDoyZA4tynQ5mznl2PUl X-Proofpoint-GUID: jb4PyXc13C7rUDoyZA4tynQ5mznl2PUl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-16_03,2025-04-15_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 mlxscore=0 bulkscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 suspectscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 impostorscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504160068 When the system boots up after a watchdog reset, the EXPIRED_STATUS bit in the WDT_STS register is cleared. To identify if the system was restarted due to WDT expiry, bootloaders update the information in the IMEM region. Update the driver to read the restart reason from IMEM and populate the bootstatus accordingly. For backward compatibility, keep the EXPIRED_STATUS bit check. Add a new function qcom_wdt_get_restart_reason() to read the restart reason from IMEM. Signed-off-by: Kathiravan Thirumoorthy --- Changes in v2: - Use the syscon API to access the IMEM region - Handle the error cases returned by qcom_wdt_get_restart_reason - Define device specific data to retrieve the IMEM compatible, offset and the value for non secure WDT, which allows to extend the support for other SoCs --- drivers/watchdog/qcom-wdt.c | 47 +++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 45 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/qcom-wdt.c b/drivers/watchdog/qcom-wdt.c index 006f9c61aa64fd2b4ee9db493aeb54c8fafac818..94ba9ec9907a19854cd45a94f8da17d6e6eb33bc 100644 --- a/drivers/watchdog/qcom-wdt.c +++ b/drivers/watchdog/qcom-wdt.c @@ -7,9 +7,11 @@ #include #include #include +#include #include #include #include +#include #include enum wdt_reg { @@ -39,6 +41,9 @@ static const u32 reg_offset_data_kpss[] = { }; struct qcom_wdt_match_data { + const char *compatible; + unsigned int restart_reason_offset; + unsigned int non_secure_wdt_val; const u32 *offset; bool pretimeout; u32 max_tick_count; @@ -175,6 +180,15 @@ static const struct watchdog_info qcom_wdt_pt_info = { .identity = KBUILD_MODNAME, }; +static const struct qcom_wdt_match_data match_data_ipq5424 = { + .compatible = "qcom,ipq5424-imem", + .restart_reason_offset = 0x7b0, + .non_secure_wdt_val = 0x5, + .offset = reg_offset_data_kpss, + .pretimeout = true, + .max_tick_count = 0xFFFFFU, +}; + static const struct qcom_wdt_match_data match_data_apcs_tmr = { .offset = reg_offset_data_apcs_tmr, .pretimeout = false, @@ -187,6 +201,29 @@ static const struct qcom_wdt_match_data match_data_kpss = { .max_tick_count = 0xFFFFFU, }; +static int qcom_wdt_get_restart_reason(struct qcom_wdt *wdt, + const struct qcom_wdt_match_data *data) +{ + struct regmap *imem; + unsigned int val; + int ret; + + imem = syscon_regmap_lookup_by_compatible(data->compatible); + if (IS_ERR(imem)) + return PTR_ERR(imem); + + ret = regmap_read(imem, data->restart_reason_offset, &val); + if (ret) { + dev_err(wdt->wdd.parent, "failed to read the restart reason info\n"); + return ret; + } + + if (val == data->non_secure_wdt_val) + wdt->wdd.bootstatus = WDIOF_CARDRESET; + + return 0; +} + static int qcom_wdt_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -267,8 +304,13 @@ static int qcom_wdt_probe(struct platform_device *pdev) wdt->wdd.parent = dev; wdt->layout = data->offset; - if (readl(wdt_addr(wdt, WDT_STS)) & 1) - wdt->wdd.bootstatus = WDIOF_CARDRESET; + ret = qcom_wdt_get_restart_reason(wdt, data); + if (ret == -ENODEV) { + if (readl(wdt_addr(wdt, WDT_STS)) & 1) + wdt->wdd.bootstatus = WDIOF_CARDRESET; + } else if (ret) { + return ret; + } /* * If 'timeout-sec' unspecified in devicetree, assume a 30 second @@ -322,6 +364,7 @@ static const struct dev_pm_ops qcom_wdt_pm_ops = { }; static const struct of_device_id qcom_wdt_of_table[] = { + { .compatible = "qcom,apss-wdt-ipq5424", .data = &match_data_ipq5424 }, { .compatible = "qcom,kpss-timer", .data = &match_data_apcs_tmr }, { .compatible = "qcom,scss-timer", .data = &match_data_apcs_tmr }, { .compatible = "qcom,kpss-wdt", .data = &match_data_kpss },