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Wed, 13 May 2020 10:49:33 +0000 From: Zhenyu Zheng To: libvir-list@redhat.com Subject: [PATCH V5 1/4] cpu: Introduce virCPUarmData and related struts Date: Wed, 13 May 2020 18:48:30 +0800 Message-ID: In-Reply-To: <20200513104832.7390-1-zheng.zhenyu@outlook.com> References: <20200513104832.7390-1-zheng.zhenyu@outlook.com> X-ClientProxiedBy: HK2PR0401CA0023.apcprd04.prod.outlook.com (2603:1096:202:2::33) To TY2PR01MB3113.jpnprd01.prod.outlook.com (2603:1096:404:78::22) X-Microsoft-Original-Message-ID: <20200513104832.7390-2-zheng.zhenyu@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.8.114.27) by HK2PR0401CA0023.apcprd04.prod.outlook.com (2603:1096:202:2::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3000.24 via Frontend Transport; Wed, 13 May 2020 10:49:32 +0000 X-Microsoft-Original-Message-ID: <20200513104832.7390-2-zheng.zhenyu@outlook.com> X-TMN: [WuZfvTvTSc3sginm/UEf7HonHSKiliar] X-MS-PublicTrafficType: Email X-IncomingHeaderCount: 50 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-Correlation-Id: fbea1eef-48c0-498a-5caa-08d7f72b51fb X-MS-Exchange-SLBlob-MailProps: citmFLqyTFTDPpI75R1qiLOOWK0C9sbnZgMT4PWaMyRhF1ykdIyaegi0D9FkGIPe2g29EsM4TwGOzOd6Jx8A5z2o8WQ41vxX8Gvz4k6mFConPUWW66wWcN1szhrnPqPCILhzeIN/mDWJm6KPzi68FRXf3MfSMGxWPqHXHxvOCZ8QXi4EvfW5xHvvFNvhyIyUXxplZ4F/lDL8dftTrZbnm/zZcoxX0yYB4qWNQ02NRKzbcQEe40yo0VG+f2o8b6t0FBQDaAVibmCLQ8o8c7MRXXVsOWiYw/3YOzUAATkQeTyTLR1H8GETrEesgOj5GecobWXR0wmTTX4NmnY+QJ31DXpsge7b+BcbCBZOlw6ZbS3vKE/NbkTAjL0zfPaY8gBj8lBoWa5FvBT1sEBEA1Rxgk9Da7qJXmWgvPqlOH2WAIX7JHEqP2spgzWcXfRD5sA8Ha9PLje8l+a8o4dEZhsLxemddY+hj3KtQrcky/EdQLiGcp3URmS7YVXA3K17YFTa1J+llMIPQijYtlldNwUxwG1dcyJ6A6v+AxRtec0n4MOtSCJTwdDMmBwgbEdmEzqJRb9CZrcq0YEIC3ooQ+Yq5AohbI+9oG5jj06o+y08X5EfpQSJmdrybbZTUQzdDitlT6QESHnmhiQmlzlDERK3TStJaMSRrjemZl/LOz9aw8ZWwksMBVQPW4EfkmVL7sXWhxuRyPHQ1jEeAUlmkxLdxqZQMKGrgc27wzjd7XMZdI5ADXXZDC5s11fMWGGwmak0URby1Y9NTEu79XfQKC2s7Uj9Q8s/vWioyOwm7xIUKD0= X-MS-TrafficTypeDiagnostic: SG2APC01HT235: X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Zhenyu Zheng --- src/cpu/Makefile.inc.am | 1 + src/cpu/cpu.h | 2 ++ src/cpu/cpu_arm.c | 80 ++++++++++++++++++++++++++++++++++++++++- src/cpu/cpu_arm_data.h | 32 +++++++++++++++++ 4 files changed, 114 insertions(+), 1 deletion(-) create mode 100644 src/cpu/cpu_arm_data.h -- 2.20.1 diff --git a/src/cpu/Makefile.inc.am b/src/cpu/Makefile.inc.am index 0abeee87b6..228112a3c6 100644 --- a/src/cpu/Makefile.inc.am +++ b/src/cpu/Makefile.inc.am @@ -9,6 +9,7 @@ CPU_SOURCES = \ cpu/cpu_s390.h \ cpu/cpu_s390.c \ cpu/cpu_arm.h \ + cpu/cpu_arm_data.h \ cpu/cpu_arm.c \ cpu/cpu_ppc64.h \ cpu/cpu_ppc64.c \ diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index f779d2be17..ec22a183a1 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -27,6 +27,7 @@ #include "cpu_conf.h" #include "cpu_x86_data.h" #include "cpu_ppc64_data.h" +#include "cpu_arm_data.h" typedef struct _virCPUData virCPUData; @@ -36,6 +37,7 @@ struct _virCPUData { union { virCPUx86Data x86; virCPUppc64Data ppc64; + virCPUarmData arm; /* generic driver needs no data */ } data; }; diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c index ee5802198f..1bb0afb762 100644 --- a/src/cpu/cpu_arm.c +++ b/src/cpu/cpu_arm.c @@ -1,6 +1,7 @@ /* * cpu_arm.c: CPU driver for arm CPUs * + * Copyright (C) 2020 Huawei Technologies Co., Ltd. * Copyright (C) 2013 Red Hat, Inc. * Copyright (C) Canonical Ltd. 2012 * @@ -23,12 +24,16 @@ #include "viralloc.h" #include "cpu.h" +#include "cpu_arm.h" #include "cpu_map.h" +#include "virlog.h" #include "virstring.h" #include "virxml.h" #define VIR_FROM_THIS VIR_FROM_CPU +VIR_LOG_INIT("cpu.cpu_arm"); + static const virArch archs[] = { VIR_ARCH_ARMV6L, VIR_ARCH_ARMV7B, @@ -36,6 +41,21 @@ static const virArch archs[] = { VIR_ARCH_AARCH64, }; +typedef struct _virCPUarmVendor virCPUarmVendor; +typedef virCPUarmVendor *virCPUarmVendorPtr; +struct _virCPUarmVendor { + char *name; + unsigned long value; +}; + +typedef struct _virCPUarmModel virCPUarmModel; +typedef virCPUarmModel *virCPUarmModelPtr; +struct _virCPUarmModel { + char *name; + virCPUarmVendorPtr vendor; + virCPUarmData data; +}; + typedef struct _virCPUarmFeature virCPUarmFeature; typedef virCPUarmFeature *virCPUarmFeaturePtr; struct _virCPUarmFeature { @@ -64,6 +84,10 @@ G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUarmFeature, virCPUarmFeatureFree); typedef struct _virCPUarmMap virCPUarmMap; typedef virCPUarmMap *virCPUarmMapPtr; struct _virCPUarmMap { + size_t nvendors; + virCPUarmVendorPtr *vendors; + size_t nmodels; + virCPUarmModelPtr *models; GPtrArray *features; }; @@ -81,12 +105,66 @@ virCPUarmMapNew(void) return map; } +static void +virCPUarmDataClear(virCPUarmData *data) +{ + if (!data) + return; + + virStringListFree(data->features); +} + +static void +virCPUarmDataFree(virCPUDataPtr cpuData) +{ + if (!cpuData) + return; + + virCPUarmDataClear(&cpuData->data.arm); + g_free(cpuData); +} + +static void +virCPUarmModelFree(virCPUarmModelPtr model) +{ + if (!model) + return; + + virCPUarmDataClear(&model->data); + g_free(model->name); + g_free(model); +} + +G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUarmModel, virCPUarmModelFree); + +static void +virCPUarmVendorFree(virCPUarmVendorPtr vendor) +{ + if (!vendor) + return; + + g_free(vendor->name); + g_free(vendor); +} + +G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUarmVendor, virCPUarmVendorFree); + static void virCPUarmMapFree(virCPUarmMapPtr map) { + size_t i; + if (!map) return; + for (i = 0; i < map->nmodels; i++) + virCPUarmModelFree(map->models[i]); + g_free(map->models); + + for (i = 0; i < map->nvendors; i++) + virCPUarmVendorFree(map->vendors[i]); + g_free(map->vendors); + g_ptr_array_free(map->features, TRUE); g_free(map); @@ -201,7 +279,6 @@ virCPUarmUpdate(virCPUDefPtr guest, return ret; } - static virCPUDefPtr virCPUarmBaseline(virCPUDefPtr *cpus, unsigned int ncpus G_GNUC_UNUSED, @@ -259,6 +336,7 @@ struct cpuArchDriver cpuDriverArm = { .compare = virCPUarmCompare, .decode = NULL, .encode = NULL, + .dataFree = virCPUarmDataFree, .baseline = virCPUarmBaseline, .update = virCPUarmUpdate, .validateFeatures = virCPUarmValidateFeatures, diff --git a/src/cpu/cpu_arm_data.h b/src/cpu/cpu_arm_data.h new file mode 100644 index 0000000000..9b931cb8aa --- /dev/null +++ b/src/cpu/cpu_arm_data.h @@ -0,0 +1,32 @@ +/* + * cpu_arm_data.h: 64-bit arm CPU specific data + * + * Copyright (C) 2020 Huawei Technologies Co., Ltd. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; If not, see + * . + * + */ + +#pragma once + +#define VIR_CPU_ARM_DATA_INIT { 0 } + +typedef struct _virCPUarmData virCPUarmData; +struct _virCPUarmData { + unsigned long vendor_id; + unsigned long pvr; + char **features; + size_t nfeatures; +}; From patchwork Wed May 13 10:48:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenyu Zheng X-Patchwork-Id: 186588 Delivered-To: patch@linaro.org Received: by 2002:a92:5b0a:0:0:0:0:0 with SMTP id p10csp343459ilb; Wed, 13 May 2020 03:51:20 -0700 (PDT) X-Google-Smtp-Source: APiQypKcjK+mwZ3IwOohdUGf39Oqg2L6hgPVkcXbiftf3upYicfbuH1B3pxvr6oVPhwEy/uV6sjr X-Received: by 2002:a17:906:31da:: with SMTP id f26mr18437266ejf.308.1589367079956; Wed, 13 May 2020 03:51:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1589367079; cv=none; d=google.com; s=arc-20160816; b=QrQL4nYXDh24hef4Dn8ecKpI9VVQNa4VmkbUxpkZf67PehFo9rOKeLw15jtiVSW48h jP9yyWOFb8WrQfL7GWq8WgamLrBROzgsA+lOAd+ExFyhFTH5+XyBit8WMA8jg+sgOsOT pGwyMVBnfBzekT8A8U6BmX2LEKGQYeQPeT3HjZRtToiwJECqqmnHI16NMpv1JEEWuf2O TxfFWCVEBpeT/okqSevlxUTb/tNF+pp96cbUNMlA8Ylgyu0zt6K/yzIw3EPPeTgQKzWp X/blexVXNHXKlyXaG0aRnQ86LIdZU1S2OVT3jt4LM4zx43ffzXGEZewiG7DPmMnqLgl3 5JkA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:errors-to:sender:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:cc :mime-version:references:in-reply-to:message-id:date:subject:to:from :delivered-to:dkim-signature; bh=FIllbGoHvLfePiJ4hEeXgn2dg8GUAUTp5k702bSMnko=; b=ne+BrnybB25+/63AziC96degWU1NuBXUeD0uFJnqdLudzAnhisWYRRUYPiW1QIJ3ma 1dp9tHL/ic+xtTxzT12HUF4HKROBFAykyFfzDFOtKByO/V1x9VcIymKGYQE6NdbjKuQF 39l6QHbbVChhfweEHw5pWb2m21ZxHM8KwKvjJIvlyvSBiWM55GScLXWjaoDtPmLzPlOu 3h7T87r2FwJXe7M+d+xTw/y4Z+47ZMgd++JzXBtgXmT7UCC5wkU7yvDmQXKCAjtMVnJQ FevHrWSWT/g4UAaZxbgU4cwcyiSFDFppQn3cVGIRJnf1WMl+t0pNF2iqkeBXFq5kY6cO h8uQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=X9AfFVcJ; spf=pass (google.com: domain of libvir-list-bounces@redhat.com designates 207.211.31.120 as permitted sender) smtp.mailfrom=libvir-list-bounces@redhat.com; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=outlook.com Return-Path: Received: from us-smtp-1.mimecast.com (us-smtp-delivery-1.mimecast.com. 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Wed, 13 May 2020 10:50:14 +0000 From: Zhenyu Zheng To: libvir-list@redhat.com Subject: [PATCH V5 2/4] cpu: Add helper functions to parse vendor and model Date: Wed, 13 May 2020 18:48:32 +0800 Message-ID: In-Reply-To: <20200513104832.7390-1-zheng.zhenyu@outlook.com> References: <20200513104832.7390-1-zheng.zhenyu@outlook.com> X-ClientProxiedBy: HK2PR0401CA0023.apcprd04.prod.outlook.com (2603:1096:202:2::33) To TY2PR01MB3113.jpnprd01.prod.outlook.com (2603:1096:404:78::22) X-Microsoft-Original-Message-ID: <20200513104832.7390-3-zheng.zhenyu@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.8.114.27) by HK2PR0401CA0023.apcprd04.prod.outlook.com (2603:1096:202:2::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3000.24 via Frontend Transport; Wed, 13 May 2020 10:50:14 +0000 X-Microsoft-Original-Message-ID: <20200513104832.7390-3-zheng.zhenyu@outlook.com> X-TMN: [8y75GH8dcqBD5Z2yQCjTxY8S3dWHvTOV] X-MS-PublicTrafficType: Email X-IncomingHeaderCount: 50 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-Correlation-Id: 5747e434-4f7b-4b2a-70bf-08d7f72b6abb X-MS-Exchange-SLBlob-MailProps: mBRmoEB1kyL4voMrsTyEApS0tCh7wjsR7MDEl5fY9uySxqLLueamJ8vS2NKTa84OOljcuUbYyPb24j2jQkBszhSUq4NVjrLOIkh3xaBZ403Ps7gwFxhhepJ1AYdUhUnT8bHhtbpnk5pUuf4D0BRo8Ws9TQb/Lb3C+KAidi2VEPIgwLArBYDYy3XX6jwSlQmlg7FwnnWYEAPQO6EzZAGuVLl9/H12H3o9WlFzyN8EeiJ3qgBMS9Pd2gCUDr1YoEMQbZ6HlOiUUOEz7oh0mg/HsTHm1GsRQtRzSypiAUY4Y+HnpKbAXTN6sFsSh7mxEwQXSKkr5p3BmyQ4upvEwfIQJY+1JzXQifitcKvZLQnM36vBqbSDtfm4Zk289FkX2g9PXk0q2HfkqH/lmMBXC62+x68eCLPtRYo9IUF+TJS+E1Qr7XeqW9WN0U91ZJIBPQjAluXt9DqLfaJcBiAZexKfwW1u4OtAtoGFQcOrFcZQrnJ4lExcisifAjRR9ILd0S7Li1X2KAOg4IQf5gY+PlujBIz2IoH3eO0jguSsxOuW2SQ8IyU0YmNJwfR/JwL78Sd90JjwwF3JmLa4Vg9scI75RP1addgx4FHHnVx5UJ51oNLNagWrO10aD8FCnq1+Uv8MNUKqZBLifvmngnd33jlBa/B+aEzg/FYFIlhKjvmyP13ygkEHWxAArKOzHuzyxAYQn1zYpvsskT+8vzroIU0OAALK9Sfnhlb4MdpbGwAuKMPIqQKUL1HFGhRYh182B0qi57HT/zYiQCo= X-MS-TrafficTypeDiagnostic: SG2APC01HT108: X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Zhenyu Zheng --- src/cpu/cpu_arm.c | 159 +++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 158 insertions(+), 1 deletion(-) -- 2.20.1 diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c index 1bb0afb762..c7a6abfb22 100644 --- a/src/cpu/cpu_arm.c +++ b/src/cpu/cpu_arm.c @@ -165,6 +165,7 @@ virCPUarmMapFree(virCPUarmMapPtr map) virCPUarmVendorFree(map->vendors[i]); g_free(map->vendors); + g_ptr_array_free(map->features, TRUE); g_free(map); @@ -210,6 +211,160 @@ virCPUarmMapFeatureParse(xmlXPathContextPtr ctxt G_GNUC_UNUSED, return 0; } +static virCPUarmVendorPtr +virCPUarmVendorFindByID(virCPUarmMapPtr map, + unsigned long vendor_id) +{ + size_t i; + + for (i = 0; i < map->nvendors; i++) { + if (map->vendors[i]->value == vendor_id) + return map->vendors[i]; + } + + return NULL; +} + + +static virCPUarmVendorPtr +virCPUarmVendorFindByName(virCPUarmMapPtr map, + const char *name) +{ + size_t i; + + for (i = 0; i < map->nvendors; i++) { + if (STREQ(map->vendors[i]->name, name)) + return map->vendors[i]; + } + + return NULL; +} + + +static int +virCPUarmVendorParse(xmlXPathContextPtr ctxt, + const char *name, + void *data) +{ + virCPUarmMapPtr map = data; + g_autoptr(virCPUarmVendor) vendor = NULL; + + vendor = g_new0(virCPUarmVendor, 1); + vendor->name = g_strdup(name); + + if (virCPUarmVendorFindByName(map, vendor->name)) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("CPU vendor %s already defined"), + vendor->name); + return -1; + } + + if (virXPathULongHex("string(@value)", ctxt, &vendor->value) < 0) { + virReportError(VIR_ERR_INTERNAL_ERROR, + "%s", _("Missing CPU vendor value")); + return -1; + } + + if (virCPUarmVendorFindByID(map, vendor->value)) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("CPU vendor value 0x%2lx already defined"), + vendor->value); + return -1; + } + + if (VIR_APPEND_ELEMENT(map->vendors, map->nvendors, vendor) < 0) + return -1; + + return 0; +} + +static virCPUarmModelPtr +virCPUarmModelFind(virCPUarmMapPtr map, + const char *name) +{ + size_t i; + + for (i = 0; i < map->nmodels; i++) { + if (STREQ(map->models[i]->name, name)) + return map->models[i]; + } + + return NULL; +} + +#if defined(__aarch64__) +static virCPUarmModelPtr +virCPUarmModelFindByPVR(virCPUarmMapPtr map, + unsigned long pvr) +{ + size_t i; + + for (i = 0; i < map->nmodels; i++) { + if (map->models[i]->data.pvr == pvr) + return map->models[i]; + } + + return NULL; +} +#endif + +static int +virCPUarmModelParse(xmlXPathContextPtr ctxt, + const char *name, + void *data) +{ + virCPUarmMapPtr map = data; + virCPUarmModel *model; + g_autofree xmlNodePtr *nodes = NULL; + g_autofree char *vendor = NULL; + + model = g_new0(virCPUarmModel, 1); + model->name = g_strdup(name); + + if (virCPUarmModelFind(map, model->name)) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("CPU model %s already defined"), + model->name); + return -1; + } + + if (virXPathBoolean("boolean(./vendor)", ctxt)) { + vendor = virXPathString("string(./vendor/@name)", ctxt); + if (!vendor) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Invalid vendor element in CPU model %s"), + model->name); + return -1; + } + + if (!(model->vendor = virCPUarmVendorFindByName(map, vendor))) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Unknown vendor %s referenced by CPU model %s"), + vendor, model->name); + return -1; + } + } + + if (!virXPathBoolean("boolean(./pvr)", ctxt)) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Missing PVR information for CPU model %s"), + model->name); + return -1; + } + + if (virXPathULongHex("string(./pvr/@value)", ctxt, &model->data.pvr) < 0) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Missing or invalid PVR value in CPU model %s"), + model->name); + return -1; + } + + if (VIR_APPEND_ELEMENT(map->models, map->nmodels, model) < 0) + return -1; + + return 0; +} + static virCPUarmMapPtr virCPUarmLoadMap(void) { @@ -217,7 +372,8 @@ virCPUarmLoadMap(void) map = virCPUarmMapNew(); - if (cpuMapLoad("arm", NULL, virCPUarmMapFeatureParse, NULL, map) < 0) + if (cpuMapLoad("arm", virCPUarmVendorParse, virCPUarmMapFeatureParse, + virCPUarmModelParse, map) < 0) return NULL; return g_steal_pointer(&map); @@ -279,6 +435,7 @@ virCPUarmUpdate(virCPUDefPtr guest, return ret; } + static virCPUDefPtr virCPUarmBaseline(virCPUDefPtr *cpus, unsigned int ncpus G_GNUC_UNUSED, From patchwork Wed May 13 10:48:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenyu Zheng X-Patchwork-Id: 186589 Delivered-To: patch@linaro.org Received: by 2002:a92:5b0a:0:0:0:0:0 with SMTP id p10csp343512ilb; Wed, 13 May 2020 03:51:24 -0700 (PDT) X-Google-Smtp-Source: APiQypK9moxXYRNJqM6aseFMiZxKUofRRHp10hUtOIVMWukYcwS47HbcuCI+baL3KSsDBQak7jbu X-Received: by 2002:a25:afc3:: with SMTP id d3mr38781175ybj.419.1589367084542; Wed, 13 May 2020 03:51:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1589367084; cv=none; d=google.com; s=arc-20160816; b=POBofxWLnmVaSIwFQ9fL6D56YFIbSr4NjOQ3fjW+zJOat7lwj+tCx+FIT5UOkfr8eQ Tg6FA2rBhnlK/fN2XIIeLDxCUJtsgVzfKadjJ5sOFLVS7Nrf0XjT/2UB281+ahQgCFpS fbz1OMBxsDe2b1kqlfMlS5r140mCRvXwMyenQxKxwlnBjOCmvdu6ioIbWq2yjtuRGr1s MS/W6NfOuFIlwvKEfKS3Q1p2qWU+Uh8a5kX5DwpZisE8fc2yoGtMk1rBRfH2Uz9dUs3j +2to7CO3hrKY+JKyVoP9J9FMztMqviOEwIs3eKsI93O2s7diqZzP7mxIzF/eJct/RlPl v1yg== ARC-Message-Signature: i=1; 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Wed, 13 May 2020 10:50:46 +0000 From: Zhenyu Zheng To: libvir-list@redhat.com Subject: [PATCH V5 3/4] cpu: Introduce getHost support for ARM CPU driver Date: Wed, 13 May 2020 18:48:34 +0800 Message-ID: In-Reply-To: <20200513104832.7390-1-zheng.zhenyu@outlook.com> References: <20200513104832.7390-1-zheng.zhenyu@outlook.com> X-ClientProxiedBy: HK2PR0401CA0023.apcprd04.prod.outlook.com (2603:1096:202:2::33) To TY2PR01MB3113.jpnprd01.prod.outlook.com (2603:1096:404:78::22) X-Microsoft-Original-Message-ID: <20200513104832.7390-4-zheng.zhenyu@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.8.114.27) by HK2PR0401CA0023.apcprd04.prod.outlook.com (2603:1096:202:2::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3000.24 via Frontend Transport; Wed, 13 May 2020 10:50:45 +0000 X-Microsoft-Original-Message-ID: <20200513104832.7390-4-zheng.zhenyu@outlook.com> X-TMN: [c96o6RMYkEO323WwroZvuEa53UUTSyOn] X-MS-PublicTrafficType: Email X-IncomingHeaderCount: 50 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-Correlation-Id: d8460603-3228-4683-bd05-08d7f72b7d9e X-MS-Exchange-SLBlob-MailProps: mBRmoEB1kyL4voMrsTyEApS0tCh7wjsRI+BsF8zFIA1DbeTKfi5fTHKoxsHF+93+jU3Ru2OZcKFmbcuuSEDVoIZ/go6Q1lHdlhCjy5aX2HZChZtlP8zL1G0knvcDj/JdyTzMogDza5u9glIxc8rhr94VpyoqbIt9yYV73xobyL/pWu+mbT9XS2r3i2rswhyElGaQzFfGBdSn2yTtQG0sWoR48D2TPiwLwtxfWnHGze07StdD+LMv1FFhUPN1JlQ0s/7O54jMZvpwlht0H6SNwD/jNKTWddb0FE0yionmaEhAwwuZwVd0p2R0kTlNSom9AXmtf/hAS6ofx3pMkKiHJOqAeeJ3qFZBBdUECgaKNnpICXmwPy8+fNMssi0zJ0uiKHfYjFV+MsUQdNmNd1op7CnI/aWZfUonn4Jh7QFb6ZpaTylaqg49I9pt8dMsDeRskKhS/1abvf1j9JXEgtS6qRop4I/kp635AQ1yvPwJ75FubhZR24rpAuMhzqqOJ6CDi3JDc8RIx8sWWBoTtsMGTFZAsTuHj+uft7XZCZLdGe+qoPELv8zKTFhtxi9xFIsG53VjenpnHnJDfw0+pZpPfuz8aQzib6DQrLRNps5LmJJeCd9rSxkrilDwqnDdhFW7jftn7U7+Yz6D+ZDg2yqy1/hB7nz1ka2EYiv0BrQHn2r7geuYhafhG+Y+Jr9I2h6YbI+awQnRs3U95s935HCxJc63UA7I0yDiapknD1EF3yPOtZwOrzY0H4wB8dC2u/R02EnPrVNtMaY= X-MS-TrafficTypeDiagnostic: SG2APC01HT108: X-Microsoft-Antispam: BCL:0; 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These codes will only be compiled on aarch64 hardware. Signed-off-by: Zhenyu Zheng --- src/cpu/cpu_arm.c | 162 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 162 insertions(+) -- 2.20.1 diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c index c7a6abfb22..6aef568503 100644 --- a/src/cpu/cpu_arm.c +++ b/src/cpu/cpu_arm.c @@ -21,6 +21,10 @@ */ #include +#if defined(__aarch64__) +# include +# include +#endif #include "viralloc.h" #include "cpu.h" @@ -31,6 +35,13 @@ #include "virxml.h" #define VIR_FROM_THIS VIR_FROM_CPU +#if defined(__aarch64__) +/* Shift bit mask for parsing cpu flags */ +# define BIT_SHIFTS(n) (1UL << (n)) +/* The current max number of cpu flags on ARM is 32 */ +# define MAX_CPU_FLAGS 32 +#endif + VIR_LOG_INIT("cpu.cpu_arm"); @@ -486,11 +497,162 @@ virCPUarmValidateFeatures(virCPUDefPtr cpu) return 0; } +#if defined(__aarch64__) +/* Generate human readable flag list according to the order of */ +/* AT_HWCAP bit map */ +const char *aarch64_cpu_flags[MAX_CPU_FLAGS] = { + "fp", "asimd", "evtstrm", "aes", "pmull", "sha1", "sha2", + "crc32", "atomics", "fphp", "asimdhp", "cpuid", "asimdrdm", + "jscvt", "fcma", "lrcpc", "dcpop", "sha3", "sm3", "sm4", + "asimddp", "sha512", "sve", "asimdfhm", "dit", "uscat", + "ilrcpc", "flagm", "ssbs", "sb", "paca", "pacg"}; +/** + * virCPUarmCpuDataFromRegs: + * + * @data: 64-bit arm CPU specific data + * + * Fetches CPU vendor_id and part_id from MIDR_EL1 register, parse CPU + * flags from AT_HWCAP. There are currently 32 valid flags on ARM arch + * represented by each bit. + */ +static int +virCPUarmCpuDataFromRegs(virCPUarmData *data) +{ + unsigned long cpuid; + unsigned long hwcaps; + VIR_AUTOSTRINGLIST features = NULL; + int cpu_feature_index = 0; + size_t i; + + if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) { + virReportError(VIR_ERR_INTERNAL_ERROR, "%s", + _("CPUID registers unavailable")); + return -1; + } + + /* read the cpuid data from MIDR_EL1 register */ + asm("mrs %0, MIDR_EL1" : "=r" (cpuid)); + VIR_DEBUG("CPUID read from register: 0x%016lx", cpuid); + + /* parse the coresponding part_id bits */ + data->pvr = (cpuid >> 4) & 0xfff; + /* parse the coresponding vendor_id bits */ + data->vendor_id = (cpuid >> 24) & 0xff; + + hwcaps = getauxval(AT_HWCAP); + VIR_DEBUG("CPU flags read from register: 0x%016lx", hwcaps); + + features = g_new0(char *, MAX_CPU_FLAGS + 1); + + /* shift bit map mask to parse for CPU flags */ + for (i = 0; i < MAX_CPU_FLAGS; i++) { + if (hwcaps & BIT_SHIFTS(i)) { + features[cpu_feature_index] = g_strdup(aarch64_cpu_flags[i]); + cpu_feature_index++; + } + } + + if (cpu_feature_index > 0) { + data->features = g_steal_pointer(&features); + data->nfeatures = cpu_feature_index; + } + + return 0; +} + +static int +virCPUarmDecode(virCPUDefPtr cpu, + const virCPUarmData *cpuData, + virDomainCapsCPUModelsPtr models) +{ + size_t i; + virCPUarmMapPtr map; + virCPUarmModelPtr model; + virCPUarmVendorPtr vendor = NULL; + + if (!cpuData || !(map = virCPUarmGetMap())) + return -1; + + if (!(model = virCPUarmModelFindByPVR(map, cpuData->pvr))) { + virReportError(VIR_ERR_OPERATION_FAILED, + _("Cannot find CPU model with PVR 0x%03lx"), + cpuData->pvr); + return -1; + } + + if (!virCPUModelIsAllowed(model->name, models)) { + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, + _("CPU model %s is not supported by hypervisor"), + model->name); + return -1; + } + + cpu->model = g_strdup(model->name); + + if (cpuData->vendor_id && + !(vendor = virCPUarmVendorFindByID(map, cpuData->vendor_id))) { + virReportError(VIR_ERR_OPERATION_FAILED, + _("Cannot find CPU vendor with vendor id 0x%02lx"), + cpuData->vendor_id); + return -1; + } + + if (vendor) + cpu->vendor = g_strdup(vendor->name); + + if (cpuData->nfeatures) { + cpu->nfeatures = cpuData->nfeatures; + if (VIR_ALLOC_N(cpu->features, cpu->nfeatures) < 0) + goto error; + for (i = 0; i < cpu->nfeatures; i++) { + cpu->features[i].policy = VIR_CPU_FEATURE_REQUIRE; + cpu->features[i].name = g_strdup(cpuData->features[i]); + } + } + + return 0; + + error: + for (i = 0; i < cpu->nfeatures; i++) + VIR_FREE(cpu->features[i].name); + VIR_FREE(cpu->features); + cpu->nfeatures = 0; + return -1; +} + +static int +virCPUarmGetHost(virCPUDefPtr cpu, + virDomainCapsCPUModelsPtr models) +{ + virCPUDataPtr cpuData = NULL; + int ret = -1; + + if (virCPUarmDriverInitialize() < 0) + goto cleanup; + + if (!(cpuData = virCPUDataNew(archs[0]))) + goto cleanup; + + if (virCPUarmCpuDataFromRegs(&cpuData->data.arm) < 0) + goto cleanup; + + ret = virCPUarmDecode(cpu, &cpuData->data.arm, models); + + cleanup: + virCPUarmDataFree(cpuData); + return ret; +} +#endif + + struct cpuArchDriver cpuDriverArm = { .name = "arm", .arch = archs, .narch = G_N_ELEMENTS(archs), .compare = virCPUarmCompare, +#if defined(__aarch64__) + .getHost = virCPUarmGetHost, +#endif .decode = NULL, .encode = NULL, .dataFree = virCPUarmDataFree, From patchwork Wed May 13 10:48:36 2020 Content-Type: text/plain; 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Wed, 13 May 2020 10:51:19 +0000 From: Zhenyu Zheng To: libvir-list@redhat.com Subject: [PATCH V5 4/4] cpu_map: Introduce ARM cpu models Date: Wed, 13 May 2020 18:48:36 +0800 Message-ID: In-Reply-To: <20200513104832.7390-1-zheng.zhenyu@outlook.com> References: <20200513104832.7390-1-zheng.zhenyu@outlook.com> X-ClientProxiedBy: HK2PR0401CA0023.apcprd04.prod.outlook.com (2603:1096:202:2::33) To TY2PR01MB3113.jpnprd01.prod.outlook.com (2603:1096:404:78::22) X-Microsoft-Original-Message-ID: <20200513104832.7390-5-zheng.zhenyu@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.8.114.27) by HK2PR0401CA0023.apcprd04.prod.outlook.com (2603:1096:202:2::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3000.24 via Frontend Transport; Wed, 13 May 2020 10:51:18 +0000 X-Microsoft-Original-Message-ID: <20200513104832.7390-5-zheng.zhenyu@outlook.com> X-TMN: [4nlUi0P0v3n1tIZTLOWIEFPmChbFO6Bi] X-MS-PublicTrafficType: Email X-IncomingHeaderCount: 50 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-Correlation-Id: 4f1108cf-441c-4dfe-78f2-08d7f72b9156 X-MS-Exchange-SLBlob-MailProps: 7MJMDUNTCty0fTAjqHZNxEFXAS6g32bIo7O1Ng7ycYWrNqcZQxaLwYKMMMv3Q0stpVZK9gbCIALGtm52qg+L/yMkzmBF/bvZ4gGjiY/RaklYTfVWgg2Aj0LL1nOodzmsGyst4sWQhHZAV2h/Yz6UuHGJ2aIL/upLHgBzJBluflPaGS8m5v9sOCcGBTxkSI+2K5ErVPk5DHkpUDJB/cSgXSuddibXzy6TDngjgpc9n24NKGC6bZrDpMQw/M/ApYShIDtF+4kqGih4GmJKDruAhmljIC1qDiJSwY5+b/QUpL8NLCAPGqm2ShHE0WzqGxSIcT30BU0gG8h56pWH+fn632W/6psC3D3TJZz72YU+IwoOTO3L1feMLLU9wf9qoby0bDR0mBik77Wf5Y6UQ47OCJDLDyXrec5oTm1O9fbCPHVPzoSwdtJLaRuwuJ3OEFfwlAVVjwm3ZxUnFyERv9n7A8+dxVmtkpv86ziHsmQatXaS4LonWce8XXQET4DJ8DieXKEG1pg3YD1F538XkscgwFaboe7fYQucWQV3tISlezXH3Y2Cs6DI26gHBBZzjv+sOQVrGg0p3vvCPqgEka6jxBJ3cSWPhacFk+t5fNivmO+sS2fdiSql7e+PTSVUuAFfL9/GImFxqwdsUDMtbs+Ks5s7Hh0fulxfVG1UR5dEk8hzpyiEXY9p6Kuudku0PUmjgX2dp45NAk4D5qJpi9K2Ri3DyhkvC3dFCSgJEJoSgRB+T8hYMZowoA== X-MS-TrafficTypeDiagnostic: SG2APC01HT095: X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Zhenyu Zheng --- src/cpu_map/Makefile.inc.am | 7 +++++++ src/cpu_map/arm_Falkor.xml | 6 ++++++ src/cpu_map/arm_Kunpeng-920.xml | 6 ++++++ src/cpu_map/arm_ThunderX299xx.xml | 6 ++++++ src/cpu_map/arm_cortex-a53.xml | 6 ++++++ src/cpu_map/arm_cortex-a57.xml | 6 ++++++ src/cpu_map/arm_cortex-a72.xml | 6 ++++++ src/cpu_map/arm_vendors.xml | 14 ++++++++++++++ src/cpu_map/index.xml | 15 +++++++++++++++ 9 files changed, 72 insertions(+) create mode 100644 src/cpu_map/arm_Falkor.xml create mode 100644 src/cpu_map/arm_Kunpeng-920.xml create mode 100644 src/cpu_map/arm_ThunderX299xx.xml create mode 100644 src/cpu_map/arm_cortex-a53.xml create mode 100644 src/cpu_map/arm_cortex-a57.xml create mode 100644 src/cpu_map/arm_cortex-a72.xml create mode 100644 src/cpu_map/arm_vendors.xml -- 2.20.1 Signed-off-by: Zhenyu Zheng <zheng.zhenyu@outlook.com>
diff --git a/src/cpu_map/Makefile.inc.am b/src/cpu_map/Makefile.inc.am index be64c9a0d4..5d9190e27d 100644 --- a/src/cpu_map/Makefile.inc.am +++ b/src/cpu_map/Makefile.inc.am @@ -2,7 +2,14 @@ cpumapdir = $(pkgdatadir)/cpu_map cpumap_DATA = \ + cpu_map/arm_cortex-a53.xml \ + cpu_map/arm_cortex-a57.xml \ + cpu_map/arm_cortex-a72.xml \ cpu_map/arm_features.xml \ + cpu_map/arm_Kunpeng-920.xml \ + cpu_map/arm_ThunderX299xx.xml \ + cpu_map/arm_Falkor.xml \ + cpu_map/arm_vendors.xml \ cpu_map/index.xml \ cpu_map/ppc64_vendors.xml \ cpu_map/ppc64_POWER7.xml \ diff --git a/src/cpu_map/arm_Falkor.xml b/src/cpu_map/arm_Falkor.xml new file mode 100644 index 0000000000..b8f34bbc02 --- /dev/null +++ b/src/cpu_map/arm_Falkor.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/src/cpu_map/arm_Kunpeng-920.xml b/src/cpu_map/arm_Kunpeng-920.xml new file mode 100644 index 0000000000..e06d4744fc --- /dev/null +++ b/src/cpu_map/arm_Kunpeng-920.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/src/cpu_map/arm_ThunderX299xx.xml b/src/cpu_map/arm_ThunderX299xx.xml new file mode 100644 index 0000000000..6c0864f601 --- /dev/null +++ b/src/cpu_map/arm_ThunderX299xx.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/src/cpu_map/arm_cortex-a53.xml b/src/cpu_map/arm_cortex-a53.xml new file mode 100644 index 0000000000..3580236253 --- /dev/null +++ b/src/cpu_map/arm_cortex-a53.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/src/cpu_map/arm_cortex-a57.xml b/src/cpu_map/arm_cortex-a57.xml new file mode 100644 index 0000000000..3bc4324173 --- /dev/null +++ b/src/cpu_map/arm_cortex-a57.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/src/cpu_map/arm_cortex-a72.xml b/src/cpu_map/arm_cortex-a72.xml new file mode 100644 index 0000000000..c509a40567 --- /dev/null +++ b/src/cpu_map/arm_cortex-a72.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/src/cpu_map/arm_vendors.xml b/src/cpu_map/arm_vendors.xml new file mode 100644 index 0000000000..703c2112b1 --- /dev/null +++ b/src/cpu_map/arm_vendors.xml @@ -0,0 +1,14 @@ + + + + + + + + + + + + + + diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml index 50b030de29..20646a031c 100644 --- a/src/cpu_map/index.xml +++ b/src/cpu_map/index.xml @@ -85,6 +85,21 @@ + + + + + + + + + + + + + + +