From patchwork Mon Apr 28 07:38:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ze Huang X-Patchwork-Id: 886021 Received: from mail-m155101.qiye.163.com (mail-m155101.qiye.163.com [101.71.155.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B98611A3178; Mon, 28 Apr 2025 07:38:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=101.71.155.101 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745825919; cv=none; b=Qi8p4THLW9Co4e+pK7AtptMBYM3sZBPjyDT99XrSVpnTG+IKgPCfsqgwtpnKJ6X0nXCS1/WEgiA6RGm+eI+kjqAQTj3txiKORYRjZ3s6SyvP6VY4uxdbJCaijyXjLUB36qUXJczY5WBA4J3wweRzgmDBpibRAnLPOImpzHO77Zk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745825919; c=relaxed/simple; bh=CoIzsEZMyr39KazbVfZyOeCYt7jqNxYasrhcXgzRiw4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ErDUScjpnRb0BXKVfDSKBVjmybTt1InBJBoxVP718KtezR6tEU8s9J9lLPJqaA8ikcCmrajI1J3BG9os57jaP4Y8C6HEV73wIlQ7/J8Ix5+etj9cuLFWw3YW9PbVMJ0Ux2IsZ64dWfHaiMv/KB/FQI6dt4qcx0XOYHaaJ4jd7bI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=whut.edu.cn; spf=pass smtp.mailfrom=whut.edu.cn; arc=none smtp.client-ip=101.71.155.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=whut.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=whut.edu.cn Received: from [127.0.0.1] (gy-adaptive-ssl-proxy-4-entmail-virt151.gy.ntes [27.18.99.221]) by smtp.qiye.163.com (Hmail) with ESMTP id 135f5a5ad; Mon, 28 Apr 2025 15:38:23 +0800 (GMT+08:00) From: Ze Huang Date: Mon, 28 Apr 2025 15:38:11 +0800 Subject: [PATCH 1/2] dt-bindings: usb: dwc3: add support for SpacemiT K1 Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250428-b4-k1-dwc3-v2-v1-1-7cb061abd619@whut.edu.cn> References: <20250428-b4-k1-dwc3-v2-v1-0-7cb061abd619@whut.edu.cn> In-Reply-To: <20250428-b4-k1-dwc3-v2-v1-0-7cb061abd619@whut.edu.cn> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org, Ze Huang X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1745825898; l=3090; i=huangze@whut.edu.cn; s=20250325; h=from:subject:message-id; bh=CoIzsEZMyr39KazbVfZyOeCYt7jqNxYasrhcXgzRiw4=; b=VafuAbLYli3pLw7uTELkEWZhH9nZF4oxDPYqog6wNcJ/qkjnoib83skFt6u+36RbW6MV0XFTZ t2c4+FrBmEEBkbMc/VRWy173JhQl4W2c2DjlpU14exHyIU01l36kPzX X-Developer-Key: i=huangze@whut.edu.cn; a=ed25519; pk=C3zfn/kH6oMJickaXBa8dxTZO68EBiD93F+tAenboRA= X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlDTE9PVkpNTElIQ04ZHUgfQ1YeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlJTFVKQ1VCQlVJSUpZV1kWGg8SFR0UWUFZT0tIVUpLSEpOTE5VSktLVUpCS0 tZBg++ X-HM-Tid: 0a967b55360e03a1kunm135f5a5ad X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6NzI6ASo*DjIBFTU0HyIvAUJL MjgaCxpVSlVKTE9OQ0lOQktCT0NPVTMWGhIXVRMOGhUcAR47DBMOD1UeHw5VGBVFWVdZEgtZQVlJ TFVKQ1VCQlVJSUpZV1kIAVlBT05JTzcG Add support for the USB 3.0 Dual-Role Device (DRD) controller embedded in the SpacemiT K1 SoC. The controller is based on the Synopsys DesignWare Core USB 3 (DWC3) IP, supporting both Host and Device modes for USB 3.0 and USB 2.0 standards. Signed-off-by: Ze Huang --- .../devicetree/bindings/usb/spacemit,k1-dwc3.yaml | 95 ++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml new file mode 100644 index 0000000000000000000000000000000000000000..5aece388900fa5bda9acb19add658310064bef8f --- /dev/null +++ b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/spacemit,k1-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 SuperSpeed DWC3 USB SoC Controller + +maintainers: + - Ze Huang + +description: | + The SpacemiT K1 embeds a DWC3 USB IP Core which supports both Host and Device + functions for USB 3.0 and USB 2.0 standards. + + Key features: + - USB3.0 SuperSpeed and USB2.0 High/Full/Low-Speed support + - Supports low-power modes (USB2.0 suspend, USB3.0 U1/U2/U3) + - Internal DMA controller and flexible endpoint FIFO sizing + + Communication Interface: + - Use of PIPE3 (125MHz) interface for USB3.0 PHY + - Use of UTMI+ (30/60MHz) interface for USB2.0 PHY + + The common content of the node is defined in snps,dwc3.yaml. + +select: + properties: + compatible: + contains: + enum: + - spacemit,k1-dwc3 + required: + - compatible + +properties: + compatible: + items: + - enum: + - spacemit,k1-dwc3 + - const: snps,dwc3 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: bus_early + + resets: + maxItems: 1 + + interrupts: + maxItems: 1 + + interconnects: + maxItems: 1 + description: + On SpacemiT K1, USB performs DMA through bus other than parent DT node. + The 'interconnects' property explicitly describes this path, ensuring + correct address translation. + + interconnect-names: + const: dma-mem + + vbus-supply: + description: A phandle to the regulator supplying the VBUS voltage. + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - interrupts + - interconnects + - interconnect-names + +additionalProperties: false + +examples: + - | + usb@c0a00000 { + compatible = "spacemit,k1-dwc3", "snps,dwc3"; + reg = <0xc0a00000 0x10000>; + clocks = <&syscon_apmu 16>; + clock-names = "bus_early"; + resets = <&syscon_apmu 8>; + interrupt-parent = <&plic>; + interrupts = <125>; + interconnects = <&dram_range0>; + interconnect-names = "dma-mem"; + }; From patchwork Mon Apr 28 07:38:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ze Huang X-Patchwork-Id: 885689 Received: from mail-m49197.qiye.163.com (mail-m49197.qiye.163.com [45.254.49.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 352F71DF25C; Mon, 28 Apr 2025 07:38:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745825921; cv=none; b=J3aQLsP2SjX95FenP+Q2UP29x/o05/uPBbnUZ7+w4cIy6/aZGJFOdGF3wvGTZWdWROn739kjVHXZPqXKlhq2mVk5Pd3oUdiaOyxBtBQlZWPLW0klH4REB9Xi3wi3FTJBycQB9hTio9Fb+L/JKr+xmjh4/VnaB/DIgXg/s0zT2uQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745825921; c=relaxed/simple; bh=InIXD7r3QEA4Imaa5hfJxxveIupBNNwLiowBxO1GqwI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dJhQ2mvdLnykjRb+4HPitmio3bmQpZs+pB+BVRCSeSsNCVyAQW/tTvGXC33aW3PLCwhVjhZCdTvfhtHwm4eDxpsa74plFeWqPxihTHZx7VoFMuxFgVU613xHKHPVIdPExUbiHj7wa47BKRAY6KiUSkm38psZWB5Sll6a9sC3bDM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=whut.edu.cn; spf=pass smtp.mailfrom=whut.edu.cn; arc=none smtp.client-ip=45.254.49.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=whut.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=whut.edu.cn Received: from [127.0.0.1] (gy-adaptive-ssl-proxy-4-entmail-virt151.gy.ntes [27.18.99.221]) by smtp.qiye.163.com (Hmail) with ESMTP id 135f5a5b2; Mon, 28 Apr 2025 15:38:29 +0800 (GMT+08:00) From: Ze Huang Date: Mon, 28 Apr 2025 15:38:12 +0800 Subject: [PATCH 2/2] riscv: dts: spacemit: add usb3.0 support for K1 Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250428-b4-k1-dwc3-v2-v1-2-7cb061abd619@whut.edu.cn> References: <20250428-b4-k1-dwc3-v2-v1-0-7cb061abd619@whut.edu.cn> In-Reply-To: <20250428-b4-k1-dwc3-v2-v1-0-7cb061abd619@whut.edu.cn> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org, Ze Huang X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1745825898; l=5014; i=huangze@whut.edu.cn; s=20250325; h=from:subject:message-id; bh=InIXD7r3QEA4Imaa5hfJxxveIupBNNwLiowBxO1GqwI=; b=IVfVOwaQj6raMnn3pxzQq/Z5hW8EmniGXVFBYWWgBkuhaPyJosKcypBUPs9krGJC/WaEpZSXH g0XSnjXfbyPBOsVE0dwyudwOj9rp5Y94ilY2y+LAE7gUYrt2EQuPpWV X-Developer-Key: i=huangze@whut.edu.cn; a=ed25519; pk=C3zfn/kH6oMJickaXBa8dxTZO68EBiD93F+tAenboRA= X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkaSU5NVhhDSksYHUlIGkhPSVYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlJTFVKQ1VCQlVJSUpZV1kWGg8SFR0UWUFZT0tIVUpLSEpOTE5VSktLVUpCS0 tZBg++ X-HM-Tid: 0a967b554daa03a1kunm135f5a5b2 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6Nwg6Ohw5HjJIPzUXDyFLAVYo KB5PCRhVSlVKTE9OQ0lOQkpOTkhKVTMWGhIXVRMOGhUcAR47DBMOD1UeHw5VGBVFWVdZEgtZQVlJ TFVKQ1VCQlVJSUpZV1kIAVlBTU9PTzcG Add USB 3.0 support for the SpacemiT K1 SoC, including the following components: - USB 2.0 PHY nodes - USB 3.0 combo PHY node - USB 3.0 host controller - USB 3.0 hub and vbus regulator (usb3_vhub, usb3_vbus) - DRAM interconnect node for USB DMA ("dma-mem") The `usb3_vbus` and `usb3_vhub` regulator node provides a fixed 5V supply to power the onboard USB 3.0 hub and usb vbus. On K1, some DMA transfers from devices to memory use separate buses with different DMA address translation rules from the parent node. We express this relationship through the interconnects node("dma-mem"). Signed-off-by: Ze Huang --- arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts | 52 +++++++++++++++++++++++ arch/riscv/boot/dts/spacemit/k1.dtsi | 56 +++++++++++++++++++++++++ 2 files changed, 108 insertions(+) diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts index 816ef1bc358ec490aff184d5915d680dbd9f00cb..0c0bf572d31e056955eb2ff377c3262271dcc156 100644 --- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts +++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts @@ -28,6 +28,25 @@ led1 { default-state = "on"; }; }; + + usb3_vhub: regulator-vhub-5v { + compatible = "regulator-fixed"; + regulator-name = "USB30_VHUB"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio K1_GPIO(123) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + usb3_vbus: regulator-vbus-5v { + compatible = "regulator-fixed"; + regulator-name = "USB30_VBUS"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + gpio = <&gpio K1_GPIO(97) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &uart0 { @@ -35,3 +54,36 @@ &uart0 { pinctrl-0 = <&uart0_2_cfg>; status = "okay"; }; + +&usbphy2 { + status = "okay"; +}; + +&combphy { + status = "okay"; +}; + +&usb_dwc3 { + dr_mode = "host"; + phy_type = "utmi"; + snps,hsphy_interface = "utmi"; + snps,dis_enblslpm_quirk; + snps,dis-u1u2-quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,dis_rxdet_inp3_quirk; + snps,xhci-trb-ent-quirk; + vbus-supply = <&usb3_vbus>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + hub@1 { + compatible = "usb2109,817"; + reg = <0x1>; + vdd-supply = <&usb3_vhub>; + reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>; + }; +}; diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi index c0cc4b99c9356d550a470291dba9f2625b10f8df..c7b86c850da969e5412ad42c63995cd20b4d0484 100644 --- a/arch/riscv/boot/dts/spacemit/k1.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi @@ -4,6 +4,8 @@ */ #include +#include +#include /dts-v1/; / { @@ -346,6 +348,13 @@ soc { dma-noncoherent; ranges; + dram_range0: dram-range@0 { + #address-cells = <2>; + #size-cells = <2>; + dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; + #interconnect-cells = <0>; + }; + syscon_rcpu: system-controller@c0880000 { compatible = "spacemit,k1-syscon-rcpu"; reg = <0x0 0xc0880000 0x0 0x2048>; @@ -358,6 +367,53 @@ syscon_rcpu2: system-controller@c0888000 { #reset-cells = <1>; }; + usb_dwc3: usb@c0a00000 { + compatible = "spacemit,k1-dwc3", "snps,dwc3"; + reg = <0x0 0xc0a00000 0x0 0x10000>; + clocks = <&syscon_apmu CLK_USB30>; + clock-names = "bus_early"; + resets = <&syscon_apmu RESET_USB3_0>; + interrupt-parent = <&plic>; + interrupts = <125>; + interconnects = <&dram_range0>; + interconnect-names = "dma-mem"; + phys = <&usbphy2>, <&combphy PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + status = "disabled"; + }; + + usbphy0: phy@c0940000 { + compatible = "spacemit,usb2-phy"; + reg = <0x0 0xc0940000 0x0 0x200>; + clocks = <&syscon_apmu CLK_USB_AXI>; + status = "disabled"; + }; + + usbphy1: phy@c09c0000 { + compatible = "spacemit,usb2-phy"; + reg = <0x0 0xc09c0000 0x0 0x200>; + clocks = <&syscon_apmu CLK_USB_P1>; + status = "disabled"; + }; + + usbphy2: phy@0xc0a30000 { + compatible = "spacemit,k1-usb2-phy"; + reg = <0x0 0xc0a30000 0x0 0x200>; + clocks = <&syscon_apmu CLK_USB30>; + #phy-cells = <0>; + status = "disabled"; + }; + + combphy: phy@c0b10000 { + compatible = "spacemit,k1-combphy"; + reg = <0x0 0xc0b10000 0x0 0x800>, + <0x0 0xd4282910 0x0 0x400>; + reg-names = "ctrl", "sel"; + resets = <&syscon_apmu RESET_PCIE0>; + #phy-cells = <1>; + status = "disabled"; + }; + syscon_apbc: system-control@d4015000 { compatible = "spacemit,k1-syscon-apbc"; reg = <0x0 0xd4015000 0x0 0x1000>;