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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-32029017825sm4675301fa.40.2025.05.02.13.41.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 May 2025 13:41:50 -0700 (PDT) From: Vladimir Zapolskiy To: Bryan O'Donoghue , Robert Foss , Todor Tomov , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 1/3] dt-bindings: media: qcom,x1e80100-camss: Tighten the property regex pattern Date: Fri, 2 May 2025 23:41:40 +0300 Message-ID: <20250502204142.2064496-2-vladimir.zapolskiy@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250502204142.2064496-1-vladimir.zapolskiy@linaro.org> References: <20250502204142.2064496-1-vladimir.zapolskiy@linaro.org> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 There are 4 CSIPHY ports on X1E80100, it'd be preferred to tinker a too loose the regexp, which covers all these port names. Signed-off-by: Vladimir Zapolskiy --- .../devicetree/bindings/media/qcom,x1e80100-camss.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml index 113565cf2a99..680f3f514132 100644 --- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml @@ -133,7 +133,7 @@ properties: CSI input ports. patternProperties: - "^port@[0-3]+$": + "^port@[0-3]$": $ref: /schemas/graph.yaml#/$defs/port-base unevaluatedProperties: false From patchwork Fri May 2 20:41:41 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Zapolskiy X-Patchwork-Id: 886843 Received: from mail-lj1-f179.google.com (mail-lj1-f179.google.com [209.85.208.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A1131FE45A for ; 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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-32029017825sm4675301fa.40.2025.05.02.13.41.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 May 2025 13:41:53 -0700 (PDT) From: Vladimir Zapolskiy To: Bryan O'Donoghue , Robert Foss , Todor Tomov , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/3] dt-bindings: media: qcom,x1e80100-camss: Add optional bus-type property Date: Fri, 2 May 2025 23:41:41 +0300 Message-ID: <20250502204142.2064496-3-vladimir.zapolskiy@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250502204142.2064496-1-vladimir.zapolskiy@linaro.org> References: <20250502204142.2064496-1-vladimir.zapolskiy@linaro.org> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Since CSIPHY IP on modern Qualcomm SoCs supports D-PHY and C-PHY interfaces, it might be necessary to specify it explicitly for some particular devices. Signed-off-by: Vladimir Zapolskiy --- .../devicetree/bindings/media/qcom,x1e80100-camss.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml index 680f3f514132..2e7455bd75ec 100644 --- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml @@ -153,6 +153,11 @@ properties: minItems: 1 maxItems: 4 + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + required: - clock-lanes - data-lanes From patchwork Fri May 2 20:41:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Zapolskiy X-Patchwork-Id: 887059 Received: from mail-lf1-f48.google.com (mail-lf1-f48.google.com [209.85.167.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4EB601FE45A for ; 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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-32029017825sm4675301fa.40.2025.05.02.13.41.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 May 2025 13:41:56 -0700 (PDT) From: Vladimir Zapolskiy To: Bryan O'Donoghue , Robert Foss , Todor Tomov , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 3/3] dt-bindings: media: qcom,x1e80100-camss: Remove clock-lanes port property Date: Fri, 2 May 2025 23:41:42 +0300 Message-ID: <20250502204142.2064496-4-vladimir.zapolskiy@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250502204142.2064496-1-vladimir.zapolskiy@linaro.org> References: <20250502204142.2064496-1-vladimir.zapolskiy@linaro.org> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Since clock lanes under CSIPHY are hard-wired and non-selectable, it makes sense to remove this port property. The change follows the same logic as found in commit 336136e197e2 ("media: dt-bindings: media: camss: Remove clock-lane property"). Signed-off-by: Vladimir Zapolskiy --- .../devicetree/bindings/media/qcom,x1e80100-camss.yaml | 5 ----- 1 file changed, 5 deletions(-) diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml index 2e7455bd75ec..c101e42f22ac 100644 --- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml @@ -146,9 +146,6 @@ properties: unevaluatedProperties: false properties: - clock-lanes: - maxItems: 1 - data-lanes: minItems: 1 maxItems: 4 @@ -159,7 +156,6 @@ properties: - 4 # MEDIA_BUS_TYPE_CSI2_DPHY required: - - clock-lanes - data-lanes required: @@ -362,7 +358,6 @@ examples: port@0 { reg = <0>; csiphy_ep0: endpoint { - clock-lanes = <7>; data-lanes = <0 1>; remote-endpoint = <&sensor_ep>; };