From patchwork Tue May 6 09:22:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 887975 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D9D7D265CDF; Tue, 6 May 2025 09:23:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746523389; cv=none; b=GTdGtK8MGWxD4sYc9cpg7R3t8foymKLZF79E57SfKRSkgpDj/MK9V6AJVggqvcmH6Dfhz+HCbH2IkCuPU1E7kQ5+V6BHF/2Pkq6yHam29WHUsjsyYG1XIpgMg0CFoPt/Di++kRqH37WY5c0fNRM0f1Kfcz3K6UXRETB+8+Sj/Ao= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746523389; c=relaxed/simple; bh=6edIhBaoWOfTotZiCQe2Htao2lyDgYNn+iXUNDszYqs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UGCxM3Z1an8EQm3M80Z4AjEU4u9t8KupsVc4c45B+ei60DMEegsmlhZYimRnCK9pby6cF1+ZrZUjt1c9qG1VtLSU0rauasdeFA8GLf62VQ9NkielsmJZsgB7rUngxOaCzJYspsdDos6w8ORkEUcyBRqW/Fktg7/ZbslExaVFJAQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org; spf=pass smtp.mailfrom=disroot.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b=PEXv7FAk; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="PEXv7FAk" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id C1D7725DAD; Tue, 6 May 2025 11:23:05 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id zlEt75JLCS3Q; Tue, 6 May 2025 11:23:05 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1746523383; bh=6edIhBaoWOfTotZiCQe2Htao2lyDgYNn+iXUNDszYqs=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=PEXv7FAkxF4Xaa98EkEnBJK1K56wPSHTU6h3KDcDodfS1SefgI90HkoQkjRXl9ppj 8Ix9WzY/s+fAyzLvmbZmP6siIXGYWRDwcIzJGFkPeSRJDkZO8Ibf5aLiX/6QLjRZNJ 6tc+AsN4A4FPklIPjI4A/btU9LSUAiYfjqEu8bJU0ajsdEcdxoPMV88wYV151zKhkG bEG++nFZDsrt+hvpkFl8kydzf9S2oEwm74djD07VmMSEkzmwyu11AFrjG82pREBdYZ PU93gdXc9XknOZEzjALI1jmJan6D+/lqWPMUlhXUeK3HRBbQO3qKGmwQU6i6PeOoP8 GHF2kerJMDVDQ== From: Yao Zi To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Turquette , Stephen Boyd , Shresth Prasad , Cristian Ciocaltea , Detlev Casanova , Jonas Karlman , Chukun Pan Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yao Zi , Krzysztof Kozlowski Subject: [PATCH v5 1/5] dt-bindings: clock: Add GRF clock definition for RK3528 Date: Tue, 6 May 2025 09:22:02 +0000 Message-ID: <20250506092206.46143-2-ziyao@disroot.org> In-Reply-To: <20250506092206.46143-1-ziyao@disroot.org> References: <20250506092206.46143-1-ziyao@disroot.org> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 These clocks are for SD/SDIO tuning purpose and come with registers in GRF syscon. Signed-off-by: Yao Zi Acked-by: Krzysztof Kozlowski --- include/dt-bindings/clock/rockchip,rk3528-cru.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/dt-bindings/clock/rockchip,rk3528-cru.h b/include/dt-bindings/clock/rockchip,rk3528-cru.h index 55a448f5ed6d..0245a53fc334 100644 --- a/include/dt-bindings/clock/rockchip,rk3528-cru.h +++ b/include/dt-bindings/clock/rockchip,rk3528-cru.h @@ -414,6 +414,12 @@ #define MCLK_I2S2_2CH_SAI_SRC_PRE 402 #define MCLK_I2S3_8CH_SAI_SRC_PRE 403 #define MCLK_SDPDIF_SRC_PRE 404 +#define SCLK_SDMMC_DRV 405 +#define SCLK_SDMMC_SAMPLE 406 +#define SCLK_SDIO0_DRV 407 +#define SCLK_SDIO0_SAMPLE 408 +#define SCLK_SDIO1_DRV 409 +#define SCLK_SDIO1_SAMPLE 410 /* scmi-clocks indices */ #define SCMI_PCLK_KEYREADER 0 From patchwork Tue May 6 09:22:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 888746 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39DF326B2D3; Tue, 6 May 2025 09:23:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746523394; cv=none; b=cU0PXc2zP8l0AbGFJ76WK8ssap5v3vW63KZ+9vvXWF5cr61QPYLbeTINQEYYN7GwtT/qpr8aDBitHMPwohDTZPldd6HEJx5MDRrTaCtp77poi+bl5c1e/6oGoTudlWOaE4LwKtxIJepu+yf9QUCbxRLOcIE1reRktQBxI9//Ki8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746523394; c=relaxed/simple; bh=KooZtKiKIS4kYyX45xKSekDnpaeKvpGX35KgXvdXVHQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=onObgsxwp5JrrUZkJtxG6QeNoZXwVxMg9C2cj0oXERje1nheJ/lpHTemNTVmhCNzfxeKZxZaQs9Ud1diGCSXVxUiFyfoqAYYzV8fqDQYnbk/aUWlk2vU0qk1a57SrR34/2RkRh+4/OCH9pnKmRUx9oM5+4Meg61/zPrVFPPETJ8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org; spf=pass smtp.mailfrom=disroot.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b=ed7ByAIg; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="ed7ByAIg" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 9AE7E20731; Tue, 6 May 2025 11:23:10 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id k22TyXZw3tdZ; Tue, 6 May 2025 11:23:09 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1746523389; bh=KooZtKiKIS4kYyX45xKSekDnpaeKvpGX35KgXvdXVHQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=ed7ByAIgowDl7L0wG80IcxpsdGwUKPtgYkC0yox0lGF7IbJbHwXQskqS0yUH293Hr PsCtNUxUGCEUrajTEArkxU8PveJb/P0b1hCZBWiQb5IMC/Tp8IcRqqyY20LqqgErK9 OCtxQ4rILSDLBgKjc9V5jvEJ9R6cQwJj5Dgor4jhaLcaV2TJi1+2KlwBrn1mVb9eB0 DLRVf1DlbGCFBgqJ/PayVoZvYXHsJlmb8F0HwBFg09Mn7+WUsHLKIc98bEwsHmjCN1 HNa+QjwNXoLl3VbHfw/Csh7OESXIS7mQQ0u/VelPLqs2rAdiz5sM8uRMmKo+GlEq9H O0dgixJFL0dPw== From: Yao Zi To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Turquette , Stephen Boyd , Shresth Prasad , Cristian Ciocaltea , Detlev Casanova , Jonas Karlman , Chukun Pan Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yao Zi Subject: [PATCH v5 2/5] clk: rockchip: Support MMC clocks in GRF region Date: Tue, 6 May 2025 09:22:03 +0000 Message-ID: <20250506092206.46143-3-ziyao@disroot.org> In-Reply-To: <20250506092206.46143-1-ziyao@disroot.org> References: <20250506092206.46143-1-ziyao@disroot.org> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Registers of MMC drive/sample clocks in Rockchip RV1106 and RK3528 locate in GRF regions. Adjust MMC clock code to support register operations through regmap. Signed-off-by: Yao Zi --- drivers/clk/rockchip/clk-mmc-phase.c | 24 ++++++++++++++++++++---- drivers/clk/rockchip/clk.c | 17 ++++++++++++++--- drivers/clk/rockchip/clk.h | 17 ++++++++++++++++- 3 files changed, 50 insertions(+), 8 deletions(-) diff --git a/drivers/clk/rockchip/clk-mmc-phase.c b/drivers/clk/rockchip/clk-mmc-phase.c index 91012078681b..b3ed8e7523e5 100644 --- a/drivers/clk/rockchip/clk-mmc-phase.c +++ b/drivers/clk/rockchip/clk-mmc-phase.c @@ -9,11 +9,14 @@ #include #include #include +#include #include "clk.h" struct rockchip_mmc_clock { struct clk_hw hw; void __iomem *reg; + struct regmap *grf; + int grf_reg; int shift; int cached_phase; struct notifier_block clk_rate_change_nb; @@ -54,7 +57,12 @@ static int rockchip_mmc_get_phase(struct clk_hw *hw) if (!rate) return 0; - raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); + if (mmc_clock->grf) + regmap_read(mmc_clock->grf, mmc_clock->grf_reg, &raw_value); + else + raw_value = readl(mmc_clock->reg); + + raw_value >>= mmc_clock->shift; degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; @@ -134,8 +142,12 @@ static int rockchip_mmc_set_phase(struct clk_hw *hw, int degrees) raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; raw_value |= nineties; - writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift), - mmc_clock->reg); + raw_value = HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift); + + if (mmc_clock->grf) + regmap_write(mmc_clock->grf, mmc_clock->grf_reg, raw_value); + else + writel(raw_value, mmc_clock->reg); pr_debug("%s->set_phase(%d) delay_nums=%u reg[0x%p]=0x%03x actual_degrees=%d\n", clk_hw_get_name(hw), degrees, delay_num, @@ -189,7 +201,9 @@ static int rockchip_mmc_clk_rate_notify(struct notifier_block *nb, struct clk *rockchip_clk_register_mmc(const char *name, const char *const *parent_names, u8 num_parents, - void __iomem *reg, int shift) + void __iomem *reg, + struct regmap *grf, int grf_reg, + int shift) { struct clk_init_data init; struct rockchip_mmc_clock *mmc_clock; @@ -208,6 +222,8 @@ struct clk *rockchip_clk_register_mmc(const char *name, mmc_clock->hw.init = &init; mmc_clock->reg = reg; + mmc_clock->grf = grf; + mmc_clock->grf_reg = grf_reg; mmc_clock->shift = shift; clk = clk_register(NULL, &mmc_clock->hw); diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c index 34d96aa7cd51..0cba7e7e0c42 100644 --- a/drivers/clk/rockchip/clk.c +++ b/drivers/clk/rockchip/clk.c @@ -509,8 +509,10 @@ void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx, clk = NULL; /* for GRF-dependent branches, choose the right grf first */ - if ((list->branch_type == branch_muxgrf || list->branch_type == branch_grf_gate) && - list->grf_type != grf_type_sys) { + if ((list->branch_type == branch_muxgrf || + list->branch_type == branch_grf_gate || + list->branch_type == branch_grf_mmc) && + list->grf_type != grf_type_sys) { hash_for_each_possible(ctx->aux_grf_table, agrf, node, list->grf_type) { if (agrf->type == list->grf_type) { grf = agrf->grf; @@ -612,6 +614,16 @@ void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx, list->name, list->parent_names, list->num_parents, ctx->reg_base + list->muxdiv_offset, + NULL, 0, + list->div_shift + ); + break; + case branch_grf_mmc: + clk = rockchip_clk_register_mmc( + list->name, + list->parent_names, list->num_parents, + 0, + grf, list->muxdiv_offset, list->div_shift ); break; @@ -641,7 +653,6 @@ void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx, break; case branch_linked_gate: /* must be registered late, fall-through for error message */ - break; } /* none of the cases above matched */ diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index ebaed429a30d..d411de7a6f4a 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -619,7 +619,9 @@ struct clk *rockchip_clk_register_cpuclk(const char *name, struct clk *rockchip_clk_register_mmc(const char *name, const char *const *parent_names, u8 num_parents, - void __iomem *reg, int shift); + void __iomem *reg, + struct regmap *grf, int grf_reg, + int shift); /* * DDRCLK flags, including method of setting the rate @@ -664,6 +666,7 @@ enum rockchip_clk_branch_type { branch_grf_gate, branch_linked_gate, branch_mmc, + branch_grf_mmc, branch_inverter, branch_factor, branch_ddrclk, @@ -1030,6 +1033,18 @@ struct rockchip_clk_branch { .div_shift = shift, \ } +#define MMC_GRF(_id, cname, pname, offset, shift, grftype) \ + { \ + .id = _id, \ + .branch_type = branch_grf_mmc, \ + .name = cname, \ + .parent_names = (const char *[]){ pname }, \ + .num_parents = 1, \ + .muxdiv_offset = offset, \ + .div_shift = shift, \ + .grf_type = grftype, \ + } + #define INVERTER(_id, cname, pname, io, is, if) \ { \ .id = _id, \ From patchwork Tue May 6 09:22:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 887974 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF26E21B9F4; Tue, 6 May 2025 09:23:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746523441; cv=none; b=UNz716oZ2WXrOFH0oM1vD0Hn76cyXUJoqNpfI6QwQtpqEUNTcZagHo0vPDhBGwK0YmWRYT+NK9l2GoIE3KEVqEywX0hSWHK6n0ybiOrpAfEEw0Wq9/f2RhY0nTqA+WGPKCbMyATbc+LEYBi+36pGgdKGZzTYWnTdDMIumhokIM8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746523441; c=relaxed/simple; bh=vzmS4N7eEX+rtChwmVzIew6PgA7WdiSb7izIi9hhSYw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fFY+A2TSM+qINv2zfyD47upB19XE+zfUItXyaWdcG5Ss2v2YgCaiywEae3VSC5ar48y0wo6EKLIIvHTZDp80Mc+dqLuQPKU3ZaG053WgpCpJZOPrq4k56sPNf0PfjOgp0p++cS61jqpFTNiV0O09/kfS2CPztNaZrQxDfwYZ7tE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org; spf=pass smtp.mailfrom=disroot.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b=R25Y+/mw; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="R25Y+/mw" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 233B225A88; Tue, 6 May 2025 11:23:58 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id CzqSGRRl0GDx; Tue, 6 May 2025 11:23:57 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1746523437; bh=vzmS4N7eEX+rtChwmVzIew6PgA7WdiSb7izIi9hhSYw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=R25Y+/mwFNsTfWcgIsyRmTImPr7xXuqIdu2hMypgHiV7LAV6brmmK2Om901Dszvp7 qf6X2IZBVvxQ75SCxL2R7QEnUE4T9bb1HQH7BoNTa3nB1UPisw/0yLcVc8FArydn4R 2ngJk/wnsyg+cTmk9cJGxfA6AU1hE3GfzG6qb8YFfVZ9BMlGIq9+/uSh112Uwyyt4/ 024ME07xoY26m2PeuYy5OwIDz5povbAJzk7MXcfsEB/GsAEo7TpFILsygtJJ4/Jqwu huvQE4jxzPL08hXgpD7J7fYy+nY/K6iLI4vadv2Zu2oG8xrc3OTHR0dsYBTzl/GFgT JV66GpwgE/UIg== From: Yao Zi To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Turquette , Stephen Boyd , Shresth Prasad , Cristian Ciocaltea , Detlev Casanova , Jonas Karlman , Chukun Pan Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yao Zi Subject: [PATCH v5 3/5] clk: rockchip: rk3528: Add SD/SDIO tuning clocks in GRF region Date: Tue, 6 May 2025 09:22:04 +0000 Message-ID: <20250506092206.46143-4-ziyao@disroot.org> In-Reply-To: <20250506092206.46143-1-ziyao@disroot.org> References: <20250506092206.46143-1-ziyao@disroot.org> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 These clocks locate in VO and VPU GRF, serving for SD/SDIO controller tuning purpose. Add their definitions and register them in driver if corresponding GRF is available. GRFs are looked up by compatible to simplify devicetree binding. Signed-off-by: Yao Zi --- drivers/clk/rockchip/clk-rk3528.c | 82 ++++++++++++++++++++++++++++--- drivers/clk/rockchip/clk.h | 5 ++ 2 files changed, 81 insertions(+), 6 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3528.c b/drivers/clk/rockchip/clk-rk3528.c index b8b577b902a0..f5f10493abfb 100644 --- a/drivers/clk/rockchip/clk-rk3528.c +++ b/drivers/clk/rockchip/clk-rk3528.c @@ -10,6 +10,8 @@ #include #include #include +#include +#include #include @@ -1061,23 +1063,65 @@ static struct rockchip_clk_branch rk3528_clk_branches[] __initdata = { 0, 1, 1), }; +static struct rockchip_clk_branch rk3528_vo_clk_branches[] __initdata = { + MMC_GRF(SCLK_SDMMC_DRV, "sdmmc_drv", "cclk_src_sdmmc0", + RK3528_SDMMC_CON(0), 1, grf_type_vo), + MMC_GRF(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "cclk_src_sdmmc0", + RK3528_SDMMC_CON(1), 1, grf_type_vo), +}; + +static struct rockchip_clk_branch rk3528_vpu_clk_branches[] __initdata = { + MMC_GRF(SCLK_SDIO0_DRV, "sdio0_drv", "cclk_src_sdio0", + RK3528_SDIO0_CON(0), 1, grf_type_vpu), + MMC_GRF(SCLK_SDIO0_SAMPLE, "sdio0_sample", "cclk_src_sdio0", + RK3528_SDIO0_CON(1), 1, grf_type_vpu), + MMC_GRF(SCLK_SDIO1_DRV, "sdio1_drv", "cclk_src_sdio1", + RK3528_SDIO1_CON(0), 1, grf_type_vpu), + MMC_GRF(SCLK_SDIO1_SAMPLE, "sdio1_sample", "cclk_src_sdio1", + RK3528_SDIO1_CON(1), 1, grf_type_vpu), +}; + static int __init clk_rk3528_probe(struct platform_device *pdev) { - struct rockchip_clk_provider *ctx; + unsigned long nr_vpu_branches = ARRAY_SIZE(rk3528_vpu_clk_branches); + unsigned long nr_vo_branches = ARRAY_SIZE(rk3528_vo_clk_branches); + unsigned long nr_branches = ARRAY_SIZE(rk3528_clk_branches); + unsigned long nr_clks, nr_vo_clks, nr_vpu_clks; + struct rockchip_aux_grf *vo_grf_e, *vpu_grf_e; + struct regmap *vo_grf, *vpu_grf; struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; - unsigned long nr_branches = ARRAY_SIZE(rk3528_clk_branches); - unsigned long nr_clks; + struct rockchip_clk_provider *ctx; void __iomem *reg_base; - nr_clks = rockchip_clk_find_max_clk_id(rk3528_clk_branches, - nr_branches) + 1; - reg_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(reg_base)) return dev_err_probe(dev, PTR_ERR(reg_base), "could not map cru region"); + nr_clks = rockchip_clk_find_max_clk_id(rk3528_clk_branches, + nr_branches) + 1; + + vo_grf = syscon_regmap_lookup_by_compatible("rockchip,rk3528-vo-grf"); + if (!IS_ERR(vo_grf)) { + nr_vo_clks = rockchip_clk_find_max_clk_id(rk3528_vo_clk_branches, + nr_vo_branches) + 1; + nr_clks = max(nr_clks, nr_vo_clks); + } else if (PTR_ERR(vo_grf) != -ENODEV) { + return dev_err_probe(dev, PTR_ERR(vo_grf), + "failed to look up VO GRF\n"); + } + + vpu_grf = syscon_regmap_lookup_by_compatible("rockchip,rk3528-vpu-grf"); + if (!IS_ERR(vpu_grf)) { + nr_vpu_clks = rockchip_clk_find_max_clk_id(rk3528_vpu_clk_branches, + nr_vpu_branches) + 1; + nr_clks = max(nr_clks, nr_vpu_clks); + } else if (PTR_ERR(vpu_grf) != -ENODEV) { + return dev_err_probe(dev, PTR_ERR(vpu_grf), + "failed to look up VPU GRF\n"); + } + ctx = rockchip_clk_init(np, reg_base, nr_clks); if (IS_ERR(ctx)) return dev_err_probe(dev, PTR_ERR(ctx), @@ -1092,6 +1136,32 @@ static int __init clk_rk3528_probe(struct platform_device *pdev) ARRAY_SIZE(rk3528_cpuclk_rates)); rockchip_clk_register_branches(ctx, rk3528_clk_branches, nr_branches); + if (!IS_ERR(vo_grf)) { + vo_grf_e = devm_kzalloc(dev, sizeof(*vo_grf_e), GFP_KERNEL); + if (!vo_grf_e) + return -ENOMEM; + + vo_grf_e->grf = vo_grf; + vo_grf_e->type = grf_type_vo; + hash_add(ctx->aux_grf_table, &vo_grf_e->node, grf_type_vo); + + rockchip_clk_register_branches(ctx, rk3528_vo_clk_branches, + nr_vo_branches); + } + + if (!IS_ERR(vpu_grf)) { + vpu_grf_e = devm_kzalloc(dev, sizeof(*vpu_grf_e), GFP_KERNEL); + if (!vpu_grf_e) + return -ENOMEM; + + vpu_grf_e->grf = vpu_grf; + vpu_grf_e->type = grf_type_vpu; + hash_add(ctx->aux_grf_table, &vpu_grf_e->node, grf_type_vpu); + + rockchip_clk_register_branches(ctx, rk3528_vpu_clk_branches, + nr_vpu_branches); + } + rk3528_rst_init(np, reg_base); rockchip_register_restart_notifier(ctx, RK3528_GLB_SRST_FST, NULL); diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index d411de7a6f4a..10be168f49e3 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -218,6 +218,9 @@ struct clk; #define RK3528_CLKSEL_CON(x) ((x) * 0x4 + 0x300) #define RK3528_CLKGATE_CON(x) ((x) * 0x4 + 0x800) #define RK3528_SOFTRST_CON(x) ((x) * 0x4 + 0xa00) +#define RK3528_SDMMC_CON(x) ((x) * 0x4 + 0x24) +#define RK3528_SDIO0_CON(x) ((x) * 0x4 + 0x4) +#define RK3528_SDIO1_CON(x) ((x) * 0x4 + 0xc) #define RK3528_PMU_CLKSEL_CON(x) ((x) * 0x4 + 0x300 + RK3528_PMU_CRU_BASE) #define RK3528_PMU_CLKGATE_CON(x) ((x) * 0x4 + 0x800 + RK3528_PMU_CRU_BASE) #define RK3528_PCIE_CLKSEL_CON(x) ((x) * 0x4 + 0x300 + RK3528_PCIE_CRU_BASE) @@ -446,6 +449,8 @@ enum rockchip_grf_type { grf_type_pmu0, grf_type_pmu1, grf_type_ioc, + grf_type_vo, + grf_type_vpu, }; /* ceil(sqrt(enums in rockchip_grf_type - 1)) */ From patchwork Tue May 6 09:22:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 888745 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70712252906; Tue, 6 May 2025 09:24:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746523448; cv=none; b=IAYsmm+r+oBedWtOoU9plC/Z7mx4m04IzU5KtItipLi9AQ9iJ8KRABp9ZJXyegXlFzB4rOYK4LHafq7fQ4AbjZyimopIbx3L+Cmk/AU1efjoqI4JDQnFc+i7Glr0l8ojY1EPgzpjR6vd+BTPzkhJqVVIifq2/zMkMdWzaglkw4I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746523448; c=relaxed/simple; bh=xtGjxpvg2s2+1GJS7uN6GHrJzJA+KGuj9U8MlOvZXZo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oMn7OOBe+swTaiq3SBMne1gBAcE6Wc9d9prHUYWKbJzdb7Ruda/uo87qDUQf79bY/qGvCqScRBEQRRm+oOSOZ3nrWE1L4YSCRC8hWHN9D97mBGkI9WvFhSJi01RNHO9j13kYVIHbu+SdnQwWuXqD+YNUVSBCk08GgqjxUqhJIPg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org; spf=pass smtp.mailfrom=disroot.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b=VfKoXC2K; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="VfKoXC2K" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id E418F252CB; Tue, 6 May 2025 11:24:04 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id ei8oYB1H29V8; Tue, 6 May 2025 11:24:04 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1746523444; bh=xtGjxpvg2s2+1GJS7uN6GHrJzJA+KGuj9U8MlOvZXZo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=VfKoXC2KJOUdDLcYmok2OpZNlK14KLm8h7zpDENUA1khVMIfSPvC2Qwglh4Nqr7CO hiZMi5T6fzxKRY5wmtLexQuFNztnhUhIUa4hiDMgMSi/XqQ004n9tn04nLG/RdU0qu C0E1g0dREOxiiZjnrajmgQ6qF/pHJ39U7xbwH/wKw7dwdpI943QUgVX8rUKKlxcbVL lpDcTydEo9GQYJu+wjAe83wKTIvk9zG7ksxM0CB7QDpCDn03WPORaneg9OGTMEJZ4Y /rWyfk3XbICsp4ledN/w2iOFSgVZoRWlRZ+1UrsPeNGCsHPSNjnAAp34BDylzWIpQJ sjkqn8/vwXYCQ== From: Yao Zi To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Turquette , Stephen Boyd , Shresth Prasad , Cristian Ciocaltea , Detlev Casanova , Jonas Karlman , Chukun Pan Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yao Zi Subject: [PATCH v5 4/5] arm64: dts: rockchip: Add SDMMC/SDIO controllers for RK3528 Date: Tue, 6 May 2025 09:22:05 +0000 Message-ID: <20250506092206.46143-5-ziyao@disroot.org> In-Reply-To: <20250506092206.46143-1-ziyao@disroot.org> References: <20250506092206.46143-1-ziyao@disroot.org> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 RK3528 features two SDIO controllers and one SD/MMC controller, describe them in devicetree. Since their sample and drive clocks are located in the VO and VPU GRFs, corresponding syscons are added to make these clocks available. Signed-off-by: Yao Zi --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 69 ++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index 2c9780069af9..68059c7d7e80 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -329,6 +329,16 @@ qos_vpu: qos@ff280400 { reg = <0x0 0xff280400 0x0 0x20>; }; + vpu_grf: syscon@ff340000 { + compatible = "rockchip,rk3528-vpu-grf", "syscon"; + reg = <0x0 0xff340000 0x0 0x8000>; + }; + + vo_grf: syscon@ff360000 { + compatible = "rockchip,rk3528-vo-grf", "syscon"; + reg = <0x0 0xff360000 0x0 0x10000>; + }; + cru: clock-controller@ff4a0000 { compatible = "rockchip,rk3528-cru"; reg = <0x0 0xff4a0000 0x0 0x30000>; @@ -611,6 +621,65 @@ sdhci: mmc@ffbf0000 { status = "disabled"; }; + sdio0: mmc@ffc10000 { + compatible = "rockchip,rk3528-dw-mshc", + "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xffc10000 0x0 0x4000>; + clocks = <&cru HCLK_SDIO0>, + <&cru CCLK_SRC_SDIO0>, + <&cru SCLK_SDIO0_DRV>, + <&cru SCLK_SDIO0_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + max-frequency = <200000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4>, <&sdio0_clk>, <&sdio0_cmd>; + resets = <&cru SRST_H_SDIO0>; + reset-names = "reset"; + status = "disabled"; + }; + + sdio1: mmc@ffc20000 { + compatible = "rockchip,rk3528-dw-mshc", + "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xffc20000 0x0 0x4000>; + clocks = <&cru HCLK_SDIO1>, + <&cru CCLK_SRC_SDIO1>, + <&cru SCLK_SDIO1_DRV>, + <&cru SCLK_SDIO1_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + max-frequency = <200000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdio1_bus4>, <&sdio1_clk>, <&sdio1_cmd>; + resets = <&cru SRST_H_SDIO1>; + reset-names = "reset"; + status = "disabled"; + }; + + sdmmc: mmc@ffc30000 { + compatible = "rockchip,rk3528-dw-mshc", + "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xffc30000 0x0 0x4000>; + clocks = <&cru HCLK_SDMMC0>, + <&cru CCLK_SRC_SDMMC0>, + <&cru SCLK_SDMMC_DRV>, + <&cru SCLK_SDMMC_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + interrupts = ; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>, + <&sdmmc_det>; + resets = <&cru SRST_H_SDMMC0>; + reset-names = "reset"; + rockchip,default-sample-phase = <90>; + status = "disabled"; + }; + dmac: dma-controller@ffd60000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x0 0xffd60000 0x0 0x4000>; From patchwork Tue May 6 09:22:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yao Zi X-Patchwork-Id: 887973 Received: from layka.disroot.org (layka.disroot.org [178.21.23.139]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67367252906; Tue, 6 May 2025 09:24:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.21.23.139 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746523454; cv=none; b=s4FN4L9N9mTKSzvK305Kxv1iQe93pWkxsDpWH/PEctvWcacP34LR88QqeePJN35Zg3nrLTvXtj/+A4eDb5OLOCobv4pf2hB/5/5lQCcHlvRZeVIOHrd1VBOIVMqgiNDJNuhwxhaE8wNW8AK5Gp5uTFLKYD70ykUd3uOPn+RGIus= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746523454; c=relaxed/simple; bh=6w+tXU7Z8tsTcrJtTb1oifhiSkHhaVbmuA7KCza1/rU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hmQUVqTO8YUUxKoSvKlUoiOjlM7rxrZtXRp5/ZShqY71i2xWfg1APzhMbuSRK7b9K3KZ5+L+1aZb9ieW+lQ+Zl7GKxOKRk7zsNPlUAjLjhc337fKTAz/1W6rPHOyBUPcwYqpCqdWh/OzQgOMZ1pVHHg6R4fut3x7qGEdV2z9yY8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org; spf=pass smtp.mailfrom=disroot.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b=bzbc8dF8; arc=none smtp.client-ip=178.21.23.139 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=disroot.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=disroot.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=disroot.org header.i=@disroot.org header.b="bzbc8dF8" Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id C4B0D25A88; Tue, 6 May 2025 11:24:11 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id WKdrIXse09H6; Tue, 6 May 2025 11:24:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1746523451; bh=6w+tXU7Z8tsTcrJtTb1oifhiSkHhaVbmuA7KCza1/rU=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=bzbc8dF8Okg0jQcz0QdqchtwqlD3B9UslylP0fk1n1d5FBGEkvutT0d8W4eJNXQJp xKFKGRt2BSraG+16zvoDmsfHw/0nFYFq1pifYO5yLZtPuiexBZkYhsJOV56Tdquq18 oWCheiEZx2zZJipHA3i6NoPNS/2OSsQGklUwWl+Ktj4eiRMqhV69WvJbMWaGSbIZJw mQeKwLFHbrL5e/gEQxW6viSh18SIMd4gae70pV1gJYR5WouacHRjLh0Pf+IDSNpU3G BRq6s47TGxGF2eY9Nsbk+nFGd0yh0AYoElMHoq+No+E5ytm6IjQxBDOvklbi9J77N0 N8Rnrktmetqug== From: Yao Zi To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Turquette , Stephen Boyd , Shresth Prasad , Cristian Ciocaltea , Detlev Casanova , Jonas Karlman , Chukun Pan Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Yao Zi Subject: [PATCH v5 5/5] arm64: dts: rockchip: Enable SD-card interface on Radxa E20C Date: Tue, 6 May 2025 09:22:06 +0000 Message-ID: <20250506092206.46143-6-ziyao@disroot.org> In-Reply-To: <20250506092206.46143-1-ziyao@disroot.org> References: <20250506092206.46143-1-ziyao@disroot.org> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SD-card is available on Radxa E20C board. Signed-off-by: Yao Zi --- .../boot/dts/rockchip/rk3528-radxa-e20c.dts | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts index 6e77f7753ff7..d0b194b7e66e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts +++ b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts @@ -17,6 +17,7 @@ / { aliases { mmc0 = &sdhci; + mmc1 = &sdmmc; }; chosen { @@ -108,6 +109,18 @@ vcc5v0_sys: regulator-5v0-vcc-sys { regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; + + vccio_sd: regulator-vccio-sd { + compatible = "regulator-gpio"; + gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_vol_ctrl_h>; + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + states = <1800000 0x0>, <3300000 0x1>; + vin-supply = <&vcc5v0_sys>; + }; }; &i2c1 { @@ -144,6 +157,12 @@ wan_led_g: wan-led-g { rockchip,pins = <4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + sdmmc { + sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h { + rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &saradc { @@ -162,6 +181,17 @@ &sdhci { status = "okay"; }; +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0m0_xfer>;