From patchwork Fri May 9 15:33:41 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 888966 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D6E222CBE9 for ; Fri, 9 May 2025 15:34:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.97.179.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746804863; cv=none; b=o5c1TyNmSSoi+Nw2rj1Wuvow7K3n0fV6Sc/wAisexbRHkFZZQxFpTNrb97VYzTLlSoTeDbOKIP2xEVIGH2szyUaut0aVaApSMkvtfAsiYCA6mVmAkTs4iFeDxZjImIHTDNacQub9K/IBvfQj+irwdKHpjvPe3Wblr/Na6ROyt0E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746804863; c=relaxed/simple; bh=3opjJ9l8SjmEgN+/Za4zsla8gbMsyLrL8n6gHYrzfdA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MVpkJGUaXXiPzfFNT8+7clkT2pid0o1cO8uLMYuX8ut+oew/jXwqAXcerI6gU7eKBtO/3KmjSVG0vs47VgCUYQBuwrfPBVV517apCc1G2FEEMo/n5Sxhun4A9+JNPznQHDvlz813MRqEKOimDuc88e7SoFILVl0pFwnHlj/Nir4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=ZzqhQC/f; arc=none smtp.client-ip=213.97.179.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="ZzqhQC/f" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=1vhPhUpo7XYOjEiM3EN6oBLXztk5z+K99Cobporw1Bc=; b=ZzqhQC/fia/9vdAn8j3+3NrHA+ nBX68px/1RI5OPFyT18OXnxmea9OW4YVEaJHpTq5RrIonySM0BNxyMy4emD5s4PPBcAAVbN7ArENH NsIfI9jzZwfXJHaheDLqwFr15LUK/ZyGEuanX8fHm0ZANfkJd17/jBbs0bXW3vBACf+vFSmPr6hTS nbbPnKF4nCDP2l2oRio/ujhg2u6QK5QtG1HuldL8hqkFcMk09d75siQIsvTNFgTVpjmwTDnECf2wM lYPhMJ4IUcjJkCcG6bbK4EqAWaejdGz2qEbl94Gce6deUoBz2JBxvvhmgum4CT3iOYRpz3gSoyoUZ ++VGjhig==; Received: from [81.79.92.254] (helo=localhost) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1uDPfH-005oEO-Bl; Fri, 09 May 2025 17:34:08 +0200 From: Tvrtko Ursulin To: dri-devel@lists.freedesktop.org Cc: Sumit Semwal , Gustavo Padovan , =?utf-8?q?Christian_K=C3=B6nig?= , Matthew Brost , Lucas De Marchi , Rodrigo Vivi , amd-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, kernel-dev@igalia.com, Tvrtko Ursulin Subject: [RFC v2 02/13] dma-fence: Change signature of __dma_fence_is_later Date: Fri, 9 May 2025 16:33:41 +0100 Message-ID: <20250509153352.7187-3-tvrtko.ursulin@igalia.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250509153352.7187-1-tvrtko.ursulin@igalia.com> References: <20250509153352.7187-1-tvrtko.ursulin@igalia.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 With the goal of reducing the need for drivers to touch (and dereference) fence->ops, we change the prototype of __dma_fence_is_later() to take fence instead of fence->ops. Signed-off-by: Tvrtko Ursulin --- drivers/dma-buf/dma-fence-chain.c | 2 +- drivers/dma-buf/sw_sync.c | 2 +- drivers/gpu/drm/xe/xe_hw_fence.c | 2 +- drivers/gpu/drm/xe/xe_sched_job.c | 14 ++++++++------ include/linux/dma-fence.h | 9 ++++----- 5 files changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/dma-buf/dma-fence-chain.c b/drivers/dma-buf/dma-fence-chain.c index 9663ba1bb6ac..90424f23fd73 100644 --- a/drivers/dma-buf/dma-fence-chain.c +++ b/drivers/dma-buf/dma-fence-chain.c @@ -252,7 +252,7 @@ void dma_fence_chain_init(struct dma_fence_chain *chain, chain->prev_seqno = 0; /* Try to reuse the context of the previous chain node. */ - if (prev_chain && __dma_fence_is_later(seqno, prev->seqno, prev->ops)) { + if (prev_chain && __dma_fence_is_later(prev, seqno, prev->seqno)) { context = prev->context; chain->prev_seqno = prev->seqno; } else { diff --git a/drivers/dma-buf/sw_sync.c b/drivers/dma-buf/sw_sync.c index 4f27ee93a00c..3c20f1d31cf5 100644 --- a/drivers/dma-buf/sw_sync.c +++ b/drivers/dma-buf/sw_sync.c @@ -170,7 +170,7 @@ static bool timeline_fence_signaled(struct dma_fence *fence) { struct sync_timeline *parent = dma_fence_parent(fence); - return !__dma_fence_is_later(fence->seqno, parent->value, fence->ops); + return !__dma_fence_is_later(fence, fence->seqno, parent->value); } static void timeline_fence_set_deadline(struct dma_fence *fence, ktime_t deadline) diff --git a/drivers/gpu/drm/xe/xe_hw_fence.c b/drivers/gpu/drm/xe/xe_hw_fence.c index 0b4f12be3692..03eb8c6d1616 100644 --- a/drivers/gpu/drm/xe/xe_hw_fence.c +++ b/drivers/gpu/drm/xe/xe_hw_fence.c @@ -165,7 +165,7 @@ static bool xe_hw_fence_signaled(struct dma_fence *dma_fence) u32 seqno = xe_map_rd(xe, &fence->seqno_map, 0, u32); return dma_fence->error || - !__dma_fence_is_later(dma_fence->seqno, seqno, dma_fence->ops); + !__dma_fence_is_later(dma_fence, dma_fence->seqno, seqno); } static bool xe_hw_fence_enable_signaling(struct dma_fence *dma_fence) diff --git a/drivers/gpu/drm/xe/xe_sched_job.c b/drivers/gpu/drm/xe/xe_sched_job.c index 1905ca590965..f0a6ce610948 100644 --- a/drivers/gpu/drm/xe/xe_sched_job.c +++ b/drivers/gpu/drm/xe/xe_sched_job.c @@ -216,15 +216,17 @@ void xe_sched_job_set_error(struct xe_sched_job *job, int error) bool xe_sched_job_started(struct xe_sched_job *job) { + struct dma_fence *fence = dma_fence_chain_contained(job->fence); struct xe_lrc *lrc = job->q->lrc[0]; - return !__dma_fence_is_later(xe_sched_job_lrc_seqno(job), - xe_lrc_start_seqno(lrc), - dma_fence_chain_contained(job->fence)->ops); + return !__dma_fence_is_later(fence, + xe_sched_job_lrc_seqno(job), + xe_lrc_start_seqno(lrc)); } bool xe_sched_job_completed(struct xe_sched_job *job) { + struct dma_fence *fence = dma_fence_chain_contained(job->fence); struct xe_lrc *lrc = job->q->lrc[0]; /* @@ -232,9 +234,9 @@ bool xe_sched_job_completed(struct xe_sched_job *job) * parallel handshake is done. */ - return !__dma_fence_is_later(xe_sched_job_lrc_seqno(job), - xe_lrc_seqno(lrc), - dma_fence_chain_contained(job->fence)->ops); + return !__dma_fence_is_later(fence, + xe_sched_job_lrc_seqno(job), + xe_lrc_seqno(lrc)); } void xe_sched_job_arm(struct xe_sched_job *job) diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h index b12776883d14..48b5202c531d 100644 --- a/include/linux/dma-fence.h +++ b/include/linux/dma-fence.h @@ -441,21 +441,20 @@ dma_fence_is_signaled(struct dma_fence *fence) /** * __dma_fence_is_later - return if f1 is chronologically later than f2 + * @fence: fence in whose context to do the comparison * @f1: the first fence's seqno * @f2: the second fence's seqno from the same context - * @ops: dma_fence_ops associated with the seqno * * Returns true if f1 is chronologically later than f2. Both fences must be * from the same context, since a seqno is not common across contexts. */ -static inline bool __dma_fence_is_later(u64 f1, u64 f2, - const struct dma_fence_ops *ops) +static inline bool __dma_fence_is_later(struct dma_fence *fence, u64 f1, u64 f2) { /* This is for backward compatibility with drivers which can only handle * 32bit sequence numbers. Use a 64bit compare when the driver says to * do so. */ - if (ops->use_64bit_seqno) + if (fence->ops->use_64bit_seqno) return f1 > f2; return (int)(lower_32_bits(f1) - lower_32_bits(f2)) > 0; @@ -475,7 +474,7 @@ static inline bool dma_fence_is_later(struct dma_fence *f1, if (WARN_ON(f1->context != f2->context)) return false; - return __dma_fence_is_later(f1->seqno, f2->seqno, f1->ops); + return __dma_fence_is_later(f1, f1->seqno, f2->seqno); } /** From patchwork Fri May 9 15:33:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 888964 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7583522DF89 for ; Fri, 9 May 2025 15:34:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.97.179.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746804864; cv=none; b=GUdDAvop3QISqVTYy+SYZq5n16rCWZGTTG7IoiuuV22h0Kw8WZTepMEOvHYK4nuu9WhusxBMWf9bzCNw0gMGszwLNNRHYUIT6z6VRNuKZEXNuGpTUsBPVKBiSKYdCahCJWY8FKiF4dl1xBbw6QutwinUqkj9VR2ucVrxcxdiUdY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746804864; c=relaxed/simple; bh=m0ABbHC3nXBpIN2Kdm1d2ra77Mc3I4QbIr9Qs7RxbK0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Mq6D03Fd83YJYC91FlP1FlkXDF6wpIcS934ga8bVTV4sFfj4NG/i69uusE5urKdLs5je8TFT8xPjw03Y74yzOIh84ziHGRZQIXowq3r4Ge7MA+SpfUAKPZQKipqLrBQOeumRMVc94PGysWmCtcs2Q+Qny1dzbDiTEAs1Ax1RcX8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=diHmqWgm; arc=none smtp.client-ip=213.97.179.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="diHmqWgm" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=nVt6X40HP3wrlexk4+/pWTXCDCJf11yiDiei9QiLl8A=; b=diHmqWgmFxuyfpykb0bpbBByAM T8FOTSwk+HAtipb+oiE9qF1BiTFxkkyFy3/bSkVQhZP4JxFMhxLbCc7u6c59aNfT0B1INptIUVoqh QNHCmEtiTF0b06Crf9lRYFd9O4y6hi+XPeK3kg7FJlueFiRL3PSPc8QZzrbLAKjaIfid+tFNc/ZAt DO3E1HMHR+UYgG65cuFMhwhHtDhpNqEKXCJXrowDA6Pa6jH8YaTj+DwAwYXb4ne6+/biY6kGaDk5Z VUfUlATIVbD91mH8RXgAuBSJRTLMh80AeANWt1M+EKJ6YKh0dmKu93XVrOk8wSBZ+2nZeUb2I2bIU PZt7SATA==; Received: from [81.79.92.254] (helo=localhost) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1uDPfI-005oES-55; Fri, 09 May 2025 17:34:08 +0200 From: Tvrtko Ursulin To: dri-devel@lists.freedesktop.org Cc: Sumit Semwal , Gustavo Padovan , =?utf-8?q?Christian_K=C3=B6nig?= , Matthew Brost , Lucas De Marchi , Rodrigo Vivi , amd-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, kernel-dev@igalia.com, Tvrtko Ursulin Subject: [RFC v2 03/13] dma-fence: Use a flag for 64-bit seqnos Date: Fri, 9 May 2025 16:33:42 +0100 Message-ID: <20250509153352.7187-4-tvrtko.ursulin@igalia.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250509153352.7187-1-tvrtko.ursulin@igalia.com> References: <20250509153352.7187-1-tvrtko.ursulin@igalia.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 With the goal of reducing the need for drivers to touch (and dereference) fence->ops, we move the 64-bit seqnos flag from struct dma_fence_ops to the fence->flags. Drivers which were setting this flag are changed to use new dma_fence_init64() instead of dma_fence_init(). Signed-off-by: Tvrtko Ursulin --- drivers/dma-buf/dma-fence-chain.c | 5 ++--- drivers/dma-buf/dma-fence.c | 9 +++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c | 5 ++--- include/linux/dma-fence.h | 6 +++++- 4 files changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/dma-buf/dma-fence-chain.c b/drivers/dma-buf/dma-fence-chain.c index 90424f23fd73..a8a90acf4f34 100644 --- a/drivers/dma-buf/dma-fence-chain.c +++ b/drivers/dma-buf/dma-fence-chain.c @@ -218,7 +218,6 @@ static void dma_fence_chain_set_deadline(struct dma_fence *fence, } const struct dma_fence_ops dma_fence_chain_ops = { - .use_64bit_seqno = true, .get_driver_name = dma_fence_chain_get_driver_name, .get_timeline_name = dma_fence_chain_get_timeline_name, .enable_signaling = dma_fence_chain_enable_signaling, @@ -262,8 +261,8 @@ void dma_fence_chain_init(struct dma_fence_chain *chain, seqno = max(prev->seqno, seqno); } - dma_fence_init(&chain->base, &dma_fence_chain_ops, - &chain->lock, context, seqno); + dma_fence_init64(&chain->base, &dma_fence_chain_ops, &chain->lock, + context, seqno); /* * Chaining dma_fence_chain container together is only allowed through diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c index f0cdd3e99d36..33661658f684 100644 --- a/drivers/dma-buf/dma-fence.c +++ b/drivers/dma-buf/dma-fence.c @@ -1023,3 +1023,12 @@ dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, trace_dma_fence_init(fence); } EXPORT_SYMBOL(dma_fence_init); + +void +dma_fence_init64(struct dma_fence *fence, const struct dma_fence_ops *ops, + spinlock_t *lock, u64 context, u64 seqno) +{ + dma_fence_init(fence, ops, lock, context, seqno); + __set_bit(DMA_FENCE_FLAG_SEQNO64_BIT, &fence->flags); +} +EXPORT_SYMBOL(dma_fence_init64); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c index 51cddfa3f1e8..5d26797356a3 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c @@ -71,7 +71,6 @@ static void amdgpu_tlb_fence_work(struct work_struct *work) } static const struct dma_fence_ops amdgpu_tlb_fence_ops = { - .use_64bit_seqno = true, .get_driver_name = amdgpu_tlb_fence_get_driver_name, .get_timeline_name = amdgpu_tlb_fence_get_timeline_name }; @@ -101,8 +100,8 @@ void amdgpu_vm_tlb_fence_create(struct amdgpu_device *adev, struct amdgpu_vm *vm INIT_WORK(&f->work, amdgpu_tlb_fence_work); spin_lock_init(&f->lock); - dma_fence_init(&f->base, &amdgpu_tlb_fence_ops, &f->lock, - vm->tlb_fence_context, atomic64_read(&vm->tlb_seq)); + dma_fence_init64(&f->base, &amdgpu_tlb_fence_ops, &f->lock, + vm->tlb_fence_context, atomic64_read(&vm->tlb_seq)); /* TODO: We probably need a separate wq here */ dma_fence_get(&f->base); diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h index 48b5202c531d..ac6535716dbe 100644 --- a/include/linux/dma-fence.h +++ b/include/linux/dma-fence.h @@ -97,6 +97,7 @@ struct dma_fence { }; enum dma_fence_flag_bits { + DMA_FENCE_FLAG_SEQNO64_BIT, DMA_FENCE_FLAG_SIGNALED_BIT, DMA_FENCE_FLAG_TIMESTAMP_BIT, DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, @@ -262,6 +263,9 @@ struct dma_fence_ops { void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, spinlock_t *lock, u64 context, u64 seqno); +void dma_fence_init64(struct dma_fence *fence, const struct dma_fence_ops *ops, + spinlock_t *lock, u64 context, u64 seqno); + void dma_fence_release(struct kref *kref); void dma_fence_free(struct dma_fence *fence); void dma_fence_describe(struct dma_fence *fence, struct seq_file *seq); @@ -454,7 +458,7 @@ static inline bool __dma_fence_is_later(struct dma_fence *fence, u64 f1, u64 f2) * 32bit sequence numbers. Use a 64bit compare when the driver says to * do so. */ - if (fence->ops->use_64bit_seqno) + if (test_bit(DMA_FENCE_FLAG_SEQNO64_BIT, &fence->flags)) return f1 > f2; return (int)(lower_32_bits(f1) - lower_32_bits(f2)) > 0; From patchwork Fri May 9 15:33:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 888963 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5AF9A22D4CE for ; Fri, 9 May 2025 15:34:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.97.179.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746804865; cv=none; b=pbUXQ5ca//uGSlzWAUwSGj8fV6Mr7r2P+1gDxtyqiUJZ5Qmcf/0s+nPOTQE/AhhRjGQG8iD6PTF6ZfsJ29Vh71T9kuGvB3BUM5WQz2pjHOB6VKQTrUmE2jod3iDOGHr0PZ3CjphP0W7ry3aauglRwjltVZFv9+oIqoOKf0wnbEA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746804865; c=relaxed/simple; bh=3HGKhjWTFofwcw3qsB5U4piRvmeP5+0TWMAQtIF90M0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Bp5opIf1OzrBbq+Gg4wN38s9OnG66rH5jLpTBgxfkI+jq9H3+KuQhzU0SabJ/jO9/FKzw+yFo6aDgribb4cgrHPsU/CS2kl3QFUwLSkz++ZJAh/h6oMT0Y77Muab696unqgZWM68TSYVIZgsiuiR7Xedz6CV7UedvMTjM2Tic2Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=EAo+5oKq; arc=none smtp.client-ip=213.97.179.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="EAo+5oKq" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=yoH2w/m32RB9xtTZruVpdjXWYhuRfWOTzKZ/CjeZfKs=; b=EAo+5oKqYdoyi3638+IXEe6R1a NntDdVE9ZUrmYtGUw2xUDPOGtS4do/7wbiuYt7b+HdtZFJwz1P/POdSQC4xwkX1SbOod4GLLEaZ90 6oU2okqcR4Gi4EP3speDU0pUZq3h7+PR8OJVRwr24QzUC4kelf6ltDOkH2bhRZeSS/2OLA0jZVvmr B/GV4Lg8ZYr7ZsYyjulixpW0ZxkObdfD+fAwFcfI4fBKYURiD4LZfxtHjd/1QXK49i3q7jfdPIjww HxZ6mbv0FVq3o9VPGFGogRbWI9IVcOXEpCMeH6oeRB6/0ebo/XRDOsGDXqKB/rGJdgum2xwQEvDmw KD0/BPfQ==; Received: from [81.79.92.254] (helo=localhost) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1uDPfI-005oEe-Uf; Fri, 09 May 2025 17:34:09 +0200 From: Tvrtko Ursulin To: dri-devel@lists.freedesktop.org Cc: Sumit Semwal , Gustavo Padovan , =?utf-8?q?Christian_K=C3=B6nig?= , Matthew Brost , Lucas De Marchi , Rodrigo Vivi , amd-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, kernel-dev@igalia.com, Tvrtko Ursulin Subject: [RFC v2 04/13] dma-fence: Move array and chain checks to flags Date: Fri, 9 May 2025 16:33:43 +0100 Message-ID: <20250509153352.7187-5-tvrtko.ursulin@igalia.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250509153352.7187-1-tvrtko.ursulin@igalia.com> References: <20250509153352.7187-1-tvrtko.ursulin@igalia.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 With the goal of reducing the need for drivers to touch fence->ops, we add explicit flags for struct dma_fence_array and struct dma_fence_chain and make the respective helpers (dma_fence_is_array() and dma_fence_is_chain()) use them. This also allows us to remove the exported symbols for the respective operation tables. Signed-off-by: Tvrtko Ursulin --- drivers/dma-buf/dma-fence-array.c | 2 +- drivers/dma-buf/dma-fence-chain.c | 2 +- include/linux/dma-fence.h | 9 ++++----- 3 files changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/dma-buf/dma-fence-array.c b/drivers/dma-buf/dma-fence-array.c index 6657d4b30af9..daf444f5d228 100644 --- a/drivers/dma-buf/dma-fence-array.c +++ b/drivers/dma-buf/dma-fence-array.c @@ -167,7 +167,6 @@ const struct dma_fence_ops dma_fence_array_ops = { .release = dma_fence_array_release, .set_deadline = dma_fence_array_set_deadline, }; -EXPORT_SYMBOL(dma_fence_array_ops); /** * dma_fence_array_alloc - Allocate a custom fence array @@ -207,6 +206,7 @@ void dma_fence_array_init(struct dma_fence_array *array, spin_lock_init(&array->lock); dma_fence_init(&array->base, &dma_fence_array_ops, &array->lock, context, seqno); + __set_bit(DMA_FENCE_FLAG_ARRAY_BIT, &array->base.flags); init_irq_work(&array->work, irq_dma_fence_array_work); atomic_set(&array->num_pending, signal_on_any ? 1 : num_fences); diff --git a/drivers/dma-buf/dma-fence-chain.c b/drivers/dma-buf/dma-fence-chain.c index a8a90acf4f34..f4abe41fb092 100644 --- a/drivers/dma-buf/dma-fence-chain.c +++ b/drivers/dma-buf/dma-fence-chain.c @@ -225,7 +225,6 @@ const struct dma_fence_ops dma_fence_chain_ops = { .release = dma_fence_chain_release, .set_deadline = dma_fence_chain_set_deadline, }; -EXPORT_SYMBOL(dma_fence_chain_ops); /** * dma_fence_chain_init - initialize a fence chain @@ -263,6 +262,7 @@ void dma_fence_chain_init(struct dma_fence_chain *chain, dma_fence_init64(&chain->base, &dma_fence_chain_ops, &chain->lock, context, seqno); + __set_bit(DMA_FENCE_FLAG_CHAIN_BIT, &chain->base.flags); /* * Chaining dma_fence_chain container together is only allowed through diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h index ac6535716dbe..5bafd0a5f1f1 100644 --- a/include/linux/dma-fence.h +++ b/include/linux/dma-fence.h @@ -98,6 +98,8 @@ struct dma_fence { enum dma_fence_flag_bits { DMA_FENCE_FLAG_SEQNO64_BIT, + DMA_FENCE_FLAG_ARRAY_BIT, + DMA_FENCE_FLAG_CHAIN_BIT, DMA_FENCE_FLAG_SIGNALED_BIT, DMA_FENCE_FLAG_TIMESTAMP_BIT, DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, @@ -632,9 +634,6 @@ struct dma_fence *dma_fence_get_stub(void); struct dma_fence *dma_fence_allocate_private_stub(ktime_t timestamp); u64 dma_fence_context_alloc(unsigned num); -extern const struct dma_fence_ops dma_fence_array_ops; -extern const struct dma_fence_ops dma_fence_chain_ops; - /** * dma_fence_is_array - check if a fence is from the array subclass * @fence: the fence to test @@ -643,7 +642,7 @@ extern const struct dma_fence_ops dma_fence_chain_ops; */ static inline bool dma_fence_is_array(struct dma_fence *fence) { - return fence->ops == &dma_fence_array_ops; + return test_bit(DMA_FENCE_FLAG_ARRAY_BIT, &fence->flags); } /** @@ -654,7 +653,7 @@ static inline bool dma_fence_is_array(struct dma_fence *fence) */ static inline bool dma_fence_is_chain(struct dma_fence *fence) { - return fence->ops == &dma_fence_chain_ops; + return test_bit(DMA_FENCE_FLAG_CHAIN_BIT, &fence->flags); } /** From patchwork Fri May 9 15:33:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 888962 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 64F8322DFA2 for ; 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Received: from [81.79.92.254] (helo=localhost) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1uDPfM-005oFY-SM; Fri, 09 May 2025 17:34:13 +0200 From: Tvrtko Ursulin To: dri-devel@lists.freedesktop.org Cc: Sumit Semwal , Gustavo Padovan , =?utf-8?q?Christian_K=C3=B6nig?= , Matthew Brost , Lucas De Marchi , Rodrigo Vivi , amd-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, kernel-dev@igalia.com, Tvrtko Ursulin Subject: [RFC v2 09/13] drm/i915: Use dma-fence driver and timeline name helpers Date: Fri, 9 May 2025 16:33:48 +0100 Message-ID: <20250509153352.7187-10-tvrtko.ursulin@igalia.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250509153352.7187-1-tvrtko.ursulin@igalia.com> References: <20250509153352.7187-1-tvrtko.ursulin@igalia.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Access the dma-fence internals via the previously added helpers. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 4 ++-- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_sw_fence.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c index d1a382dfaa1d..ae3557ed6c1e 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c @@ -252,8 +252,8 @@ void intel_gt_watchdog_work(struct work_struct *work) struct dma_fence *f = &rq->fence; pr_notice("Fence expiration time out i915-%s:%s:%llx!\n", - f->ops->get_driver_name(f), - f->ops->get_timeline_name(f), + dma_fence_driver_name(f), + dma_fence_timeline_name(f), f->seqno); i915_request_cancel(rq, -EINTR); } diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c index c3d27eadc0a7..4874c4f1e4ab 100644 --- a/drivers/gpu/drm/i915/i915_request.c +++ b/drivers/gpu/drm/i915/i915_request.c @@ -2184,7 +2184,7 @@ void i915_request_show(struct drm_printer *m, const char *prefix, int indent) { - const char *name = rq->fence.ops->get_timeline_name((struct dma_fence *)&rq->fence); + const char *name = dma_fence_timeline_name((struct dma_fence *)&rq->fence); char buf[80] = ""; int x = 0; diff --git a/drivers/gpu/drm/i915/i915_sw_fence.c b/drivers/gpu/drm/i915/i915_sw_fence.c index 1d4cc91c0e40..e51ca7e50a4e 100644 --- a/drivers/gpu/drm/i915/i915_sw_fence.c +++ b/drivers/gpu/drm/i915/i915_sw_fence.c @@ -435,8 +435,8 @@ static void timer_i915_sw_fence_wake(struct timer_list *t) return; pr_notice("Asynchronous wait on fence %s:%s:%llx timed out (hint:%ps)\n", - cb->dma->ops->get_driver_name(cb->dma), - cb->dma->ops->get_timeline_name(cb->dma), + dma_fence_driver_name(cb->dma), + dma_fence_timeline_name(cb->dma), cb->dma->seqno, i915_sw_fence_debug_hint(fence)); From patchwork Fri May 9 15:33:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 888961 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17F7C230997 for ; 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Received: from [81.79.92.254] (helo=localhost) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1uDPfO-005oFo-Dx; Fri, 09 May 2025 17:34:15 +0200 From: Tvrtko Ursulin To: dri-devel@lists.freedesktop.org Cc: Sumit Semwal , Gustavo Padovan , =?utf-8?q?Christian_K=C3=B6nig?= , Matthew Brost , Lucas De Marchi , Rodrigo Vivi , amd-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, kernel-dev@igalia.com, Tvrtko Ursulin Subject: [RFC v2 11/13] sync_file: Protect access to driver and timeline name Date: Fri, 9 May 2025 16:33:50 +0100 Message-ID: <20250509153352.7187-12-tvrtko.ursulin@igalia.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250509153352.7187-1-tvrtko.ursulin@igalia.com> References: <20250509153352.7187-1-tvrtko.ursulin@igalia.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Protect the access to driver and timeline name which otherwise could be freed as dma-fence exported is signalling fences. Signed-off-by: Tvrtko Ursulin --- drivers/dma-buf/sync_file.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/dma-buf/sync_file.c b/drivers/dma-buf/sync_file.c index 212df4b849fe..ad87116baa24 100644 --- a/drivers/dma-buf/sync_file.c +++ b/drivers/dma-buf/sync_file.c @@ -136,11 +136,13 @@ char *sync_file_get_name(struct sync_file *sync_file, char *buf, int len) } else { struct dma_fence *fence = sync_file->fence; + dma_fence_access_begin(); snprintf(buf, len, "%s-%s%llu-%lld", dma_fence_driver_name(fence), dma_fence_timeline_name(fence), fence->context, fence->seqno); + dma_fence_access_end(); } return buf; @@ -262,6 +264,8 @@ static long sync_file_ioctl_merge(struct sync_file *sync_file, static int sync_fill_fence_info(struct dma_fence *fence, struct sync_fence_info *info) { + dma_fence_access_begin(); + strscpy(info->obj_name, dma_fence_timeline_name(fence), sizeof(info->obj_name)); strscpy(info->driver_name, dma_fence_driver_name(fence), @@ -273,6 +277,8 @@ static int sync_fill_fence_info(struct dma_fence *fence, ktime_to_ns(dma_fence_timestamp(fence)) : ktime_set(0, 0); + dma_fence_access_end(); + return info->status; } From patchwork Fri May 9 15:33:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 888960 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B2A8122F3B0 for ; Fri, 9 May 2025 15:34:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.97.179.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746804873; cv=none; b=azNATM/XOmJMJsSm9ALwWwBPy+21uOnvvUiDcsPrd+0azhnJ0pUnj/TwUTSyr1+kzc/NHI4XSG9qSE7Dp2miqJpPTwZM1DL42G3CogELpkabaQwp/ySgmabdp9bjOLSelzA1Bgy+OAd77Jp77jIhBG5pZ0EL5AoKcJ7Et74Vs0c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746804873; c=relaxed/simple; bh=n3K/T0v7XcjdzRw/YuiuFj8z56asaSlfGqqA9223SNg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MqGJgHCieMIbmPRfoPXvLNQ403pDiYCi8wXxKXKT4TcuQjagxdd0olTRYgTa7p1NMo8NwiLwhi/jgAWn+3fY4v9tST2wxuzikmGnkYtOjiBmwa7Yzd88wsjNr6/JfpG7HfzDFOZ9OmVzEo+rpWW+DtXoFK2LxGRFp50K9LIQXh4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=QwkXRg66; arc=none smtp.client-ip=213.97.179.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="QwkXRg66" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=xGM81iqmBKuUzaL0c9sCkqYNwqE2wL4bw4iwHKfeTdA=; b=QwkXRg664ioSG+4bSGpjpkYUmV gIao5Y/5Rw7NVZdX+VuRlAtet6PbVuu2JzzANtYdzHm4594z/ppwOrlybOEiCWxpKEYd0Kn5GJBda DMn4x1+rsus5vn4aLbeg0zwiSl4Pb0dXEutSDJ7uNPz8p4IMjRo1hD83rD8KFl6woRvNYDvfpJQsj 4pn024T6TaIBldUHq7trXJSgjoxcIN+vU/UKiinGkOLjvR6AUwl5Vi7drt9pMKeY19SsmkWsMEmrd NujUfT0ncbJ7TY0aBj5g+/JDTP2l5RMmU87Xh6zqiEBjTWZ1fPbEKgqLE8PWdH1b38A/cOSkBFQZV BwIxen3Q==; Received: from [81.79.92.254] (helo=localhost) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1uDPfP-005oGA-Uu; Fri, 09 May 2025 17:34:16 +0200 From: Tvrtko Ursulin To: dri-devel@lists.freedesktop.org Cc: Sumit Semwal , Gustavo Padovan , =?utf-8?q?Christian_K=C3=B6nig?= , Matthew Brost , Lucas De Marchi , Rodrigo Vivi , amd-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, kernel-dev@igalia.com, Tvrtko Ursulin Subject: [RFC v2 13/13] drm/xe: Make dma-fences compliant with the safe access rules Date: Fri, 9 May 2025 16:33:52 +0100 Message-ID: <20250509153352.7187-14-tvrtko.ursulin@igalia.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250509153352.7187-1-tvrtko.ursulin@igalia.com> References: <20250509153352.7187-1-tvrtko.ursulin@igalia.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Xe can free some of the data pointed to by the dma-fences it exports. Most notably the timeline name can get freed if userspace closes the associated submit queue. At the same time the fence could have been exported to a third party (for example a sync_fence fd) which will then cause an use- after-free on subsequent access. To make this safe we need to make the driver compliant with the newly documented dma-fence rules. Driver has to ensure a RCU grace period between signalling a fence and freeing any data pointed to by said fence. For the timeline name we simply make the queue be freed via kfree_rcu and for the shared lock associated with multiple queues we add a RCU grace period before freeing the per GT structure holding the lock. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/xe/xe_guc_exec_queue_types.h | 2 ++ drivers/gpu/drm/xe/xe_guc_submit.c | 7 ++++++- drivers/gpu/drm/xe/xe_hw_fence.c | 3 +++ 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h index 4c39f01e4f52..a3f421e2adc0 100644 --- a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h +++ b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h @@ -20,6 +20,8 @@ struct xe_exec_queue; struct xe_guc_exec_queue { /** @q: Backpointer to parent xe_exec_queue */ struct xe_exec_queue *q; + /** @rcu: For safe freeing of exported dma fences */ + struct rcu_head rcu; /** @sched: GPU scheduler for this xe_exec_queue */ struct xe_gpu_scheduler sched; /** @entity: Scheduler entity for this xe_exec_queue */ diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c index 369be36f7dc5..cda837ff0118 100644 --- a/drivers/gpu/drm/xe/xe_guc_submit.c +++ b/drivers/gpu/drm/xe/xe_guc_submit.c @@ -1274,7 +1274,11 @@ static void __guc_exec_queue_fini_async(struct work_struct *w) xe_sched_entity_fini(&ge->entity); xe_sched_fini(&ge->sched); - kfree(ge); + /* + * RCU free due sched being exported via DRM scheduler fences + * (timeline name). + */ + kfree_rcu(ge, rcu); xe_exec_queue_fini(q); xe_pm_runtime_put(guc_to_xe(guc)); } @@ -1457,6 +1461,7 @@ static int guc_exec_queue_init(struct xe_exec_queue *q) q->guc = ge; ge->q = q; + init_rcu_head(&ge->rcu); init_waitqueue_head(&ge->suspend_wait); for (i = 0; i < MAX_STATIC_MSG_TYPE; ++i) diff --git a/drivers/gpu/drm/xe/xe_hw_fence.c b/drivers/gpu/drm/xe/xe_hw_fence.c index 03eb8c6d1616..b2a0c46dfcd4 100644 --- a/drivers/gpu/drm/xe/xe_hw_fence.c +++ b/drivers/gpu/drm/xe/xe_hw_fence.c @@ -100,6 +100,9 @@ void xe_hw_fence_irq_finish(struct xe_hw_fence_irq *irq) spin_unlock_irqrestore(&irq->lock, flags); dma_fence_end_signalling(tmp); } + + /* Safe release of the irq->lock used in dma_fence_init. */ + synchronize_rcu(); } void xe_hw_fence_irq_run(struct xe_hw_fence_irq *irq)