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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2dba0619ee9sm455944fac.6.2025.05.08.20.42.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 May 2025 20:42:23 -0700 (PDT) From: Bjorn Andersson Date: Thu, 08 May 2025 22:42:11 -0500 Subject: [PATCH v2] usb: dwc3: qcom: Use bulk clock API and devres Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250508-dwc3-clk-bulk-v2-1-bad3427e88d4@oss.qualcomm.com> X-B4-Tracking: v=1; b=H4sIAJJ5HWgC/3WMyw6CMBQFf4XctSV9KdaV/2FYlLZII1BtpWpI/ 90rezeTzEnOrJBc9C7BqVohuuyTDzMK31VgBj1fHfEWHTjleyo5J/ZlBDHjjXQLQh2oVsxZqbs j4OceXe/fW+/Sog8+PUP8bPnMfuu/UmaEEdGYxijJhKD9OaRUPxY9mjBNNQLaUsoXCgNxSrEAA AA= X-Change-ID: 20250422-dwc3-clk-bulk-960a91ed4ab8 To: Thinh Nguyen , Greg Kroah-Hartman Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=5711; i=bjorn.andersson@oss.qualcomm.com; h=from:subject:message-id; bh=teynXbjo1NoamMkz/mK3yn4mJtFEC0NTXW1tybV/syA=; b=owEBgwJ8/ZANAwAIAQsfOT8Nma3FAcsmYgBoHXmeX6e59IWTXzyCaequW0oBZGH8BH3WxXVBn BGQudD41F2JAkkEAAEIADMWIQQF3gPMXzXqTwlm1SULHzk/DZmtxQUCaB15nhUcYW5kZXJzc29u QGtlcm5lbC5vcmcACgkQCx85Pw2ZrcWtrRAA1zBxybIzbMPR6uGtye4OcjT3/paWMzjuweplVkR LIPKFQkYEin+BkCFXPBaAZep9SUZkCmHka6xapTClnFoc3ZbD5CBxmqqZ79Anar/wKwYIWxaMYa YbrSafd5QWq/ln/xMSeUGwRikwq8o13acqrhRXKemLU3b2e/wv2D2lWvK40G7CGKbkjxHJqVEDJ El0/vwkyprHKfCgxaESOCh2VdxPFgdLQKDkHbv0NKHQeKEQ2Zt4lAcW0mpmrcCJnGWTfn3V9O/F UiwDOTNaj2h39ZY6jKzn3WuDqMFsNStrPqslVlzbIwgMfNig8GPCSeQ+KBugae0N74iz3+gioZ6 ggi2AsGTDCg2qDVVTahgAjVaCy0Wdh2H2ZErxpgiSG+XW091qr7Eoing744Og9pzuSf1yBN9FDd PCVSjEmLPjDw7dIu6fOBqmecvUlW7q3im9xjkkdp4FTR+dd87fyZEQpmkYecLidSwgRD9XnY6Vj 55oOV170Zs9KirgKscGEHx+tKmk9lv4mU8oKrrLTkQx0M2ytfV1ZXS98s0AtccvN2AG0Z+mdj6h 38vANyILaQXe4+qHGQ2MSbwmfGXnT8jGyv8NTyoj22Bdgh6VALSKtOsrAu8ywvKujIeBZznulcp I72RQY8j+c66Bmhxp9pCt4ZpRyYszk30YdVSpdmY4uK0= X-Developer-Key: i=bjorn.andersson@oss.qualcomm.com; a=openpgp; fpr=05DE03CC5F35EA4F0966D5250B1F393F0D99ADC5 X-Authority-Analysis: v=2.4 cv=PMAP+eqC c=1 sm=1 tr=0 ts=681d79a1 cx=c_pps a=nSjmGuzVYOmhOUYzIAhsAg==:117 a=DaeiM5VmU20ml6RIjrOvYw==:17 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=rTIJE58-mywXzjlQImAA:9 a=QEXdDO2ut3YA:10 a=1zu1i0D7hVQfj8NKfPKu:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTA5MDAzMyBTYWx0ZWRfX6aCmLzzDu0lf 8cBqirOOgwPB9RaXKqGZM9Lp7IO8Qy7BEaDYOZugzVaEQypmTM/mOYbjoRF8bkv728WszlvA6ZA 8cegSLf5jssrP/5HS9CRUGX+jWIruRgoT9tnZVobJsbOawfp/oYWIxATeEDkLA6nzI9eZb7c377 SRVin+zsG7y3trTfb9giuX53lIgfRFCjEM6ZYPbRnD8nkHBlBf7UjLtbHQEaXPPMlPJ5WISpov0 IZYvxmU4SThoTVN2KVX5Z2+3rwLFyVQQOebH5ZR6pNYJTXxUtChQ12w+bDB6UFtUojVa9ZCPGwu 8BRh407KS6t4mOhSmH1gDOWzlan7EZB6pNpPnXvmc+RQ/jKTkZOI2YqENDHuHCBUpXFLIXrZnIK JtjNLcoudiG3rTSfiDTrnPfY3uIr5tjXT60XTAT+jj+MhpvQBWhC1xEqA3OQiP2gDu27sLOq X-Proofpoint-GUID: ft7F0JgOm0QB6Q48ejXUOTvrZYe5JdOG X-Proofpoint-ORIG-GUID: ft7F0JgOm0QB6Q48ejXUOTvrZYe5JdOG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-09_01,2025-05-08_04,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 mlxscore=0 suspectscore=0 spamscore=0 bulkscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 mlxlogscore=999 adultscore=0 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2505090033 The Qualcomm DWC3 glue driver duplicates the logic of the bulk clock API to acquire, prepare, and unprepare the controller's clocks. It also manages the life cycle of these handled explicitly. Transition to the bulk clock API and manage the resources using devres, to clean up the code. The resource acquisition is moved above the initial reset pulse, to handle resource issues before the state is touched - other than this, this no functional change. Signed-off-by: Bjorn Andersson --- Changes in v2: - Actually call clk_bulk_prepare_enable()... - Moved the resource acquisition above the initial reset pulse (but keeping the prepare in it's current place) - Link to v1: https://lore.kernel.org/r/20250422-dwc3-clk-bulk-v1-1-37c7c941330f@oss.qualcomm.com --- drivers/usb/dwc3/dwc3-qcom.c | 90 ++++++++------------------------------------ 1 file changed, 15 insertions(+), 75 deletions(-) --- base-commit: f48887a98b78880b7711aca311fbbbcaad6c4e3b change-id: 20250422-dwc3-clk-bulk-960a91ed4ab8 Best regards, diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c index 20c00ba3bc3d29dfe1e11e38dedea0c94aaa6a81..7334de85ad10c7f680a794bd7818f1802b130440 100644 --- a/drivers/usb/dwc3/dwc3-qcom.c +++ b/drivers/usb/dwc3/dwc3-qcom.c @@ -73,7 +73,7 @@ struct dwc3_qcom { struct device *dev; void __iomem *qscratch_base; struct dwc3 dwc; - struct clk **clks; + struct clk_bulk_data *clks; int num_clocks; struct reset_control *resets; struct dwc3_qcom_port ports[DWC3_QCOM_MAX_PORTS]; @@ -431,9 +431,7 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup) if (!(val & PWR_EVNT_LPM_IN_L2_MASK)) dev_err(qcom->dev, "port-%d HS-PHY not in L2\n", i + 1); } - - for (i = qcom->num_clocks - 1; i >= 0; i--) - clk_disable_unprepare(qcom->clks[i]); + clk_bulk_disable_unprepare(qcom->num_clocks, qcom->clks); ret = dwc3_qcom_interconnect_disable(qcom); if (ret) @@ -465,14 +463,9 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup) if (dwc3_qcom_is_host(qcom) && wakeup) dwc3_qcom_disable_interrupts(qcom); - for (i = 0; i < qcom->num_clocks; i++) { - ret = clk_prepare_enable(qcom->clks[i]); - if (ret < 0) { - while (--i >= 0) - clk_disable_unprepare(qcom->clks[i]); - return ret; - } - } + ret = clk_bulk_prepare_enable(qcom->num_clocks, qcom->clks); + if (ret < 0) + return ret; ret = dwc3_qcom_interconnect_enable(qcom); if (ret) @@ -648,62 +641,14 @@ static int dwc3_qcom_setup_irq(struct dwc3_qcom *qcom, struct platform_device *p return 0; } -static int dwc3_qcom_clk_init(struct dwc3_qcom *qcom, int count) -{ - struct device *dev = qcom->dev; - struct device_node *np = dev->of_node; - int i; - - if (!np || !count) - return 0; - - if (count < 0) - return count; - - qcom->num_clocks = count; - - qcom->clks = devm_kcalloc(dev, qcom->num_clocks, - sizeof(struct clk *), GFP_KERNEL); - if (!qcom->clks) - return -ENOMEM; - - for (i = 0; i < qcom->num_clocks; i++) { - struct clk *clk; - int ret; - - clk = of_clk_get(np, i); - if (IS_ERR(clk)) { - while (--i >= 0) - clk_put(qcom->clks[i]); - return PTR_ERR(clk); - } - - ret = clk_prepare_enable(clk); - if (ret < 0) { - while (--i >= 0) { - clk_disable_unprepare(qcom->clks[i]); - clk_put(qcom->clks[i]); - } - clk_put(clk); - - return ret; - } - - qcom->clks[i] = clk; - } - - return 0; -} - static int dwc3_qcom_probe(struct platform_device *pdev) { struct dwc3_probe_data probe_data = {}; - struct device_node *np = pdev->dev.of_node; struct device *dev = &pdev->dev; struct dwc3_qcom *qcom; struct resource res; struct resource *r; - int ret, i; + int ret; bool ignore_pipe_clk; bool wakeup_source; @@ -719,6 +664,11 @@ static int dwc3_qcom_probe(struct platform_device *pdev) "failed to get resets\n"); } + ret = devm_clk_bulk_get_all(&pdev->dev, &qcom->clks); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to get clocks\n"); + qcom->num_clocks = ret; + ret = reset_control_assert(qcom->resets); if (ret) { dev_err(&pdev->dev, "failed to assert resets, err=%d\n", ret); @@ -733,11 +683,9 @@ static int dwc3_qcom_probe(struct platform_device *pdev) goto reset_assert; } - ret = dwc3_qcom_clk_init(qcom, of_clk_get_parent_count(np)); - if (ret) { - dev_err_probe(dev, ret, "failed to get clocks\n"); + ret = clk_bulk_prepare_enable(qcom->num_clocks, qcom->clks); + if (ret < 0) goto reset_assert; - } r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!r) { @@ -806,10 +754,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) remove_core: dwc3_core_remove(&qcom->dwc); clk_disable: - for (i = qcom->num_clocks - 1; i >= 0; i--) { - clk_disable_unprepare(qcom->clks[i]); - clk_put(qcom->clks[i]); - } + clk_bulk_disable_unprepare(qcom->num_clocks, qcom->clks); reset_assert: reset_control_assert(qcom->resets); @@ -820,15 +765,10 @@ static void dwc3_qcom_remove(struct platform_device *pdev) { struct dwc3 *dwc = platform_get_drvdata(pdev); struct dwc3_qcom *qcom = to_dwc3_qcom(dwc); - int i; dwc3_core_remove(&qcom->dwc); - for (i = qcom->num_clocks - 1; i >= 0; i--) { - clk_disable_unprepare(qcom->clks[i]); - clk_put(qcom->clks[i]); - } - qcom->num_clocks = 0; + clk_bulk_disable_unprepare(qcom->num_clocks, qcom->clks); dwc3_qcom_interconnect_exit(qcom); reset_control_assert(qcom->resets);