From patchwork Sat May 17 19:19:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ze Huang X-Patchwork-Id: 890985 Received: from mail-m49198.qiye.163.com (mail-m49198.qiye.163.com [45.254.49.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E8141EA90; Sat, 17 May 2025 19:19:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747509603; cv=none; b=jk852MkViupEC7jW/koqsfHy6wRx3mQIu7UtQWNKWMAZsZHs7KEUoXxHPSF+viM75CQzFT55pgHbnZMRYFdFDdWPLQRI5JAT/WkemgKsVXd66kpb70kbPWPpI5uJPGPY1vHX18evp0imCvCM6GJZtrGrihSyUq1WrsQW9v87vhs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747509603; c=relaxed/simple; bh=q4+q4KP0i1Wc2LpG8lcLj/nJxJ4h5HU8IRe3ZcTOc8M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=s/YvXPMdbC/xIlFkfklN9N7hsqn+8QIQgghjx3Sc3jHZPHgDZuy7yqcn/Vfwl+KrHPsNdKIZHikE8Dm9PtCyRsXA/LCLLCTmKgSDnXBcBbgFO3eUorwWtkDor6YDIw7uwrrsFScioF4AdbBKw1MUVDlNND6B2DC7DdrgBz6d/zw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=whut.edu.cn; spf=pass smtp.mailfrom=whut.edu.cn; arc=none smtp.client-ip=45.254.49.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=whut.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=whut.edu.cn Received: from [127.0.0.1] (gy-adaptive-ssl-proxy-3-entmail-virt135.gy.ntes [27.18.99.32]) by smtp.qiye.163.com (Hmail) with ESMTP id 15658ef43; Sun, 18 May 2025 03:19:51 +0800 (GMT+08:00) From: Ze Huang Date: Sun, 18 May 2025 03:19:19 +0800 Subject: [PATCH v3 1/3] dt-bindings: usb: dwc3: add support for SpacemiT K1 Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250518-b4-k1-dwc3-v3-v3-1-7609c8baa2a6@whut.edu.cn> References: <20250518-b4-k1-dwc3-v3-v3-0-7609c8baa2a6@whut.edu.cn> In-Reply-To: <20250518-b4-k1-dwc3-v3-v3-0-7609c8baa2a6@whut.edu.cn> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Thinh Nguyen , Philipp Zabel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org, Ze Huang X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747509584; l=2805; i=huangze@whut.edu.cn; s=20250325; h=from:subject:message-id; bh=q4+q4KP0i1Wc2LpG8lcLj/nJxJ4h5HU8IRe3ZcTOc8M=; b=1BLejhDbCoTqProPlguK1gw2+w6G0OrAWxh2AG82n4IPItJpo/7ugJKtVo9pO+fgfIamEElbu vbIV55koxkrB6m6TLkCrL//Z88lK2mv4LmUdWkS9GM9tHaQkFH6bQ11 X-Developer-Key: i=huangze@whut.edu.cn; a=ed25519; pk=C3zfn/kH6oMJickaXBa8dxTZO68EBiD93F+tAenboRA= X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkZHh5IVkxISk5NTkJNS0NCHlYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlJTFVKQ1VCQlVISVlXWRYaDxIVHRRZQVlPS0hVSktISk5MTlVKS0tVSkJLS1 kG X-HM-Tid: 0a96dfb03e9603a1kunm15658ef43 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6MiI6TSo6SjE1PioeNBkoLBEV EDQwCjJVSlVKTE9MTktCTkJMTkNOVTMWGhIXVRMOGhUcAR47DBMOD1UeHw5VGBVFWVdZEgtZQVlJ TFVKQ1VCQlVISVlXWQgBWUFPSElCNwY+ Add support for the USB 3.0 Dual-Role Device (DRD) controller embedded in the SpacemiT K1 SoC. The controller is based on the Synopsys DesignWare Core USB 3 (DWC3) IP, supporting USB3.0 host mode and USB 2.0 DRD mode. Signed-off-by: Ze Huang --- .../devicetree/bindings/usb/spacemit,k1-dwc3.yaml | 84 ++++++++++++++++++++++ 1 file changed, 84 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml new file mode 100644 index 0000000000000000000000000000000000000000..2fb9f1014c4e901417818a37b6289814a2d3d49a --- /dev/null +++ b/Documentation/devicetree/bindings/usb/spacemit,k1-dwc3.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/spacemit,k1-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K1 SuperSpeed DWC3 USB SoC Controller + +maintainers: + - Ze Huang + +description: | + The SpacemiT K1 embeds a DWC3 USB IP Core which supports Host functions + for USB 3.0 and DRD for USB 2.0. + + Key features: + - USB3.0 SuperSpeed and USB2.0 High/Full/Low-Speed support + - Supports low-power modes (USB2.0 suspend, USB3.0 U1/U2/U3) + - Internal DMA controller and flexible endpoint FIFO sizing + + Communication Interface: + - Use of PIPE3 (125MHz) interface for USB3.0 PHY + - Use of UTMI+ (30/60MHz) interface for USB2.0 PHY + +allOf: + - $ref: snps,dwc3-common.yaml# + +properties: + compatible: + const: spacemit,k1-dwc3 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: usbdrd30 + + resets: + maxItems: 1 + + interrupts: + maxItems: 1 + + interconnects: + maxItems: 1 + description: + On SpacemiT K1, USB performs DMA through bus other than parent DT node. + The 'interconnects' property explicitly describes this path, ensuring + correct address translation. + + interconnect-names: + const: dma-mem + + vbus-supply: + description: A phandle to the regulator supplying the VBUS voltage. + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - interrupts + - interconnects + - interconnect-names + +unevaluatedProperties: false + +examples: + - | + usb@c0a00000 { + compatible = "spacemit,k1-dwc3"; + reg = <0xc0a00000 0x10000>; + clocks = <&syscon_apmu 16>; + clock-names = "usbdrd30"; + resets = <&syscon_apmu 8>; + interrupt-parent = <&plic>; + interrupts = <125>; + interconnects = <&mbus0>; + interconnect-names = "dma-mem"; + }; From patchwork Sat May 17 19:19:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ze Huang X-Patchwork-Id: 890984 Received: from mail-m49198.qiye.163.com (mail-m49198.qiye.163.com [45.254.49.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC6C5214A60; Sat, 17 May 2025 19:20:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747509615; cv=none; b=gpCzE5sM7C1r17KONZdr9TkvuuyoyFbmuDMAqMU+lKhO8O7ckvr+EKQX+PW+kWahNoctC/1yy7X5sEvMJs+rG/DIaPBBKLIYdzyH/LtET7zDisKn8Bsq1ozDhy818HkLzwAoREwGepmKOtdsuGHI2XUM14cujBz2S+ZQyUv451c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747509615; c=relaxed/simple; bh=rWNX7rAr+b4bFLsH47gMGJjvT7Qs2wLYMbEt8PcTbTo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tW8OS1jX+7nOKV63dTqERC/4a6SmawHsGiYsswOJO8pzDORnD42y31q6oMCTd/K4BJVI4QLgDnyHilm9juIwxrFXT5IhUYSUm27f9xbEbeXYIweHBxMD7pPM+5XMkJB4CyH+w9alEhOKJpCIrQ+v53Ulxw/gCIrcVN9M72uH3YI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=whut.edu.cn; spf=pass smtp.mailfrom=whut.edu.cn; arc=none smtp.client-ip=45.254.49.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=whut.edu.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=whut.edu.cn Received: from [127.0.0.1] (gy-adaptive-ssl-proxy-3-entmail-virt135.gy.ntes [27.18.99.32]) by smtp.qiye.163.com (Hmail) with ESMTP id 15658ef45; Sun, 18 May 2025 03:20:04 +0800 (GMT+08:00) From: Ze Huang Date: Sun, 18 May 2025 03:19:21 +0800 Subject: [PATCH v3 3/3] riscv: dts: spacemit: add usb3.0 support for K1 Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250518-b4-k1-dwc3-v3-v3-3-7609c8baa2a6@whut.edu.cn> References: <20250518-b4-k1-dwc3-v3-v3-0-7609c8baa2a6@whut.edu.cn> In-Reply-To: <20250518-b4-k1-dwc3-v3-v3-0-7609c8baa2a6@whut.edu.cn> To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Thinh Nguyen , Philipp Zabel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org, Ze Huang X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747509584; l=5447; i=huangze@whut.edu.cn; s=20250325; h=from:subject:message-id; bh=rWNX7rAr+b4bFLsH47gMGJjvT7Qs2wLYMbEt8PcTbTo=; b=DJ4eAFSBzR4kzUPkhDX8kzn0s2FVaGIWavk5ZiCZNKFGfSjQBMkR63a4KPWBp6lsEGZ8Sv/eU /itUro/uzlbCaLNXw21230vJ4CEjvZV0ePIeoORQ3D/ioC2FHPbu7jo X-Developer-Key: i=huangze@whut.edu.cn; a=ed25519; pk=C3zfn/kH6oMJickaXBa8dxTZO68EBiD93F+tAenboRA= X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkaTRlNVkpDSx0ZTR5ISkpOTFYeHw5VEwETFhoSFy QUDg9ZV1kYEgtZQVlJTFVKQ1VCQlVISVlXWRYaDxIVHRRZQVlPS0hVSktISk5MTlVKS0tVSkJLS1 kG X-HM-Tid: 0a96dfb0712e03a1kunm15658ef45 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PxA6Ahw4CzEzTSo3Hho8LBUB CSkwCS1VSlVKTE9MTktCTUpLTkNNVTMWGhIXVRMOGhUcAR47DBMOD1UeHw5VGBVFWVdZEgtZQVlJ TFVKQ1VCQlVISVlXWQgBWUFNQk1MNwY+ Add USB 3.0 support for the SpacemiT K1 SoC, including the following components: - USB 2.0 PHY nodes - USB 3.0 combo PHY node - USB 3.0 host controller - USB 3.0 hub and vbus regulator (usb3_vhub, usb3_vbus) - DRAM interconnect node for USB DMA ("dma-mem") The `usb3_vbus` and `usb3_vhub` regulator node provides a fixed 5V supply to power the onboard USB 3.0 hub and usb vbus. On K1, some DMA transfers from devices to memory use separate buses with different DMA address translation rules from the parent node. We express this relationship through the interconnects node "dma-mem", similar to [1]. Link: https://lore.kernel.org/all/09e5e29a4c54ec7337e4e62e5d6001b69d92b103.1554108995.git-series.maxime.ripard@bootlin.com [1] Signed-off-by: Ze Huang --- arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts | 50 ++++++++++++++++++ arch/riscv/boot/dts/spacemit/k1.dtsi | 69 +++++++++++++++++++++++++ 2 files changed, 119 insertions(+) diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts index 816ef1bc358ec490aff184d5915d680dbd9f00cb..c5832b399f96b6bbede02fbb019c7b616cedff77 100644 --- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts +++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts @@ -28,6 +28,25 @@ led1 { default-state = "on"; }; }; + + usb3_vhub: regulator-vhub-5v { + compatible = "regulator-fixed"; + regulator-name = "USB30_VHUB"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio K1_GPIO(123) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + usb3_vbus: regulator-vbus-5v { + compatible = "regulator-fixed"; + regulator-name = "USB30_VBUS"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + gpio = <&gpio K1_GPIO(97) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &uart0 { @@ -35,3 +54,34 @@ &uart0 { pinctrl-0 = <&uart0_2_cfg>; status = "okay"; }; + +&usbphy2 { + status = "okay"; +}; + +&combphy { + status = "okay"; +}; + +&usb_dwc3 { + vbus-supply = <&usb3_vbus>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + hub_2_0: hub@1 { + compatible = "usb2109,2817"; + reg = <0x1>; + vdd-supply = <&usb3_vhub>; + peer-hub = <&hub_3_0>; + reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>; + }; + + hub_3_0: hub@2 { + compatible = "usb2109,817"; + reg = <0x1>; + vdd-supply = <&usb3_vhub>; + peer-hub = <&hub_2_0>; + reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>; + }; +}; diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi index 61f5ca250ded0da7b91cd4bbd55a5574a89c6ab0..164244fdb49f5d50a8abadb7b7e478cccc828087 100644 --- a/arch/riscv/boot/dts/spacemit/k1.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi @@ -4,6 +4,8 @@ */ #include +#include +#include /dts-v1/; / { @@ -346,6 +348,15 @@ soc { dma-noncoherent; ranges; + mbus0: dram-controller@0 { + reg = <0x0 0x00000000 0x0 0x80000000>; + reg-names = "dram"; + #address-cells = <2>; + #size-cells = <2>; + dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; + #interconnect-cells = <0>; + }; + syscon_rcpu: system-controller@c0880000 { compatible = "spacemit,k1-syscon-rcpu"; reg = <0x0 0xc0880000 0x0 0x2048>; @@ -358,6 +369,64 @@ syscon_rcpu2: system-controller@c0888000 { #reset-cells = <1>; }; + usb_dwc3: usb@c0a00000 { + compatible = "spacemit,k1-dwc3"; + reg = <0x0 0xc0a00000 0x0 0x10000>; + clocks = <&syscon_apmu CLK_USB30>; + clock-names = "usbdrd30"; + resets = <&syscon_apmu RESET_USB3_0>; + interrupt-parent = <&plic>; + interrupts = <125>; + interconnects = <&mbus0>; + interconnect-names = "dma-mem"; + phys = <&usbphy2>, <&combphy PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + dr_mode = "host"; + phy_type = "utmi"; + snps,hsphy_interface = "utmi"; + snps,dis_enblslpm_quirk; + snps,dis-u2-freeclk-exists-quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,dis_rxdet_inp3_quirk; + status = "disabled"; + }; + + usbphy0: phy@c0940000 { + compatible = "spacemit,k1-usb2-phy"; + reg = <0x0 0xc0940000 0x0 0x200>; + clocks = <&syscon_apmu CLK_USB_AXI>; + #phy-cells = <0>; + status = "disabled"; + }; + + usbphy1: phy@c09c0000 { + compatible = "spacemit,k1-usb2-phy"; + reg = <0x0 0xc09c0000 0x0 0x200>; + clocks = <&syscon_apmu CLK_USB_P1>; + #phy-cells = <0>; + status = "disabled"; + }; + + usbphy2: phy@c0a30000 { + compatible = "spacemit,k1-usb2-phy"; + reg = <0x0 0xc0a30000 0x0 0x200>; + clocks = <&syscon_apmu CLK_USB30>; + #phy-cells = <0>; + status = "disabled"; + }; + + combphy: phy@c0b10000 { + compatible = "spacemit,k1-combphy"; + reg = <0x0 0xc0b10000 0x0 0x800>, + <0x0 0xd4282910 0x0 0x400>; + reg-names = "ctrl", "sel"; + resets = <&syscon_apmu RESET_PCIE0>; + #phy-cells = <1>; + status = "disabled"; + }; + syscon_apbc: system-control@d4015000 { compatible = "spacemit,k1-syscon-apbc"; reg = <0x0 0xd4015000 0x0 0x1000>;