From patchwork Wed Jun 11 19:47:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 895576 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 502CA29B213; Wed, 11 Jun 2025 19:48:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671318; cv=none; b=U7un6vIdYgw6G7yFijd6M+f5j5/YXyPVbLyVU7Z2vyrBfsu7t7e3xybdo+1sipsEL1L3IexdN3oEkxys/ImFh7QVw8B2vva31HmEvbLQpYvAbf6bkwgEA8O5zvSslVX96Uoi2OxMu8Cm3Fqwu+a1LLCB6cbRU4duncwT+zHRoL8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671318; c=relaxed/simple; bh=0IogV/WYEoJgdGYIarAuHouch0dnxthSZymoHBE3dXo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Dfr5cv1rmbQMmBQOs2IEd6YPiiP+E+ZGt99uAR1uml1L9BeEUgZyyOOWFUU3ENKonjyIfwDV+ON1mJJUPiH/JN1pOib4egofuNgvayd/1LvjEGqfSFdh4hXlHiGucFKCCVRuhWYaoW5CaGMGHdtq7Y5LRnkZj5BgKLyW3nAYIl4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=t2u+pK0C; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="t2u+pK0C" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1749671317; x=1781207317; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0IogV/WYEoJgdGYIarAuHouch0dnxthSZymoHBE3dXo=; b=t2u+pK0CwDcybMGCHeCVPA/NLlCRq4NYx1yLEa8zua7OujMZXJpEHQpK VlhXs98WQj9LnpN9TgFJp+4ijVa6lSriqH+zZiuCHiu8qa4Usg/0kQzD2 k2COdkUjKKwBO6hnFkp8rIa/hhg/dGtgIt1ZmYtpvqAQ9vIeIf0pwAn8z axVjaoxqK9/veLFAdMfNlEAV9xgzh50krNEvFkKj0sR85Z3qMpxDpzyYX wQhTbZFp1ZUvcCOkB+frR72pXFPjQxFyX+nSd8TZTbRsaGUmVy2Fi9MWb dZ+Hk2Td9HZ+n9rwnxgyxbND8gPZ5vQQH97MgRwKFi4UFVBZCFZ2fWQxt Q==; X-CSE-ConnectionGUID: VqjTqfGTSymHXSpb+r0c0A== X-CSE-MsgGUID: AHBRzxCASWuSQB5jtvbCVg== X-IronPort-AV: E=Sophos;i="6.16,228,1744095600"; d="scan'208";a="42226222" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 11 Jun 2025 12:48:26 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Wed, 11 Jun 2025 12:48:16 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Wed, 11 Jun 2025 12:48:16 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH v2 01/10] dt-bindings: crypto: add sama7d65 in Atmel AES Date: Wed, 11 Jun 2025 12:47:25 -0700 Message-ID: <7aa1862f790ea19bf7bb55e07ec4b9295c5f7a44.1749666053.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add DT bindings for SAMA7D65 SoC in atmel AES. The SAMA7D65 similar to the SAM9x75 SoC supports HMAC, dual buffer, and GCM. And similar all 3 it supports CBC, CFB, CTR, ECB, and XTS. Signed-off-by: Ryan Wanner Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml index 7dc0748444fd..19010f90198a 100644 --- a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml +++ b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml @@ -15,7 +15,9 @@ properties: oneOf: - const: atmel,at91sam9g46-aes - items: - - const: microchip,sam9x7-aes + - enum: + - microchip,sam9x7-aes + - microchip,sama7d65-aes - const: atmel,at91sam9g46-aes reg: From patchwork Wed Jun 11 19:47:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 897701 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D55C02BD5B6; Wed, 11 Jun 2025 19:48:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671320; cv=none; b=OUIHXq/reJse7EJbEWyzmJd+QmkL58p7UWUnlOUg6W0H+pGccn6SxU46LKtRZk3R/9959/2rP7NzawFsXxkpgM4KXC2pYCfnqlbN8r9xYKS7JNHfG2vkV+BV0MJWTkAzAnOIh3nEKL7tRWMyY2IQOe9qReX9WZsw1gUvVxQOa7I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671320; c=relaxed/simple; bh=dcOfXL9MltZ3nYKkbPpRui8wd9Bj1jDl3/DeSQhb8jU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=iODc61BuB6JWqgBVNHlM/uTDn2mcI6uXdHaO7i0CPX6Q6RrdX6IUjtBUAmTg1qBxixBVh5g3cW9nUR86C2teAJ244OxDmqn0ircSDQBlAO9Y3dciBeGvtn+HWZwnUHyvUFf5uRxm94xMF7q9/lI5K4zkQ90nUYC4p86JCaIbUwE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=ffepEVfX; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="ffepEVfX" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1749671318; x=1781207318; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dcOfXL9MltZ3nYKkbPpRui8wd9Bj1jDl3/DeSQhb8jU=; b=ffepEVfXYnEwCXTxFdhxe+iLEzxAN1B8Wwq1pRqYWC0eZYUzd03c2umi Ols6ucsH4Ksfbo22cYRq3xoBMr4ApHPA4P8g9REurMWB4prdL3MsdZqR7 DVfCEv8AEDMHGeAPvQ/slj8s7A9sNxfqZA7SqUtIE9HXq5BW4j7Fcrhvw tx2U7x3JHFtrk1pVwOfWJI8IBv4q/p0nFXPMdNePCwj56RmBIVKMlHGjO HJt+/v2YE2eJ7HR9NCCs4yCO2lwteHNma03PCBq5sSVFlQSLREBcPmoIf RPCXzLeofjET+Pf3/u6pHaMn+q6nCUTgCjSMojzW/MziZrNGBl+Ki3156 w==; X-CSE-ConnectionGUID: VqjTqfGTSymHXSpb+r0c0A== X-CSE-MsgGUID: vvL/xi+4RCO3wjDjSuojTA== X-IronPort-AV: E=Sophos;i="6.16,228,1744095600"; d="scan'208";a="42226223" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 11 Jun 2025 12:48:26 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Wed, 11 Jun 2025 12:48:16 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Wed, 11 Jun 2025 12:48:16 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH v2 02/10] dt-bindings: crypto: add sama7d65 in Atmel SHA Date: Wed, 11 Jun 2025 12:47:26 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add DT bindings for SAMA7D65 SoC Atmel SHA. The SAMA7D65 similar to the SAM9x75 SoC supports SHA1/224/256/384/512 and supports HMAC for the same hashes. They both also support automatic padding as well as double buffering. Signed-off-by: Ryan Wanner --- .../devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml index d378c53314dd..39e076b275b3 100644 --- a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml +++ b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml @@ -15,7 +15,9 @@ properties: oneOf: - const: atmel,at91sam9g46-sha - items: - - const: microchip,sam9x7-sha + - enum: + - microchip,sam9x7-sha + - microchip,sama7d65-sha - const: atmel,at91sam9g46-sha reg: From patchwork Wed Jun 11 19:47:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 895575 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F3D2F2BD015; Wed, 11 Jun 2025 19:48:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671328; cv=none; b=n7NHC2rxWbQ9DAZJW6mVoiMQhgwV6I/Zy955Yf4+pGJvMCGmsSFO9tAzNC6CtweCEgbCmHGWM4HHMYMSBTVSm4HyitRQ3yk07ZvjhtfSA0sbJM+zqeJopRf6/xr+FU4WQofLxNzjj+5E42MgNC9IE6Cr6hbBVvNQxBbAf759IfY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671328; c=relaxed/simple; bh=QqgIym6p0/qWG6bPfyPWCvi9fxJfP7GcleXqFk/F74k=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=pbHUXgpOJkwZTJRk9pWGTJr8XTLQ3G/WDUZZXrX5GcrReSR2zD/oP3xAmWEoW5U+Qm2rYYi2IIE0BR0ASbicklgNN1N1aJqV3eejoW3cwxtaPo1hmys3VR1T7amk7DdsHCTjLnNt9LIAm2gHgCNDPsGI0fHHP9rU/H9k0XYnwA8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=f+TOU63+; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="f+TOU63+" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1749671327; x=1781207327; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QqgIym6p0/qWG6bPfyPWCvi9fxJfP7GcleXqFk/F74k=; b=f+TOU63+WD6enj74efvGIVRLTZeB50P5KKi8WFof9/dpKj6BbwJ4E94w 5b9jgi53bXzeOBPMbownBvvXUsnOu1hUbym/sil2aP9Q7iSeSqWLkhMQI 0TigZ2aOP7w4qzQiEmPUCvLILwUJw4BRboV+nIhP/JELRjDR57rKA2Exf TiVcqOf2o66yZxuz312VfGVrhROjqBmRRrVI92RaDmVi4+LlhdZMntQn6 YWrpKpR7I0PxYSJkrtecsAxgkOBtrAUrTYCP13AiIyfYCiWfObKpzjdkk aDwbEddFTbIe2JqtgP0DcxB4FtMLporADzAFeuBgW1Lkj1iR0/Vfcywg7 Q==; X-CSE-ConnectionGUID: Mlj04rVUS3aXDCaAEgxBzw== X-CSE-MsgGUID: tdR9S1agR1iDCe8VcV5Rsg== X-IronPort-AV: E=Sophos;i="6.16,228,1744095600"; d="scan'208";a="210175081" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 11 Jun 2025 12:48:45 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Wed, 11 Jun 2025 12:48:16 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Wed, 11 Jun 2025 12:48:16 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH v2 03/10] dt-bindings: crypto: add sama7d65 in Atmel TDES Date: Wed, 11 Jun 2025 12:47:27 -0700 Message-ID: <1fa63c0ff667c61c924f1571d9c2f03cd1fcf7b2.1749666053.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add DT bindings for SAMA7D65 SoC Atmel TDES. The SAMA7D65 SoC has the same capability as the SAM9x75 SoC. Signed-off-by: Ryan Wanner Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml index 6a441f79efea..6f16008c4251 100644 --- a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml +++ b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml @@ -15,7 +15,9 @@ properties: oneOf: - const: atmel,at91sam9g46-tdes - items: - - const: microchip,sam9x7-tdes + - enum: + - microchip,sam9x7-tdes + - microchip,sama7d65-tdes - const: atmel,at91sam9g46-tdes reg: From patchwork Wed Jun 11 19:47:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 897700 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 89C2C2BD582; Wed, 11 Jun 2025 19:48:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671330; cv=none; b=VPF3XuDUFH5uMquhF/0VezTuAtPILdMZgnzT3uX0hKqT6YA62SI6bJ0YsNNgp0om14ncOXCOAePTOUoLx2x2d71CybSBcb5VKH95OnQdkCx23nMDZwuGc6j9KFUVyONM5zEIIIl0Ro00GaSbZKy0/kWKt24MkcK7FgC3kYfWRsA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671330; c=relaxed/simple; bh=e2CR4qFcyAvu1VwvbaZBR1DNF3T1rdks6W3neIG4I04=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=sXTUBlChxsFuS+VvSs4k/XxC57t0xu97q9sFaAT9F0RKoZVnfzdw6zV/NTChiBY306PwLB0phB1TyLxRiZ/YKabrKKVXtftUBTIW0kCrtDvQei3iQyzdcniLhFnjEaeN0vgCk67SAAI+VXs31O+yQk5ijkw9vIEbz9EGVgooLMk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=sd/D0s+g; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="sd/D0s+g" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1749671328; x=1781207328; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=e2CR4qFcyAvu1VwvbaZBR1DNF3T1rdks6W3neIG4I04=; b=sd/D0s+gwOO94hJ3+ZPa88jgmGqdTM+ACPK7C4fYIpLBwE9R3pT9o6mq JUj+m8KOdqRz5nkBJeFOz0Q7nOpmtms438A/5lKEVd0VWA/UQEpgfpiVG jL2P0P+HSCQRVDTqxteJOP44162i3u3PVwxFE8iEKbkCM+0wyAcQJrm5Z 7PcdPkQzHC34TEqy/e4bWJ+q/nHaQaRbJlIOQzajQfpmgEqnsH67sfeqB IDxEgUsUycAm/0eVY/xpurG1AwF69CEhWYQNdK03wmE94VJ3+OPPSaAya 2nobDG+AZsb2A2oTCpnRkz/P1WituUDe9sgHss2Vimkk7Zr00sstac5Kv w==; X-CSE-ConnectionGUID: Mlj04rVUS3aXDCaAEgxBzw== X-CSE-MsgGUID: jMm4TowrQFuTZc653joPyw== X-IronPort-AV: E=Sophos;i="6.16,228,1744095600"; d="scan'208";a="210175090" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 11 Jun 2025 12:48:47 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Wed, 11 Jun 2025 12:48:16 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Wed, 11 Jun 2025 12:48:16 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH v2 04/10] dt-bindings: rng: atmel, at91-trng: add sama7d65 TRNG Date: Wed, 11 Jun 2025 12:47:28 -0700 Message-ID: <80878d76cfa34ebbc262f245facb98d4a1bf9569.1749666053.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add compatible for Microchip SAMA7D65 SoC TRNG. Signed-off-by: Ryan Wanner Reviewed-by: Claudiu Beznea Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/rng/atmel,at91-trng.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/rng/atmel,at91-trng.yaml b/Documentation/devicetree/bindings/rng/atmel,at91-trng.yaml index b38f8252342e..f78614100ea8 100644 --- a/Documentation/devicetree/bindings/rng/atmel,at91-trng.yaml +++ b/Documentation/devicetree/bindings/rng/atmel,at91-trng.yaml @@ -24,6 +24,7 @@ properties: - items: - enum: - microchip,sam9x7-trng + - microchip,sama7d65-trng - const: microchip,sam9x60-trng clocks: From patchwork Wed Jun 11 19:47:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 895574 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E2DBA288CA2; Wed, 11 Jun 2025 19:48:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671330; cv=none; b=SwDkE2Nt32twR+yeTXxfAKPBKdLIrBsksouLVMhnzSI4IuYzx5hh+8t+RAnHCiBIf+vt6ngwHkqFdVfScaePWYVoWbsM6zx9Pg82O5KEgHeYO9IUGHmlRdtVMu82xroZnrJdNlaIjVApwjGZ4mBL/AaEi+DSVIr+okydhoxaKrY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671330; c=relaxed/simple; bh=Z6V7mSq7GXzEixyZ5bJFvSwoZa1KZkqKDSMRxyrkX9g=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=RcJN/GzR+TEBsl5DAzxXVjkpWz1W1lvQnKavhXEMYC5cLSmI7irWEKTbkXwBLzLw5lqjwyJnY7d/ncQywRJSBq2yTJnR73p9lZM+voJGAVJVnBKDCvTkruHVyex+JYAMzXBBAo2DdJLyWZA6ugv9OHZmCIgsUAWl9Jy/JVmwgqY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=Y/dTTSw1; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="Y/dTTSw1" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1749671328; x=1781207328; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Z6V7mSq7GXzEixyZ5bJFvSwoZa1KZkqKDSMRxyrkX9g=; b=Y/dTTSw1YPeiKmqouLZqQN6hWHYfeXvmYI8PGZgXb12Y80OxdzO4eBIa RMPC+WVEYPyVOPs0ESUTJ/ulCoGkJNVqdrkVL2okeU2nZDwiLbYCwTfGO 43Bn2ctP6Ex2uHAATxfiB+AUw0OiNeIVi71edRjij3Qnf9Dv7rob784nZ qnW/845kKOOaupH8D36caGj/ELyXjOr2WEUULnYneu6giFJmClQVMqouY GxZK1Ek/a26SC3ijLVY3I5E4O+IHSuRrtYwQ/f/VIaY7yob08382IQEzn Q6Sqjs/9pKWtBFpXzykKKdZLtODBy9gT0HAYQsbw33JsSIUxq7HU/Z+ZM w==; X-CSE-ConnectionGUID: Mlj04rVUS3aXDCaAEgxBzw== X-CSE-MsgGUID: dVq9KnpeREi65SXQ+s1x9A== X-IronPort-AV: E=Sophos;i="6.16,228,1744095600"; d="scan'208";a="210175091" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 11 Jun 2025 12:48:47 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Wed, 11 Jun 2025 12:48:17 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Wed, 11 Jun 2025 12:48:16 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH v2 05/10] crypto: atmel - add support for AES and SHA IPs available on sama7d65 SoC Date: Wed, 11 Jun 2025 12:47:29 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner This patch adds support for hardware version of AES and SHA IPs available on SAMA7D65 SoC. Signed-off-by: Ryan Wanner --- drivers/crypto/atmel-aes.c | 1 + drivers/crypto/atmel-sha.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c index 14bf86957d31..4a3db3dca272 100644 --- a/drivers/crypto/atmel-aes.c +++ b/drivers/crypto/atmel-aes.c @@ -2296,6 +2296,7 @@ static void atmel_aes_get_cap(struct atmel_aes_dev *dd) /* keep only major version number */ switch (dd->hw_version & 0xff0) { + case 0x800: case 0x700: case 0x600: case 0x500: diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c index 67a170608566..f7021925349e 100644 --- a/drivers/crypto/atmel-sha.c +++ b/drivers/crypto/atmel-sha.c @@ -2532,6 +2532,7 @@ static void atmel_sha_get_cap(struct atmel_sha_dev *dd) /* keep only major version number */ switch (dd->hw_version & 0xff0) { + case 0x800: case 0x700: case 0x600: case 0x510: From patchwork Wed Jun 11 19:47:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 897699 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 94DB72BDC03; Wed, 11 Jun 2025 19:48:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671331; cv=none; b=oTl7VEBH4Bn3JlsbM3h7cIVrNyoEU1LCB94bAC23oEAvPbALjwI2eeXJev4JgR9yiNVSM3ahu9FYWLLnW4OB34wbopIEQ1vRB7Ete+upRSn+vezckVD4ielF8V9+VkoNDn+s30GcuLIds6498LDHd+KOD8nqVJZF9q6CXCyQJlU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671331; c=relaxed/simple; bh=kdYI7la2MXOPJsmLxcbhbf8rxm86McFG70dJ9GfeAHw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Yzsf5lzPQ7LXGF6QYz1LP0ajqHHcrZfcdQR3UzAbL8r938NYG4r72cvdllS9t4SkRKm9t3HOeeUZn045QijGra9k1D5g4zdQd1dYmgkCSLLQMDnqc11i10ZoxNEucKkLAhiCqw5mHKp8ExXDGWVBGtcpJsU0ikkB3UmKrv+SX5A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=RvBXxgYQ; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="RvBXxgYQ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1749671329; x=1781207329; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kdYI7la2MXOPJsmLxcbhbf8rxm86McFG70dJ9GfeAHw=; b=RvBXxgYQehVr+HKjv6iNXzPQjCiXRcAh/oDKKDaC+AQmbHvKyGyIp4NO El9tg942eV+JBSaZqiDbsAJqk9Zr1yMGInrKDCtn0G5vFMLAe6m90OfM1 nx36UQJvgtuJPxJRaO+JMe6sJSzqOs3Xeh6caAW2gG3Hii6WpbePTG2dh 3bLWk63YPt3rGcG1ppyHztNBKJ9Qw3NIthektKwIjrkNsxauncrNdln4z JJD5yMPH3qUaIuRVrGOEf5p82gGamJHRPY/MhqUj/fk76TwUj+44nSirG /9jWAgm/d7wrmAfv/kKTjAhp1qGdsv3TGQ2/2qqGaFwwvP0NdjOm0/eD3 g==; X-CSE-ConnectionGUID: Mlj04rVUS3aXDCaAEgxBzw== X-CSE-MsgGUID: Sadl/DRsQzCUCCfuaf4XMQ== X-IronPort-AV: E=Sophos;i="6.16,228,1744095600"; d="scan'208";a="210175093" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 11 Jun 2025 12:48:48 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Wed, 11 Jun 2025 12:48:17 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Wed, 11 Jun 2025 12:48:17 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH v2 06/10] ARM: dts: microchip: sama7d65: Add crypto support Date: Wed, 11 Jun 2025 12:47:30 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add and enable SHA, AES, TDES, and TRNG for SAMA7D65 SoC. Signed-off-by: Ryan Wanner Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 39 +++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index d08d773b1cc5..90cbea576d91 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -186,6 +186,45 @@ sdmmc1: mmc@e1208000 { status = "disabled"; }; + aes: crypto@e1600000 { + compatible = "microchip,sama7d65-aes", "atmel,at91sam9g46-aes"; + reg = <0xe1600000 0x100>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 26>; + clock-names = "aes_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names = "tx", "rx"; + }; + + sha: crypto@e1604000 { + compatible = "microchip,sama7d65-sha", "atmel,at91sam9g46-sha"; + reg = <0xe1604000 0x100>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 78>; + clock-names = "sha_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>; + dma-names = "tx"; + }; + + tdes: crypto@e1608000 { + compatible = "microchip,sama7d65-tdes", "atmel,at91sam9g46-tdes"; + reg = <0xe1608000 0x100>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 91>; + clock-names = "tdes_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>, + <&dma0 AT91_XDMAC_DT_PERID(53)>; + dma-names = "tx", "rx"; + }; + + trng: rng@e160c000 { + compatible = "microchip,sama7d65-trng", "microchip,sam9x60-trng"; + reg = <0xe160c000 0x100>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 92>; + }; + dma0: dma-controller@e1610000 { compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; reg = <0xe1610000 0x1000>; From patchwork Wed Jun 11 19:47:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 895573 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 761E32BF3CC; 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Signed-off-by: Ryan Wanner Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index 90cbea576d91..796909fa2368 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -293,6 +293,15 @@ pit64b1: timer@e1804000 { clock-names = "pclk", "gclk"; }; + pwm: pwm@e1818000 { + compatible = "microchip,sama7d65-pwm", "atmel,sama5d2-pwm"; + reg = <0xe1818000 0x500>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 72>; + #pwm-cells = <3>; + status = "disabled"; + }; + flx0: flexcom@e1820000 { compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom"; reg = <0xe1820000 0x200>; From patchwork Wed Jun 11 19:47:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 897698 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AFE6C2BFC73; Wed, 11 Jun 2025 19:48:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671332; cv=none; b=BMFwy28Rwkzq93kzY28rC3LiTebAOUSnzKnK7B51qzMWzhuzzZtKH6DOBN8wmtWwv7As/R+xJFGm65XkwE7VQauhnhQA4hA1/ixah3d0CnQNa4nmQ58ytT23mc4XJnPsRe/lnx4e8xQoR5rYfjtwOhOaXcA4z0ftA6xud9Tm8Y0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671332; c=relaxed/simple; bh=B4LrMX/BxSp8xAduMHQETZgtbDiFuZUcH/aqOW3/Mqc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=aRuoruWRw834zTXgRmpCKg0VheVA6I1RLVcpmuZa1TAwPFJ1+KlmZDaHpYvEMNsqbnjaS1IRk9duupAe3BaVFqvySJ0GE6Fwj8jYCBLtMLQmxPb0HN4kBoLIQZvfGI9nLly6haAXZHB8Ugy3vOFzm1jLoPEQti1dqCHlAs58Y6g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=zEX9pYQR; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="zEX9pYQR" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1749671330; x=1781207330; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=B4LrMX/BxSp8xAduMHQETZgtbDiFuZUcH/aqOW3/Mqc=; b=zEX9pYQR3W4tk8sz101jF6vkRO0CEbaeLXDwBY0+vUnnEvI/L17auQlB V3AfPzuUsbm0yb4n662z3teQYntuq6jZn8csLSfgr9XB1OD2zXlHBxxBd yhmwpfpxrH8uvGixdE+wybm0pSAr43361DaiB6NaRsZO1b6olBAe+NuyC aCOP2PmBgYuNOEuZ37bOfoxguHrK8QSW/gt1uexWgLz2ZaXU1XBLnvzzQ Qjno7xFDC9t6oKH+jrpBoTRF23fFhG5lj2O/OVd6zXAI7Ln5RanBo7s/S 1b0H2KwHE2BTxfv3Qx7ILZ1zv70tF+QAB43H/KatOsrdaShUj7hg2pL28 Q==; X-CSE-ConnectionGUID: Mlj04rVUS3aXDCaAEgxBzw== X-CSE-MsgGUID: G1euUUH8S26wiHIAZbAfzQ== X-IronPort-AV: E=Sophos;i="6.16,228,1744095600"; d="scan'208";a="210175096" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 11 Jun 2025 12:48:49 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Wed, 11 Jun 2025 12:48:17 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Wed, 11 Jun 2025 12:48:17 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH v2 08/10] ARM: dts: microchip: sama7d65: Add CAN bus support Date: Wed, 11 Jun 2025 12:47:32 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Add support for CAN bus to the SAMA7D65 SoC. Signed-off-by: Ryan Wanner Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 80 +++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index 796909fa2368..a62d2ef9fcab 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -163,6 +163,86 @@ chipid@e0020000 { reg = <0xe0020000 0x8>; }; + can0: can@e0828000 { + compatible = "bosch,m_can"; + reg = <0xe0828000 0x200>, <0x100000 0x7800>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 58>, <&pmc PMC_TYPE_GCK 58>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 58>; + assigned-clock-rates = <40000000>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>; + bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can1: can@e082c000 { + compatible = "bosch,m_can"; + reg = <0xe082c000 0x200>, <0x100000 0xbc00>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 59>, <&pmc PMC_TYPE_GCK 59>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 59>; + assigned-clock-rates = <40000000>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>; + bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can2: can@e0830000 { + compatible = "bosch,m_can"; + reg = <0xe0830000 0x200>, <0x100000 0x10000>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 60>, <&pmc PMC_TYPE_GCK 60>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 60>; + assigned-clock-rates = <40000000>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>; + bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can3: can@e0834000 { + compatible = "bosch,m_can"; + reg = <0xe0834000 0x200>, <0x110000 0x4400>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 61>, <&pmc PMC_TYPE_GCK 61>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 61>; + assigned-clock-rates = <40000000>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>; + bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can4: can@e0838000 { + compatible = "bosch,m_can"; + reg = <0xe0838000 0x200>, <0x110000 0x8800>; + reg-names = "m_can", "message_ram"; + interrupts = , + ; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 62>, <&pmc PMC_TYPE_GCK 62>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 62>; + assigned-clock-rates = <40000000>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>; + bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>; + status = "disabled"; + }; + dma2: dma-controller@e1200000 { compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; 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Wed, 11 Jun 2025 12:48:17 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Wed, 11 Jun 2025 12:48:17 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH v2 09/10] ARM: dts: microchip: sama7d65: Clean up extra space Date: Wed, 11 Jun 2025 12:47:33 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Remove the extra space that causes formatting issues. Signed-off-by: Ryan Wanner --- arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts index 53a657cf4efb..759b963d987c 100644 --- a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +++ b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts @@ -38,7 +38,6 @@ reg_5v: regulator-5v { regulator-max-microvolt = <5000000>; regulator-always-on; }; - }; &dma0 { From patchwork Wed Jun 11 19:47:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 897697 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 928212C3279; Wed, 11 Jun 2025 19:48:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671334; cv=none; b=Co4v7fsYo/EhHOjeRhMUjeJYjbB/BTrapzWMlWenJPBhEvA1nbcjrLjTO0n+rxUSxAYs6spOjFdZ/jJ45y3Z475jMIqOfSLuB+7NBAM+Eb1ulmOUpbEh58ZmiKXr5c+mB3cdgjaAMFICaiGCj4kwaTNmYvZ5XS1U67Lwr/u4Uy8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749671334; c=relaxed/simple; bh=aDdyZCDm5RtgTX/poDkJ6S5z8PkXxnmyIfnGWdKweUk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=jT436D/3neUZP+J3SZDX2l7vlkK5g7lhqAh4ayYw9As2juBeRDJ6XQsfF9a9foCYlYe4GHDJU44MRe7C1q1gw/yieW7zrLIKt3LOcDjK719I0I12B5JTZGbj8ivq75erif58Dv3vAk8YhQCYFgkvnQP7bozrzPlTEC29YDtr3dY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=CMk1MzrK; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="CMk1MzrK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1749671332; x=1781207332; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aDdyZCDm5RtgTX/poDkJ6S5z8PkXxnmyIfnGWdKweUk=; b=CMk1MzrKUCUwiATUmskOr0S3phVO72XTSjkE+xlaljzqe4Ip/gxGm8xR G5gryjOL4jjmpMQtNkRinhNjJIyZpFYoH1B9gV/yOi4j2UV1ZpgAlPVF7 TVloBFSEjdQkn80jqkQsMf+oUt1GNto33w3329CM4v0HYMJP7PGulCQds 2KVYq18jQ4DtoV60PjMANCwXeolsm6lNKE1Lplm/rG0PHVvW7H1wVPBtC pqjPs9/hm6tR/p+oMZhOleLwh0HGu+RuWBHTFaUTJHsZXZVYk7X0vBSf2 P6hbRokjfIJd6/3dLRVGIfARu+GZyuxYP3xdiytm3mWDXvnLCoq4nPqN0 Q==; X-CSE-ConnectionGUID: Mlj04rVUS3aXDCaAEgxBzw== X-CSE-MsgGUID: 6Xo02CoxSyS+i1Yy/BDTYg== X-IronPort-AV: E=Sophos;i="6.16,228,1744095600"; d="scan'208";a="210175099" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 11 Jun 2025 12:48:50 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Wed, 11 Jun 2025 12:48:17 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Wed, 11 Jun 2025 12:48:17 -0700 From: To: , , , , , , , , CC: , , , , "Ryan Wanner" Subject: [PATCH v2 10/10] ARM: dts: microchip: sama7d65: Enable CAN bus Date: Wed, 11 Jun 2025 12:47:34 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ryan Wanner Enable CAN bus for SAMA7D65 curiosity board. Signed-off-by: Ryan Wanner Reviewed-by: Claudiu Beznea --- .../dts/microchip/at91-sama7d65_curiosity.dts | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts index 759b963d987c..7eaf6ca233ec 100644 --- a/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts +++ b/arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts @@ -40,6 +40,24 @@ reg_5v: regulator-5v { }; }; +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_default>; + status = "okay"; +}; + +&can2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can2_default>; + status = "okay"; +}; + +&can3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can3_default>; + status = "okay"; +}; + &dma0 { status = "okay"; }; @@ -277,6 +295,24 @@ &main_xtal { }; &pioa { + pinctrl_can1_default: can1-default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_can2_default: can2-default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_can3_default: can3-default { + pinmux = , + ; + bias-disable; + }; + pinctrl_gmac0_default: gmac0-default { pinmux = , ,