From patchwork Thu Jun 12 17:13:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Morse X-Patchwork-Id: 896025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 24E751E5B68 for ; Thu, 12 Jun 2025 17:14:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749748448; cv=none; b=rl8/NOCrpzBdjFYUBaFPfpGI9axurza5kQAI7TrihK9r93lhBA38ldjDGF6qVoR1NLYSFv2j8KRsIsgw1kQfwBnxK1YmySDdisPq2WJ23wkakQIMLIEO/D4TTXpix/iMCylg7q8A4t0uaToLKj8s4QN5AUlY4wcveT94+6zTdvk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749748448; c=relaxed/simple; bh=Tj4s9GzqrA6SKhaqaQEt9gcQS5buZO7MlFe+jr9Dx7k=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=R/kl7FFjYMt0n2vQZzjLjaTNi/WZM+VaxlGiRUheVLlIrZ6z3uVxJx9z+ByS9IvRKG+2KR0aa/ImkMI4XDjkjdRe9f3hd9Vl1QQT+is0ai9g1IfHgL6vsLJcu5FyssoSw40BsGoddms9NL0BsIk49dbBzYK6dISfRQ8qUlPUX/M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 95BAB153B; Thu, 12 Jun 2025 10:13:45 -0700 (PDT) Received: from merodach.members.linode.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DABE33F59E; Thu, 12 Jun 2025 10:14:04 -0700 (PDT) From: James Morse To: linux-acpi@vger.kernel.org Cc: Rafael Wysocki , Len Brown , sudeep.holla@arm.com, jeremy.linton@arm.com, James Morse Subject: [PATCH 1/4] ACPI / PPTT: Add a helper to fill a cpumask from a processor container Date: Thu, 12 Jun 2025 17:13:33 +0000 Message-Id: <20250612171336.4858-2-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20250612171336.4858-1-james.morse@arm.com> References: <20250612171336.4858-1-james.morse@arm.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The PPTT describes CPUs and caches, as well as processor containers. The ACPI table for MPAM describes the set of CPUs that can access an MSC with the UID of a processor container. Add a helper to find the processor container by its id, then walk the possible CPUs to fill a cpumask with the CPUs that have this processor container as a parent. Signed-off-by: James Morse --- drivers/acpi/pptt.c | 91 ++++++++++++++++++++++++++++++++++++++++++++ include/linux/acpi.h | 6 +++ 2 files changed, 97 insertions(+) diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c index 54676e3d82dd..aaf9b5a26d07 100644 --- a/drivers/acpi/pptt.c +++ b/drivers/acpi/pptt.c @@ -298,6 +298,97 @@ static struct acpi_pptt_processor *acpi_find_processor_node(struct acpi_table_he return NULL; } +/** + * acpi_pptt_get_child_cpus() - Find all the CPUs below a PPTT processor node + * @table_hdr: A reference to the PPTT table. + * @parent_node: A pointer to the processor node in the @table_hdr. + * @cpus: A cpumask to fill with the CPUs below @parent_node. + * + * Walks up the PPTT from every possible CPU to find if the provided + * @parent_node is a parent of this CPU. + */ +static void acpi_pptt_get_child_cpus(struct acpi_table_header *table_hdr, + struct acpi_pptt_processor *parent_node, + cpumask_t *cpus) +{ + struct acpi_pptt_processor *cpu_node; + u32 acpi_id; + int cpu; + + for_each_possible_cpu(cpu) { + acpi_id = get_acpi_id_for_cpu(cpu); + cpu_node = acpi_find_processor_node(table_hdr, acpi_id); + + while (cpu_node) { + if (cpu_node == parent_node) { + cpumask_set_cpu(cpu, cpus); + break; + } + cpu_node = fetch_pptt_node(table_hdr, cpu_node->parent); + } + } +} + +/** + * acpi_pptt_get_cpus_from_container() - Populate a cpumask with all CPUs in a + * processor containers + * @acpi_cpu_id: The UID of the processor container. + * @cpus The resulting CPU mask. + * + * Find the specified Processor Container, and fill @cpus with all the cpus + * below it. + * + * Not all 'Processor' entries in the PPTT are either a CPU or a Processor + * Container, they may exist purely to describe a Private resource. CPUs + * have to be leaves, so a Processor Container is a non-leaf that has the + * 'ACPI Processor ID valid' flag set. + * + * Return: 0 for a complete walk, or an error if the mask is incomplete. + */ +int acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id, cpumask_t *cpus) +{ + struct acpi_pptt_processor *cpu_node; + struct acpi_table_header *table_hdr; + struct acpi_subtable_header *entry; + bool leaf_flag, has_leaf_flag = false; + unsigned long table_end; + acpi_status status; + u32 proc_sz; + int ret = 0; + + cpumask_clear(cpus); + + status = acpi_get_table(ACPI_SIG_PPTT, 0, &table_hdr); + if (ACPI_FAILURE(status)) + return 0; + + if (table_hdr->revision > 1) + has_leaf_flag = true; + + table_end = (unsigned long)table_hdr + table_hdr->length; + entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr, + sizeof(struct acpi_table_pptt)); + proc_sz = sizeof(struct acpi_pptt_processor); + while ((unsigned long)entry + proc_sz < table_end) { + cpu_node = (struct acpi_pptt_processor *)entry; + if (entry->type == ACPI_PPTT_TYPE_PROCESSOR && + cpu_node->flags & ACPI_PPTT_ACPI_PROCESSOR_ID_VALID) { + leaf_flag = cpu_node->flags & ACPI_PPTT_ACPI_LEAF_NODE; + if ((has_leaf_flag && !leaf_flag) || + (!has_leaf_flag && !acpi_pptt_leaf_node(table_hdr, cpu_node))) { + if (cpu_node->acpi_processor_id == acpi_cpu_id) + acpi_pptt_get_child_cpus(table_hdr, cpu_node, cpus); + } + } + entry = ACPI_ADD_PTR(struct acpi_subtable_header, entry, + entry->length); + } + + acpi_put_table(table_hdr); + + return ret; +} + static u8 acpi_cache_type(enum cache_type type) { switch (type) { diff --git a/include/linux/acpi.h b/include/linux/acpi.h index f102c0fe3431..8c3165c2b083 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -1541,6 +1541,7 @@ int find_acpi_cpu_topology(unsigned int cpu, int level); int find_acpi_cpu_topology_cluster(unsigned int cpu); int find_acpi_cpu_topology_package(unsigned int cpu); int find_acpi_cpu_topology_hetero_id(unsigned int cpu); +int acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id, cpumask_t *cpus); #else static inline int acpi_pptt_cpu_is_thread(unsigned int cpu) { @@ -1562,6 +1563,11 @@ static inline int find_acpi_cpu_topology_hetero_id(unsigned int cpu) { return -EINVAL; } +static inline int acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id, + cpumask_t *cpus) +{ + return -EINVAL; +} #endif void acpi_arch_init(void); From patchwork Thu Jun 12 17:13:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Morse X-Patchwork-Id: 895769 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E68513596B for ; Thu, 12 Jun 2025 17:14:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749748449; cv=none; b=Jjidv1dZgxoepRsTjM5IwsQ1/wSlUkegUq0gFZ4B1U5j+XmJy6Gmcghb4BRW2XvBY65Tz6Kv6DvDeIPiOgo17qXtmsPCFYAsAC2/zR+yxMMazSHRWrk1YIb1jbJO2549YRDGLTD0jOzsKcwE3VORnnj2aeA2/2jwTshXrUQfVcU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749748449; c=relaxed/simple; bh=2L5eZSW/6fjlPgItRmhuFePTAPbknSoR7GodSA9jumQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=GlvNEgZ/vAmajyc5rl/5ePPbWvsOgwJGqZ7Mj2+Dz2xy+BNZWwbPMcdgO7KtKLSQOUwjhBP4fRAYeWek9s6aP99cdESqwPfYb+J2WLQpmnFgMoguafD8sf0fZ3nDEqtLXbsZjcCQVUcPFPzgOjt52rNqxR6vRS/QJSoNQzD8fS4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 36A791C25; Thu, 12 Jun 2025 10:13:47 -0700 (PDT) Received: from merodach.members.linode.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7D1283F59E; Thu, 12 Jun 2025 10:14:06 -0700 (PDT) From: James Morse To: linux-acpi@vger.kernel.org Cc: Rafael Wysocki , Len Brown , sudeep.holla@arm.com, jeremy.linton@arm.com, James Morse Subject: [PATCH 2/4] ACPI / PPTT: Stop acpi_count_levels() expecting callers to clear levels Date: Thu, 12 Jun 2025 17:13:34 +0000 Message-Id: <20250612171336.4858-3-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20250612171336.4858-1-james.morse@arm.com> References: <20250612171336.4858-1-james.morse@arm.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 acpi_count_levels() passes the number of levels back via a pointer argument. It also passes this to acpi_find_cache_level() as the starting_level, and preserves this value as it walks up the cpu_node tree counting the levels. The only caller acpi_get_cache_info() happens to have already initialised levels to zero, which acpi_count_levels() depends on to get the correct result. Explicitly zero the levels variable, so the count always starts at zero. This saves any additional callers having to work out they need to do this. Signed-off-by: James Morse --- drivers/acpi/pptt.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c index aaf9b5a26d07..72e6bfc1e358 100644 --- a/drivers/acpi/pptt.c +++ b/drivers/acpi/pptt.c @@ -183,7 +183,7 @@ acpi_find_cache_level(struct acpi_table_header *table_hdr, * @cpu_node: processor node we wish to count caches for * @levels: Number of levels if success. * @split_levels: Number of split cache levels (data/instruction) if - * success. Can by NULL. + * success. Can be NULL. * * Given a processor node containing a processing unit, walk into it and count * how many levels exist solely for it, and then walk up each level until we hit @@ -196,6 +196,8 @@ static void acpi_count_levels(struct acpi_table_header *table_hdr, struct acpi_pptt_processor *cpu_node, unsigned int *levels, unsigned int *split_levels) { + *levels = 0; + do { acpi_find_cache_level(table_hdr, cpu_node, levels, split_levels, 0, 0); cpu_node = fetch_pptt_node(table_hdr, cpu_node->parent); From patchwork Thu Jun 12 17:13:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Morse X-Patchwork-Id: 896024 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 810B21E5B68 for ; Thu, 12 Jun 2025 17:14:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749748451; cv=none; b=LnAx/q7iIIt5BrswIwmBtzqDkSlfXen3BYaW4rDZwL8aOkkavsp2Dg1dc/ny05sMzG7jB/51c+COSl5ZF6qN9+CIMwpa9Vbf1boGLPiG2zngFhVqW9D/EqnQrZX7ZmZnVVUEz+PcmrsDN1rKoP3DPYBHDN43xVXibNUVGA8MABM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749748451; c=relaxed/simple; bh=MzsLj80S+RXTRwa2i89FlJPTZDhUklYhNHu0NeY/bXU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=HsbVPGROnuZGKieLu9TO47o1yNHIKI1A3XuWeQJwT3rqvqPsodIfJUNpLNEE9RU4InXUJMhzeylQYaW6vqruQKo0sTMYH9WCVzFYuxxyQGxaLJEJ+w9RUzOB/LlWqKB9ynwkpATyxhOSQM1DTRh2vXglxWb+qXoXAiGXaTv0oZs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BB278153B; Thu, 12 Jun 2025 10:13:48 -0700 (PDT) Received: from merodach.members.linode.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0BD3F3F59E; Thu, 12 Jun 2025 10:14:07 -0700 (PDT) From: James Morse To: linux-acpi@vger.kernel.org Cc: Rafael Wysocki , Len Brown , sudeep.holla@arm.com, jeremy.linton@arm.com, James Morse Subject: [PATCH 3/4] ACPI / PPTT: Find cache level by cache-id Date: Thu, 12 Jun 2025 17:13:35 +0000 Message-Id: <20250612171336.4858-4-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20250612171336.4858-1-james.morse@arm.com> References: <20250612171336.4858-1-james.morse@arm.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The MPAM table identifies caches by id. The MPAM driver also wants to know the cache level to determine if the platform is of the shape that can be managed via resctrl. Cacheinfo has this information, but only for CPUs that are online. Waiting for all CPUs to come online is a problem for platforms where CPUs are brought online late by user-space. Add a helper that walks every possible cache, until it finds the one identified by cache-id, then return the level. acpi_count_levels() expects its levels parameter to be initialised to zero as it passes it to acpi_find_cache_level() as starting_level. The existing callers do this. Document it. Signed-off-by: James Morse --- drivers/acpi/pptt.c | 73 ++++++++++++++++++++++++++++++++++++++++++++ include/linux/acpi.h | 5 +++ 2 files changed, 78 insertions(+) diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c index 72e6bfc1e358..09be7d52d7ac 100644 --- a/drivers/acpi/pptt.c +++ b/drivers/acpi/pptt.c @@ -910,3 +910,76 @@ int find_acpi_cpu_topology_hetero_id(unsigned int cpu) return find_acpi_cpu_topology_tag(cpu, PPTT_ABORT_PACKAGE, ACPI_PPTT_ACPI_IDENTICAL); } + +/** + * find_acpi_cache_level_from_id() - Get the level of the specified cache + * @cache_id: The id field of the unified cache + * + * Determine the level relative to any CPU for the unified cache identified by + * cache_id. This allows the property to be found even if the CPUs are offline. + * + * The returned level can be used to group unified caches that are peers. + * + * The PPTT table must be rev 3 or later, + * + * If one CPUs L2 is shared with another as L3, this function will return + * an unpredictable value. + * + * Return: -ENOENT if the PPTT doesn't exist, or the cache cannot be found. + * Otherwise returns a value which represents the level of the specified cache. + */ +int find_acpi_cache_level_from_id(u32 cache_id) +{ + u32 acpi_cpu_id; + acpi_status status; + int level, cpu, num_levels; + struct acpi_pptt_cache *cache; + struct acpi_table_header *table; + struct acpi_pptt_cache_v1 *cache_v1; + struct acpi_pptt_processor *cpu_node; + + status = acpi_get_table(ACPI_SIG_PPTT, 0, &table); + if (ACPI_FAILURE(status)) { + acpi_pptt_warn_missing(); + return -ENOENT; + } + + if (table->revision < 3) { + acpi_put_table(table); + return -ENOENT; + } + + /* + * If we found the cache first, we'd still need to walk from each CPU + * to find the level... + */ + for_each_possible_cpu(cpu) { + acpi_cpu_id = get_acpi_id_for_cpu(cpu); + cpu_node = acpi_find_processor_node(table, acpi_cpu_id); + if (!cpu_node) + break; + acpi_count_levels(table, cpu_node, &num_levels, NULL); + + /* Start at 1 for L1 */ + for (level = 1; level <= num_levels; level++) { + cache = acpi_find_cache_node(table, acpi_cpu_id, + ACPI_PPTT_CACHE_TYPE_UNIFIED, + level, &cpu_node); + if (!cache) + continue; + + cache_v1 = ACPI_ADD_PTR(struct acpi_pptt_cache_v1, + cache, + sizeof(struct acpi_pptt_cache)); + + if (cache->flags & ACPI_PPTT_CACHE_ID_VALID && + cache_v1->cache_id == cache_id) { + acpi_put_table(table); + return level; + } + } + } + + acpi_put_table(table); + return -ENOENT; +} diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 8c3165c2b083..82947f6d2a43 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -1542,6 +1542,7 @@ int find_acpi_cpu_topology_cluster(unsigned int cpu); int find_acpi_cpu_topology_package(unsigned int cpu); int find_acpi_cpu_topology_hetero_id(unsigned int cpu); int acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id, cpumask_t *cpus); +int find_acpi_cache_level_from_id(u32 cache_id); #else static inline int acpi_pptt_cpu_is_thread(unsigned int cpu) { @@ -1568,6 +1569,10 @@ static inline int acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id, { return -EINVAL; } +static inline int find_acpi_cache_level_from_id(u32 cache_id) +{ + return -EINVAL; +} #endif void acpi_arch_init(void); From patchwork Thu Jun 12 17:13:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Morse X-Patchwork-Id: 895768 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 776D11E5B68 for ; Thu, 12 Jun 2025 17:14:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749748453; cv=none; b=pwqEhlNPFL4QexjWbmMlLNZ9P7PmkqnCQgmE/iYpwbbpZGy0tm68pdtKUHp/jMHqAqYnlixdQUCGkFf8erivedoieteEoPjBDJtLFUZx767PcDEguOjCo4XhcwCdFpfbMs54mLjda0MtXWKpmCE8u44rwoPZSxi9k1wfE5TFJj0= ARC-Message-Signature: i=1; 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Thu, 12 Jun 2025 10:14:09 -0700 (PDT) From: James Morse To: linux-acpi@vger.kernel.org Cc: Rafael Wysocki , Len Brown , sudeep.holla@arm.com, jeremy.linton@arm.com, James Morse , Rohit Mathew Subject: [PATCH 4/4] ACPI / PPTT: Add a helper to fill a cpumask from a cache_id Date: Thu, 12 Jun 2025 17:13:36 +0000 Message-Id: <20250612171336.4858-5-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20250612171336.4858-1-james.morse@arm.com> References: <20250612171336.4858-1-james.morse@arm.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 MPAM identifies CPUs by the cache_id in the PPTT cache structure. The driver needs to know which CPUs are associated with the cache, the CPUs may not all be online, so cacheinfo does not have the information. Add a helper to pull this information out of the PPTT. CC: Rohit Mathew Signed-off-by: James Morse --- drivers/acpi/pptt.c | 70 ++++++++++++++++++++++++++++++++++++++++++++ include/linux/acpi.h | 6 ++++ 2 files changed, 76 insertions(+) diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c index 09be7d52d7ac..0ecb9378787a 100644 --- a/drivers/acpi/pptt.c +++ b/drivers/acpi/pptt.c @@ -983,3 +983,73 @@ int find_acpi_cache_level_from_id(u32 cache_id) acpi_put_table(table); return -ENOENT; } + +/** + * acpi_pptt_get_cpumask_from_cache_id() - Get the cpus associated with the + * specified cache + * @cache_id: The id field of the unified cache + * @cpus: Where to build the cpumask + * + * Determine which CPUs are below this cache in the PPTT. This allows the property + * to be found even if the CPUs are offline. + * + * The PPTT table must be rev 3 or later, + * + * Return: -ENOENT if the PPTT doesn't exist, or the cache cannot be found. + * Otherwise returns 0 and sets the cpus in the provided cpumask. + */ +int acpi_pptt_get_cpumask_from_cache_id(u32 cache_id, cpumask_t *cpus) +{ + u32 acpi_cpu_id; + acpi_status status; + int level, cpu, num_levels; + struct acpi_pptt_cache *cache; + struct acpi_table_header *table; + struct acpi_pptt_cache_v1 *cache_v1; + struct acpi_pptt_processor *cpu_node; + + cpumask_clear(cpus); + + status = acpi_get_table(ACPI_SIG_PPTT, 0, &table); + if (ACPI_FAILURE(status)) { + acpi_pptt_warn_missing(); + return -ENOENT; + } + + if (table->revision < 3) { + acpi_put_table(table); + return -ENOENT; + } + + /* + * If we found the cache first, we'd still need to walk from each cpu. + */ + for_each_possible_cpu(cpu) { + acpi_cpu_id = get_acpi_id_for_cpu(cpu); + cpu_node = acpi_find_processor_node(table, acpi_cpu_id); + if (!cpu_node) + break; + acpi_count_levels(table, cpu_node, &num_levels, NULL); + + /* Start at 1 for L1 */ + for (level = 1; level <= num_levels; level++) { + cache = acpi_find_cache_node(table, acpi_cpu_id, + ACPI_PPTT_CACHE_TYPE_UNIFIED, + level, &cpu_node); + if (!cache) + continue; + + cache_v1 = ACPI_ADD_PTR(struct acpi_pptt_cache_v1, + cache, + sizeof(struct acpi_pptt_cache)); + + if (cache->flags & ACPI_PPTT_CACHE_ID_VALID && + cache_v1->cache_id == cache_id) { + cpumask_set_cpu(cpu, cpus); + } + } + } + + acpi_put_table(table); + return 0; +} diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 82947f6d2a43..61ac3d1de1e8 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -1543,6 +1543,7 @@ int find_acpi_cpu_topology_package(unsigned int cpu); int find_acpi_cpu_topology_hetero_id(unsigned int cpu); int acpi_pptt_get_cpus_from_container(u32 acpi_cpu_id, cpumask_t *cpus); int find_acpi_cache_level_from_id(u32 cache_id); +int acpi_pptt_get_cpumask_from_cache_id(u32 cache_id, cpumask_t *cpus); #else static inline int acpi_pptt_cpu_is_thread(unsigned int cpu) { @@ -1573,6 +1574,11 @@ static inline int find_acpi_cache_level_from_id(u32 cache_id) { return -EINVAL; } +static inline int acpi_pptt_get_cpumask_from_cache_id(u32 cache_id, + cpumask_t *cpus) +{ + return -EINVAL; +} #endif void acpi_arch_init(void);