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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45377aebaddsm15398735e9.1.2025.06.23.05.18.51 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:18:52 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 01/26] target/arm: Remove arm_handle_psci_call() stub Date: Mon, 23 Jun 2025 14:18:20 +0200 Message-ID: <20250623121845.7214-2-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit 0c1aaa66c24 ("target/arm: wrap psci call with tcg_enabled") the arm_handle_psci_call() call is elided when TCG is disabled. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/internals.h | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 3360de9150f..5ed25d33208 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -650,16 +650,12 @@ static inline bool arm_is_psci_call(ARMCPU *cpu, int excp_type) { return false; } -static inline void arm_handle_psci_call(ARMCPU *cpu) -{ - g_assert_not_reached(); -} #else /* Return true if the r0/x0 value indicates that this SMC/HVC is a PSCI call. */ bool arm_is_psci_call(ARMCPU *cpu, int excp_type); +#endif /* Actually handle a PSCI call */ void arm_handle_psci_call(ARMCPU *cpu); -#endif /** * arm_clear_exclusive: clear the exclusive monitor From patchwork Mon Jun 23 12:18:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899208 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3838240ltt; Mon, 23 Jun 2025 05:20:55 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVyPLzc8fkgy8l/BAhtcaXtCDK94e1H9sa0lAm907q05ck+Cn8ChJU4sSbU/cHz4H3BPaF+ow==@linaro.org X-Google-Smtp-Source: AGHT+IG/hxD2hhUb4vaTM99Y0/Vjyg4V4OEkj8nJParuiRAXVapOk8vJYwO63bqKVEDC3CUfr+3m X-Received: by 2002:ac8:59c6:0:b0:4a7:64cf:f092 with SMTP id d75a77b69052e-4a77a1d64femr158456481cf.17.1750681254744; Mon, 23 Jun 2025 05:20:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681254; cv=none; d=google.com; s=arc-20240605; b=DiO1BFJLulSh20mTjkuG4PmODUprSu7drlA6rPuUSFiY9r9CyVd4MYAycD/Rv0w1AE TR+cjPLpoZ12cSb5XdBM4knxpO/A5/y32CCU0daWVWjwyEyhBK3vN9wp1NNyOjYH4drt Bsv7YhYXESn1pCjH8t3wczkie+wPrY6Kx2rLIFCTUOUF/fLmObz1cqRsOMIabnKBdqdZ oFPPadWic6GgpTec9gvdzFwh3bu3yuqUZtAd8nYQ7+664aPtP5giIjMIJ6nNsawSkEEV ZB8rsKq8D2SuZfBzFcWCh/A78dXi+XAJQt3De+JjR09CFmVeh3q9D/tMyo9NRxUE0l7X m1MQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=33tTruwtHJUDsLE1NQEO6k6TPJwHdavbHWnexaTt8VY=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=iSAjY67ByLcCxJCcmHjk5/iT3GZB1ezkzOHQMcKbKaVlgNNJq4M2mF42himeeeODJE z7kNXe6GDW4C3JkIzCraGDDZl6WJ2KW2cNDrlqawgWdi/XkGOpr2jTGDK3Wnl9GER/GD OVIBBKw21CJuegok+VzhLH7WtY1AV5h1ev9adS8Dec3nSVW1SymnreA7c06Pgue04W2s nApjXZn7Xj76huDzH3bx+dGH8Wq8bAZ+MHtKclf9RzNTyeKoTypG2S7jvXAzY/Rh3YhV 6YMquuYOoTZpZL1SmRGlMexaZ/5Ig86hgRXoqWb2Wg0e5Wo3UcVIRxqnUSB7DO927NWe h3pg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ev26ZtJK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d118a1f2sm9166243f8f.83.2025.06.23.05.18.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:18:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 02/26] target/arm: Reduce arm_cpu_post_init() declaration scope Date: Mon, 23 Jun 2025 14:18:21 +0200 Message-ID: <20250623121845.7214-3-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org arm_cpu_post_init() is only used within the same file unit. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/cpu.h | 2 -- target/arm/cpu.c | 2 +- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 302c24e2324..c31f69912b8 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1150,8 +1150,6 @@ void arm_gt_sel2vtimer_cb(void *opaque); unsigned int gt_cntfrq_period_ns(ARMCPU *cpu); void gt_rme_post_el_change(ARMCPU *cpu, void *opaque); -void arm_cpu_post_init(Object *obj); - #define ARM_AFF0_SHIFT 0 #define ARM_AFF0_MASK (0xFFULL << ARM_AFF0_SHIFT) #define ARM_AFF1_SHIFT 8 diff --git a/target/arm/cpu.c b/target/arm/cpu.c index e025e241eda..eb0639de719 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1713,7 +1713,7 @@ static void arm_cpu_propagate_feature_implications(ARMCPU *cpu) } } -void arm_cpu_post_init(Object *obj) +static void arm_cpu_post_init(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); From patchwork Mon Jun 23 12:18:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899204 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3837886ltt; Mon, 23 Jun 2025 05:20:16 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWgQl6E7zR9a3L7jCnZ75wuNL61Cb5QHQqu9j6Pb2XtThq/5SqZGX+U7FkjBSMSfTv+L/CnqA==@linaro.org X-Google-Smtp-Source: AGHT+IGTTL0pGcUlA6WS/e7nsXCGxOQrzynGxX++K8Uf3081/NfnkZR7pU3ZrYcSi++zo9t6AD1N X-Received: by 2002:a05:622a:4d3:b0:4a2:719b:1238 with SMTP id d75a77b69052e-4a77a24bce0mr172648421cf.12.1750681216247; Mon, 23 Jun 2025 05:20:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681216; cv=none; d=google.com; s=arc-20240605; b=YNzFuVKlUKkuKrV8axltPdZNPTTJj+tfCaEQjEomNtd/3B0O1YD0ix0tNuU/EVQR+M DvjMpvht4SADY+L8zwUh1acdtjp6aWq6zP1kbJWE7L+NsuxU5vYhyIRmtcxSikVrsFla ZSc597BNMAiPB8M2HXP6sBY848yoyNKk6l335MJy9P1/Y9o/kh70x/sLjEwxpaPNQam0 R7G8k/B5AAlPGJaNhs0e8cHhicAoKyefYvmZcUt2Y+uU/1kehj9tfE7UPYF2OIjhevAi 6URZMJJXormZ9x+JlbcZpESKRr2AdHN0L4H/e4P+nAYXAJlwvbgFdVyJm4qkju3R8O+p qruw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=g4jpPoIjWAnN20gltB2a/vOsrmaIk3+mmplMj5/YsrY=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=Ft0qbNCbSDB/5HwRsVq7ug4R1cHr7xuhj9jnXGjXCaf7GA0cTUqtfa2acwm/m2lyHn hL/+cVGdcOSHnWYDURAtODdR5boDa/6xOyUrBCFqQZJKkIeS3s0PaIPlMAJrBW4LChKT 4RryGTdcz27BDlzEfK8cszICMtsQp7Z5PsiMpyIFCRtEkGEIO2E7hjrezQcK4Vikrahm YBSCWUHPyDOHIlSm5abb8rjA1NoJ3NXdarWtuW62UR6nG9/Rf9fUphCVskO6i5HpHJmu 9YxGMuwe4eu9dXIv/RT5J8QzQEReNADjgLQdEzqL62XthrKMXhAcsSxkUcW/csdaY/Vm NQZw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yy93QNq4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d0f189cdsm9443362f8f.35.2025.06.23.05.19.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:19:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 03/26] target/arm: Unify gen_exception_internal() Date: Mon, 23 Jun 2025 14:18:22 +0200 Message-ID: <20250623121845.7214-4-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Same code, use the generic variant. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/tcg/translate.h | 1 + target/arm/tcg/translate-a64.c | 6 ------ target/arm/tcg/translate.c | 2 +- 3 files changed, 2 insertions(+), 7 deletions(-) diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h index 1bfdb0fb9bb..0004a97219b 100644 --- a/target/arm/tcg/translate.h +++ b/target/arm/tcg/translate.h @@ -347,6 +347,7 @@ void arm_jump_cc(DisasCompare *cmp, TCGLabel *label); void arm_gen_test_cc(int cc, TCGLabel *label); MemOp pow2_align(unsigned i); void unallocated_encoding(DisasContext *s); +void gen_exception_internal(int excp); void gen_exception_insn_el(DisasContext *s, target_long pc_diff, int excp, uint32_t syn, uint32_t target_el); void gen_exception_insn(DisasContext *s, target_long pc_diff, diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index ac80f572a2d..7c79b8c4401 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -433,12 +433,6 @@ static void gen_rebuild_hflags(DisasContext *s) gen_helper_rebuild_hflags_a64(tcg_env, tcg_constant_i32(s->current_el)); } -static void gen_exception_internal(int excp) -{ - assert(excp_is_internal(excp)); - gen_helper_exception_internal(tcg_env, tcg_constant_i32(excp)); -} - static void gen_exception_internal_insn(DisasContext *s, int excp) { gen_a64_update_pc(s, 0); diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c index 9962f43b1d0..f7d6d8ce196 100644 --- a/target/arm/tcg/translate.c +++ b/target/arm/tcg/translate.c @@ -372,7 +372,7 @@ static void gen_rebuild_hflags(DisasContext *s, bool new_el) } } -static void gen_exception_internal(int excp) +void gen_exception_internal(int excp) { assert(excp_is_internal(excp)); gen_helper_exception_internal(tcg_env, tcg_constant_i32(excp)); From patchwork Mon Jun 23 12:18:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899218 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3839994ltt; Mon, 23 Jun 2025 05:23:47 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXJGPHQZscnsDLbliMFf5t3zOWu82EiUqavESPFbwITDYFRLOY0ufTTrPUm6nT+5b/2+WBEyw==@linaro.org X-Google-Smtp-Source: AGHT+IGcKf1991PaXqrnNqj1AkKO3j6N+WY5HZUZqvjI37QGTUAOo13ewFoFlva0GWi1If20OH9g X-Received: by 2002:a05:620a:6004:b0:7cd:43f5:8b27 with SMTP id af79cd13be357-7d3f9932a4bmr1511628285a.32.1750681427509; Mon, 23 Jun 2025 05:23:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681427; cv=none; d=google.com; s=arc-20240605; b=IgA62KeRNgA5vujBck3H7xki5Nl76e6S6eZbQSB0CMkWJh7glqNTUdoL6jO66I3uGE qiDE605GVXUBkebXNIOIBAzmqTb9S8gbnkloK38TavUG6hVPrOJP64Y360Pv2SANifwL TK2UFYulvidcO5HFc5CLURmqhoBM8AQBj7BCRcN2s/mqaRSmWdythytZi+Kv9O4tJwLi FnkJ4uFHXqb1LmMPxLnKJKTSnSbmq6ggd9Gk0IegPOsGLSFRzCrts1n9oM3eFAiFzZTA xqvhCafQwQTvLjgE7oTThDqvEtosqHukUfnuK54nOgWWTDrrpjLvbo29n5mfrwFPUZ5F oGsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=LDQM9sk8xLoIDxyTCgc//1G3alM8o04T+fdq/t3mMdE=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=Wf1Dmv2O0PiX4+qFrbhQHDqhivJp9jY+HU9o2RGGa34dgEYsqdbuOOrYsIf9e+vDeW R1f7as7nawwdyEpm4MIxrNO24LkBcpn/DwyVBvBKOlDPgLa0eC7SDFYFlh5yY+je1ICr hR8Hi/539o3LZpTStdt+LkiJWcn/enWBEjbiGSWPFm3g5izlEowUTEI9pHpJDf68JLH6 HfYv86FnWyVsNFZ/eI9odLbMn0DsDbf1eR8LBxSROXktpEs3U4zHbuvUraAwdcFE2ltQ iC2xnQJ86uLgUR5FLtKmYhYmF0DVoLn3r7YuRN93bMzzqmWzTol3yvD7veArfrNrRwtQ AyZA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=R+2WfNtR; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-453646fd7aasm108543505e9.20.2025.06.23.05.19.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:19:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 04/26] target/arm/hvf: Simplify GIC hvf_arch_init_vcpu() Date: Mon, 23 Jun 2025 14:18:23 +0200 Message-ID: <20250623121845.7214-5-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Only update the ID_AA64PFR0_EL1 register when a GIC is provided. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/hvf/hvf.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 42258cc2d88..c1ed8b510db 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1057,11 +1057,15 @@ int hvf_arch_init_vcpu(CPUState *cpu) arm_cpu->mp_affinity); assert_hvf_ok(ret); - ret = hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_ID_AA64PFR0_EL1, &pfr); - assert_hvf_ok(ret); - pfr |= env->gicv3state ? (1 << 24) : 0; - ret = hv_vcpu_set_sys_reg(cpu->accel->fd, HV_SYS_REG_ID_AA64PFR0_EL1, pfr); - assert_hvf_ok(ret); + if (env->gicv3state) { + ret = hv_vcpu_get_sys_reg(cpu->accel->fd, + HV_SYS_REG_ID_AA64PFR0_EL1, &pfr); + assert_hvf_ok(ret); + pfr = FIELD_DP64(pfr, ID_AA64PFR0, GIC, 1); + ret = hv_vcpu_set_sys_reg(cpu->accel->fd, + HV_SYS_REG_ID_AA64PFR0_EL1, pfr); + assert_hvf_ok(ret); + } /* We're limited to underlying hardware caps, override internal versions */ ret = hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_ID_AA64MMFR0_EL1, From patchwork Mon Jun 23 12:18:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899225 Delivered-To: patch@linaro.org Received: by 2002:adf:e506:0:b0:3a6:d909:26ce with SMTP id j6csp861972wrm; Mon, 23 Jun 2025 05:26:33 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUJqvqB5tYMryYI3HI9qaCLjLB3uoRF3qJxloukp3DEAqtClpwaXj2pqnZHKpcgjV9UvHOzlA==@linaro.org X-Google-Smtp-Source: AGHT+IGBCbS6pBaH2JBiaQ7B7Nz7cV8pvL2ATrr0On7UprkAbIFC+HVD8ZY/ErjN0NE4M2s3NNZM X-Received: by 2002:ac8:7f92:0:b0:4a3:e3df:f9de with SMTP id d75a77b69052e-4a77a1d9cc0mr205027741cf.23.1750681593412; Mon, 23 Jun 2025 05:26:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681593; cv=none; d=google.com; s=arc-20240605; b=SGvdMUH+PzuXhG4TdrJbf6Bwt7dwbNKgAcmrFaI5gsWTcfWyqFonmpMFEf8wOntdz7 OGTcjU/wcoNgpSDUVIUeBpTkDCMneWcn4JyWAfUK3q01qd0RS28RqgYDRbG53kS7RlLN NrEzOXmw3pprwH6N1u5MMja/D0KdSj/MGP30nprxwoliA179/f0T12249O/xCI0wxz3l ASBRkIDi6UTjTbZNHgw3j9KSClOXTTls2QBlprgF00GQCtaAkZH73BlEW4MAFBQLEJlo AjDqYa1rIheW7gvin0+UBk8Durb27hK5VJS0SX5De67mEwCV046O5MotbZekCxCmTVqn 0BFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=iPGemtR2ZdzEfUCvxZ4Y78uZrjiue5vwaeOrBHsS2Jw=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=j4PoXQXe1Sa9gHyV9fLXST7Nud43goaPA4Zg7JC4Ul/dNO0Mshch7XtZ4TJxBkm2V2 3SZEImUnXJvBBKOSt4cga0yVss2VZ8YDakIUGKjvA9LinX/xLGXyIRWzqpu8LNjqxHU7 6/Y3uv12/vRNQHsma4tO0yWM4xBjrhwX5wy/1D05lJUPZe5to4eS9taEFSwEdu3ET0/K HRKc0h87EsML2fqr1vT+c4MT17ne+c5oAgzjfoUkTz8pMHZ1X3fsbZDFfTkXnzgMmM0b S4xfFKIgWrxT0ke34s56HpR2E5B4n9HSeEBswu7flzTPd+Vteiu0DODZ/O+EpPzatXtd +SRg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=O8XxNpvt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d0f1d87fsm9323283f8f.45.2025.06.23.05.19.12 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:19:13 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 05/26] target/arm/hvf: Directly re-lock BQL after hv_vcpu_run() Date: Mon, 23 Jun 2025 14:18:24 +0200 Message-ID: <20250623121845.7214-6-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Keep bql_unlock() / bql_lock() close. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson --- target/arm/hvf/hvf.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index c1ed8b510db..ef76dcd28de 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1914,7 +1914,9 @@ int hvf_vcpu_exec(CPUState *cpu) flush_cpu_state(cpu); bql_unlock(); - assert_hvf_ok(hv_vcpu_run(cpu->accel->fd)); + r = hv_vcpu_run(cpu->accel->fd); + bql_lock(); + assert_hvf_ok(r); /* handle VMEXIT */ uint64_t exit_reason = hvf_exit->reason; @@ -1922,7 +1924,6 @@ int hvf_vcpu_exec(CPUState *cpu) uint32_t ec = syn_get_ec(syndrome); ret = 0; - bql_lock(); switch (exit_reason) { case HV_EXIT_REASON_EXCEPTION: /* This is the main one, handle below. */ From patchwork Mon Jun 23 12:18:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899224 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:25c5:b0:3a5:8cf5:b212 with SMTP id fs5csp2579731wrb; Mon, 23 Jun 2025 05:26:21 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVLv03QgjEHVXW7aSxANb65uL0TxHMm2fSjCv6AAPAoE+TBwpC9ULvhqhjJ46nf0+mRCuZCmA==@linaro.org X-Google-Smtp-Source: AGHT+IHMxSv7D9GVhSsMGTOd17vZCNrMwzbZPbNAvPHSxhfahDfAkHACz6o6kJRA4iSiNgy1eLKw X-Received: by 2002:a05:620a:3710:b0:7d2:1199:ac89 with SMTP id af79cd13be357-7d3f9935f9dmr2256745385a.36.1750681580767; Mon, 23 Jun 2025 05:26:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681580; cv=none; d=google.com; s=arc-20240605; b=Qy6P/FTdf6DSUy2ccmDUiiZmWjTiOLo5hmd4Nu6NLAVvo3ZFnavzSc1BGgU1bG3SLv 2X+jeknWVJYqvB/0TGSST1eo3PEwjHIfGUahkPvMy8Itwlq/3F723SfpxRkxPCIugQKz wxwfDbf/GoFuzB3qgHElGCwR2jmLKPYK772CJMHI7e50ERF1L0jfcrXvbG7RSdT3QA/q r7bDa8Sj6wFGczpjJtwpOFubAb2OeEEdaHpLBG2T8HjoE3UvdRKI86vXbhifSXrbyX75 /AFcKMi4yuZ+4hNtoTpHd8NExg3OKtImnBQH91mPpNTCZAEKmqRs2VjhDXqpMzL6Z4e3 j/6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=FtS7m+vqlh7Qr+Y7luF/PvAhAhpP9RBj3It7GX3FL/4=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=V9HR/ByDE72d0uAArl1Crk1r9ZNWL4dwl8efIBpnUzQmvAuNjEZrtCu7cFH1kXhaUT nfS1QbbsUy2FQsjLjVs0MtaoRf+FWwEejV35dgw01ZHRZEeBB7dIxMLsAmjQyBo4wzms yX/eQiQvucUeoXDKQZC8kOqm6u8DifsoLm1dKdViUDk48omaeHy/SUZgrwN7eYn28fvC 4t9CcYXVmtM4jBxlyFP2jczeGZ67VdGpD1BQE+qlC2SIbxxWbNdv4/xiNYCh+5cjVgR0 WmLnrESTUtV3MHFE4KaaY7mUhggyd1YIP/XHc96uKApzMs6MbN0aJndkAjdLKB6fEkmu 6XnQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CaAcsmHA; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4536fefd2b4sm51673585e9.36.2025.06.23.05.19.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:19:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 06/26] target/arm/hvf: Trace hv_vcpu_run() failures Date: Mon, 23 Jun 2025 14:18:25 +0200 Message-ID: <20250623121845.7214-7-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Allow distinguishing HV_ILLEGAL_GUEST_STATE in trace events. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/hvf/hvf.c | 10 +++++++++- target/arm/hvf/trace-events | 1 + 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index ef76dcd28de..cc5bbc155d2 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1916,7 +1916,15 @@ int hvf_vcpu_exec(CPUState *cpu) bql_unlock(); r = hv_vcpu_run(cpu->accel->fd); bql_lock(); - assert_hvf_ok(r); + switch (r) { + case HV_SUCCESS: + break; + case HV_ILLEGAL_GUEST_STATE: + trace_hvf_illegal_guest_state(); + /* fall through */ + default: + g_assert_not_reached(); + } /* handle VMEXIT */ uint64_t exit_reason = hvf_exit->reason; diff --git a/target/arm/hvf/trace-events b/target/arm/hvf/trace-events index 4fbbe4b45ec..a4870e0a5c4 100644 --- a/target/arm/hvf/trace-events +++ b/target/arm/hvf/trace-events @@ -11,3 +11,4 @@ hvf_exit(uint64_t syndrome, uint32_t ec, uint64_t pc) "exit: 0x%"PRIx64" [ec=0x% hvf_psci_call(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t cpuid) "PSCI Call x0=0x%016"PRIx64" x1=0x%016"PRIx64" x2=0x%016"PRIx64" x3=0x%016"PRIx64" cpu=0x%x" hvf_vgic_write(const char *name, uint64_t val) "vgic write to %s [val=0x%016"PRIx64"]" hvf_vgic_read(const char *name, uint64_t val) "vgic read from %s [val=0x%016"PRIx64"]" +hvf_illegal_guest_state(void) "HV_ILLEGAL_GUEST_STATE" From patchwork Mon Jun 23 12:18:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899205 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3837996ltt; Mon, 23 Jun 2025 05:20:29 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVUV4TWvxvg4vebz2UzQo7ZcbupdYWoTOCC8/8rDn+Gweur79SRXIfb/bSJPAakkuX7kHvLkg==@linaro.org X-Google-Smtp-Source: AGHT+IFoQYM3v0HmV5PpB7wtALIh2OYggxQkm37dGENTlxXlEFHTAW4EMlpXqu8zF5wxePjBDtU1 X-Received: by 2002:ad4:5f4a:0:b0:6e8:9086:261 with SMTP id 6a1803df08f44-6fd0a4645a6mr174368296d6.3.1750681229691; Mon, 23 Jun 2025 05:20:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681229; cv=none; d=google.com; s=arc-20240605; b=JQLeHEzSlU3skgIJ9mncjkcc33jFXyqWwQc4LmDeXJCGIS0q9Q6HaoKuOUp1Lm9vLn 9s50JgrRb4CDbpc9tKNFudSs6bDECj0XkOBkgbUMs+kwAfMFZFSnQYNoUvei0DOduhV9 mfVnT9Nfg5W2nofZe8l64p7r9n5pQz2oTqVB1b262BDxpTP6uE+NrGQQ9w/EtKSpPH6p Zpf+lG+NGfN1sLmOYBORcDk/v8j1iJLqEq/P2EDXLCpTlQOsfRLFbg5hn/7L3Xt1ejzH KqqGTP5AoCM3Q9hVukz3VeHazjavrnuKYlWllKeaOvHU9cIYMu4R+GeK1Ezi8LRZxg/B zj9g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=GyiBFk3PHsFTGgxQWIJAhORaZcy53iNw0vUcB4RUUDE=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=IUp6vab+ocf9NwUca1B0A9YcYpcmkOFcFIH8PpVsRDDzjRy3KEB4hhss41VK6EdOpJ RRVLqEezLNlhaTUdBVaweLwg3HGboomvk55ruUgeE6jIrLpkmOUrQqejCMpgRHGzT85t wNRbtVluFfyPD84KVvUkSKbE67VgF20ShAOgbi5idtrM87uu/jqGtBxO5HOcezczBWfy iJhQDavP/W3QKke11YnbYRRW81JSVOgxpEWBtVlEFEiDSJiHJWbFeNpg62AIYJknqpgf S5gH059JNjuDbchWMMdLYpwJVL3WdRyahhSDfai3OeDvd6P3DdGb8vPctGTIT8MJI5oM c0CQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LPB75Qos; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4535eada7adsm144615895e9.35.2025.06.23.05.19.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:19:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 07/26] accel/hvf: Trace VM memory mapping Date: Mon, 23 Jun 2025 14:18:26 +0200 Message-ID: <20250623121845.7214-8-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Trace memory mapped / unmapped in the guest. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- meson.build | 1 + accel/hvf/trace.h | 2 ++ accel/hvf/hvf-accel-ops.c | 6 ++++++ accel/hvf/trace-events | 7 +++++++ 4 files changed, 16 insertions(+) create mode 100644 accel/hvf/trace.h create mode 100644 accel/hvf/trace-events diff --git a/meson.build b/meson.build index 34729c2a3dd..5004678a26b 100644 --- a/meson.build +++ b/meson.build @@ -3633,6 +3633,7 @@ if have_block endif if have_system trace_events_subdirs += [ + 'accel/hvf', 'accel/kvm', 'audio', 'backends', diff --git a/accel/hvf/trace.h b/accel/hvf/trace.h new file mode 100644 index 00000000000..83a1883343a --- /dev/null +++ b/accel/hvf/trace.h @@ -0,0 +1,2 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include "trace/trace-accel_hvf.h" diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c index d60446b85b8..b38977207d2 100644 --- a/accel/hvf/hvf-accel-ops.c +++ b/accel/hvf/hvf-accel-ops.c @@ -59,6 +59,7 @@ #include "system/hvf_int.h" #include "system/runstate.h" #include "qemu/guest-random.h" +#include "trace.h" HVFState *hvf_state; @@ -97,6 +98,7 @@ static int do_hvf_set_memory(hvf_slot *slot, hv_memory_flags_t flags) if (macslot->present) { if (macslot->size != slot->size) { macslot->present = 0; + trace_hvf_vm_unmap(macslot->gpa_start, macslot->size); ret = hv_vm_unmap(macslot->gpa_start, macslot->size); assert_hvf_ok(ret); } @@ -109,6 +111,10 @@ static int do_hvf_set_memory(hvf_slot *slot, hv_memory_flags_t flags) macslot->present = 1; macslot->gpa_start = slot->start; macslot->size = slot->size; + trace_hvf_vm_map(slot->start, slot->size, slot->mem, flags, + flags & HV_MEMORY_READ ? 'R' : '-', + flags & HV_MEMORY_WRITE ? 'W' : '-', + flags & HV_MEMORY_EXEC ? 'E' : '-'); ret = hv_vm_map(slot->mem, slot->start, slot->size, flags); assert_hvf_ok(ret); return 0; diff --git a/accel/hvf/trace-events b/accel/hvf/trace-events new file mode 100644 index 00000000000..2fd3e127c74 --- /dev/null +++ b/accel/hvf/trace-events @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# See docs/devel/tracing.rst for syntax documentation. + +# hvf-accel-ops.c +hvf_vm_map(uint64_t paddr, uint64_t size, void *vaddr, uint8_t flags, const char r, const char w, const char e) "paddr:0x%016"PRIx64" size:0x%08"PRIx64" vaddr:%p flags:0x%02x/%c%c%c" +hvf_vm_unmap(uint64_t paddr, uint64_t size) "paddr:0x%016"PRIx64" size:0x%08"PRIx64 From patchwork Mon Jun 23 12:18:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899215 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3839894ltt; Mon, 23 Jun 2025 05:23:36 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWNCdlSpob5tIwWDvyXiKPloABs/3aOtnFIwQmKRGXXQC3m22BK4wWW72crQmCUsi8M22BG3g==@linaro.org X-Google-Smtp-Source: AGHT+IHnoGveyZ7CEIgRUD59Iv6kQHmndgabZJ/0ZNtw/3F/bKixrzKHGXWcGgbc1o6nxkvHPXKS X-Received: by 2002:a05:622a:1212:b0:4a4:2c75:aa5a with SMTP id d75a77b69052e-4a77a25d270mr193552171cf.30.1750681416011; Mon, 23 Jun 2025 05:23:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681415; cv=none; d=google.com; s=arc-20240605; b=Id4CisJDLp1ChvRuncotAq1ggWPPZf+YqAAXrCaYx/PopClPkYJXvZeMQoFuI1x5wa YGsoMfAsjYmRWEU+wbZWApR1Ivk9UMVzoJEDcIqylD5AT00ZGdecuxBJT0e2bCUstrSz pcQ5c56S/2TSuXFf5nLkX1laDykPnzVxHqWrlDoreVSydLCndaJltSu6PpXsHKp12evs SvZl7v0ulO/TzyQrSH5rAlqk+CB8GTH13xBxpzHd12qhEzmIk1p5EsnDdd61a7nFHBqp E1lfHRh8dHS9dBtdKduAulSSWFWvbmkt67ry0VOlcDrTiBvg6rFV1+xhELCFbJDxtawz FhTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=qyHQEfn6inWyZRMUVI/8b1HegzN318xDx/IKxFDD3c0=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=ff4Ez++0TSdgATXHSGyqgvRv8s9+8nSAE6H9bYmXpCiUae/yqLc1w4RYL+QbNTAd9R u1lLrl4DT2NSfWAe6qGCMmzd3ktRdys+n/CvHWFSa+XtlkgzjTGryG9pA0OEJASfCxek gzm4UJ5gGGyJKrc5qtADmujJ4lCW+s3mAMFJG/fW/WYcZP2p2g5ernLrP/b5rpBhkX06 NLA1bmOAh7tfM93oH2faUY31Bo3uXsiwVOL8rM9W3RNJzxrDt91kJO3UwSKLwSnaDz45 hOa/c88HrppiE2GUArFoRB7flJNZuTkZunkzjkYHykqQffzDNKnLq3UuUr/K51FLDZOu GXOg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=w+7lIDEX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-453646fd7aasm108552565e9.20.2025.06.23.05.19.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:19:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 08/26] target/arm/hvf: Log $pc in hvf_unknown_hvc() trace event Date: Mon, 23 Jun 2025 14:18:27 +0200 Message-ID: <20250623121845.7214-9-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Tracing $PC for unknown HVC instructions to not have to look at the disassembled flow of instructions. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/hvf/hvf.c | 4 ++-- target/arm/hvf/trace-events | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index cc5bbc155d2..d4c58516e8b 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -2071,12 +2071,12 @@ int hvf_vcpu_exec(CPUState *cpu) cpu_synchronize_state(cpu); if (arm_cpu->psci_conduit == QEMU_PSCI_CONDUIT_HVC) { if (!hvf_handle_psci_call(cpu)) { - trace_hvf_unknown_hvc(env->xregs[0]); + trace_hvf_unknown_hvc(env->pc, env->xregs[0]); /* SMCCC 1.3 section 5.2 says every unknown SMCCC call returns -1 */ env->xregs[0] = -1; } } else { - trace_hvf_unknown_hvc(env->xregs[0]); + trace_hvf_unknown_hvc(env->pc, env->xregs[0]); hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized()); } break; diff --git a/target/arm/hvf/trace-events b/target/arm/hvf/trace-events index a4870e0a5c4..b49746f28d1 100644 --- a/target/arm/hvf/trace-events +++ b/target/arm/hvf/trace-events @@ -5,10 +5,10 @@ hvf_inject_irq(void) "injecting IRQ" hvf_data_abort(uint64_t pc, uint64_t va, uint64_t pa, bool isv, bool iswrite, bool s1ptw, uint32_t len, uint32_t srt) "data abort: [pc=0x%"PRIx64" va=0x%016"PRIx64" pa=0x%016"PRIx64" isv=%d iswrite=%d s1ptw=%d len=%d srt=%d]" hvf_sysreg_read(uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2, uint64_t val) "sysreg read 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d) = 0x%016"PRIx64 hvf_sysreg_write(uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2, uint64_t val) "sysreg write 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d, val=0x%016"PRIx64")" -hvf_unknown_hvc(uint64_t x0) "unknown HVC! 0x%016"PRIx64 +hvf_unknown_hvc(uint64_t pc, uint64_t x0) "pc=0x%"PRIx64" unknown HVC! 0x%016"PRIx64 hvf_unknown_smc(uint64_t x0) "unknown SMC! 0x%016"PRIx64 hvf_exit(uint64_t syndrome, uint32_t ec, uint64_t pc) "exit: 0x%"PRIx64" [ec=0x%x pc=0x%"PRIx64"]" -hvf_psci_call(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t cpuid) "PSCI Call x0=0x%016"PRIx64" x1=0x%016"PRIx64" x2=0x%016"PRIx64" x3=0x%016"PRIx64" cpu=0x%x" +hvf_psci_call(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t cpuid) "PSCI Call x0=0x%016"PRIx64" x1=0x%016"PRIx64" x2=0x%016"PRIx64" x3=0x%016"PRIx64" cpuid=0x%x" hvf_vgic_write(const char *name, uint64_t val) "vgic write to %s [val=0x%016"PRIx64"]" hvf_vgic_read(const char *name, uint64_t val) "vgic read from %s [val=0x%016"PRIx64"]" hvf_illegal_guest_state(void) "HV_ILLEGAL_GUEST_STATE" From patchwork Mon Jun 23 12:18:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899207 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3838181ltt; Mon, 23 Jun 2025 05:20:48 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV5fCBYE9FIqyk/ITSC6jwRU0aHMJFhbL2qtHIgVlCFFYgdRvdQ8mMm3K5+rmWtA2BgSlcoaQ==@linaro.org X-Google-Smtp-Source: AGHT+IHyuDC5jbwxKcPsTJKkzlg0Nkw1UYzBx4tUa9sIRnzFOyzj4ub0Edo/JYiXycMd7C0FnhYE X-Received: by 2002:a05:622a:1893:b0:4a7:9c08:6a8 with SMTP id d75a77b69052e-4a79c085f9emr63758651cf.6.1750681248354; Mon, 23 Jun 2025 05:20:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681248; cv=none; d=google.com; s=arc-20240605; b=Bzvtrfz1xAl5iL7Nn4vilAE3Jp+0p1yHuXVl62Ov4ZLJyfRLHWt3lTS2vr/s+jGDhE oD89gsK+QAh3g8aVxd/JK8h9OUUDTXOZ8ih0JJgbJpPSfMzsJXc3fARP1MnR4Ei3pEue 83OJqlmL5uKGlTvZxKQH8IcTvG42bi575Ij5Fp3wWZITzQ4jrPJNc5xTPovb5rbjU9jR ZX5UT3x89fsjJNt4Vza2UIp6ZGQhjOeU4M/FF0phON8BYkHINltNNCbaM2yfMXQwzJ8g qqLmIqWYGdYsIHiTDR1PvxTtRs/qjRgu6htG/tPlmij40iJd4iJ9XBBwmED/nC2K+ebh +Ovg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=MgoMlu6luU8uPkDpvUPvEjZTODhHkmT/W4wpYdZo59E=; fh=i4vDaaNJJMDvQ2XTdk/cSdU7XlvUCPx2vhcXCt3psYU=; b=WMbbGw+a5s1MzXmTb9/s1d6pI2s+rlDtFw05kJT5EAtsoJ8F+JT2Ro3skixglASOrW eoHSi0dX5fsTeApxL01mGKiqkIGs86DafuBEUuWAUCh45L79+hdTHAjRP72ZFb+meWdw CpOjr55yqwcLDn0E6n9ruDgO4Iia75REELu0n0XxK8SEUSEII7cWVXeV2C2vxj8ZdaoN 0oz1OqLKFq7wMVnYdXAYVpoECa3jMO7qt1fx/6YypWGonXJQwkboeXKOpx7vH8t+eIsg TCVJYyDURSz1/i3ACN39xEpfC8EWu2A4u2dQAkDUYNBN/p41SjHf9s7CWcRilyL8dImT ltOg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CVzpMz23; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d0f1054bsm9217868f8f.9.2025.06.23.05.19.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:19:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= , qemu-stable@nongnu.org Subject: [PATCH v3 09/26] target/arm: Correct KVM & HVF dtb_compatible value Date: Mon, 23 Jun 2025 14:18:28 +0200 Message-ID: <20250623121845.7214-10-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Linux kernel knows how to parse "arm,armv8", not "arm,arm-v8". See arch/arm64/boot/dts/foundation-v8.dts: https://github.com/torvalds/linux/commit/90556ca1ebdd Cc: qemu-stable@nongnu.org Fixes: 26861c7ce06 ("target-arm: Add minimal KVM AArch64 support") Fixes: 585df85efea ("hvf: arm: Implement -cpu host") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/hvf/hvf.c | 2 +- target/arm/kvm.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index d4c58516e8b..bf59b17dcb9 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -879,7 +879,7 @@ static bool hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) hv_vcpu_exit_t *exit; int i; - ahcf->dtb_compatible = "arm,arm-v8"; + ahcf->dtb_compatible = "arm,armv8"; ahcf->features = (1ULL << ARM_FEATURE_V8) | (1ULL << ARM_FEATURE_NEON) | (1ULL << ARM_FEATURE_AARCH64) | diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 74fda8b8090..9a1b031556a 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -266,7 +266,7 @@ static bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) } ahcf->target = init.target; - ahcf->dtb_compatible = "arm,arm-v8"; + ahcf->dtb_compatible = "arm,armv8"; err = read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64pfr0, ARM64_SYS_REG(3, 0, 0, 4, 0)); From patchwork Mon Jun 23 12:18:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899213 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3839808ltt; Mon, 23 Jun 2025 05:23:25 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXnh+50gSOkbGtZI3gDmN9OQ56uMdBl8ZFMKAkK7S5KgXa8tYvXmo/T3vbcMXJ+0Af9VmXq0A==@linaro.org X-Google-Smtp-Source: AGHT+IEDO4V/rOvb8rmpPrcIOKihNYvr9YVqDS9km/syeGwE6GGUaLUtWfa8FGYJ54C1Vml0vT0H X-Received: by 2002:ad4:4ea3:0:b0:6fa:fe02:8219 with SMTP id 6a1803df08f44-6fd0a466c70mr216235776d6.7.1750681405095; Mon, 23 Jun 2025 05:23:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681405; cv=none; d=google.com; s=arc-20240605; b=OtWkzQM7VtFb+JMs2HiXurTym+aE70f/04On0sK8pv5BVDl/+E9jqElAQtjMvu+Don Wir1nK6u2labYKH8H8Z7wUYgJwkWjmHUhvulTXfKKjNjBNW2M5mpR02RkioS7x3zkt7T Q3MIoJ8PqJVBv87xvqDdJZ8U9WEwmVbdmM7BTDVlj8gK8UFn/rkna4iH8zdGWN0ubTc5 HwdwkV+kiluzcxKpMyL0y0Fc3QRRlEh23vvL4+bxUfOJv77AJUuMsdpO/kUclfxK87kp 8M3H+1wBGTFcksaP0GkCf5WQ2KmtgyNGKjAORZrYXhboCIcgTofvXDvNjt5hQJqW3mJn MvSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=48R2YiPamWEGXpLD/SMOVBFSdD9dMYPDAhGM9B3qv/Y=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=PDKAmcNli1AQHncLq9qj8eizlrf4DX8Co4yVBKgLx4GIAdyA0YNjaBlJyVHiLojrz6 Aa8pmxfyzRxcD0mdxWP6KNgAyixVVJeTlDL3EaRfCI5np7lh+AsrsNL4iAwJUkElecKy fygANyUoQoec1g42Szfza3nBVYJEN5EtPgL/iuCmr5xA4yd7/4AAYq09YKAHaIl6wMoP UkS06OY2/S15ZLj0qQDchEAKn30CgCgVkhllsDFXtiVxiSTTDhfJu2nr1Nb9nxI/2G6p RaghlO611QgpPHHlDtZvbCzS7uQw3M+TDkAzRrpSxBsop7TD1A+Sy51OhDhk4hqurzuk EvCw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mXcOS97v; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6e2036094sm2260909f8f.99.2025.06.23.05.19.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:19:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 10/26] accel/hvf: Model PhysTimer register Date: Mon, 23 Jun 2025 14:18:29 +0200 Message-ID: <20250623121845.7214-11-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Emulate PhysTimer dispatching to TCG, like we do with GIC registers. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/hvf/hvf.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index bf59b17dcb9..5169bf6e23c 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -187,6 +187,7 @@ void hvf_arm_init_debug(void) #define SYSREG_OSDLR_EL1 SYSREG(2, 0, 1, 3, 4) #define SYSREG_CNTPCT_EL0 SYSREG(3, 3, 14, 0, 1) #define SYSREG_CNTP_CTL_EL0 SYSREG(3, 3, 14, 2, 1) +#define SYSREG_CNTP_CVAL_EL0 SYSREG(3, 3, 14, 2, 2) #define SYSREG_PMCR_EL0 SYSREG(3, 3, 9, 12, 0) #define SYSREG_PMUSERENR_EL0 SYSREG(3, 3, 9, 14, 0) #define SYSREG_PMCNTENSET_EL0 SYSREG(3, 3, 9, 12, 1) @@ -198,6 +199,7 @@ void hvf_arm_init_debug(void) #define SYSREG_PMCEID0_EL0 SYSREG(3, 3, 9, 12, 6) #define SYSREG_PMCEID1_EL0 SYSREG(3, 3, 9, 12, 7) #define SYSREG_PMCCNTR_EL0 SYSREG(3, 3, 9, 13, 0) +#define SYSREG_CNTP_TVAL_EL0 SYSREG(3, 3, 14, 2, 0) #define SYSREG_PMCCFILTR_EL0 SYSREG(3, 3, 14, 15, 7) #define SYSREG_ICC_AP0R0_EL1 SYSREG(3, 0, 12, 8, 4) @@ -1326,16 +1328,15 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val) } switch (reg) { - case SYSREG_CNTPCT_EL0: - *val = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / - gt_cntfrq_period_ns(arm_cpu); - return 0; case SYSREG_OSLSR_EL1: *val = env->cp15.oslsr_el1; return 0; case SYSREG_OSDLR_EL1: /* Dummy register */ return 0; + case SYSREG_CNTP_CTL_EL0: + case SYSREG_CNTP_TVAL_EL0: + case SYSREG_CNTPCT_EL0: case SYSREG_ICC_AP0R0_EL1: case SYSREG_ICC_AP0R1_EL1: case SYSREG_ICC_AP0R2_EL1: @@ -1639,16 +1640,12 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val) case SYSREG_OSLAR_EL1: env->cp15.oslsr_el1 = val & 1; return 0; - case SYSREG_CNTP_CTL_EL0: - /* - * Guests should not rely on the physical counter, but macOS emits - * disable writes to it. Let it do so, but ignore the requests. - */ - qemu_log_mask(LOG_UNIMP, "Unsupported write to CNTP_CTL_EL0\n"); - return 0; case SYSREG_OSDLR_EL1: /* Dummy register */ return 0; + case SYSREG_CNTP_CTL_EL0: + case SYSREG_CNTP_CVAL_EL0: + case SYSREG_CNTP_TVAL_EL0: case SYSREG_ICC_AP0R0_EL1: case SYSREG_ICC_AP0R1_EL1: case SYSREG_ICC_AP0R2_EL1: From patchwork Mon Jun 23 12:18:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899217 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3839975ltt; Mon, 23 Jun 2025 05:23:44 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWzb2gKd6iYiZqT7iEd7paWTyYAgx9INRZvIRsPIWyIXo1ffGWJK272atAzbUm8u9nDl6Jdrw==@linaro.org X-Google-Smtp-Source: AGHT+IF6wwrKB3xReIx+SOzXpWstuOSjLBURO+Wn4wDtXZ4xxSTNLURCH+0JVV8qzMbVXMNkfYLh X-Received: by 2002:ac8:4e32:0:b0:4a7:aa4f:e38d with SMTP id d75a77b69052e-4a7aa4fe3b4mr9261041cf.34.1750681424557; Mon, 23 Jun 2025 05:23:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681424; cv=none; d=google.com; s=arc-20240605; b=ZAn+KSIjsd1BkeJXCDvkWvBE+BlrHi79JcoIBNgSm6d9c38tsRx2zsIDTxziXfIVlO IpzBp5om/XLy9RUpcNzqR2QFjkl1iCRK6dq53sLSVRhNSR8Rwp9vr+HEC8K/UXKIHdz/ 34ppxRxq5RLI06eaMbnoQB2lsHplfSFHPI/loXn3MtFWL4rgx2CmL4tPnPPGoip8omf6 0inl0E7YchuN0BxxQlIdrNSfaiPH38AofYZ4wsz3AW0pAAnIsIa/QjjzSNAQuwbse8us 9YxfyI6xBY9q6r6B95Pjyl1KmKA0WKIxX/DXUc9OuIu9C5cp5bZygrVLzdpdH2stf6P/ 8TJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=YG0rGkpeQcTfIwjCevzyaz+W/QtJY+1YJlHHFNrDtaE=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=Tx9CdZXVGYy97jbmN2i23azI3Lg2wC9MlVWAHiXmEtKlRav1QZE4hjjT/VspuIZQdW fNKzY5oLnHxwzpnOuNYqx6PQqbbWgjK3GM+3ghKlIcBKtEiUN+tFPY6Gcv8QVw3fH/b7 FWodzmCR5Hy/kW8dEYvuHcVXdfe7G7mm2wqGS4vqeOVxZU0+olJo/3KZXs6sYANc7dhv rzKgDFYZ9SWadeUEL8J5LT4U2TcZ8srQgHmFO0nF30P8sFtae9wqSRXLKm9Mn9oFlY3w bxHo50FLN2Z1YmSQfJGFJOGEWSdeyL05GOCyHIi2bBUsiDn4SEA+HuplYC8VN2ZLhtI5 7jEw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PujxoB1y; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-453646d14f3sm108727095e9.13.2025.06.23.05.19.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:19:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 11/26] target/arm/hvf: Pass @target_el argument to hvf_raise_exception() Date: Mon, 23 Jun 2025 14:18:30 +0200 Message-ID: <20250623121845.7214-12-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In preparation of raising exceptions at EL2, add the 'target_el' argument to hvf_raise_exception(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/hvf/hvf.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 5169bf6e23c..b932134a833 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1089,13 +1089,13 @@ void hvf_kick_vcpu_thread(CPUState *cpu) } static void hvf_raise_exception(CPUState *cpu, uint32_t excp, - uint32_t syndrome) + uint32_t syndrome, int target_el) { ARMCPU *arm_cpu = ARM_CPU(cpu); CPUARMState *env = &arm_cpu->env; cpu->exception_index = excp; - env->exception.target_el = 1; + env->exception.target_el = target_el; env->exception.syndrome = syndrome; arm_cpu_do_interrupt(cpu); @@ -1454,7 +1454,7 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val) SYSREG_CRN(reg), SYSREG_CRM(reg), SYSREG_OP2(reg)); - hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized()); + hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized(), 1); return 1; } @@ -1760,7 +1760,7 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val) SYSREG_CRN(reg), SYSREG_CRM(reg), SYSREG_OP2(reg)); - hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized()); + hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized(), 1); return 1; } @@ -1963,7 +1963,7 @@ int hvf_vcpu_exec(CPUState *cpu) if (!hvf_find_sw_breakpoint(cpu, env->pc)) { /* Re-inject into the guest */ ret = 0; - hvf_raise_exception(cpu, EXCP_BKPT, syn_aa64_bkpt(0)); + hvf_raise_exception(cpu, EXCP_BKPT, syn_aa64_bkpt(0), 1); } break; } @@ -2074,7 +2074,7 @@ int hvf_vcpu_exec(CPUState *cpu) } } else { trace_hvf_unknown_hvc(env->pc, env->xregs[0]); - hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized()); + hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized(), 1); } break; case EC_AA64_SMC: @@ -2089,7 +2089,7 @@ int hvf_vcpu_exec(CPUState *cpu) } } else { trace_hvf_unknown_smc(env->xregs[0]); - hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized()); + hvf_raise_exception(cpu, EXCP_UDEF, syn_uncategorized(), 1); } break; default: From patchwork Mon Jun 23 12:18:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899226 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:25c5:b0:3a5:8cf5:b212 with SMTP id fs5csp2580735wrb; Mon, 23 Jun 2025 05:28:46 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVa3IcYwcohw5nbkdH9iqilhxQmvk8txLsfqeX2yQjnvFKO2GGoQCpKNgJhyRJrsqsWGxYqJg==@linaro.org X-Google-Smtp-Source: AGHT+IHZv97/aYq4RLt6F6cio5oYvc2aFYKojp5aq40VVVcO6ex2RxL6EoqkP2LfMElzGhFOkEae X-Received: by 2002:a05:6214:226d:b0:6f8:af20:367d with SMTP id 6a1803df08f44-6fd0a596ac7mr213254436d6.39.1750681726361; Mon, 23 Jun 2025 05:28:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681726; cv=none; d=google.com; s=arc-20240605; b=kRVc5tUok7/pdqoAh4P359+bKrHIaAlK06jweS0qq5z18kCm+j5c0W1VYBUMMI/O9k zjtxpu23arNPI+WYVHoXoiMAiHhX2L1ynKJNmBi7sFs9n5PM6rMnimwVDRlbT1a20bhM 6/7pSFcvBMHZiEOdbtjhplPsZ9iTu0v4lkC9FRxldsNm8CUXR3ZcQ/HXRrvgrsuNWdHk WG3p3Hqsy8nY/34Yzoiu366Ja1Bq+xFrWD7wZBMB2/knnaI5ekxvECY6NKq3O9w0pU3c xZ6Kyjnsvvl4MRFIyxzceNEFAJqOclFuZa5BYA0eXhoSW11FpD3hKdHP/A4hjpomJpuZ FzQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=MZYDDWvDMspPzhkKxydUFPlizzWHJdNmtQlGNWnBP18=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=ZRCn7fnfSmRs6Ys+4CnaD00cZSJnLQwSHoc8xmvOg0Dl7ju/xmV2UIxuCiEusUa8/O gNQ+IR5pVLlGjGSloiT74J+dHjKU9rYMDqO9Fsb6+xHyK2kIu9Cz8kfKtlNfHRMJgVtP 8Q/5gcdopJEeywsCQ2zH8fLW/JPzRe56w1L0r50zqteMIPAlHZMNq+7m0zLLXcn6kGlP NDET7J/8H1fPN1fRMUtfD6yrKlnXpGcRvStFNZop1CVFKdYocLlm4V1I7/A9gUH31Kw8 G7AGlv7L4zoS1X7PRQ8tvYSSlIx0Q4xdlO970RyZASW/o2CarUHQM3Nn5qtnKXu2zSH3 MB+A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="iWRCF/b4"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-453646cb57fsm110694655e9.1.2025.06.23.05.19.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:19:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 12/26] target/arm: Restrict system register properties to system binary Date: Mon, 23 Jun 2025 14:18:31 +0200 Message-ID: <20250623121845.7214-13-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Do not expose the following system-specific properties on user-mode binaries: - psci-conduit - cntfrq (ARM_FEATURE_GENERIC_TIMER) - rvbar (ARM_FEATURE_V8) - has-mpu (ARM_FEATURE_PMSA) - pmsav7-dregion (ARM_FEATURE_PMSA) - reset-cbar (ARM_FEATURE_CBAR) - reset-hivecs (ARM_FEATURE_M) - init-nsvtor (ARM_FEATURE_M) - init-svtor (ARM_FEATURE_M_SECURITY) - idau (ARM_FEATURE_M_SECURITY) Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/cpu.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index eb0639de719..e5b70f5de81 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1500,6 +1500,7 @@ static void arm_cpu_initfn(Object *obj) * 0 means "unset, use the default value". That default might vary depending * on the CPU type, and is set in the realize fn. */ +#ifndef CONFIG_USER_ONLY static const Property arm_cpu_gt_cntfrq_property = DEFINE_PROP_UINT64("cntfrq", ARMCPU, gt_cntfrq_hz, 0); @@ -1509,7 +1510,6 @@ static const Property arm_cpu_reset_cbar_property = static const Property arm_cpu_reset_hivecs_property = DEFINE_PROP_BOOL("reset-hivecs", ARMCPU, reset_hivecs, false); -#ifndef CONFIG_USER_ONLY static const Property arm_cpu_has_el2_property = DEFINE_PROP_BOOL("has_el2", ARMCPU, has_el2, true); @@ -1532,6 +1532,7 @@ static const Property arm_cpu_has_neon_property = static const Property arm_cpu_has_dsp_property = DEFINE_PROP_BOOL("dsp", ARMCPU, has_dsp, true); +#ifndef CONFIG_USER_ONLY static const Property arm_cpu_has_mpu_property = DEFINE_PROP_BOOL("has-mpu", ARMCPU, has_mpu, true); @@ -1544,6 +1545,7 @@ static const Property arm_cpu_pmsav7_dregion_property = DEFINE_PROP_UNSIGNED_NODEFAULT("pmsav7-dregion", ARMCPU, pmsav7_dregion, qdev_prop_uint32, uint32_t); +#endif static bool arm_get_pmu(Object *obj, Error **errp) { @@ -1731,6 +1733,7 @@ static void arm_cpu_post_init(Object *obj) "Set on/off to enable/disable aarch64 " "execution state "); } +#ifndef CONFIG_USER_ONLY if (arm_feature(&cpu->env, ARM_FEATURE_CBAR) || arm_feature(&cpu->env, ARM_FEATURE_CBAR_RO)) { qdev_property_add_static(DEVICE(obj), &arm_cpu_reset_cbar_property); @@ -1746,7 +1749,6 @@ static void arm_cpu_post_init(Object *obj) OBJ_PROP_FLAG_READWRITE); } -#ifndef CONFIG_USER_ONLY if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) { /* Add the has_el3 state CPU property only if EL3 is allowed. This will * prevent "has_el3" from existing on CPUs which cannot support EL3. @@ -1818,6 +1820,7 @@ static void arm_cpu_post_init(Object *obj) qdev_property_add_static(DEVICE(obj), &arm_cpu_has_dsp_property); } +#ifndef CONFIG_USER_ONLY if (arm_feature(&cpu->env, ARM_FEATURE_PMSA)) { qdev_property_add_static(DEVICE(obj), &arm_cpu_has_mpu_property); if (arm_feature(&cpu->env, ARM_FEATURE_V7)) { @@ -1854,8 +1857,6 @@ static void arm_cpu_post_init(Object *obj) &cpu->psci_conduit, OBJ_PROP_FLAG_READWRITE); - qdev_property_add_static(DEVICE(obj), &arm_cpu_cfgend_property); - if (arm_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER)) { qdev_property_add_static(DEVICE(cpu), &arm_cpu_gt_cntfrq_property); } @@ -1864,7 +1865,6 @@ static void arm_cpu_post_init(Object *obj) kvm_arm_add_vcpu_properties(cpu); } -#ifndef CONFIG_USER_ONLY if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && cpu_isar_feature(aa64_mte, cpu)) { object_property_add_link(obj, "tag-memory", @@ -1882,6 +1882,7 @@ static void arm_cpu_post_init(Object *obj) } } #endif + qdev_property_add_static(DEVICE(obj), &arm_cpu_cfgend_property); } static void arm_cpu_finalizefn(Object *obj) From patchwork Mon Jun 23 12:18:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899214 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3839842ltt; Mon, 23 Jun 2025 05:23:28 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUspEVrBL3im6dx4TuEmZC2ptMPXjuAT0hZkMVxmaIU7WCXv/FuyLUaoyErq1wM2x72+1CyGA==@linaro.org X-Google-Smtp-Source: AGHT+IFFCYZ+TxQpKTI+Vq0vzx6Re+YYMoAKBicxrWsxlwCGIAhuOIicR8fGcOQZr+mjupfq2ItE X-Received: by 2002:a05:6214:434a:b0:6fc:ff41:8eb7 with SMTP id 6a1803df08f44-6fd0a53596bmr225938596d6.31.1750681408106; Mon, 23 Jun 2025 05:23:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681408; cv=none; d=google.com; s=arc-20240605; b=OHEaljPmrrCChqtuAZUqZ18+c6N5bnbmBa5uLVi0XmH8XSObYswJxl8jWCTY3pu6i1 rGhGTCxV9uNJqRgMHj6CVEUX6qSnjkUXSu+t/X5dW3Scp/5isMzlNjYkq5XCmZlHWYM7 4TaX9LOeFb+nc4WcW9LQmQyXAl0hhMyRn1FqN9hdzYzReS0SLOI/qHM9c/f1xvMjxRtY hNN6wdTg2xe5zcqZk+InUPZgLCOjdrtn3vXzHbJA8xAL/geA/fmfWRfsWKQqVtFFWBy/ 1fOAjTyvkk7cinwz2M+kdMdtqcgyY+uB/0hGuzs7NscjPi9qCz8TPcA5O95ta5q/qDnQ pTjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=n9TcP7uZ8sj3k25ApWupc8E4+ydRbD8zQYT0ugNh7kc=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=UxxuOk2qhcMv24WWLYRmWfW6O9qLIFW+mVtMHnXuH3vKj1q0mHReWzOz4ZVJNHKICq bOMj0oJLX8fwlJHlkxmhRVLO/2KR171PWoofe/ouiVPk8c6oO/1oTj/Gyyg+yY7EwZn6 HdJBvskhd5aZ5AHZ3ckpq+MJCQcT+jZtsmhb+/I58ujc/suvRtnkXJ2KQA0lh2NIqjj0 vfpoF+wCbkSIuFG34Rk78AwtOWaoruEZeu2T5/dQ2KO0vvD+Qx9BWCokzQbuqqX6/wDp Q4i5JwJ4RMzXdToKisoiazTvloN7/fZtFMtd/AOu+SwPzMDEjQRh9k900elIoKwixrEP zTcQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x0a+n3xs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d0f10385sm9537215f8f.17.2025.06.23.05.19.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:19:53 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 13/26] target/arm: Create GTimers *after* features finalized / accel realized Date: Mon, 23 Jun 2025 14:18:32 +0200 Message-ID: <20250623121845.7214-14-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Call generic (including accelerator) cpu_realize() handlers *before* setting @gt_cntfrq_hz default Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/cpu.c | 65 ++++++++++++++++++++++++------------------------ 1 file changed, 33 insertions(+), 32 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index e5b70f5de81..ab5fbd9b40b 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1985,26 +1985,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) return; } - if (!cpu->gt_cntfrq_hz) { - /* - * 0 means "the board didn't set a value, use the default". (We also - * get here for the CONFIG_USER_ONLY case.) - * ARMv8.6 and later CPUs architecturally must use a 1GHz timer; before - * that it was an IMPDEF choice, and QEMU initially picked 62.5MHz, - * which gives a 16ns tick period. - * - * We will use the back-compat value: - * - for QEMU CPU types added before we standardized on 1GHz - * - for versioned machine types with a version of 9.0 or earlier - */ - if (arm_feature(env, ARM_FEATURE_BACKCOMPAT_CNTFRQ) || - cpu->backcompat_cntfrq) { - cpu->gt_cntfrq_hz = GTIMER_BACKCOMPAT_HZ; - } else { - cpu->gt_cntfrq_hz = GTIMER_DEFAULT_HZ; - } - } - #ifndef CONFIG_USER_ONLY /* The NVIC and M-profile CPU are two halves of a single piece of * hardware; trying to use one without the other is a command line @@ -2051,7 +2031,40 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) return; } } +#endif + cpu_exec_realizefn(cs, &local_err); + if (local_err != NULL) { + error_propagate(errp, local_err); + return; + } + + arm_cpu_finalize_features(cpu, &local_err); + if (local_err != NULL) { + error_propagate(errp, local_err); + return; + } + +#ifndef CONFIG_USER_ONLY + if (!cpu->gt_cntfrq_hz) { + /* + * 0 means "the board didn't set a value, use the default". (We also + * get here for the CONFIG_USER_ONLY case.) + * ARMv8.6 and later CPUs architecturally must use a 1GHz timer; before + * that it was an IMPDEF choice, and QEMU initially picked 62.5MHz, + * which gives a 16ns tick period. + * + * We will use the back-compat value: + * - for QEMU CPU types added before we standardized on 1GHz + * - for versioned machine types with a version of 9.0 or earlier + */ + if (arm_feature(env, ARM_FEATURE_BACKCOMPAT_CNTFRQ) || + cpu->backcompat_cntfrq) { + cpu->gt_cntfrq_hz = GTIMER_BACKCOMPAT_HZ; + } else { + cpu->gt_cntfrq_hz = GTIMER_DEFAULT_HZ; + } + } { uint64_t scale = gt_cntfrq_period_ns(cpu); @@ -2072,18 +2085,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) } #endif - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } - - arm_cpu_finalize_features(cpu, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } - #ifdef CONFIG_USER_ONLY /* * User mode relies on IC IVAU instructions to catch modification of From patchwork Mon Jun 23 12:18:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899209 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3839214ltt; Mon, 23 Jun 2025 05:22:30 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWQjrDcbrfiWQFjHDffGHnjc8irY71ljvcRjfJfPLCol4+RQ93Tpop4u13Gbc1OLAjdSpYeQA==@linaro.org X-Google-Smtp-Source: AGHT+IEhyVNwyYVb8CrUpGP/4flAkeCyalq4P6O339ie8Bh7OHjP9jERocD/9XQMauxHmgcSQcP8 X-Received: by 2002:a05:620a:8bcb:b0:7d4:2c9:e0c4 with SMTP id af79cd13be357-7d402c9e3d5mr982464685a.28.1750681350351; Mon, 23 Jun 2025 05:22:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681350; cv=none; d=google.com; s=arc-20240605; b=C1Pu+KPBJ6hf/CdOSSuGNxPkP2DAROCx1fBAdaujELD5bSnCiHUncYeKLpxDXZrG89 +EMkPPHwQPED18D/T7Lg8U7GPwi8eZzj9y3AfgK84B60AXWnKN+ISYJfLgDSIryJSAJN xJHOhfjMB0sKv+IWX3jEV1gRkz2+JhHM+garjJLsolA7qe09yu1LENf9TnvlHeRXyL1Q K54dqXgOViyCDCJV26PRFjDS6NMAR7byep+1nnSyM9ojspOAY3OgW2/J/sfttU28IAyF yIDz4FDh4mujwIdY2DDfBHXajDYxrXs5gLQJtrTGx/PU27bUpM0B2x5yYLARoG8i+Lve q/9w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=FOQFF5IHVggEpZxvhH4Dg2y5NDppFE2+idPk4kXeUTw=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=Kw1sb9qaS2zQRKhBzBgl+S7SxyJHMheIjDjlM2AitqlAoz+aw91nKurQO8tVu6uJ4t 7oCiexeVV7cvYC18qyW4D7Hi7d2jH260MxMKoLCWQ7oWH682+LBqz14cM53HKGoYwbDa 1OJS6aOu2vU9p3rQtVWrO1oFwbQdTssNZl/LOkQmZncohnX/Nn8wsZLyID6JPYkVGtv4 7beBXLIQapHHC/lwuX8YXF5ABRmJukhGpxnaECx11IcC+wQ1cIBW8GWRw5xDt2V9feia 9bSNkZCqLP123uxNRBMNgPN/8jY/kNqVPBHM0BWRgq1dOq+VeI28c2LAz2cmJU4BdSew BXJw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Lg93oGuI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4535e983a4bsm143750295e9.13.2025.06.23.05.19.58 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:19:58 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 14/26] accel: Keep reference to AccelOpsClass in AccelClass Date: Mon, 23 Jun 2025 14:18:33 +0200 Message-ID: <20250623121845.7214-15-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Allow dereferencing AccelOpsClass outside of accel/accel-system.c. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée --- include/qemu/accel.h | 3 +++ include/system/accel-ops.h | 3 ++- accel/accel-common.c | 1 + accel/accel-system.c | 3 ++- accel/tcg/tcg-accel-ops.c | 4 +++- 5 files changed, 11 insertions(+), 3 deletions(-) diff --git a/include/qemu/accel.h b/include/qemu/accel.h index fbd3d897fef..9dea3145429 100644 --- a/include/qemu/accel.h +++ b/include/qemu/accel.h @@ -37,6 +37,9 @@ typedef struct AccelClass { /*< public >*/ const char *name; + /* Cached by accel_init_ops_interfaces() when created */ + AccelOpsClass *ops; + int (*init_machine)(MachineState *ms); bool (*cpu_common_realize)(CPUState *cpu, Error **errp); void (*cpu_common_unrealize)(CPUState *cpu); diff --git a/include/system/accel-ops.h b/include/system/accel-ops.h index 4c99d25aeff..44b37592d02 100644 --- a/include/system/accel-ops.h +++ b/include/system/accel-ops.h @@ -10,6 +10,7 @@ #ifndef ACCEL_OPS_H #define ACCEL_OPS_H +#include "qemu/accel.h" #include "exec/vaddr.h" #include "qom/object.h" @@ -31,7 +32,7 @@ struct AccelOpsClass { /*< public >*/ /* initialization function called when accel is chosen */ - void (*ops_init)(AccelOpsClass *ops); + void (*ops_init)(AccelClass *ac); bool (*cpus_are_resettable)(void); void (*cpu_reset_hold)(CPUState *cpu); diff --git a/accel/accel-common.c b/accel/accel-common.c index 4894b98d64a..56d88940f92 100644 --- a/accel/accel-common.c +++ b/accel/accel-common.c @@ -10,6 +10,7 @@ #include "qemu/osdep.h" #include "qemu/accel.h" #include "qemu/target-info.h" +#include "system/accel-ops.h" #include "accel/accel-cpu.h" #include "accel-internal.h" diff --git a/accel/accel-system.c b/accel/accel-system.c index a0f562ae9ff..64bc991b1ce 100644 --- a/accel/accel-system.c +++ b/accel/accel-system.c @@ -85,8 +85,9 @@ void accel_init_ops_interfaces(AccelClass *ac) * non-NULL create_vcpu_thread operation. */ ops = ACCEL_OPS_CLASS(oc); + ac->ops = ops; if (ops->ops_init) { - ops->ops_init(ops); + ops->ops_init(ac); } cpus_register_accel(ops); } diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index b24d6a75625..da2e22a7dff 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -198,8 +198,10 @@ static inline void tcg_remove_all_breakpoints(CPUState *cpu) cpu_watchpoint_remove_all(cpu, BP_GDB); } -static void tcg_accel_ops_init(AccelOpsClass *ops) +static void tcg_accel_ops_init(AccelClass *ac) { + AccelOpsClass *ops = ac->ops; + if (qemu_tcg_mttcg_enabled()) { ops->create_vcpu_thread = mttcg_start_vcpu_thread; ops->kick_vcpu_thread = mttcg_kick_vcpu_thread; From patchwork Mon Jun 23 12:18:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899212 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3839807ltt; Mon, 23 Jun 2025 05:23:25 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXAsqzfprtKdd9iqRdr585NkWtZcud429SDRhK0Ngn6Xj6x9L7NbP8Cpk26+o/Wzc2W0HNaVQ==@linaro.org X-Google-Smtp-Source: AGHT+IFvfdPpI6xJT5wXYTEDDGYpUaeq+rBCpnRfR5KHyo3/r7BJOC8ow0ewBms4ja4TdBaqRk2E X-Received: by 2002:a05:622a:414:b0:476:875e:516d with SMTP id d75a77b69052e-4a77a2cf4bbmr195777721cf.36.1750681404781; Mon, 23 Jun 2025 05:23:24 -0700 (PDT) ARC-Seal: i=1; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-453646cb5a8sm111194065e9.7.2025.06.23.05.20.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:20:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 15/26] accel: Introduce AccelOpsClass::cpu_target_realize() hook Date: Mon, 23 Jun 2025 14:18:34 +0200 Message-ID: <20250623121845.7214-16-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Allow accelerators to set vCPU properties before its realization. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/system/accel-ops.h | 1 + accel/accel-common.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/include/system/accel-ops.h b/include/system/accel-ops.h index 44b37592d02..a863fe59388 100644 --- a/include/system/accel-ops.h +++ b/include/system/accel-ops.h @@ -35,6 +35,7 @@ struct AccelOpsClass { void (*ops_init)(AccelClass *ac); bool (*cpus_are_resettable)(void); + bool (*cpu_target_realize)(CPUState *cpu, Error **errp); void (*cpu_reset_hold)(CPUState *cpu); void (*create_vcpu_thread)(CPUState *cpu); /* MANDATORY NON-NULL */ diff --git a/accel/accel-common.c b/accel/accel-common.c index 56d88940f92..55d21b63a48 100644 --- a/accel/accel-common.c +++ b/accel/accel-common.c @@ -105,6 +105,9 @@ bool accel_cpu_common_realize(CPUState *cpu, Error **errp) if (acc->cpu_common_realize && !acc->cpu_common_realize(cpu, errp)) { return false; } + if (acc->ops->cpu_target_realize && !acc->ops->cpu_target_realize(cpu, errp)) { + return false; + } return true; } From patchwork Mon Jun 23 12:18:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899216 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3839943ltt; Mon, 23 Jun 2025 05:23:41 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXi+0oo2+FSswulMRlhEluISWwtQtytWWD1PqmxC07H8++mUW+3P+ago88/lthc62nIsaiy6A==@linaro.org X-Google-Smtp-Source: AGHT+IEL/57nuarDw9NI+aRdguWSi/AjX26Syqp6ZU9cG7Yze3H1/TD9/ti7a692AMlDOhCEQM8s X-Received: by 2002:a05:622a:1305:b0:4a6:f587:ade2 with SMTP id d75a77b69052e-4a77a20925dmr178409591cf.18.1750681421253; Mon, 23 Jun 2025 05:23:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681421; cv=none; d=google.com; s=arc-20240605; b=Y0pjrVN7NnIlB6vvm7ltxZdbxlckiejV3PFuJGhnBCrLv+oNRoLubgo/qc/OP1QAiR KpnA7pLl+Go5uybQ2QE3jEIirdsaVw7Oo/ANbvp4PEmGp4fwa1karD4Re6AmsTw2YWMX lpX9Y/OC9mRUyHorScV03n4bxVS4GzlF9VlF7f0Q0u/mCnPC1oJFgKGO1qDdve+zSEjN h/mo0tlgrzVKSdQLBY44KgMo+Q1M3evcDCOA4dTojkjT4n+NhtP6eVhbJBL3L43qniqG C3JPyTUOz/CbeCMIafYjYIjxEX+OOuaCYx9CZ8IbO3xCRxI08v3jGPtR6EROIWxW7GT9 0Atw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=+zn98SRXtaFwoihOhnAeEFS9N5zUhWDF7TNyGo/TLss=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=fQ15Dv1T8s0k6eiE7EgbUuJd/ntI+BNLuuu0FNsmhARE4OqcYWpmGLD56A6est0Kur EcHaoEhccC3+RleNH5uviIVmQOymfBeck7y7xelIu0s0VPxzqvN9A0F7EWzu1pYZQmrW +zct6Mnvcdj9g4xSHTqOzlbMsQsROWdNQ2qvTywP/CRtl9R9QIFajRzD7njcMQNBVo0T PfGyIPXyhwLZnUlLBO8rBrdIlgrAxwiemWpJoyjjrpKMYJ8Nf1L0gWACV9T2m3B7QHBZ SKJPITLKajNIcU7tJgWSgNcXGGWJHc/grRF6w8XQzjv+arhpN71dgPtjyE59+2+9jj2T BcsA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kSJ0gjZn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d0f1d168sm9202901f8f.40.2025.06.23.05.20.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:20:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 16/26] accel/hvf: Add hvf_arch_cpu_realize() stubs Date: Mon, 23 Jun 2025 14:18:35 +0200 Message-ID: <20250623121845.7214-17-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Implement HVF AccelOpsClass::cpu_target_realize() hook as empty stubs. Target implementations will come separately. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/system/hvf.h | 3 +++ accel/hvf/hvf-accel-ops.c | 2 ++ target/arm/hvf/hvf.c | 5 +++++ target/i386/hvf/hvf.c | 5 +++++ 4 files changed, 15 insertions(+) diff --git a/include/system/hvf.h b/include/system/hvf.h index a9a502f0c8f..8c4409a13f1 100644 --- a/include/system/hvf.h +++ b/include/system/hvf.h @@ -72,6 +72,9 @@ void hvf_arch_update_guest_debug(CPUState *cpu); * Return whether the guest supports debugging. */ bool hvf_arch_supports_guest_debug(void); + +bool hvf_arch_cpu_realize(CPUState *cpu, Error **errp); + #endif /* COMPILING_PER_TARGET */ #endif diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c index b38977207d2..b9511103a75 100644 --- a/accel/hvf/hvf-accel-ops.c +++ b/accel/hvf/hvf-accel-ops.c @@ -588,6 +588,8 @@ static void hvf_accel_ops_class_init(ObjectClass *oc, const void *data) { AccelOpsClass *ops = ACCEL_OPS_CLASS(oc); + ops->cpu_target_realize = hvf_arch_cpu_realize; + ops->create_vcpu_thread = hvf_start_vcpu_thread; ops->kick_vcpu_thread = hvf_kick_vcpu_thread; diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index b932134a833..fd493f45af1 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1082,6 +1082,11 @@ int hvf_arch_init_vcpu(CPUState *cpu) return 0; } +bool hvf_arch_cpu_realize(CPUState *cs, Error **errp) +{ + return true; +} + void hvf_kick_vcpu_thread(CPUState *cpu) { cpus_kick_thread(cpu); diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 99e37a33e50..28484496710 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -367,6 +367,11 @@ int hvf_arch_init_vcpu(CPUState *cpu) return 0; } +bool hvf_arch_cpu_realize(CPUState *cs, Error **errp) +{ + return true; +} + static void hvf_store_events(CPUState *cpu, uint32_t ins_len, uint64_t idtvec_info) { X86CPU *x86_cpu = X86_CPU(cpu); From patchwork Mon Jun 23 12:18:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899228 Delivered-To: patch@linaro.org Received: by 2002:adf:e506:0:b0:3a6:d909:26ce with SMTP id j6csp862329wrm; Mon, 23 Jun 2025 05:30:03 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXDCjAXzKLuORzmt4knBF+nL3wJo4jHLOm0LFFXEq4YUoCrZuLRmziZz2LL5bW2TfQWq9FEjg==@linaro.org X-Google-Smtp-Source: AGHT+IG6OB3K85wKB41i9WmTM7WjTNkoXRnPQeu/jal3udgRlwBbCkTp5TJ7CNPZHvEJs7Bdg/3a X-Received: by 2002:ac8:5fd4:0:b0:4a7:189a:7580 with SMTP id d75a77b69052e-4a77a23024amr178903871cf.26.1750681802916; Mon, 23 Jun 2025 05:30:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681802; cv=none; d=google.com; s=arc-20240605; b=luD5eH3Mzh4bjGYTTkLZs1KhVHYAgbK2kMFwzRtwlDAlpcbvmmdceicTco1GDRiekq PpDHzPiIS3Fp4U6GwRiRUidBVnsEPXezQjZ5PQcHYoRu57CvRzEk2Sa3V5bHfeAeEYaH 3olKH36i6PPwoZSl+Yfqji2IlY7XIcxdfKakUQLq12ilW2aiCk3ZJQYFEhOs7d85Imhi +AYo8X58tWQtD3U2Fyd+aTMUjVwCBWC6mgHMn43wQyVo+UP4Tq1u3uGtuxUrqDezGwQB N7NTfat2rrh3D7rrb3yoVc1aWXs9UZxK0hD7lF+uQmrZaXf2R6UMdF7CAPo3bf43ZhGR jrgg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=NW0Hu04oFurHIvjEpsNrwT15qBihdHLv3c5t8qKFRhE=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=O9yMKiLX4jmtOJ/xReELExfYSZhGqlrfYNLWRsQo8BnTLF6X2/wPxmGrPWXaGinGkB vwbuGPmsvhug+qUMgMMAMv+AA+tlJQdnVZnbZa1Qe+yPG1bQp6cbCUiNpnywCPIUFILt m7x9+RHU5fFtNkfO+Xu2Gt4LYGSDY4NWCl47Xo4c3K2eRW04CBSWyEOQcP8PO9tzruDk kHTfNEx1p7Dw7qI7aa4oISxn8kxgfXWttlhhyYZZbp39LnQH8+gE2IclxZIq80wByjNK Bzf21bFBq4PGXcV/l2//ZJuNFXaoxG9jenM0TpiHW9qUf9qwlgxcgLglVfR0XBvWWx9w OSYQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zP74SQHB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45365af83easm103189385e9.25.2025.06.23.05.20.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:20:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 17/26] target/arm/hvf: Really set Generic Timer counter frequency Date: Mon, 23 Jun 2025 14:18:36 +0200 Message-ID: <20250623121845.7214-18-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Setting ARMCPU::gt_cntfrq_hz in hvf_arch_init_vcpu() is not correct because the timers have already be initialized with the default frequency. Set it earlier in the AccelOpsClass::cpu_target_realize() handler instead, and assert the value is correct when reaching hvf_arch_init_vcpu(). Fixes: a1477da3dde ("hvf: Add Apple Silicon support") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/hvf/hvf.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index fd493f45af1..52199c4ff9d 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1004,6 +1004,13 @@ cleanup: return ret; } +static uint64_t get_cntfrq_el0(void) +{ + uint64_t freq_hz = 0; + asm volatile("mrs %0, cntfrq_el0" : "=r"(freq_hz)); + return freq_hz; +} + int hvf_arch_init_vcpu(CPUState *cpu) { ARMCPU *arm_cpu = ARM_CPU(cpu); @@ -1015,7 +1022,9 @@ int hvf_arch_init_vcpu(CPUState *cpu) int i; env->aarch64 = true; - asm volatile("mrs %0, cntfrq_el0" : "=r"(arm_cpu->gt_cntfrq_hz)); + + /* system count frequency sanity check */ + assert(arm_cpu->gt_cntfrq_hz == get_cntfrq_el0()); /* Allocate enough space for our sysreg sync */ arm_cpu->cpreg_indexes = g_renew(uint64_t, arm_cpu->cpreg_indexes, @@ -1084,6 +1093,10 @@ int hvf_arch_init_vcpu(CPUState *cpu) bool hvf_arch_cpu_realize(CPUState *cs, Error **errp) { + ARMCPU *cpu = ARM_CPU(cs); + + cpu->gt_cntfrq_hz = get_cntfrq_el0(); + return true; } From patchwork Mon Jun 23 12:18:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899211 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3839743ltt; Mon, 23 Jun 2025 05:23:19 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUZvb356zXtSjnCQSt50p4Zo4sP0Nye83c6oJFeVhxOfmL5QSbpfzxC8ajquT3R2ZpS+k+1pg==@linaro.org X-Google-Smtp-Source: AGHT+IGLejwWxrrp+/ErhJpDvXxfnr9WHw1jUL9lM8cB3ILDlCKdiUyPOFL0fNsOSbMDmte8aeId X-Received: by 2002:a05:620a:4708:b0:7d3:d06c:5d58 with SMTP id af79cd13be357-7d3f98ecf99mr1664103485a.17.1750681399535; Mon, 23 Jun 2025 05:23:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681399; cv=none; d=google.com; s=arc-20240605; b=GKUhyHr2CAWTj90zDG5iDOEZ8uYuKg/0dxlcJAn6+ovbGfcqBTSwCwH70/f8DQGnuZ qF0m+oTi8Xa7RZSS1nKDuatmlysO+m7117W6VDntvik5Hlm1fTKVdK/XrFW4bEAa+I7/ nAboYMC8dgbZQFzXLVXed/Ihfwn39XWKQ6T3d2FQpj11x727Ck1FBVUiEQZQEDrkOz2q BtwMyNr6/lmwaAFDZwbng0tf9H5G+NSjj7LhRbFij3QgIp/PL8DCnnI8xSzWIukpCf9p TjN7ojFMa8qbJb2t93mYHEx05hFsqmZOE4tPySxl2/AWqTJhTEU+cFfD6lUNroXEomHZ N9uQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=CoTleeCUcvYndolgWSxVbjuEBw5fGt+mb1nmRFlbWPU=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=IvaV/OZQVT/wES7w/rH14MNCxXFSJFyi1ImbKpPWyoQvLGjBd55DdP1aJtrJXweHnS U+WoNcJvJbEWqljWKDI243Guxq2nimNVmul0hiiWRq4rCQ5tGuickYEet4PDjwjkp7uI ifb0hop2nsyGmRdDhRWzmNFP/Lyx2toEpzEYac+Hd8DUkLchndKazr+8J+GKQniS/7ax FpUWsakKK9xmEpajjo7QaKRXLJ6AKVgkHqKGuG4Dxq/hoKq5f5fW5gKKeyBdX/KbpvuQ pD5RL9tpRtCcGH7QKLPy+3oK97amqnPyelWBr+7RUoa6PBn2j/KbsE0Ym52jLkjIutoi 6h2A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=T22vsVJt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-453647071f4sm109685435e9.34.2025.06.23.05.20.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:20:19 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 18/26] hw/arm/virt: Only require TCG || QTest to use TrustZone Date: Mon, 23 Jun 2025 14:18:37 +0200 Message-ID: <20250623121845.7214-19-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We only need TCG (or QTest) to use TrustZone, whether KVM or HVF are used is not relevant. Reported-by: Alex Bennée Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/arm/virt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 99fde5836c9..b49d8579161 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2203,7 +2203,7 @@ static void machvirt_init(MachineState *machine) exit(1); } - if (vms->secure && (kvm_enabled() || hvf_enabled())) { + if (vms->secure && !tcg_enabled() && !qtest_enabled()) { error_report("mach-virt: %s does not support providing " "Security extensions (TrustZone) to the guest CPU", current_accel_name()); From patchwork Mon Jun 23 12:18:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899227 Delivered-To: patch@linaro.org Received: by 2002:adf:e506:0:b0:3a6:d909:26ce with SMTP id j6csp862200wrm; Mon, 23 Jun 2025 05:28:58 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVJa+7lECbOIiQzZ9s6Xb31Yka+ssLnWIhP3TGSSYPr12lJfy+Dhuel7ko5wZOBbkH2ZcA9eQ==@linaro.org X-Google-Smtp-Source: AGHT+IF9krTeW7AHcRruO0O7CJWcB6F6/d+DJqNLsrtfsytkOnK1aID+8rCbqQuTEptAogr6a+Kq X-Received: by 2002:a05:622a:18aa:b0:4a7:18aa:121b with SMTP id d75a77b69052e-4a77a20d363mr201665421cf.20.1750681738121; Mon, 23 Jun 2025 05:28:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681738; cv=none; d=google.com; s=arc-20240605; b=N0hu/8rivqtMp43D9YtP15LPo2zfF/8amG/hVrdrVzZDrPLq4NW2MgBPtbezdsNRzE ezYG2FuMrbhU0aelAMoXMutlDjKK64QREg1Cv/3Cr1DFP+kC9j1A8b7+5CDdH58bcNdS crJthhSbdaSCH8W7gR7Na02z9iiLWsbi9mlnqsqQf5kW/LraEBmfBvRTBc0Rw1YSDYQN HZ/Z0Bl8+h6DUNAUXqJvR1yhlaEBRlf9Ed5EQyZOlnJ2zHxBuOetOeNp6QbTnjNJCMlv FDuEw2xyVe1Ye+kh7HL6x2+JzncXhY6icd8e5FRhdmVGIX+hL/61h/C4JbPSrnE1tzRG vYeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=jKb7+45W8wr+DNWypSxWBKVEj0bAIAzVgg/1Er2vy8s=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=PezKKp7iGda3kahH2qieEYONd0jeykAzsBj+uv0PZaqSNP+Euwnfe6ytSPy3KzXD4d /prZCzvA6ZDXXrlB3h+zBh7nivMPWTI1ncENLdKTMsiRaqFE8W/YDW3epPhxBr7BePaZ JGY0sCt2/pvRttiSZUfVJ8ak/3W/CN6zdWTXjHaP21CabvYJ7DcFOA9MQ/ni8xLDTDP4 qJEIayncOalV981rhxlmFZ3fVXqPHLx4iyK1IT0zZsGgqzmO1iezD5NxasOH6lXobZUJ fyEq9BKA3RFCcQZsC/4fvz7BQmhRrtEt1eAYUpGLxWgkc1EfIa0pY3rcUAoT+9nDes9M WPuw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Vy6VQW1v; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d0f189cdsm9446171f8f.35.2025.06.23.05.20.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:20:24 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 19/26] hw/arm/virt: Only require TCG || QTest to use virtualization extension Date: Mon, 23 Jun 2025 14:18:38 +0200 Message-ID: <20250623121845.7214-20-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We can not start in EL2 / EL3 with anything but TCG (or QTest); whether KVM or HVF are used is not relevant. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée --- hw/arm/virt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index b49d8579161..a9099570faa 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2210,7 +2210,7 @@ static void machvirt_init(MachineState *machine) exit(1); } - if (vms->virt && (kvm_enabled() || hvf_enabled())) { + if (vms->virt && !tcg_enabled() && !qtest_enabled()) { error_report("mach-virt: %s does not support providing " "Virtualization extensions to the guest CPU", current_accel_name()); From patchwork Mon Jun 23 12:18:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899230 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:25c5:b0:3a5:8cf5:b212 with SMTP id fs5csp2582544wrb; Mon, 23 Jun 2025 05:32:36 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUvjQ7PaOu74B72OxW8x/37UKcG0c0Y607ZEP/3VGxf8AERUSNRMnAX3vKi4NulgN7uuPSVYw==@linaro.org X-Google-Smtp-Source: AGHT+IFnXH4IeVvo1T2U6JYGnr57L0PH3uP1gSazpX11AzbOxv+AfcO9PsIkO4l3mZFSP38VFUPL X-Received: by 2002:a05:620a:17a1:b0:7d3:acfa:de46 with SMTP id af79cd13be357-7d3fc0560cfmr1409957485a.21.1750681839695; Mon, 23 Jun 2025 05:30:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681839; cv=none; d=google.com; s=arc-20240605; b=MvApGaX7Ju5LJiJa7YtWwLajcqv8om+fdVtiCwdON/4QMk1buNRhL8//mk8SbJzuHN NvfNySMnUhujzU2AtqilcI0/Di//lLNztlkGapRla8L84pzVaCNLbghEIRrcT3DrExvS 92zDFLAmTwQtlwInibLaIWNXtRWGrC4NWe8V+Rn/1dpITCtAcwVH+9YeaAC+qclmymaK AwuK5Xp7LzcX5z7tPJl7rK5buRSCARr/PjpZGa5MBKa3jlFGAASvaUjbqK4Yjb/0peli Y9UrdNz3c5XD0iAPOTFSlqJIMgmA+0jj4KeSwjfS2nxfx/ylzpnH+0Q8tn3fQ3KHMeWK N1jg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=fvGV0OwfNAMYe1Mulybvoaq3k7G7T7tR2QdHLx3eR4k=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=V2hE9Qyn+OXoy4btKj+3s8cDmnafsMP2XPJoCnoDdmGImPV0lZIxm6aflkZyXnYUp0 LRK5NRLLJP7LuQjyfacNwHbbZEyI/eq6sCIrvVPvERNv/cIUJrx3JGlaJt+ENil2Q7++ KIF+xqfL7KeJfSjzeioLFIm4RPz+9KCHEyx3LzWDX6xsYq5MV7oT1xQfYZeMrihsQNpy ENYwQFECHCF5/75EP8z/dXuvPl7bEJ/aXRUtrKRiWhl40r/mL+pFsbcOPLp/HHcKjzAN Qsp18ir7XeLicyEleHznjCX5T88QymqxjqZXMFj4gNm/VINMCGhtsfwZpvv6A7zX5zrf mnsA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=n113Z5x9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d0f19b30sm9525253f8f.37.2025.06.23.05.20.28 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:20:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 20/26] hw/arm/virt: Rename cpu_post_init() -> post_cpus_gic_realized() Date: Mon, 23 Jun 2025 14:18:39 +0200 Message-ID: <20250623121845.7214-21-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QDev uses _post_init() during instance creation, before being realized. Since here both vCPUs and GIC are REALIZED, rename as virt_post_cpus_gic_realized() for clarity. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/arm/virt.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a9099570faa..da453768cce 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2032,7 +2032,8 @@ static void finalize_gic_version(VirtMachineState *vms) * virt_cpu_post_init() must be called after the CPUs have * been realized and the GIC has been created. */ -static void virt_cpu_post_init(VirtMachineState *vms, MemoryRegion *sysmem) +static void virt_post_cpus_gic_realized(VirtMachineState *vms, + MemoryRegion *sysmem) { int max_cpus = MACHINE(vms)->smp.max_cpus; bool aarch64, pmu, steal_time; @@ -2349,7 +2350,7 @@ static void machvirt_init(MachineState *machine) create_gic(vms, sysmem); - virt_cpu_post_init(vms, sysmem); + virt_post_cpus_gic_realized(vms, sysmem); fdt_add_pmu_nodes(vms); From patchwork Mon Jun 23 12:18:40 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899222 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3840417ltt; Mon, 23 Jun 2025 05:24:34 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXu4u5earQ6RhHPeo3Ke+D34W/LnfxIRzIhp7tbiyg9LHEKSFLlbk8TRRaaJiKJINyeQyXgcw==@linaro.org X-Google-Smtp-Source: AGHT+IGKg0bVHpy2nZkpQ71AnWFPGqSTKoIsG+8O7tvgCW0rDIkRBE7AX6DnzS9vQf82dTfiyTfs X-Received: by 2002:a05:620a:2683:b0:7d3:e7ed:e3a4 with SMTP id af79cd13be357-7d3fbfb9980mr1613149285a.11.1750681474034; Mon, 23 Jun 2025 05:24:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681474; cv=none; d=google.com; s=arc-20240605; b=CnO8Ks9muFp9PA9iTUQg1eZnHjJ71JVIIugvdAm04afApc/Quysi3/+TPrIMqAuptZ P9BTVrPM/oRxNqj7hO1hn6a0atL1k2s/rM4cLS49TcsUjI0EI77OPT9aP01A1+Z7auGu pK/U8WGA5q7GAD0qqkgvrcJI0tmQS/in3cEixpUAjvN7uiWi8YkXqLaQL1wXQZ65Afdc tPdPLHPheHDennXq3ZRO5Ozckoni0o/UItehZLlIc1o38SkG1OgyNpwAWBNK5KExG/QK +E7pT6lkunr/UvG74xGJPGKa+GUIjr1CVVY1DjGiYxc/njuqMjDv9Tul9p6r4Wr+G71s X/iA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=X1avEvgULJGN3+NnzgbjknnR4xz+wRJgrCM6KmdqT58=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=IBwCxJ5CnHuyY/JNzdZZsKYAh+gCMF9LGfR13q9cCDILKLQKuWPRAN3LZnBOuIpQsJ JLJaVp1cd7vzYxbhzinIQumCWh3zrFutTlxbMoj8vEYZsbh3bNGQPwjDavc8UarVj+WR Bsohh5xFHu3RwgiqcWwl4lL7EXwHwwm7OYmrMVHWakurdiKQ8ayo/BUmnxpWxpuFQ6jg qTTM2zXsz8+43CX9r5Q5UrOAhTqEibnXSo1gvhH2ca5B/U8Oz2NGVmnpMvmmRPqwYygX dH+KHFf6HRvNE5M1Hk6kzcjBnG0CXOefZL5KBshr1DYu0gMB2ckYIDktkBFPpIqZPH7r g+EA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=g7xN2Jh9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d0f18a29sm9449877f8f.36.2025.06.23.05.20.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:20:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 21/26] hw/arm/sbsa-ref: Tidy up use of RAMLIMIT_GB definition Date: Mon, 23 Jun 2025 14:18:40 +0200 Message-ID: <20250623121845.7214-22-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Define RAMLIMIT_BYTES using the TiB definition and display the error parsed with size_to_str(): $ qemu-system-aarch64-unsigned -M sbsa-ref -m 9T qemu-system-aarch64-unsigned: sbsa-ref: cannot model more than 8 TiB of RAM Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/arm/sbsa-ref.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index deae5cf9861..15c1ff4b140 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -19,6 +19,7 @@ */ #include "qemu/osdep.h" +#include "qemu/cutils.h" #include "qemu/datadir.h" #include "qapi/error.h" #include "qemu/error-report.h" @@ -53,8 +54,7 @@ #include "target/arm/cpu-qom.h" #include "target/arm/gtimer.h" -#define RAMLIMIT_GB 8192 -#define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB) +#define RAMLIMIT_BYTES (8 * TiB) #define NUM_IRQS 256 #define NUM_SMMU_IRQS 4 @@ -756,7 +756,9 @@ static void sbsa_ref_init(MachineState *machine) sms->smp_cpus = smp_cpus; if (machine->ram_size > sbsa_ref_memmap[SBSA_MEM].size) { - error_report("sbsa-ref: cannot model more than %dGB RAM", RAMLIMIT_GB); + char *size_str = size_to_str(RAMLIMIT_BYTES); + + error_report("sbsa-ref: cannot model more than %s of RAM", size_str); exit(1); } From patchwork Mon Jun 23 12:18:41 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899210 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3839699ltt; Mon, 23 Jun 2025 05:23:16 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXmtKSjhsK/NxGjXVTj6FIROU4i2lvmgi91VZdJwfrTNltnik3/wkHllM682WuCCp5KtUcIzA==@linaro.org X-Google-Smtp-Source: AGHT+IEE1WKgV2ABjv4AK+aX17xQlWpOJqFrytv55IQtr/BdLq0fuvEWWJHD2GU6xvxo/6aUNOIy X-Received: by 2002:a05:6214:1c4b:b0:6fa:b468:caf4 with SMTP id 6a1803df08f44-6fd0c6b0241mr172707306d6.0.1750681395841; Mon, 23 Jun 2025 05:23:15 -0700 (PDT) ARC-Seal: i=1; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d0f104f6sm9656927f8f.12.2025.06.23.05.20.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:20:39 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 22/26] tests/functional: Set sbsa-ref machine type in each test function Date: Mon, 23 Jun 2025 14:18:41 +0200 Message-ID: <20250623121845.7214-23-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org fetch_firmware() is only about fetching firmware. Set the machine type and its default console in test_sbsaref_edk2_firmware(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Leif Lindholm --- tests/functional/test_aarch64_sbsaref.py | 5 +++-- tests/functional/test_aarch64_sbsaref_alpine.py | 3 ++- tests/functional/test_aarch64_sbsaref_freebsd.py | 3 ++- 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/tests/functional/test_aarch64_sbsaref.py b/tests/functional/test_aarch64_sbsaref.py index e6a55aecfac..d3402f5080a 100755 --- a/tests/functional/test_aarch64_sbsaref.py +++ b/tests/functional/test_aarch64_sbsaref.py @@ -40,8 +40,6 @@ def fetch_firmware(test): with open(path, "ab+") as fd: fd.truncate(256 << 20) # Expand volumes to 256MiB - test.set_machine('sbsa-ref') - test.vm.set_console() test.vm.add_args( "-drive", f"if=pflash,file={fs0_path},format=raw", "-drive", f"if=pflash,file={fs1_path},format=raw", @@ -68,8 +66,11 @@ class Aarch64SbsarefMachine(QemuSystemTest): def test_sbsaref_edk2_firmware(self): + self.set_machine('sbsa-ref') + fetch_firmware(self) + self.vm.set_console() self.vm.add_args('-cpu', 'cortex-a57') self.vm.launch() diff --git a/tests/functional/test_aarch64_sbsaref_alpine.py b/tests/functional/test_aarch64_sbsaref_alpine.py index 6108ec65a54..87769993831 100755 --- a/tests/functional/test_aarch64_sbsaref_alpine.py +++ b/tests/functional/test_aarch64_sbsaref_alpine.py @@ -26,8 +26,9 @@ class Aarch64SbsarefAlpine(QemuSystemTest): # We only boot a whole OS for the current top level CPU and GIC # Other test profiles should use more minimal boots def boot_alpine_linux(self, cpu=None): - fetch_firmware(self) + self.set_machine('sbsa-ref') + fetch_firmware(self) iso_path = self.ASSET_ALPINE_ISO.fetch() self.vm.set_console() diff --git a/tests/functional/test_aarch64_sbsaref_freebsd.py b/tests/functional/test_aarch64_sbsaref_freebsd.py index 26dfc5878bb..3cddc082f3b 100755 --- a/tests/functional/test_aarch64_sbsaref_freebsd.py +++ b/tests/functional/test_aarch64_sbsaref_freebsd.py @@ -26,8 +26,9 @@ class Aarch64SbsarefFreeBSD(QemuSystemTest): # We only boot a whole OS for the current top level CPU and GIC # Other test profiles should use more minimal boots def boot_freebsd14(self, cpu=None): - fetch_firmware(self) + self.set_machine('sbsa-ref') + fetch_firmware(self) img_path = self.ASSET_FREEBSD_ISO.fetch() self.vm.set_console() From patchwork Mon Jun 23 12:18:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899220 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3840210ltt; Mon, 23 Jun 2025 05:24:12 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX3JhkxrSAwvOSD84O7clRV96gXR/KHHyvRc65HAsjmu8Ija/DwHjY/sfMBemj29VSb6Zz+XA==@linaro.org X-Google-Smtp-Source: AGHT+IFYftcj2/Q/q795UYINm40Y9HymKguoW7onbVgglyNP/sMUFc3tE3SwgiVXqvsx0AkGuzbF X-Received: by 2002:a05:620a:2951:b0:7ca:efbd:f4f4 with SMTP id af79cd13be357-7d3f994d55bmr1909020885a.56.1750681452633; Mon, 23 Jun 2025 05:24:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681452; cv=none; d=google.com; s=arc-20240605; b=G71T9YQMkB4N/o8QJhJgIrl96CpqCDhq8sNLWP+Pt0US7Bg3xJCVTiZ+eQuATAaUrA O4v5VoehPOgGzkdzJ5DC5SgGG9ZUr5o4/nra4releEk3irrA9jKGmQjWn4RgVegMwf7T VN+sa5djrHH8pYIU/SjcOGflpfx0ToNbciZ0RR769WLv/ERphWTW2cl+hx76T1anIA+H HKlicPFMFmF3ctPlnkLItFEaDCM7DIdHPiwArVuzV7OkgHyDdkTzxLG5SufiF+V+sQsG qIv5wlRA08yIoZ5HGTY2QFA26g6rEBlSDpGDrytNoCjNIRq7nhu713V1jX3WUnM9tYYz JERQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Y66de3esKoxe7Lq7nXgyyvCOXzL/4wNdUP/QM7Hg6f4=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=Qj4JXJZvg4I7Gvbpq/Dba2t5gwBBaQH0G1fKWk6ELmwaqFXHLo597Ch3Gu1M6/rVJp DvmzgIr9YFTOliuAkBQkut9xnKjR1G5LqyL07hqvjX2+6lWjq81RWaaS+m/26CCimUcq VPy2TmzvZIjRf1KyAPkEKH/OU0e/To5VheqajdsiNuJnLcvVWke4KPxvAGxCXCfZ73SB LW3d8ciCtB1zXNgb1ZyBFqGPwOkC0iA5wb8on1frIvEz8l7PYBnYRXORzk2IGHF5ghRR YTYhA1qk4udVVVWl6rT+0AzVCDxw0LdmBuhQ5Q5Vl3bo6gn0TW3VFgFWxV1I0ZN0h7tB Golw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ldciURYT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d117c0fcsm9565403f8f.62.2025.06.23.05.20.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:20:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 23/26] tests/functional: Restrict nested Aarch64 Xen test to TCG Date: Mon, 23 Jun 2025 14:18:42 +0200 Message-ID: <20250623121845.7214-24-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Currently QEMU only support accelerating EL0 and EL1, so features requiring EL2 (like virtualization) or EL3 must be emulated with TCG. On macOS this test fails: qemu-system-aarch64: mach-virt: HVF does not support providing Virtualization extensions to the guest CPU Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- tests/functional/test_aarch64_xen.py | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/functional/test_aarch64_xen.py b/tests/functional/test_aarch64_xen.py index 339904221b0..261d796540d 100755 --- a/tests/functional/test_aarch64_xen.py +++ b/tests/functional/test_aarch64_xen.py @@ -33,6 +33,7 @@ def launch_xen(self, xen_path): """ Launch Xen with a dom0 guest kernel """ + self.require_accelerator("tcg") # virtualization=on self.set_machine('virt') self.cpu = "cortex-a57" self.kernel_path = self.ASSET_KERNEL.fetch() From patchwork Mon Jun 23 12:18:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899221 Delivered-To: patch@linaro.org Received: by 2002:a05:6504:191c:b0:290:25b2:841c with SMTP id v28csp3840413ltt; Mon, 23 Jun 2025 05:24:34 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUwjKKCfVh1EqoGnzYzHonFOUBB/ABUb+HIvvZGlq/a57S6LcD4zZ5oxBe3be1yvDulJxbNgg==@linaro.org X-Google-Smtp-Source: AGHT+IE4Yit/P4vZUONe6mKndyJrNsrYFwmgc4fuJbBv+H8XFSJCtOVnqmNoNiWuGZjCLKBzJs7l X-Received: by 2002:ac8:59c6:0:b0:4a6:f3f7:4c28 with SMTP id d75a77b69052e-4a77a24bcc4mr179089451cf.17.1750681473839; Mon, 23 Jun 2025 05:24:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681473; cv=none; d=google.com; s=arc-20240605; b=e9WkmuqGDolmlqGtvVw6JUTOBdML3/JG5b78Xse7gva/Onz+7v9TSdsED0WJhZZMkL wgDLUGpV/Adfmone+N2ozpDIZwL+hTROdZZU/zYSk+JL2rWVJL1EH4UthEuoVCewS3qB H9evwGvkXVY+ZYBLGbpWUHVBJ3AZFGB3yoozjpdOazgEaLrDg8VSMxSKw86WKjH5FYIz nh+a6YHSHpzAsZPtQYVxO+lJhT4g19NLgiTu7uWaCCSsSmmo4+W0oo108geip/IKIZpW EdtjQRVZET7GrwsGcMbeW3516+zXq9Pq8VVdOyTAu0wgIA1ceS3dSw7833SvnAgFe8Mb /40Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=/XMJ0zIICEYOJOmZnjjg6la4eos6APBolhDpaT3Vg7M=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=WbW23o4tQBYPG7e7/VVlsIgiFtc3lgHi8dHiU2rVdF3YcLNZQQvpa+pMZJUeAXFHmV loXEcEyLhQag7HAo5pGjzcQhfq0kv12TMs11LWvLXG3NvPEJBONs+KI8sOUjT/ApUkox hUDPj+XVAPn0Ih+P0WvaFLAhU8Od73odTwpa47V8Li+aTGm5K1DEseZgrz+zaapJ2fcP zwvJRi9I0sff8bwG6GUceUDegrYwUuC2robHGFtGkAW05FlsK6MVG+iBuuQxsNmpEhJe UWDMk9ZTxCg4TIAomM+/DAJYvuWxAdgtd+9wd35yZGdxykflqYrFa3jfuZmzJFxcVbqT PNZA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="dn8/lNAX"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d0f10138sm9313250f8f.3.2025.06.23.05.20.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:20:49 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 24/26] tests/functional: Require TCG to run Aarch64 imx8mp-evk test Date: Mon, 23 Jun 2025 14:18:43 +0200 Message-ID: <20250623121845.7214-25-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The imx8mp-evk machine can only run with the TCG accelerator. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth --- tests/functional/test_aarch64_imx8mp_evk.py | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/functional/test_aarch64_imx8mp_evk.py b/tests/functional/test_aarch64_imx8mp_evk.py index 638bf9e1310..99ddcdef835 100755 --- a/tests/functional/test_aarch64_imx8mp_evk.py +++ b/tests/functional/test_aarch64_imx8mp_evk.py @@ -49,6 +49,7 @@ def setUp(self): self.DTB_OFFSET, self.DTB_SIZE) def test_aarch64_imx8mp_evk_usdhc(self): + self.require_accelerator("tcg") self.set_machine('imx8mp-evk') self.vm.set_console(console_index=1) self.vm.add_args('-m', '2G', From patchwork Mon Jun 23 12:18:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 899229 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:25c5:b0:3a5:8cf5:b212 with SMTP id fs5csp2581586wrb; Mon, 23 Jun 2025 05:30:39 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWPAYHRRr0NAhA5W75NwRA4k/Xf0g1k+KoiAmpDG1SBmKV4gRJtancB1+moAsLVxF5obwG9uA==@linaro.org X-Google-Smtp-Source: AGHT+IFELkk74KNl+q2MVSacm+fNKz6hEeKDGYSA8Nq/K0hOwdAhdldI9Hfl5NdRTsGrkSkvwzbN X-Received: by 2002:a05:6122:2a46:b0:530:6e61:d1e1 with SMTP id 71dfb90a1353d-531ad5ac01emr6835717e0c.4.1750681839399; Mon, 23 Jun 2025 05:30:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1750681839; cv=none; d=google.com; s=arc-20240605; b=WJQ8+NDnUk7PScmdX9GjlNOYleaGFw+ZnX1KgnVdIZM2agWepw+PWNBAKjQIW7ByER qnFtTp9X1SRne4S8G5lf9pRDeHZny7q6BXTSRBCPfBcTDZgaGfS+nj/LW3tiE/IF/cSO MDAnj1UqsvJ07qWv3Iy1EH6EJiOLPsGvbZPODRytTbnZ+7FZmCuzbQyD/r6oOrfJv8ff xzLLRbh5SLAdsfkiGGm/XlTPs5UvjNBg8+GrwfvnMfN4lIufQ84rcU0eLt6Db1+6CK1u 9LpG+xnapy6rPIyHYhscnSxUPeAsRld0JXPn7yN4QnSQ22qPQpBsBMaaLA24b5y9DVHV fwYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=uYUPy6c9pCrsEaCpnIHygEtzD7GwjrL4VzsD7TAXMX4=; fh=x5VJDl6FrykOwQuDK8d67WYnSid/uzpvpvankGNJv0o=; b=HpmYShqWXL0SicqxX/NsysqxYPaPvYIZeNwkt3I9YaEoX1TGDDXDDy+OYcxaXM+2kY VP05Z22O10CgQuEwub7REdxeJfsaEkAosZ4BZPh6jUVOqfCQZNT+FA2+y+OmzDSQOWkh a36+crpFmG3yGSb6LMESPXrmNhpEQLbCxI8uFgU0RO+dfjR1OHJOD459RBraTgkyjASl vyhGdze8g85UKhIbSxzo5FmW00QSyQ3zL4NqvZLMXeVLnFf+14osvf2Kjw2o7kEZERY7 AiqDSJZaGoNa4ir5Xdwkjve8s6e+d2NzpZXo36No6Kpre93QIBKjgfJj6UHrPd9mLiHg 9tLA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=k8xT4zvz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6e2036094sm2263838f8f.99.2025.06.23.05.20.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:20:54 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 25/26] tests/functional: Add hvf_available() helper Date: Mon, 23 Jun 2025 14:18:44 +0200 Message-ID: <20250623121845.7214-26-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth --- python/qemu/utils/__init__.py | 2 +- python/qemu/utils/accel.py | 8 ++++++++ tests/functional/qemu_test/testcase.py | 6 ++++-- 3 files changed, 13 insertions(+), 3 deletions(-) diff --git a/python/qemu/utils/__init__.py b/python/qemu/utils/__init__.py index 017cfdcda75..d2fe5db223c 100644 --- a/python/qemu/utils/__init__.py +++ b/python/qemu/utils/__init__.py @@ -23,7 +23,7 @@ from typing import Optional # pylint: disable=import-error -from .accel import kvm_available, list_accel, tcg_available +from .accel import hvf_available, kvm_available, list_accel, tcg_available __all__ = ( diff --git a/python/qemu/utils/accel.py b/python/qemu/utils/accel.py index 386ff640ca8..376d1e30005 100644 --- a/python/qemu/utils/accel.py +++ b/python/qemu/utils/accel.py @@ -82,3 +82,11 @@ def tcg_available(qemu_bin: str) -> bool: @param qemu_bin (str): path to the QEMU binary """ return 'tcg' in list_accel(qemu_bin) + +def hvf_available(qemu_bin: str) -> bool: + """ + Check if HVF is available. + + @param qemu_bin (str): path to the QEMU binary + """ + return 'hvf' in list_accel(qemu_bin) diff --git a/tests/functional/qemu_test/testcase.py b/tests/functional/qemu_test/testcase.py index 50c401b8c3c..2082c6fce43 100644 --- a/tests/functional/qemu_test/testcase.py +++ b/tests/functional/qemu_test/testcase.py @@ -23,7 +23,7 @@ import uuid from qemu.machine import QEMUMachine -from qemu.utils import kvm_available, tcg_available +from qemu.utils import hvf_available, kvm_available, tcg_available from .archive import archive_extract from .asset import Asset @@ -317,7 +317,9 @@ def require_accelerator(self, accelerator): :type accelerator: str """ checker = {'tcg': tcg_available, - 'kvm': kvm_available}.get(accelerator) + 'kvm': kvm_available, + 'hvf': hvf_available, + }.get(accelerator) if checker is None: self.skipTest("Don't know how to check for the presence " "of accelerator %s" % accelerator) From patchwork Mon Jun 23 12:18:45 2025 Content-Type: text/plain; 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d0ec947fsm9340220f8f.0.2025.06.23.05.20.58 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Jun 2025 05:20:59 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Leif Lindholm , qemu-arm@nongnu.org, =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Roman Bolshakov , Paolo Bonzini , Alexander Graf , Bernhard Beschow , John Snow , Thomas Huth , =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , kvm@vger.kernel.org, Eric Auger , Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Cameron Esfahani , Cleber Rosa , Radoslaw Biernacki , Phil Dennis-Jordan , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PATCH v3 26/26] tests/functional: Expand Aarch64 SMMU tests to run on HVF accelerator Date: Mon, 23 Jun 2025 14:18:45 +0200 Message-ID: <20250623121845.7214-27-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250623121845.7214-1-philmd@linaro.org> References: <20250623121845.7214-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Alex Bennée --- tests/functional/test_aarch64_smmu.py | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/tests/functional/test_aarch64_smmu.py b/tests/functional/test_aarch64_smmu.py index c65d0f28178..e0f4a922176 100755 --- a/tests/functional/test_aarch64_smmu.py +++ b/tests/functional/test_aarch64_smmu.py @@ -17,7 +17,7 @@ from qemu_test import LinuxKernelTest, Asset, exec_command_and_wait_for_pattern from qemu_test import BUILD_DIR -from qemu.utils import kvm_available +from qemu.utils import kvm_available, hvf_available class SMMU(LinuxKernelTest): @@ -45,11 +45,17 @@ def set_up_boot(self, path): self.vm.add_args('-device', 'virtio-net,netdev=n1' + self.IOMMU_ADDON) def common_vm_setup(self, kernel, initrd, disk): - self.require_accelerator("kvm") + if hvf_available(self.qemu_bin): + accel = "hvf" + elif kvm_available(self.qemu_bin): + accel = "kvm" + else: + self.skipTest("Neither HVF nor KVM accelerator is available") + self.require_accelerator(accel) self.require_netdev('user') self.set_machine("virt") self.vm.add_args('-m', '1G') - self.vm.add_args("-accel", "kvm") + self.vm.add_args("-accel", accel) self.vm.add_args("-cpu", "host") self.vm.add_args("-machine", "iommu=smmuv3") self.vm.add_args("-d", "guest_errors")